Eddie Hung
06f8f2654a
Working
2019-03-15 19:13:40 -07:00
Eddie Hung
8af9979aab
Revert "Add shregmap -init_msb_first and use in synth_xilinx"
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This reverts commit 26ecbc1aee
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2019-03-14 09:01:48 -07:00
Eddie Hung
f1a8e8a480
Merge remote-tracking branch 'origin/master' into xc7srl
2019-03-14 08:59:19 -07:00
Eddie Hung
26ecbc1aee
Add shregmap -init_msb_first and use in synth_xilinx
2019-03-14 08:10:02 -07:00
Clifford Wolf
399ab16315
Add $dffsr support to async2sync
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-09 11:52:00 -08:00
Eddie Hung
d03780c3f4
Fix spelling in pmgen/README.md
2019-03-05 17:55:29 -08:00
Clifford Wolf
ae9286386d
Only run derive on blackbox modules when ports have dynamic size
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-02 12:36:46 -08:00
Larry Doolittle
57f8bb471f
Try again for passes/pmgen/ice40_dsp_pm.h rule
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Tested on both in-tree and out-of-tree builds
2019-03-01 20:20:53 -08:00
Clifford Wolf
e847690bda
Fix multiple issues in wreduce FF handling, fixes #835
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-28 17:24:46 -08:00
Larry Doolittle
e2fc18f27b
Reduce amount of trailing whitespace in code base
2019-02-28 14:58:11 -08:00
Clifford Wolf
68a6937173
Fix pmgen for in-tree builds
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-28 14:56:05 -08:00
Clifford Wolf
64d91219b4
Fix pmgen for out-of-tree build
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-28 14:00:58 -08:00
Clifford Wolf
63be3f3bab
Improvements in "supercover" pass
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-27 11:45:13 -08:00
Clifford Wolf
a58dbcf2ba
Add "supercover" skeleton
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-27 11:37:08 -08:00
Larry Doolittle
61fc411c5d
Clean up some whitepsace outliers
2019-02-26 09:39:46 -08:00
Clifford Wolf
c258b99040
Minor changes ontop of 71bcc4c: Remove hierarchy warning that is redundant to -check
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-24 20:41:36 +01:00
Clifford Wolf
c118f9a377
Merge pull request #812 from ucb-bar/arrayhierarchyfixes
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Define basic_cell_type() function and use it to derive the cell type …
2019-02-24 11:39:13 -08:00
Clifford Wolf
cd722f26a5
Cleanups in ARST handling in wreduce
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-24 20:34:23 +01:00
Clifford Wolf
da14bc8524
Merge pull request #824 from litghost/fix_reduce_on_ff
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Fix WREDUCE on FF not fixing ARST_VALUE parameter.
2019-02-24 11:29:14 -08:00
Jim Lawson
71bcc4c644
Address requested changes - don't require non-$ name.
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Suppress warning if name does begin with a `$`.
Fix hierachy tests so they have something to grep.
Announce hierarchy test types.
2019-02-22 16:06:10 -08:00
Keith Rothman
25680f6a07
Fix WREDUCE on FF not fixing ARST_VALUE parameter.
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Adds test case that fails without code change.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-02-22 10:30:42 -08:00
Clifford Wolf
344afdcd5f
Merge pull request #740 from daveshah1/improve_dress
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Improve ABC netname preservation
2019-02-22 01:16:34 +01:00
Clifford Wolf
d55790909c
Hotfix for 4c82ddf
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-21 19:27:23 +01:00
Keith Rothman
4c82ddf394
Add -params mode to force undef parameters in selected cells.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-02-21 10:16:38 -08:00
Clifford Wolf
0e371109b0
Merge pull request #818 from YosysHQ/clifford/dffsrfix
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Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816
2019-02-21 18:58:44 +01:00
Clifford Wolf
893194689d
Fix typo in passes/pmgen/README.md
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-21 18:50:02 +01:00
Clifford Wolf
2da4c9c8f0
Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-21 13:49:45 +01:00
Clifford Wolf
2fe1c830eb
Bugfix in ice40_dsp
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-21 13:28:46 +01:00
Clifford Wolf
218e9051bb
Add "synth_ice40 -dsp"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-20 16:42:27 +01:00
Clifford Wolf
246391200e
Add FF support to wreduce
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-20 16:36:42 +01:00
Clifford Wolf
dca65d83a0
Detect and reject cases that do not map well to iCE40 DSPs (yet)
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-20 11:18:19 +01:00
Jim Lawson
5c4a72c43e
Fix normal (non-array) hierarchy -auto-top.
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Add simple test.
2019-02-19 14:35:15 -08:00
Clifford Wolf
5a853ed46c
Add actual DSP inference to ice40_dsp pass
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-17 15:35:48 +01:00
Clifford Wolf
c06c062469
Merge branch 'master' of github.com:YosysHQ/yosys into pmgen
2019-02-17 12:10:19 +01:00
Jim Lawson
5c504c5ae6
Define basic_cell_type() function and use it to derive the cell type for array references (instead of duplicating the code).
2019-02-15 11:31:37 -08:00
David Shah
a4515712cb
fsm_opt: Fix runtime error for FSMs without a reset state
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-07 10:35:36 +00:00
David Shah
58c22dae31
abc: Improved recovered netnames, also preserve src on nets with dress
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Signed-off-by: David Shah <davey1576@gmail.com>
2019-02-06 22:23:13 +01:00
David Shah
8524a479b1
abc: Preserve naming through ABC using 'dress' command
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-06 22:23:13 +01:00
whitequark
58d059ccb7
proc_clean: fix critical typo.
2019-01-23 22:08:38 +00:00
whitequark
95b6c35882
proc_clean: fix fully def check to consider compare/signal length.
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Fixes #790 .
2019-01-18 23:22:19 +00:00
Clifford Wolf
8ddec5d882
Progress in pmgen
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf
5216735210
Progress in pmgen, add pmgen README
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf
55ac030382
Fix pmgen "reject" statement
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf
d45379936b
Progress in pmgen
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf
1f8e76f993
Progress in pmgen
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf
b9545aa0e1
Progress in pmgen
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf
ad69c668ce
Add mockup .pmg (pattern matcher generator) file
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
whitequark
e792bd56b7
flowmap: clean up terminology.
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* "map": group gates into LUTs;
* "pack": replace gates with LUTs.
This is important because we have FlowMap and DF-Map, and currently
our messages are ambiguous.
Also clean up some other log messages while we're at it.
2019-01-08 02:05:06 +00:00
whitequark
211c26a4c9
flowmap: implement depth relaxation.
2019-01-08 01:13:05 +00:00
Clifford Wolf
8a63fc51d3
Bugfix in $memrd sharing
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-07 10:04:47 +01:00