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caravel/verilog/gl/gpio_control_block.v

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harden gpio_control_block
2021-11-04 09:19:12 -05:00
module gpio_control_block (mgmt_gpio_in,
mgmt_gpio_oeb,
mgmt_gpio_out,
one,
pad_gpio_ana_en,
pad_gpio_ana_pol,
pad_gpio_ana_sel,
pad_gpio_holdover,
pad_gpio_ib_mode_sel,
pad_gpio_in,
pad_gpio_inenb,
pad_gpio_out,
pad_gpio_outenb,
pad_gpio_slow_sel,
pad_gpio_vtrip_sel,
resetn,
resetn_out,
serial_clock,
serial_clock_out,
serial_data_in,
serial_data_out,
serial_load,
serial_load_out,
user_gpio_in,
user_gpio_oeb,
user_gpio_out,
vccd,
vccd1,
vssd,
vssd1,
zero,
gpio_defaults,
pad_gpio_dm);
output mgmt_gpio_in;
input mgmt_gpio_oeb;
input mgmt_gpio_out;
output one;
output pad_gpio_ana_en;
output pad_gpio_ana_pol;
output pad_gpio_ana_sel;
output pad_gpio_holdover;
output pad_gpio_ib_mode_sel;
input pad_gpio_in;
output pad_gpio_inenb;
output pad_gpio_out;
output pad_gpio_outenb;
output pad_gpio_slow_sel;
output pad_gpio_vtrip_sel;
input resetn;
output resetn_out;
input serial_clock;
output serial_clock_out;
input serial_data_in;
output serial_data_out;
input serial_load;
output serial_load_out;
output user_gpio_in;
input user_gpio_oeb;
input user_gpio_out;
input vccd;
input vccd1;
input vssd;
input vssd1;
output zero;
input [12:0] gpio_defaults;
output [2:0] pad_gpio_dm;
wire _000_;
wire _001_;
wire _002_;
wire _003_;
wire _004_;
wire _005_;
wire _006_;
wire _007_;
wire _008_;
wire _009_;
wire _010_;
wire _011_;
wire _012_;
wire _013_;
wire _014_;
wire _015_;
wire _016_;
wire _017_;
wire _018_;
wire _019_;
wire _020_;
wire _021_;
wire _022_;
wire _023_;
wire _024_;
wire _025_;
wire _026_;
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
wire _041_;
harden gpio_control_block
2021-11-04 09:19:12 -05:00
wire _042_;
wire _043_;
wire _044_;
wire _045_;
wire _046_;
wire _047_;
wire _048_;
wire _049_;
wire _050_;
wire _051_;
wire _052_;
wire _053_;
wire _054_;
wire _055_;
wire _056_;
wire _057_;
wire clknet_0_serial_clock;
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
wire clknet_0_serial_load;
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
wire clknet_1_0__leaf_serial_load;
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
wire clknet_1_1__leaf_serial_clock;
harden gpio_control_block
2021-11-04 09:19:12 -05:00
wire gpio_logic1;
wire gpio_outenb;
wire mgmt_ena;
wire net1;
wire net10;
wire net11;
wire net12;
wire net13;
wire net14;
wire net15;
wire net16;
wire net17;
wire net18;
wire net19;
wire net2;
wire net20;
wire net21;
wire net22;
wire net23;
wire net24;
wire net25;
wire net26;
wire net27;
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
wire net28;
wire net29;
harden gpio_control_block
2021-11-04 09:19:12 -05:00
wire net3;
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
wire net30;
wire net31;
wire net32;
wire net33;
wire net34;
wire net35;
wire net36;
wire net37;
wire net38;
wire net39;
harden gpio_control_block
2021-11-04 09:19:12 -05:00
wire net4;
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
wire net40;
wire net41;
wire net42;
wire net43;
wire net44;
wire net45;
wire net46;
wire net47;
wire net48;
wire net49;
harden gpio_control_block
2021-11-04 09:19:12 -05:00
wire net5;
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
wire net50;
wire net51;
wire net52;
wire net53;
wire net54;
wire net55;
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
wire net56;
wire net57;
harden gpio_control_block
2021-11-04 09:19:12 -05:00
wire net6;
wire net7;
wire net8;
wire net9;
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
wire one_buffered;
wire serial_clock_out_buffered;
wire serial_load_out_buffered;
harden gpio_control_block
2021-11-04 09:19:12 -05:00
wire \shift_register[0] ;
wire \shift_register[10] ;
wire \shift_register[11] ;
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
wire \shift_register[12] ;
harden gpio_control_block
2021-11-04 09:19:12 -05:00
wire \shift_register[1] ;
wire \shift_register[2] ;
wire \shift_register[3] ;
wire \shift_register[4] ;
wire \shift_register[5] ;
wire \shift_register[6] ;
wire \shift_register[7] ;
wire \shift_register[8] ;
wire \shift_register[9] ;
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
wire zero_buffered;
harden gpio_control_block
2021-11-04 09:19:12 -05:00
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__058__1_A (.DIODE(serial_load_out_buffered),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__061__A0 (.DIODE(user_gpio_oeb),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__062__B (.DIODE(user_gpio_out),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__068__B (.DIODE(gpio_defaults[0]),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__069__B (.DIODE(gpio_defaults[0]),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__070__B (.DIODE(gpio_defaults[2]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__071__B (.DIODE(gpio_defaults[2]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__072__B (.DIODE(gpio_defaults[8]),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__073__B (.DIODE(gpio_defaults[8]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__074__B (.DIODE(gpio_defaults[9]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__075__B (.DIODE(gpio_defaults[9]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__076__B (.DIODE(gpio_defaults[3]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__077__B (.DIODE(gpio_defaults[3]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__078__B (.DIODE(gpio_defaults[4]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__079__B (.DIODE(gpio_defaults[4]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__080__B (.DIODE(gpio_defaults[1]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__081__B (.DIODE(gpio_defaults[1]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__082__A (.DIODE(net29),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__082__B (.DIODE(gpio_defaults[10]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__083__B (.DIODE(gpio_defaults[10]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__084__B (.DIODE(gpio_defaults[11]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__085__B (.DIODE(gpio_defaults[11]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__086__B (.DIODE(gpio_defaults[12]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__087__B (.DIODE(gpio_defaults[12]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__088__B (.DIODE(gpio_defaults[5]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__089__B (.DIODE(gpio_defaults[5]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__090__B (.DIODE(gpio_defaults[6]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__091__B (.DIODE(gpio_defaults[6]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__092__B (.DIODE(gpio_defaults[7]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__093__B (.DIODE(gpio_defaults[7]),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__094__2_A (.DIODE(serial_load_out_buffered),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__097__5_A (.DIODE(serial_load_out_buffered),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__098__6_A (.DIODE(serial_load_out_buffered),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__099__7_A (.DIODE(serial_load_out_buffered),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA__101__9_A (.DIODE(serial_load_out_buffered),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__diode_2 ANTENNA__102__10_A (.DIODE(serial_load_out_buffered),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__diode_2 ANTENNA__132__RESET_B (.DIODE(net29),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__diode_2 ANTENNA__134__A (.DIODE(net29),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA_clkbuf_0_serial_clock_A (.DIODE(serial_clock),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA_clkbuf_0_serial_load_A (.DIODE(serial_load),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA_fanout27_A (.DIODE(net29),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__diode_2 ANTENNA_fanout28_A (.DIODE(net29),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA_input1_A (.DIODE(mgmt_gpio_oeb),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA_input2_A (.DIODE(mgmt_gpio_out),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA_input3_A (.DIODE(pad_gpio_in),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA_input4_A (.DIODE(resetn),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA_input5_A (.DIODE(serial_data_in),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__diode_2 ANTENNA_serial_load_out_buffer_A (.DIODE(serial_load_out_buffered),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__fill_1 FILLER_0_27 (.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_0_33 (.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__fill_1 FILLER_0_57 (.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_10_83 (.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_15_50 (.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_17_57 (.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_17_99 (.VGND(vssd),
Update gpio_control block
2021-11-04 10:58:58 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__decap_4 FILLER_1_30 (.VGND(vssd),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_1_34 (.VGND(vssd),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_2_32 (.VGND(vssd),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__decap_8 FILLER_2_41 (.VGND(vssd),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_2 FILLER_2_49 (.VGND(vssd),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_3_43 (.VGND(vssd),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_3_52 (.VGND(vssd),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_3_84 (.VGND(vssd),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_5_26 (.VGND(vssd),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_5_34 (.VGND(vssd),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_5_80 (.VGND(vssd),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_7_26 (.VGND(vssd),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_8_65 (.VGND(vssd),
gpio_control_block constrains fix (#69) Co-authored-by: Marwan Abbas <marwan@ciic.c.catx-ext-efabless.internal>
2022-04-15 13:50:54 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_8_99 (.VGND(vssd),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__fill_1 FILLER_9_99 (.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_10 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_11 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_12 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_13 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_14 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_15 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_16 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_17 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_18 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_19 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_20 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
sky130_fd_sc_hd__decap_3 PHY_21 (.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_22 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_23 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_24 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_25 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_26 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_27 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_28 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_29 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_30 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_31 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_32 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_33 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
Update gpio_control_block
2021-11-05 09:54:24 -05:00
sky130_fd_sc_hd__decap_3 PHY_34 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_35 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_36 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_37 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__decap_3 PHY_38 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_39 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
harden gpio_control_block
2021-11-04 09:19:12 -05:00
sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__decap_3 PHY_40 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_41 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
harden gpio_control_block
2021-11-04 09:19:12 -05:00
sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_6 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_7 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_8 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__decap_3 PHY_9 (.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_42 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_43 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_44 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_45 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_46 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_47 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_48 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_49 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_50 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_51 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_52 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_53 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_54 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_55 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_56 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_57 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_58 (.VGND(vssd),
.VPWR(vccd));
Update gpio_control_block
2021-11-05 09:54:24 -05:00
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_59 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_60 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_61 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_62 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_63 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_64 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_65 (.VGND(vssd),
.VPWR(vccd));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_66 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_67 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_68 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_69 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_70 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_71 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_72 (.VGND(vssd),
.VPWR(vccd));
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_73 (.VGND(vssd),
.VPWR(vccd));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _058__1 (.A(serial_load_out_buffered),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(net31));
sky130_fd_sc_hd__inv_2 _059__14 (.A(serial_clock_out_buffered),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(net44));
sky130_fd_sc_hd__and2_0 _060_ (.A(gpio_outenb),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.B(net1),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_041_));
sky130_fd_sc_hd__mux2_4 _061_ (.A0(user_gpio_oeb),
.A1(_041_),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.S(mgmt_ena),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(net17));
sky130_fd_sc_hd__nand2b_2 _062_ (.A_N(mgmt_ena),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.B(user_gpio_out),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_042_));
sky130_fd_sc_hd__and3b_2 _063_ (.A_N(net12),
.B(net11),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.C(net1),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_043_));
sky130_fd_sc_hd__and2b_2 _064_ (.A_N(_000_),
.B(_043_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_044_));
sky130_fd_sc_hd__o21ai_2 _065_ (.A1(net2),
.A2(_043_),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.B1(mgmt_ena),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_045_));
sky130_fd_sc_hd__o21ai_4 _066_ (.A1(_044_),
.A2(_045_),
.B1(_042_),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(net16));
sky130_fd_sc_hd__and2_2 _067_ (.A(gpio_logic1),
.B(net3),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net22));
sky130_fd_sc_hd__or2_0 _068_ (.A(net28),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.B(gpio_defaults[0]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_001_));
sky130_fd_sc_hd__nand2b_2 _069_ (.A_N(net26),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[0]),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_002_));
sky130_fd_sc_hd__or2_0 _070_ (.A(net25),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.B(gpio_defaults[2]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_003_));
sky130_fd_sc_hd__nand2b_2 _071_ (.A_N(net25),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[2]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_004_));
sky130_fd_sc_hd__or2_0 _072_ (.A(net27),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.B(gpio_defaults[8]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_005_));
sky130_fd_sc_hd__nand2b_2 _073_ (.A_N(net27),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[8]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_006_));
sky130_fd_sc_hd__or2_0 _074_ (.A(net27),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.B(gpio_defaults[9]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_007_));
sky130_fd_sc_hd__nand2b_2 _075_ (.A_N(net27),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[9]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_008_));
sky130_fd_sc_hd__or2_0 _076_ (.A(net25),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.B(gpio_defaults[3]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_009_));
sky130_fd_sc_hd__nand2b_2 _077_ (.A_N(net25),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[3]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_010_));
sky130_fd_sc_hd__or2_0 _078_ (.A(net23),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.B(gpio_defaults[4]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_011_));
sky130_fd_sc_hd__nand2b_2 _079_ (.A_N(net23),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[4]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_012_));
sky130_fd_sc_hd__or2_0 _080_ (.A(net26),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.B(gpio_defaults[1]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_013_));
sky130_fd_sc_hd__nand2b_2 _081_ (.A_N(net25),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[1]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_014_));
sky130_fd_sc_hd__or2_0 _082_ (.A(net29),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.B(gpio_defaults[10]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_015_));
sky130_fd_sc_hd__nand2b_2 _083_ (.A_N(net27),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[10]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_016_));
sky130_fd_sc_hd__or2_0 _084_ (.A(net28),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.B(gpio_defaults[11]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_017_));
sky130_fd_sc_hd__nand2b_2 _085_ (.A_N(net28),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[11]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_018_));
sky130_fd_sc_hd__or2_0 _086_ (.A(net28),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.B(gpio_defaults[12]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_019_));
sky130_fd_sc_hd__nand2b_2 _087_ (.A_N(net28),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[12]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_020_));
sky130_fd_sc_hd__or2_0 _088_ (.A(net23),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[5]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_021_));
sky130_fd_sc_hd__nand2b_2 _089_ (.A_N(net23),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[5]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_022_));
sky130_fd_sc_hd__or2_0 _090_ (.A(net24),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[6]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_023_));
sky130_fd_sc_hd__nand2b_2 _091_ (.A_N(net23),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[6]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_024_));
sky130_fd_sc_hd__or2_0 _092_ (.A(net24),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[7]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(_025_));
sky130_fd_sc_hd__nand2b_2 _093_ (.A_N(net24),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.B(gpio_defaults[7]),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(_026_));
sky130_fd_sc_hd__inv_2 _094__2 (.A(serial_load_out_buffered),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Y(net32));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _095__3 (.A(clknet_1_0__leaf_serial_load),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Y(net33));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _096__4 (.A(clknet_1_0__leaf_serial_load),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Y(net34));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _097__5 (.A(serial_load_out_buffered),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Y(net35));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _098__6 (.A(serial_load_out_buffered),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Y(net36));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _099__7 (.A(serial_load_out_buffered),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Y(net37));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _100__8 (.A(clknet_1_0__leaf_serial_load),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Y(net38));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _101__9 (.A(serial_load_out_buffered),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Y(net39));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _102__10 (.A(serial_load_out_buffered),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Y(net40));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _103__11 (.A(clknet_1_0__leaf_serial_load),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Y(net41));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__inv_2 _104__12 (.A(clknet_1_0__leaf_serial_load),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(net42));
sky130_fd_sc_hd__inv_2 _105__13 (.A(clknet_1_0__leaf_serial_load),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Y(net43));
sky130_fd_sc_hd__dfbbn_2 _106_ (.CLK_N(net31),
.D(net49),
.RESET_B(_001_),
.SET_B(_002_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(mgmt_ena),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Q_N(_056_));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfbbn_2 _107_ (.CLK_N(net32),
.D(net52),
.RESET_B(_003_),
.SET_B(_004_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(net13),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Q_N(_055_));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfbbn_2 _108_ (.CLK_N(net33),
.D(net51),
.RESET_B(_005_),
.SET_B(_006_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(net18),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Q_N(_054_));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfbbn_2 _109_ (.CLK_N(net34),
.D(net48),
.RESET_B(_007_),
.SET_B(_008_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(net19),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Q_N(_053_));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfbbn_2 _110_ (.CLK_N(net35),
.D(net50),
.RESET_B(_009_),
.SET_B(_010_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(net15),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Q_N(_052_));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfbbn_2 _111_ (.CLK_N(net36),
.D(net54),
.RESET_B(_011_),
.SET_B(_012_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(net14),
.Q_N(_051_));
sky130_fd_sc_hd__dfbbn_2 _112_ (.CLK_N(net37),
.D(net47),
.RESET_B(_013_),
.SET_B(_014_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(gpio_outenb),
.Q_N(_050_));
sky130_fd_sc_hd__dfbbn_2 _113_ (.CLK_N(net38),
.D(net53),
.RESET_B(_015_),
.SET_B(_016_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(net10),
.Q_N(_000_));
sky130_fd_sc_hd__dfbbn_2 _114_ (.CLK_N(net39),
.D(net45),
.RESET_B(_017_),
.SET_B(_018_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(net11),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Q_N(_049_));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfbbn_2 _115_ (.CLK_N(net40),
.D(net46),
.RESET_B(_019_),
.SET_B(_020_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(net12),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Q_N(_048_));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfbbn_2 _116_ (.CLK_N(net41),
.D(net57),
.RESET_B(_021_),
.SET_B(_022_),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.Q(net7),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q_N(_047_));
sky130_fd_sc_hd__dfbbn_2 _117_ (.CLK_N(net42),
.D(net56),
.RESET_B(_023_),
.SET_B(_024_),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.Q(net9),
.Q_N(_046_));
sky130_fd_sc_hd__dfbbn_2 _118_ (.CLK_N(net43),
.D(net55),
.RESET_B(_025_),
.SET_B(_026_),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.Q(net8),
.Q_N(_057_));
sky130_fd_sc_hd__dfrtp_4 _119_ (.CLK(serial_clock_out_buffered),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.D(net5),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.RESET_B(net26),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[0] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _120_ (.CLK(serial_clock_out_buffered),
.D(net49),
.RESET_B(net25),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[1] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _121_ (.CLK(serial_clock_out_buffered),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.D(net47),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.RESET_B(net26),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[2] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _122_ (.CLK(serial_clock_out_buffered),
.D(net52),
.RESET_B(net25),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[3] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _123_ (.CLK(serial_clock_out_buffered),
.D(net50),
.RESET_B(net24),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[4] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _124_ (.CLK(serial_clock_out_buffered),
.D(net54),
.RESET_B(net24),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[5] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _125_ (.CLK(serial_clock_out_buffered),
.D(net57),
.RESET_B(net23),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[6] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _126_ (.CLK(serial_clock_out_buffered),
.D(net56),
.RESET_B(net23),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[7] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _127_ (.CLK(clknet_1_1__leaf_serial_clock),
.D(net55),
.RESET_B(net24),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[8] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _128_ (.CLK(clknet_1_1__leaf_serial_clock),
.D(net51),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.RESET_B(net27),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[9] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _129_ (.CLK(clknet_1_1__leaf_serial_clock),
.D(net48),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.RESET_B(net27),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[10] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _130_ (.CLK(clknet_1_1__leaf_serial_clock),
.D(net53),
.RESET_B(net28),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
.Q(\shift_register[11] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_4 _131_ (.CLK(clknet_1_1__leaf_serial_clock),
.D(net45),
.RESET_B(net28),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.Q(\shift_register[12] ));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dfrtp_2 _132_ (.CLK(net44),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.D(\shift_register[12] ),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.RESET_B(net29),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.Q(net21));
sky130_fd_sc_hd__buf_2 _133_ (.A(net3),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(net6));
sky130_fd_sc_hd__buf_2 _134_ (.A(net29),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(net20));
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
sky130_fd_sc_hd__clkbuf_16 clkbuf_0_serial_clock (.A(serial_clock),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.X(clknet_0_serial_clock));
sky130_fd_sc_hd__clkbuf_16 clkbuf_0_serial_load (.A(serial_load),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
.X(clknet_0_serial_load));
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
sky130_fd_sc_hd__clkbuf_16 clkbuf_1_0__f_serial_clock (.A(clknet_0_serial_clock),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(serial_clock_out_buffered));
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
sky130_fd_sc_hd__clkbuf_16 clkbuf_1_0__f_serial_load (.A(clknet_0_serial_load),
Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency
2021-11-05 11:36:43 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
.X(clknet_1_0__leaf_serial_load));
sky130_fd_sc_hd__clkbuf_16 clkbuf_1_1__f_serial_clock (.A(clknet_0_serial_clock),
Update gpio_control_block
2021-11-05 09:54:24 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(clknet_1_1__leaf_serial_clock));
harden: gpio_control_block with updated rtl TODO: run full verification
2022-08-15 04:28:54 -05:00
sky130_fd_sc_hd__clkbuf_16 clkbuf_1_1__f_serial_load (.A(clknet_0_serial_load),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.X(serial_load_out_buffered));
- update gpio_control_block config (#57) - update gpio_control_block views - gitignore gds/*gds
2022-04-08 11:27:51 -05:00
sky130_fd_sc_hd__conb_1 const_source (.VGND(vssd),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.HI(one_buffered),
.LO(zero_buffered));
sky130_fd_sc_hd__buf_2 fanout23 (.A(net24),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net23));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__buf_2 fanout24 (.A(net30),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net24));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__buf_2 fanout25 (.A(net26),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net25));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__buf_2 fanout26 (.A(net30),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net26));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__buf_2 fanout27 (.A(net29),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net27));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__buf_2 fanout28 (.A(net29),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net28));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__buf_2 fanout29 (.A(net30),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(net29));
sky130_fd_sc_hd__buf_2 fanout30 (.A(net4),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(net30));
gpio_logic_high gpio_logic_high (.gpio_logic1(gpio_logic1),
.vccd1(vccd1),
.vssd1(vssd1));
sky130_fd_sc_hd__dlygate4sd3_1 hold1 (.A(\shift_register[11] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(net45));
sky130_fd_sc_hd__dlygate4sd3_1 hold10 (.A(\shift_register[4] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.X(net54));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dlygate4sd3_1 hold11 (.A(\shift_register[7] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.X(net55));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dlygate4sd3_1 hold12 (.A(\shift_register[6] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(net56));
sky130_fd_sc_hd__dlygate4sd3_1 hold13 (.A(\shift_register[5] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(net57));
sky130_fd_sc_hd__dlygate4sd3_1 hold2 (.A(\shift_register[12] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.X(net46));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dlygate4sd3_1 hold3 (.A(\shift_register[1] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.X(net47));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dlygate4sd3_1 hold4 (.A(\shift_register[9] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.X(net48));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dlygate4sd3_1 hold5 (.A(\shift_register[0] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.X(net49));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dlygate4sd3_1 hold6 (.A(\shift_register[3] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.X(net50));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dlygate4sd3_1 hold7 (.A(\shift_register[8] ),
harden gpio_control_block
2021-11-04 09:19:12 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
[DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells
2021-12-24 13:06:58 -06:00
.VPWR(vccd),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.X(net51));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__dlygate4sd3_1 hold8 (.A(\shift_register[2] ),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net52));
sky130_fd_sc_hd__dlygate4sd3_1 hold9 (.A(\shift_register[10] ),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net53));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_2 input1 (.A(mgmt_gpio_oeb),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net1));
sky130_fd_sc_hd__buf_2 input2 (.A(mgmt_gpio_out),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net2));
sky130_fd_sc_hd__buf_2 input3 (.A(pad_gpio_in),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net3));
sky130_fd_sc_hd__buf_2 input4 (.A(resetn),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net4));
sky130_fd_sc_hd__buf_2 input5 (.A(serial_data_in),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(net5));
sky130_fd_sc_hd__buf_16 one_buffer (.A(one_buffered),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(one));
sky130_fd_sc_hd__buf_16 output10 (.A(net10),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_dm[0]));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output11 (.A(net11),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_dm[1]));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output12 (.A(net12),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_dm[2]));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output13 (.A(net13),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_holdover));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output14 (.A(net14),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_ib_mode_sel));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output15 (.A(net15),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_inenb));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output16 (.A(net16),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_out));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output17 (.A(net17),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_outenb));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output18 (.A(net18),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_slow_sel));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output19 (.A(net19),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_vtrip_sel));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output20 (.A(net20),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(resetn_out));
sky130_fd_sc_hd__buf_16 output21 (.A(net21),
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(serial_data_out));
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
sky130_fd_sc_hd__buf_16 output22 (.A(net22),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(user_gpio_in));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output6 (.A(net6),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(mgmt_gpio_in));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output7 (.A(net7),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_ana_en));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output8 (.A(net8),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_ana_pol));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__buf_16 output9 (.A(net9),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
reharden!: gpio_control_block - rtl updated ~ add one column to the right to pass placement congestion ~ density adjusted (probably has no effect) + manually add isosubstrate layer in mag and gds from older iterations !important still need to run dynamic simulations !important depends on some updates to openlane !important need to be able to recreate using newer openlane versions
2022-10-07 06:59:17 -05:00
.X(pad_gpio_ana_sel));
reharden!: gpio_control_block - high level changes: * add larger buffers on output ports * add buffers on input ports * adjust sdc file increasing output load and setting a high transition - detailed changes: * add interactive script for openlane where the order of events is a bit shuffled - to add obstruction before pdn - to manually insert buffers on some ports - to manually remove buffers inserted by synthesis on for example serial_clock_out * change openlane config adding extra row and columns to increase the space and fit the added buffers * change config to enable buffering * increase density for better placement? * change the cell exclude list. some excluded cells didn't make sense * ef decap cells break dynamic sims? * add custom pdn script for to duplicate the old pdn - misc changes: * fix openlane makefile to properly detect interactive script !important still need to run dynamic simulations !important depends on some updates to openlane
2022-09-27 09:09:26 -05:00
sky130_fd_sc_hd__clkbuf_16 serial_clock_out_buffer (.A(serial_clock_out_buffered),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(serial_clock_out));
sky130_fd_sc_hd__clkbuf_16 serial_load_out_buffer (.A(serial_load_out_buffered),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(serial_load_out));
sky130_fd_sc_hd__buf_16 zero_buffer (.A(zero_buffered),
.VGND(vssd),
.VNB(vssd),
.VPB(vccd),
.VPWR(vccd),
.X(zero));
harden gpio_control_block
2021-11-04 09:19:12 -05:00
endmodule