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SOFA
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518 Commits 16 Branches 1 Tag 1.8 GiB
Commit Graph

76 Commits

Author SHA1 Message Date
tangxifan 501c2799ed [Testbench] Rename testbench to be consistent with post-PnR netlist path change 2020-12-14 20:27:22 -07:00
tangxifan e78b234e00 [Testbench] Bug fix for wrapper testbench include netlist 2020-12-14 13:30:01 -07:00
tangxifan 68c1e17a96 [Testbench] Add more testbenches for CHD post-pnr verification 2020-12-14 13:26:04 -07:00
tangxifan 7c0dc4c871 [Testbench] Restore post-Pnr testbenches for CHD version 2020-12-14 13:17:37 -07:00
tangxifan 1e490c1714 [HDL] Add digital I/O self testing testbench 2020-12-11 16:11:12 -07:00
tangxifan d9e965cf3b [Testbench] Add post-PnR testbenches for SOFA-CHD 2020-12-09 14:55:27 -07:00
tangxifan 73622b1df5 [TESTBENCH] Add more cells that are used by post-PNR CHD FPGA 2020-12-09 12:12:14 -07:00
tangxifan ed92cba451 [HDL] Add netlist for simulation with Caravel + FPGA 2020-12-08 15:35:38 -07:00
tangxifan 51167f871e [Testbench] Patch ccff test 2020-12-02 20:07:36 -07:00
tangxifan 7b637e6676 [Testbench] Bug fix in post PnR testbench templates 2020-12-02 17:50:49 -07:00
tangxifan 6814b3bb60 [Testbench] Now ccff and scff testbench template have multiple versions corresponding to the FPGA variants 2020-12-02 15:22:19 -07:00
tangxifan 20cba3f558 [Testbench] Add testbench for post-PnR verification for FPGA with reset 2020-12-02 13:43:06 -07:00
tangxifan 61163de580 [Testbench] Correct path to post-pnR netlists and prepare for sign-off on FPGA with reset 2020-12-02 12:00:28 -07:00
tangxifan d867dbb1bf [Testbench] Bug fix in calling sub python script 2020-12-01 08:14:43 -07:00
tangxifan 11d4b156b4 [Testbench] Bug fix in finding scripts 2020-11-30 22:41:29 -07:00
tangxifan c676db1fe4 [Testbench] Bug fix in the ccff post-pnr testbench template 2020-11-30 11:18:42 -07:00
tangxifan c638edfc14 [Testbench] Regenerate ccff/scff testbenches for wrapper 2020-11-30 10:33:50 -07:00
tangxifan e63cb7ca89 [Testbench] Rename testbench top module to be compatible with verification scripts 2020-11-30 10:23:30 -07:00
tangxifan c70d5ac4f0 [Testbench] Add ccff test wrapper testbench and include netlist 2020-11-30 09:42:31 -07:00
tangxifan 2b40d5fb4b [HDL] Bug fix 2020-11-30 09:34:26 -07:00
tangxifan fc3eadaf29 [Testbench] Add SCFF test for wrapper 2020-11-29 22:58:48 -07:00
tangxifan 0bf5a400e8 [Testbench] Add include netlists for wrapper testbenches 2020-11-29 22:48:25 -07:00
tangxifan 0ccc18d848 [Testbench] Bug fix in the paths to generate wrapper testbenches 2020-11-29 22:48:01 -07:00
tangxifan 931b93b83d [Testbench] Now wrapper testbench conversion can be batched 2020-11-29 22:38:16 -07:00
tangxifan 12c3e157bf [Testbench] Add a tempo fix on the analog pins 2020-11-29 22:32:36 -07:00
tangxifan 50089e11f9 [Testbench] Bug fix 2020-11-29 22:20:15 -07:00
tangxifan 4b681b88a6 [Testbench] Fix the unconnected wbs_we_i pin 2020-11-29 22:17:10 -07:00
tangxifan 724696a661 [Testbench] Add missing ports in the wrapper 2020-11-29 22:16:04 -07:00
tangxifan 5235424e83 [Testbench] Adapt path for signal init in testbench converter 2020-11-29 21:44:29 -07:00
tangxifan fec19ebc55 [Testbench] Typo fix 2020-11-29 21:19:56 -07:00
tangxifan 951f5f84ee [Testbench] Typo fix 2020-11-29 21:15:36 -07:00
tangxifan e3efcebf2b [Testbench] Bug fix in include netlist 2020-11-29 21:00:20 -07:00
tangxifan 4ab69d925c [Testbench] Add include netlist for wrapper testbench 2020-11-29 20:46:50 -07:00
tangxifan eeb904a3e3 [Testbench] Typo fix in wrapper testbench converter 2020-11-29 20:32:59 -07:00
tangxifan a414a600a6 [Testbench] Bug fixed in wrapper testbench generator 2020-11-29 20:31:19 -07:00
tangxifan 64ae33066e [Testbench] Add script to convert post-PnR testbench for wrapper testbench 2020-11-29 20:23:34 -07:00
tangxifan 969ef7976f [Testbench] Remove those with problems in convergence 2020-11-28 15:24:54 -07:00
tangxifan 3c685311e9 [Testbench] Bug fix for the ccff testbench to sync with latest netlist 2020-11-28 15:22:50 -07:00
tangxifan d3b1562fa2 [Testbench] Rename top-level module to be compatible to Modelsim task run scripts 2020-11-28 14:55:17 -07:00
tangxifan 2380783808 [Testbench] Remove post pnr testbenches that can be auto-generated 2020-11-28 14:46:27 -07:00
tangxifan 8374fcfd4e [Script] Rectify output messages 2020-11-28 14:41:48 -07:00
tangxifan 396988b1b6 [Script] Now testbench generator requires a specific dir name 2020-11-28 14:39:18 -07:00
tangxifan e88a33831c [Testbench] Update scripts to rename top-level module for post-PnR testbenches 2020-11-28 14:29:56 -07:00
tangxifan 1b7b247097 [Testbench] Rename to be compatible with Modelsim run scripts 2020-11-28 14:25:55 -07:00
tangxifan a9b94d4303 [Testbench] Update top-level module name for post PnR testbenches 2020-11-28 12:59:59 -07:00
tangxifan b2ebac3b23 [Testbench] Rename post-PnR testbenches to ease modelsim batch jobs 2020-11-28 11:14:34 -07:00
tangxifan 0c9953a26e [Testbench] Update post-PnR testbenches to synchornize with latest netlist 2020-11-28 11:09:55 -07:00
tangxifan 42e188732d [Testbench] Use python to auto-generate the post-pnr testbenches 2020-11-27 14:17:56 -07:00
tangxifan 5ae1424754 [Script] Bug fix in outputting post-pnr testbenches 2020-11-27 14:17:33 -07:00
tangxifan 8c6d122fa3 [Testbench] Remove out-of-date testbenches 2020-11-27 12:30:47 -07:00