[Testbench] Now ccff and scff testbench template have multiple versions corresponding to the FPGA variants

2020-12-02 15:22:19 -07:00 · 2020-12-02 15:22:19 -07:00 · 6814b3bb60
parent 4875b2de95
commit 6814b3bb60
8 changed files with 14 additions and 8 deletions
--- a/TESTBENCH/common/ccff_test_post_pnr_v1.0.v
+++ b/TESTBENCH/common/ccff_test_post_pnr_v1.0.v
--- a/TESTBENCH/common/ccff_test_post_pnr_v1.1.v
+++ b/TESTBENCH/common/ccff_test_post_pnr_v1.1.v
--- a/TESTBENCH/common/scff_test_post_pnr_v1.0.v
+++ b/TESTBENCH/common/scff_test_post_pnr_v1.0.v
--- a/TESTBENCH/common/scff_test_post_pnr_v1.1.v
+++ b/TESTBENCH/common/scff_test_post_pnr_v1.1.v
--- a/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/ccff_test_post_pnr_include_netlists.v
+++ b/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/ccff_test_post_pnr_include_netlists.v
--- a/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/scff_test_post_pnr_include_netlists.v
+++ b/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/scff_test_post_pnr_include_netlists.v
--- a/TESTBENCH/k4_N8_reset_softadder_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/ccff_test_post_pnr_include_netlists.v
+++ b/TESTBENCH/k4_N8_reset_softadder_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/ccff_test_post_pnr_include_netlists.v
--- a/TESTBENCH/k4_N8_reset_softadder_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/scff_test_post_pnr_include_netlists.v
+++ b/TESTBENCH/k4_N8_reset_softadder_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/scff_test_post_pnr_include_netlists.v