riscv
/
SOFA
mirror of https://github.com/lnis-uofu/SOFA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
332 Commits 16 Branches 1 Tag 1.8 GiB
Commit Graph

61 Commits

Author SHA1 Message Date
tangxifan c676db1fe4 [Testbench] Bug fix in the ccff post-pnr testbench template 2020-11-30 11:18:42 -07:00
tangxifan c638edfc14 [Testbench] Regenerate ccff/scff testbenches for wrapper 2020-11-30 10:33:50 -07:00
tangxifan e63cb7ca89 [Testbench] Rename testbench top module to be compatible with verification scripts 2020-11-30 10:23:30 -07:00
tangxifan c70d5ac4f0 [Testbench] Add ccff test wrapper testbench and include netlist 2020-11-30 09:42:31 -07:00
tangxifan 2b40d5fb4b [HDL] Bug fix 2020-11-30 09:34:26 -07:00
tangxifan fc3eadaf29 [Testbench] Add SCFF test for wrapper 2020-11-29 22:58:48 -07:00
tangxifan 0bf5a400e8 [Testbench] Add include netlists for wrapper testbenches 2020-11-29 22:48:25 -07:00
tangxifan 0ccc18d848 [Testbench] Bug fix in the paths to generate wrapper testbenches 2020-11-29 22:48:01 -07:00
tangxifan 931b93b83d [Testbench] Now wrapper testbench conversion can be batched 2020-11-29 22:38:16 -07:00
tangxifan 12c3e157bf [Testbench] Add a tempo fix on the analog pins 2020-11-29 22:32:36 -07:00
tangxifan 50089e11f9 [Testbench] Bug fix 2020-11-29 22:20:15 -07:00
tangxifan 4b681b88a6 [Testbench] Fix the unconnected wbs_we_i pin 2020-11-29 22:17:10 -07:00
tangxifan 724696a661 [Testbench] Add missing ports in the wrapper 2020-11-29 22:16:04 -07:00
tangxifan 5235424e83 [Testbench] Adapt path for signal init in testbench converter 2020-11-29 21:44:29 -07:00
tangxifan fec19ebc55 [Testbench] Typo fix 2020-11-29 21:19:56 -07:00
tangxifan 951f5f84ee [Testbench] Typo fix 2020-11-29 21:15:36 -07:00
tangxifan e3efcebf2b [Testbench] Bug fix in include netlist 2020-11-29 21:00:20 -07:00
tangxifan 4ab69d925c [Testbench] Add include netlist for wrapper testbench 2020-11-29 20:46:50 -07:00
tangxifan eeb904a3e3 [Testbench] Typo fix in wrapper testbench converter 2020-11-29 20:32:59 -07:00
tangxifan a414a600a6 [Testbench] Bug fixed in wrapper testbench generator 2020-11-29 20:31:19 -07:00
tangxifan 64ae33066e [Testbench] Add script to convert post-PnR testbench for wrapper testbench 2020-11-29 20:23:34 -07:00
tangxifan 969ef7976f [Testbench] Remove those with problems in convergence 2020-11-28 15:24:54 -07:00
tangxifan 3c685311e9 [Testbench] Bug fix for the ccff testbench to sync with latest netlist 2020-11-28 15:22:50 -07:00
tangxifan d3b1562fa2 [Testbench] Rename top-level module to be compatible to Modelsim task run scripts 2020-11-28 14:55:17 -07:00
tangxifan 2380783808 [Testbench] Remove post pnr testbenches that can be auto-generated 2020-11-28 14:46:27 -07:00
tangxifan 8374fcfd4e [Script] Rectify output messages 2020-11-28 14:41:48 -07:00
tangxifan 396988b1b6 [Script] Now testbench generator requires a specific dir name 2020-11-28 14:39:18 -07:00
tangxifan e88a33831c [Testbench] Update scripts to rename top-level module for post-PnR testbenches 2020-11-28 14:29:56 -07:00
tangxifan 1b7b247097 [Testbench] Rename to be compatible with Modelsim run scripts 2020-11-28 14:25:55 -07:00
tangxifan a9b94d4303 [Testbench] Update top-level module name for post PnR testbenches 2020-11-28 12:59:59 -07:00
tangxifan b2ebac3b23 [Testbench] Rename post-PnR testbenches to ease modelsim batch jobs 2020-11-28 11:14:34 -07:00
tangxifan 0c9953a26e [Testbench] Update post-PnR testbenches to synchornize with latest netlist 2020-11-28 11:09:55 -07:00
tangxifan 42e188732d [Testbench] Use python to auto-generate the post-pnr testbenches 2020-11-27 14:17:56 -07:00
tangxifan 5ae1424754 [Script] Bug fix in outputting post-pnr testbenches 2020-11-27 14:17:33 -07:00
tangxifan 8c6d122fa3 [Testbench] Remove out-of-date testbenches 2020-11-27 12:30:47 -07:00
tangxifan 5947308e21 [Script] Add batch Python script for converting all the pre-PnR testbenches to post-PnR testbenches 2020-11-27 12:25:08 -07:00
tangxifan b82dbd1a05 [Doc] Update README for python script 2020-11-27 10:29:32 -07:00
tangxifan feafc46465 [Script] Add python script to convert pre-PnR testbench to post-PnR testbench 2020-11-26 20:47:29 -07:00
tangxifan 98917a51bc [Testbench] Update post pnr testbench with signal initialization 2020-11-23 16:24:50 -07:00
tangxifan 1c40ab68a1 [Testbench] Add post PnR testbench for and2_or2 benchmark 2020-11-22 13:45:16 -07:00
tangxifan 06c732325b [Testbench] Add post-PnR testbench for benchmark simon_serial 2020-11-20 17:05:42 -07:00
tangxifan 5edb154140 [Testbench] Add post PnR testbench for benchmark bin2bcd 2020-11-20 16:59:38 -07:00
tangxifan b60e0aa2cd [Testbench] Add post-PnR testbench for benchmark routing_test 2020-11-20 16:47:03 -07:00
tangxifan aa79cc3577 [Testbench] Add post-PnR testbench for benchmark counter 2020-11-20 16:34:32 -07:00
tangxifan 7145f7ccd4 [Doc] Add documentation about the testbenches 2020-11-20 13:59:15 -07:00
tangxifan 3756c25572 [Testbench] Enhance checking codes. Now 'X' or 'Z' signal will fail in self-checking 2020-11-20 13:51:26 -07:00
tangxifan 5a2f1e7607 [TESTBENCH] Place the include lines for post-PnR skywater cell netlists in a separated netlist, so that it can be shared among post-PnRed testbenches 2020-11-20 13:33:13 -07:00
tangxifan 40eccfa0ba [Testbench] Update post-PnR testbenches for configuration chain and scan-chain and enhance checking codes 2020-11-20 11:45:51 -07:00
tangxifan ae82946052 [Testbench] Update and2_latch post-pnr testbench 2020-11-20 11:15:01 -07:00
tangxifan e58fc97794 [Testbench] Update post-pnr test for latest PnRed netlist 2020-11-20 10:55:59 -07:00