OpenFPGA/vpr7_x2p/vpr/SRC/fpga_x2p/base
Baudouin Chauviere 0e04b88c8f Include new files in the parameter spreading 2019-07-01 11:27:48 -06:00
..
device_coordinator.cpp Add copy constructor for RRChan, RRSwitchBlock etc. 2019-05-27 15:44:34 -06:00
device_coordinator.h Add copy constructor for RRChan, RRSwitchBlock etc. 2019-05-27 15:44:34 -06:00
device_port.cpp add new class port to simplify codes in outputting codes, upgrade RRSwitch to RRGSB 2019-06-06 23:45:21 -06:00
device_port.h add new class port to simplify codes in outputting codes, upgrade RRSwitch to RRGSB 2019-06-06 23:45:21 -06:00
fpga_x2p_api.c rename rr_switch_block to rr_gsb, a generic block 2019-06-06 17:41:01 -06:00
fpga_x2p_api.h rename rr_switch_block to rr_gsb, a generic block 2019-06-06 17:41:01 -06:00
fpga_x2p_backannotate_utils.c fixed critical bugs in pass_tracks identification and update regression test for tileable arch 2019-06-25 21:59:38 -06:00
fpga_x2p_backannotate_utils.h rename rr_switch_block to rr_gsb, a generic block 2019-06-06 17:41:01 -06:00
fpga_x2p_bitstream_utils.c cleaned unused variables 2019-05-13 14:45:02 -06:00
fpga_x2p_bitstream_utils.h Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
fpga_x2p_globals.c rename rr_switch_block to rr_gsb, a generic block 2019-06-06 17:41:01 -06:00
fpga_x2p_globals.h rename rr_switch_block to rr_gsb, a generic block 2019-06-06 17:41:01 -06:00
fpga_x2p_lut_utils.c cleaned unused variables 2019-05-13 14:45:02 -06:00
fpga_x2p_lut_utils.h Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
fpga_x2p_mux_utils.c update rr_gsb to build connection blocks 2019-06-07 11:01:55 -06:00
fpga_x2p_mux_utils.h update rr_gsb to build connection blocks 2019-06-07 11:01:55 -06:00
fpga_x2p_pbtypes_utils.c many bug fixing and now start improving the routability of tileable rr_graph 2019-06-24 17:33:29 -06:00
fpga_x2p_pbtypes_utils.h support rotation on segment groups inside RRChan and improve rotatable mirror searching 2019-05-28 11:25:16 -06:00
fpga_x2p_rr_graph_utils.c many bug fixing and now start improving the routability of tileable rr_graph 2019-06-24 17:33:29 -06:00
fpga_x2p_rr_graph_utils.h many bug fixing and now start improving the routability of tileable rr_graph 2019-06-24 17:33:29 -06:00
fpga_x2p_setup.c use const RRGSB to be more runtime and memory efficient, updating SDC generator to use RRGSB 2019-06-10 12:50:10 -06:00
fpga_x2p_setup.h Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
fpga_x2p_timing_utils.c developed new rotating methods for RRSwitchBlocks, debugging ongoing 2019-05-26 23:35:30 -06:00
fpga_x2p_timing_utils.h Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
fpga_x2p_types.h keep developing tileable rr_graph, track2ipin and opin2track to go 2019-06-19 21:30:16 -06:00
fpga_x2p_unique_routing.c fixed the bug in determine passing wires for rr_gsb 2019-06-26 10:50:23 -06:00
fpga_x2p_unique_routing.h rename rr_switch_block to rr_gsb, a generic block 2019-06-06 17:41:01 -06:00
fpga_x2p_utils.c Include new files in the parameter spreading 2019-07-01 11:27:48 -06:00
fpga_x2p_utils.h Include new files in the parameter spreading 2019-07-01 11:27:48 -06:00
quicksort.c upgrade Verilog SB generator using the RRSwitchBlock 2019-05-23 17:37:39 -06:00
quicksort.h upgrade Verilog SB generator using the RRSwitchBlock 2019-05-23 17:37:39 -06:00
rr_blocks.cpp critical bug fixed in bitstream generator for compact routing hierarchy 2019-06-26 15:51:11 -06:00
rr_blocks.h fixed the bug in determine passing wires for rr_gsb 2019-06-26 10:50:23 -06:00
rr_blocks_naming.cpp c++ string is not working, use char which is stable 2019-06-13 18:38:46 -06:00
rr_blocks_naming.h add new class port to simplify codes in outputting codes, upgrade RRSwitch to RRGSB 2019-06-06 23:45:21 -06:00
write_rr_blocks.cpp fixed the bug in determine passing wires for rr_gsb 2019-06-26 10:50:23 -06:00
write_rr_blocks.h update rr_block writer to include IPINs in XML files 2019-06-25 11:17:22 -06:00