OpenFPGA/openfpga_flow/tasks
tangxifan 23aef96d3a add behavioral verilog test case to Travis CI 2020-04-12 19:55:47 -06:00
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OpenFPGAShell_Example/config Updated task file to run formal verification 2020-04-11 18:30:21 -06:00
compact_routing/config add compact routing to regression test 2019-11-01 10:53:47 -06:00
compilation_verification/config Add compilation verification task in openfpga_flow 2020-01-23 13:13:23 -07:00
duplicate_grid_pin/config added duplicate_grid_pin test case 2019-12-26 15:08:31 -07:00
epfl/config Adding EPFL benchmark task for openfpga_flow 2019-12-03 14:31:53 -07:00
explicit_verilog/config add single mode test case to regression test. debugging now 2019-10-28 15:57:17 -06:00
heterogeneous_dpram/config add test for heterogeneous FPGA and fix bugs 2019-11-06 17:45:11 -07:00
mcnc_big20/config add minor comments in task file for modelsim regression tests 2019-11-16 22:34:03 -07:00
multi_mode/config bug fixed for std cell MUX2 architecture and add the case to regression tests 2019-11-06 16:06:47 -07:00
openfpga_shell add behavioral verilog test case to Travis CI 2020-04-12 19:55:47 -06:00
s298/config adding more regression tests which is quick run but very helpful for debugging 2019-10-31 20:17:40 -06:00
single_mode/config add python script for batch simulations 2019-11-15 14:23:03 -07:00
tileable_routing/config add single mode test case to regression test. debugging now 2019-10-28 15:57:17 -06:00
.gitignore Added gitignore to skip run directory tracking 2019-08-19 19:06:01 -06:00