tangxifan
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40b589dc6d
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[Doc] Update documentation about the clock definition for programming clocks in simulation settings
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2021-10-06 13:50:33 -07:00 |
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tangxifan
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03bcf6dee5
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[Doc] Update documenation for the new option ``--keep_dont_care_bits``
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2021-10-05 19:23:42 -07:00 |
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tangxifan
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ff339312f6
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[Doc] Update documentation about the limitations of multi-region configuration protocols
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2021-10-05 11:55:10 -07:00 |
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tangxifan
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9a7e0f761a
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[Doc] Add fabric bitstream file format for QL memory bank
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2021-10-04 12:29:49 -07:00 |
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tangxifan
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a01fa7c282
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[Doc] Add figures and text to explain the difference between the XML syntax for QuickLogic memory bank
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2021-10-04 12:09:42 -07:00 |
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tangxifan
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b0a97a7052
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[Doc] Update doc about WLR usage for QL memory bank
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2021-09-27 10:24:04 -07:00 |
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tangxifan
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f9bceff33a
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[Doc] Update documentation for the flatten BL/WL protocols
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2021-09-25 20:44:45 -07:00 |
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tangxifan
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10774dc15c
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[Doc] Updated documentation about new syntax in fabric key
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2021-09-21 17:01:52 -07:00 |
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tangxifan
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d9d959709c
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[Doc] Add missing figures
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2021-09-20 20:31:53 -07:00 |
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tangxifan
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3146d2484f
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[Doc] Update documentation on the WLR definition for circuit model
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2021-09-20 17:21:33 -07:00 |
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tangxifan
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73d21c9730
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[Doc] Update doc about how to use the QuickLogic memory bank
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2021-09-10 15:30:37 -07:00 |
ANDREW HARRIS POND
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1c09b8c3e0
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fixed python instruction
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2021-08-17 10:18:51 -06:00 |
Andrew Pond
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a8a8c25a21
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Update compile.rst
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2021-07-26 15:18:23 -06:00 |
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Andrew Pond
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1c0bec1c5a
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Update compile.rst
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2021-07-26 15:17:25 -06:00 |
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Andrew Pond
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3ce866f2eb
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Update compile.rst
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2021-07-26 15:12:59 -06:00 |
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tangxifan
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43afaca17c
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[Doc] Add more details about the new syntax
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2021-07-01 23:51:54 -06:00 |
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tangxifan
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0851075bc9
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[Doc] Update documentation about the new feature in pin constraint file
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2021-07-01 23:47:36 -06:00 |
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tangxifan
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ac9046b7d2
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[Doc] Remove ``define_simulation.v`` since it is no longer needed.
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2021-06-29 15:38:35 -06:00 |
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tangxifan
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30027b8c15
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[Doc] Update doc to deprecate anything related to '--support_icarus_simulator' and '--include_signal_init'
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2021-06-25 15:27:15 -06:00 |
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tangxifan
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11d0283771
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[Doc] Remove option '--support_icarus_simulator'. Add option '--embed_bitstream'
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2021-06-25 15:11:12 -06:00 |
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tangxifan
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507f5ee54c
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[Doc] Update documentation about time unit support in writing simulation file
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2021-06-25 10:34:43 -06:00 |
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tangxifan
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8e2ba718d0
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[Doc] update documentation on the new option '--testbench_type'
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2021-06-25 10:16:48 -06:00 |
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tangxifan
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779437cd37
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[Doc] Update documentation to remove out-of-date options related to signal_init
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2021-06-24 17:07:15 -06:00 |
bbleaptrot
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de550ac550
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Merge branch 'master' into tutorials
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2021-06-16 14:00:31 -06:00 |
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bbleaptrot
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7787fe9795
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update reference to match doc page
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2021-06-16 12:46:43 -06:00 |
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bbleaptrot
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858bb2f21e
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fix mistake in first line of page
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2021-06-16 12:45:04 -06:00 |
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bbleaptrot
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624e9f3bb7
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Update notation at top to match pages in doc
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2021-06-16 12:44:01 -06:00 |
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bbleaptrot
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ece6e92f06
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Add video at top of page
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2021-06-16 12:29:17 -06:00 |
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bbleaptrot
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7a303463c3
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Update shell_shortcuts.rst
Update grammar. <_openfpga_task_args> no longer works
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2021-06-14 15:34:13 -06:00 |
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bbleaptrot
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5e8b5d641f
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Update compile.rst
update grammar
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2021-06-14 14:51:19 -06:00 |
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bbleaptrot
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1a2ced678e
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Update tech_highlights.rst
Update grammar and add link to standard_cell_library tutorial
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2021-06-14 14:34:12 -06:00 |
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bbleaptrot
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d0549f10b3
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Make a :ref: for tutorial
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2021-06-14 14:28:21 -06:00 |
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tangxifan
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9585e1d3b5
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[Doc] Update documentation about 'default_net_type' option in testbench generators
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2021-06-14 14:00:34 -06:00 |
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bbleaptrot
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dc13325639
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Update motivation.rst
Fixing grammar and spacing
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2021-06-14 13:44:20 -06:00 |
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tangxifan
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b719419931
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[Doc] Update documentation on the FPGA-Verilog commands in openfpga shell; Deprecated the 'write_verilog_testbench' command
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2021-06-09 16:59:02 -06:00 |
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tangxifan
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54a53bc988
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[Doc] Update documentation on the minor changes on bitstream file for memory bank protocol
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2021-06-07 17:58:00 -06:00 |
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tangxifan
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0fee741008
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[Doc] Update documentation on the minor changes on fabric bitstream file format
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2021-06-07 14:22:35 -06:00 |
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tangxifan
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c30be6e95e
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[Doc] Update documentation about the fast configuration for write bitstream command
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2021-06-04 20:00:28 -06:00 |
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tangxifan
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059e74b4ef
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[Doc] Add --fast configuration option to documentation for 'write_full_testbench'
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2021-06-04 15:17:00 -06:00 |
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tangxifan
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b83d8826fb
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[Doc] Update documentation on the testbench organization/waveforms
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2021-06-03 16:54:13 -06:00 |
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tangxifan
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9bcaa820ae
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[Doc] Update documentation for the new command 'write_full_testbench'
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2021-06-03 16:18:07 -06:00 |
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tangxifan
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16ae23f33e
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[Doc] Update notes about compilation guidelines
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2021-05-24 16:26:59 -06:00 |
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tangxifan
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9b40e74e25
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[Doc] Add example circuit models for multipliers and update technical highlight with links to the examples
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2021-05-24 15:24:50 -06:00 |
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tangxifan
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21a18069a1
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[Doc] Add example circuit about dual-port RAMs to documentation; Updated technical highlights by providing links to the examples
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2021-05-24 14:50:55 -06:00 |
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tangxifan
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b6b98a75b8
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[Doc] Add example circuit model about multi-mode flip-flops; Separate data-path FF circuit model and configuration-chain FF circuit model;
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2021-05-24 13:03:40 -06:00 |
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tangxifan
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24f83f0058
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[Doc] Update documentation about the new command 'report_bitstream_distribution'
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2021-05-07 11:54:33 -06:00 |
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tangxifan
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1bae59dc6a
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[Doc] Update documentation for the write_io_mapping command
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2021-04-27 14:54:57 -06:00 |
ganeshgore
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d7426808ba
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Merge pull request #299 from hitblunders/master
Updated compile.rst
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2021-04-26 00:26:07 -06:00 |
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tangxifan
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62dc5a3856
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[Doc] Update documentation about the new syntax introduced for pin binding between operating modes and physical modes
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2021-04-24 16:02:24 -06:00 |
Parnabrita Mondal
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cc92c27fde
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Update compile.rst
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2021-04-24 14:01:52 +05:30 |