tangxifan
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373566416c
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Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into vtr_upgrade
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2022-09-16 16:47:21 -07:00 |
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tangxifan
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a2e22787c2
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[test] deploy the new test cases to the basic regression tests
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2022-09-16 10:31:15 -07:00 |
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tangxifan
|
91fe27ff66
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[test] deploy new test to ci
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2022-09-09 17:00:28 -07:00 |
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tangxifan
|
95d7a17b3c
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Merge branch 'master' into vtr_upgrade
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2022-09-09 14:32:42 -07:00 |
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tangxifan
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a840aeea7a
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[test] add a new test to validate custom I/O location syntax and deploy to basic regression tests
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2022-09-08 16:27:11 -07:00 |
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tangxifan
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56619f9a47
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Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into vtr_upgrade
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2022-09-07 15:04:05 -07:00 |
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tangxifan
|
93ab992187
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[test] update golden outputs without time stamps
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2022-09-06 14:59:00 -07:00 |
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tangxifan
|
9e1abf5898
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Merge branch 'master' into vtr_upgrade
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2022-09-01 21:39:14 -07:00 |
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tangxifan
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c48f750f86
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[test] now reduce the size for ql memory bank from 96x96 to 72x72; 96x96 requires >15G memory which exceeds github runner machine's RAM limit
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2022-09-01 20:10:29 -07:00 |
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tangxifan
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71ad0721a1
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Merge branch 'master' into vtr_upgrade
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2022-08-31 13:56:17 -07:00 |
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tangxifan
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201bca8968
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[test] typo
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2022-08-30 08:59:20 -07:00 |
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tangxifan
|
5f88b9a226
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[test] typo
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2022-08-29 22:41:15 -07:00 |
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tangxifan
|
0b5bdcdbb1
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[test] deploy new test to basic regression tests
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2022-08-29 22:07:56 -07:00 |
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tangxifan
|
8d6682c28b
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[test] fixed a bug when removing previous runs
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2022-08-25 16:20:18 -07:00 |
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tangxifan
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6ce1d4804c
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[test] deploy new test case to basic regression tests
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2022-08-01 21:05:05 -07:00 |
taoli4rs
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347a29f27c
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Fix test name in basic regression test script.
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2022-07-20 21:05:31 -07:00 |
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taoli4rs
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cfc0d08060
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Add constrain_pin_location command in openfpga; add full flow test.
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2022-07-20 11:51:00 -07:00 |
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tangxifan
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9832722056
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[test] now add QuickLogic memory bank to fpga bitstream regression tests
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2022-05-25 11:42:32 +08:00 |
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tangxifan
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86347a9d49
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[test] move generate_bitstream to another directory. Ready to test generate bitstream across different configuration protocols
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2022-05-25 11:19:49 +08:00 |
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tangxifan
|
7d694acf32
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[test] debugging basic reg test paths
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2022-05-23 11:21:36 +08:00 |
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tangxifan
|
b41cbad5d3
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[test] force to run git diff under root directory
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2022-05-23 10:32:43 +08:00 |
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tangxifan
|
488a934097
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[test] give abs path for git diff in basic regression tests
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2022-05-23 09:12:33 +08:00 |
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tangxifan
|
0dc7caf3b7
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[test] now regression test script supports remove all run dir through command-line options
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2022-05-22 13:15:39 +08:00 |
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tangxifan
|
751d87b8e3
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[test] fix a bug in detect changes in golden netlists
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2022-05-22 13:06:47 +08:00 |
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tangxifan
|
d7e854eae7
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[test] deploy new test to ci
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2022-05-09 17:23:57 +08:00 |
Ganesh Gore
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522982c9ba
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Adde vtr_benchmarks_template for demo
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2022-05-06 22:40:36 -06:00 |
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Ganesh Gore
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1e243650b9
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Added option to copy example projects
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2022-05-03 14:06:16 -06:00 |
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Ganesh Gore
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21c3dbf611
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Added regression for template project
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2022-05-02 23:23:45 -06:00 |
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tangxifan
|
9bd66d531e
|
[Test] Deploy the new test case to basic regression tests
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2022-04-13 16:06:27 +08:00 |
|
tangxifan
|
3e3a65223c
|
[Test] Deploy new test case to basic regression tests
|
2022-03-20 11:04:07 +08:00 |
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tangxifan
|
a615c9d4e3
|
[Test] Rename test cases
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2022-02-24 09:43:41 -08:00 |
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tangxifan
|
b27a04eb24
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[Test] Now test case has a config done CCFF
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2022-02-23 22:07:11 -08:00 |
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tangxifan
|
cf31879b20
|
[Test] Deploy new test to basic regression tests
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2022-02-23 16:03:56 -08:00 |
|
tangxifan
|
68644ea0f6
|
[Test] Add the new test to basic regression tests
|
2022-02-18 15:44:07 -08:00 |
|
tangxifan
|
fe9e0ff977
|
[Test] Add the new test to basic regression tests
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2022-02-18 15:38:53 -08:00 |
|
tangxifan
|
85c893c94c
|
[Test] Add new test to basic regression tests
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2022-02-18 15:30:08 -08:00 |
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tangxifan
|
43d852d8a1
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[Test] Add the bus group test case to basic regression tests
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2022-02-18 12:27:25 -08:00 |
|
tangxifan
|
d667102a43
|
[Test] Add new test case to regression tests
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2022-02-14 15:58:53 -08:00 |
|
tangxifan
|
0268814fc6
|
[Test] Splitting counter benchmarks into 2 categories; One has Verilog-to-Verification tests, while the other has only Verilog-to-Bitstream tests
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2022-02-14 12:20:56 -08:00 |
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tangxifan
|
27ac2fafe5
|
[Test] Add the new test case to regression tests
|
2022-02-01 13:45:46 -08:00 |
|
tangxifan
|
9871fe88fb
|
[Test] Typo fix
|
2022-01-31 13:03:45 -08:00 |
|
tangxifan
|
da8fc0f5d4
|
[Test] Add a new test case to validate ``--use_relative_path``
|
2022-01-31 13:02:19 -08:00 |
|
tangxifan
|
a9042318cf
|
[Test] Deploy the test case to regression tests
|
2022-01-26 11:26:17 -08:00 |
|
tangxifan
|
11e045992d
|
[Test] Now only compare on the golden netlist changes to branch
|
2022-01-25 21:24:10 -08:00 |
|
tangxifan
|
c2c827ee10
|
[Script] Fix a bug in git-diff for regression tests
|
2022-01-25 20:27:41 -08:00 |
|
tangxifan
|
fedb1bd2e3
|
[Test] Add new testcases to validate correctness of the testbenches/Verilog netlists without time stamp
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2022-01-25 16:41:36 -08:00 |
|
tangxifan
|
5c0f63ddd9
|
[Test] Update regression tests for the new test about ``--no_time_stamp``
|
2022-01-25 16:30:48 -08:00 |
Aram Kostanyan
|
397f2e71f1
|
Added 'basic_tests/explicit_multi_verilog_files' task and deployed it to CI. Reverted previous commit chenges in 'benchmark_sweep/iwls2005' task.
|
2022-01-19 20:43:26 +05:00 |
Awais Abbas
|
469b3a960c
|
basic reg test updated
|
2022-01-14 15:44:26 +05:00 |
|
Awais Abbas
|
793e40cb95
|
basic_reg test for yosys-only flow added in OpenFPGA regression test scripts
|
2022-01-14 15:39:26 +05:00 |