tangxifan
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c48f750f86
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[test] now reduce the size for ql memory bank from 96x96 to 72x72; 96x96 requires >15G memory which exceeds github runner machine's RAM limit
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2022-09-01 20:10:29 -07:00 |
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tangxifan
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9832722056
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[test] now add QuickLogic memory bank to fpga bitstream regression tests
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2022-05-25 11:42:32 +08:00 |
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tangxifan
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86347a9d49
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[test] move generate_bitstream to another directory. Ready to test generate bitstream across different configuration protocols
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2022-05-25 11:19:49 +08:00 |
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tangxifan
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0dc7caf3b7
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[test] now regression test script supports remove all run dir through command-line options
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2022-05-22 13:15:39 +08:00 |
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tangxifan
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064ac478f3
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[Test] Deploy news test to fpga-bitstream regression tests
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2021-10-05 19:01:03 -07:00 |
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tangxifan
|
c33ca464dc
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[Test] Deploy new tests to regression test
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2021-05-07 12:06:46 -06:00 |
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tangxifan
|
6cb4d7d720
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[Test] Add the new test to regressiont test
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2021-04-27 14:41:38 -06:00 |
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tangxifan
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2fa370d7d5
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[Test] Patch regression tests for fpga bitstream
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2021-04-19 17:15:14 -06:00 |
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tangxifan
|
18eb5c9de9
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[Test] Deploy new test to CI
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2021-04-19 15:56:41 -06:00 |
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tangxifan
|
affc8cbbc4
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[Test] Deploy test to CI
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2021-02-18 19:37:45 -07:00 |
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tangxifan
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9c19e2b365
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[Test] Move regression test scripts from workflow to openfpga_flow
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2021-02-16 11:55:47 -07:00 |