Commit Graph

22 Commits

Author SHA1 Message Date
chungshien dd577e37e0
LUTRAM Support (#1595)
* BRAM preload data - generic way to extract data from design

* Add docs and support special __layout__ case

* Add test

* Fix warning

* Change none-fabric to non-fabric

* LUTRAM Support Phase 1

* Add Test

* Add more protocol checking to enable LUTRAM feature

* Move the config setting under config protocol

* Revert any changes

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Co-authored-by: chungshien-chai <chungshien.chai@gmail.com>
2024-04-19 14:46:38 -07:00
tangxifan d3895c3dc0 [core] code format 2023-08-03 17:34:25 -07:00
tangxifan f4cbc95053 [core] syntax 2023-08-03 17:33:57 -07:00
tangxifan 3331540ed6 [core] using config child type in bitstream generation 2023-08-03 14:24:22 -07:00
tangxifan 5895a1d96b [core] reworking fabric generator based on latest changes on configurable children 2023-08-02 22:50:19 -07:00
tangxifan 433391eec4 [core] move new functions to a separated source file 2023-07-07 15:03:03 -07:00
tangxifan d3109ee88b [core] developing configurable children reloading from fabric key 2023-07-06 21:53:22 -07:00
tangxifan 28b7a12f68 [core] code format 2023-04-23 14:31:35 +08:00
tangxifan 5500b9a289 [core] upgrading netlist generator 2023-04-22 16:27:27 +08:00
tangxifan 6d31b319a2 [engine] update source files subject to code formatting rules 2022-10-06 17:08:50 -07:00
tangxifan 26b1e48723 [Engine] Merge BL/WLs in the Grid/CB/SB modules 2021-09-15 11:27:55 -07:00
tangxifan 37c10f0cb5 [Tool] Add mappable I/O support and enhance I/O support 2020-11-04 20:21:49 -07:00
tangxifan 987eccf586 [Tool] Bug fix in multi-region memory bank; Basic test passed 2020-10-29 16:26:45 -06:00
tangxifan 448e88645a [Tool] Support multiple memory banks in top-level module 2020-10-29 12:42:03 -06:00
tangxifan 824b56f14c fabric key can now accept instance name only; decoders are no longer part of the key 2020-07-06 16:42:33 -06:00
tangxifan 033c92c365 precisely reserve memory for child blocks in bitstream manager 2020-07-03 22:47:21 -06:00
tangxifan 66746f69da optimizing memory efficiency by reserving nets in module manager 2020-06-29 21:27:43 -06:00
tangxifan fbe05963e0 add configuration bus builder for flatten memory organization (applicable to memory bank and standalone configuration protocol) 2020-06-11 19:31:12 -06:00
tangxifan 290dd1a8a6 add frame decoder builder to all the module graph builder except the top-level 2020-06-11 19:31:09 -06:00
tangxifan 8864920460 add frame-based memory module builder 2020-06-11 19:31:09 -06:00
tangxifan 836f722f20 start supporting global output ports in module manager 2020-04-05 15:19:46 -06:00
tangxifan f11832b8cf start integrating module graph builder 2020-02-12 17:53:23 -07:00