Xifan Tang
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b4542ea34b
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minor fix on doc about the global and general purpose port
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2020-04-09 17:10:04 -06:00 |
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Xifan Tang
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d99776b260
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update documentation on the global I/O ports
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2020-04-08 18:18:53 -06:00 |
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Xifan Tang
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b9ade3fcb6
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documentation update to introduce new features in script mode of OpenFPGA shell
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2020-04-08 14:13:28 -06:00 |
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Xifan Tang
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55e68896d6
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doc update for the support on std cell MUX2 and examples
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2020-04-07 12:01:13 -06:00 |
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Xifan Tang
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7a4137fdcf
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doc update for packable XML syntax in VPR
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2020-04-06 18:37:05 -06:00 |
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Xifan Tang
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1a3a748dd2
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update documentation with the support on spypads and global I/O ports
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2020-04-05 20:12:28 -06:00 |
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Xifan Tang
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6ce0fe4ef2
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doc update for FPGA-bitstream to better motivate the different types of bitstream
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2020-04-01 12:57:28 -06:00 |
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Xifan Tang
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fd8248d9dd
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update documentation: the addon syntax on VPR and configuration protocols
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2020-04-01 12:35:52 -06:00 |
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tangxifan
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78964ce71c
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update documentation on the through channel
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2020-03-27 11:34:39 -06:00 |
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Xifan Tang
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b4221e94bb
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add documentation on the tileable routing and thru channel support
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2020-03-25 16:52:42 -06:00 |
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Xifan Tang
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cb6afea07c
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update documentation on a new option in FPGA-SDC to constrain zero-delay paths
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2020-03-25 16:00:25 -06:00 |
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Xifan Tang
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3a74fb7a04
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update documentation for the new options
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2020-03-25 15:23:21 -06:00 |
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Xifan Tang
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7e3a8e5794
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typo fixed in fpga-bitstream documentation
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2020-03-22 16:27:12 -06:00 |
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Xifan Tang
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75dfe6a045
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update documentation for write_gsb_to_xml functionality
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2020-03-22 16:21:35 -06:00 |
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tangxifan
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1d766d2a70
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minor format fix on documentation
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2020-03-11 10:22:30 -06:00 |
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Xifan Tang
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b941ac8a4a
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remove deprecated options
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2020-03-10 20:58:00 -06:00 |
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Xifan Tang
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8037d1ad93
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Merge branch 'dev' of https://github.com/LNIS-Projects/OpenFPGA into dev
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2020-03-10 20:55:02 -06:00 |
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Xifan Tang
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9f743f7f4e
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add openfpga shell documentation
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2020-03-10 20:54:42 -06:00 |
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tangxifan
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0da6f00af5
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start reworking the openfpga tool documentation
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2020-03-10 17:29:35 -06:00 |
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tangxifan
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089cc5e86e
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update documentation on circuit model annotation on VPR architecture
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2020-03-10 16:51:50 -06:00 |
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tangxifan
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7195564455
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reworked circuit model examples in documentation. Now we are consistent to latest syntax
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2020-03-10 16:17:20 -06:00 |
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tangxifan
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54dfdc0cc1
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update general documentation on circuit library
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2020-03-10 12:18:12 -06:00 |
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tangxifan
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2a3c5b98a5
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minor format fix in documentation
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2020-03-09 21:25:13 -06:00 |
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Xifan Tang
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d14fa16905
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finish documentation update on technology library
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2020-03-09 21:17:25 -06:00 |
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Xifan Tang
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cb7e4a1dfa
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finish documentation the simulation settings in VPR8 integration
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2020-03-09 20:03:37 -06:00 |
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tangxifan
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751735bf41
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update documentation in simulation setting syntax
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2020-03-09 17:40:33 -06:00 |
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tangxifan
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3c7fd30e12
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merged tutorial to online documentation and reworked compilation guidelines
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2020-03-09 13:58:24 -06:00 |
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tangxifan
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af6319a6b0
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reworked motivation in documentation
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2020-03-09 11:27:25 -06:00 |
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tangxifan
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73da4a1d6e
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rework motivation for FPGA-Verilog and FPGA-Bitstream in documentation
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2020-03-09 10:32:03 -06:00 |
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tangxifan
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f821e60405
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clean up deadlinks in doc
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2020-03-09 10:15:16 -06:00 |
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tangxifan
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d61ae5561b
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start cleanup the documentation for openfpga shell
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2020-03-09 09:44:19 -06:00 |
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tangxifan
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f67981afa8
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update ducoumentation to explain lib_name XML syntax
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2020-01-08 14:22:17 -07:00 |
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tangxifan
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13f964ea72
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add bitstream file format introduction
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2019-12-04 13:41:31 -07:00 |
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tangxifan
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40bddd4ed7
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add FPL'19 paper to documentation reference
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2019-12-04 12:05:30 -07:00 |
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tangxifan
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323c4fdc9a
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clean up documentation build warnings and add guidelines for port naming
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2019-12-04 11:59:10 -07:00 |
AurelienUoU
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36f7624b95
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Point to point truth table typo fix
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2019-10-01 13:07:27 -06:00 |
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AurelienUoU
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e2867019e1
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Typo fixing
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2019-09-30 10:38:02 -06:00 |
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AurelienUoU
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74f7a3cfb2
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Doc fixing
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2019-09-30 10:29:42 -06:00 |
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AurelienUoU
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5ac79f4805
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Point to point documentation
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2019-09-30 10:00:46 -06:00 |
Ganesh Gore
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48ec1eefcd
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Added fpga_task cmd options in doc [ci skip]
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2019-09-02 02:45:05 -06:00 |
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Ganesh Gore
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241b001282
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Added openfpga_task doc
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2019-09-01 22:15:53 -06:00 |
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Ganesh Gore
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32d47d6b8b
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Update document + Travis cache check
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2019-08-31 16:13:47 -06:00 |
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Ganesh Gore
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06c0dbb328
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Added docuementation for fpga_flow
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2019-08-31 15:19:34 -06:00 |
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tangxifan
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42b528be57
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doc updates
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2019-08-21 15:11:25 -06:00 |
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tangxifan
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9c43b1b753
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complete refacotriing the inv and buf part in submodules
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2019-08-21 14:54:05 -06:00 |
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tangxifan
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b207050b03
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minor fix in documentation
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2019-08-06 14:17:57 -06:00 |
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tangxifan
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fc93a4941a
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update documentation
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2019-08-06 14:17:56 -06:00 |
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tangxifan
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7603850d72
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complete documentation for new features
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2019-08-06 14:17:56 -06:00 |
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tangxifan
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8a046394f8
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add documentation for multi-mode configurable block support
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2019-07-30 16:47:41 -06:00 |
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Xifan Tang
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afd78604c9
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Merge branch 'dev' into documentation: resolved conflicts and add logo files
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2019-07-17 17:50:11 -04:00 |