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OpenFPGA
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7,102 Commits 71 Branches 8 Tags 104 MiB
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7102 Commits

Author SHA1 Message Date
tangxifan ae63c9d441 [core] code format 2023-10-06 17:28:25 -07:00
tangxifan 1e8bf1cece [core] deploy options 2023-10-06 17:28:02 -07:00
tangxifan 78373be86d
Merge pull request #1399 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2023-10-06 17:07:15 -07:00
github-actions[bot] 2b04034aa2 Updated Patch Count 2023-10-07 00:02:24 +00:00
tangxifan f30663f708 [core] code format 2023-10-06 14:08:09 -07:00
tangxifan 108bbad8d4 [core] syntax 2023-10-06 14:07:44 -07:00
tangxifan 4b73a124ce Merge branch 'master' of github.com:lnis-uofu/OpenFPGA into xt_fbit_writer 2023-10-06 13:54:55 -07:00
tangxifan 80856f1b70 [core] adding new options and rewrite options for bitfile writer 2023-10-06 13:54:29 -07:00
tangxifan 603c20372d
Merge pull request #1397 from lnis-uofu/xt_doc_hotfix 
[doc] add missing packages
 2023-10-06 12:22:31 -07:00
tangxifan 059e08ae73 [doc] add missing packages 2023-10-06 11:00:21 -07:00
tangxifan 32513c73eb
Merge pull request #1396 from lnis-uofu/dependabot/submodules/yosys-8367f06 
Bump yosys from `11ffd7d` to `8367f06`
 2023-10-06 10:58:17 -07:00
dependabot[bot] 9f4505574f
Bump yosys from `11ffd7d` to `8367f06` 
Bumps [yosys](https://github.com/YosysHQ/yosys) from `11ffd7d` to `8367f06`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](11ffd7df40...8367f06188)

---
updated-dependencies:
- dependency-name: yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2023-10-06 06:02:51 +00:00
tangxifan 36babaaf2d
Merge pull request #1387 from lnis-uofu/dependabot/submodules/yosys-11ffd7d 
Bump yosys from `076c5ce` to `11ffd7d`
 2023-10-03 23:00:27 -04:00
dependabot[bot] e944e9e161
Bump yosys from `076c5ce` to `11ffd7d` 
Bumps [yosys](https://github.com/YosysHQ/yosys) from `076c5ce` to `11ffd7d`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](076c5ceb71...11ffd7df40)

---
updated-dependencies:
- dependency-name: yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2023-10-03 06:18:58 +00:00
tangxifan 37899895bb
Merge pull request #1381 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2023-09-27 10:45:34 -07:00
github-actions[bot] 56cf22cb12 Updated Patch Count 2023-09-27 17:43:57 +00:00
tangxifan e4449e15eb
Merge pull request #1379 from lnis-uofu/dependabot/submodules/yosys-076c5ce 
Bump yosys from `934c822` to `076c5ce`
 2023-09-27 10:43:25 -07:00
dependabot[bot] 3055df134e
Bump yosys from `934c822` to `076c5ce` 
Bumps [yosys](https://github.com/YosysHQ/yosys) from `934c822` to `076c5ce`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](934c82254d...076c5ceb71)

---
updated-dependencies:
- dependency-name: yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2023-09-27 06:46:10 +00:00
tangxifan fb794d7a04
Merge pull request #1378 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2023-09-26 21:22:30 -07:00
github-actions[bot] 49057372cf Updated Patch Count 2023-09-27 04:20:43 +00:00
tangxifan 8928d45e46
Merge pull request #1377 from lnis-uofu/xt_merge_tile_ports 
Now clock/reset ports of all the subtiles can be merged in netlist
 2023-09-26 21:19:53 -07:00
tangxifan 517be141ba [doc] format 2023-09-26 18:37:49 -07:00
tangxifan b56609d210 [doc] more details 2023-09-26 15:11:26 -07:00
tangxifan a15db83267 [core] code format 2023-09-26 11:41:11 -07:00
tangxifan ea91182216 [core] check option conflicts 2023-09-26 11:40:42 -07:00
tangxifan c4bce834e4 [core] code format 2023-09-25 22:34:39 -07:00
tangxifan 262e47a922 [doc] update 2023-09-25 22:34:10 -07:00
tangxifan 5aa206e616 [core] fixed some bugs 2023-09-25 22:27:24 -07:00
tangxifan 60b8c396dc [test] add a new test 2023-09-25 21:25:21 -07:00
tangxifan 1624dc9764 [core] code format 2023-09-25 21:13:50 -07:00
tangxifan 76f446caec [core] fixed a bug 2023-09-25 21:13:11 -07:00
tangxifan a4f53c64c6 [test] fixed a bug 2023-09-25 19:28:19 -07:00
tangxifan 663c9c9fa1 [test] add a new test to validate the tile port merge feature 2023-09-25 18:34:34 -07:00
tangxifan dbd466cdec [core] now support tile port merge 2023-09-25 18:16:24 -07:00
tangxifan 3adf81046a [core] code format 2023-09-25 17:22:26 -07:00
tangxifan 5e269e8bc4 [core] support port merging at grid modules 2023-09-25 17:21:58 -07:00
tangxifan fd99dafad7 [core] code format 2023-09-25 16:51:01 -07:00
tangxifan 96f36a96dd [core] syntax 2023-09-25 16:50:30 -07:00
tangxifan ca715f4c82 [core] developing parser to support subtile port merge 2023-09-25 16:46:34 -07:00
tangxifan e345b97b84
Merge pull request #1374 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2023-09-23 18:25:40 -07:00
github-actions[bot] d42cc1413a Updated Patch Count 2023-09-24 01:18:25 +00:00
tangxifan 80c93dd6eb
Merge pull request #1373 from lnis-uofu/xt_module_name_assistant 
New utility tool: module name assistant
 2023-09-23 18:17:54 -07:00
tangxifan a1ed277a88 [test] typo 2023-09-23 15:12:02 -07:00
tangxifan 00e1a5df11 [test] fixed some bugs 2023-09-23 12:44:47 -07:00
tangxifan 195aa7a9a8 [test] developing new test to increase coverage on module renaming 2023-09-23 12:40:20 -07:00
tangxifan edb0e687f1 [core] code format 2023-09-23 12:15:53 -07:00
tangxifan 11de8965a8 [core] fixed some bugs 2023-09-23 12:15:31 -07:00
tangxifan 860cfd53c6 [core] fixed critical bugs in renaming modules 2023-09-23 11:51:31 -07:00
tangxifan c3443a288c [doc] update doc for module rename assistant 2023-09-22 19:36:01 -07:00
tangxifan 0a94763422 [lib] add module rename assistant 2023-09-22 18:16:01 -07:00