3d9e913e4e
add a benchmark fifo
2018-12-12 16:45:33 -07:00
cc5a01d476
Fix waveform generation + add benchmark and update go.sh
2018-12-11 22:21:39 -07:00
a70b0ac9ac
Correct go.sh
2018-12-11 15:51:21 -07:00
317c3b59c9
Update go.sh and upload pip_add.v
2018-12-11 15:47:05 -07:00
fb0992bd85
Update go.sh and Makefile
2018-12-11 15:31:32 -07:00
c130404158
add a section for picorv generation through the flow
2018-12-08 11:33:14 -07:00
4cc875a5a5
fix a bug in wired LUT
2018-12-06 18:00:17 -07:00
fe47b3d21f
Changing arch from memory dec to scff. Get the bitstream from go.sh
2018-12-06 14:03:17 -07:00
31c3eba111
ReadMe modifications to add the beginning of the FPGA-SPICE tutorial
...
Modifications on the addresses aswell and the different commands when they were not working.
To do still:
-create a script to change the addresses when needed
-continue the tutorial
2018-09-27 09:33:39 -06:00
d683134b12
rename customized vpr7 to vpr7 XML to Production
2018-09-17 23:10:45 -06:00
tangxifan
AurelienUoU
Baudouin Chauviere