tangxifan
|
95a32628ab
|
[core] fixed the bug in arch bitgen due to the tile modules
|
2023-07-25 14:15:15 -07:00 |
tangxifan
|
b2d1d1b6bd
|
[core] fixed a bug on fpga bitstream when supporting fpga_core
|
2023-06-19 14:40:38 -07:00 |
tangxifan
|
63ee0c980e
|
[core] fixed some bugs
|
2023-06-18 22:12:54 -07:00 |
tangxifan
|
d9499f2b40
|
[core] now fpga bitstream supports the wrapper module
|
2023-06-18 21:58:36 -07:00 |
tangxifan
|
550e68c68b
|
[core] fixed a bug: node_fan_in seems buggy
|
2023-03-06 22:26:27 -08:00 |
tangxifan
|
6d31b319a2
|
[engine] update source files subject to code formatting rules
|
2022-10-06 17:08:50 -07:00 |
tangxifan
|
2de4a460a8
|
[Engine] Rework the function that counts the number of configurable children for fabric key writer and bitstream generator
|
2021-09-24 15:15:32 -07:00 |
tangxifan
|
962acda810
|
[Engine] Bug fix in fabric key generation when computing configurable children
|
2021-09-22 11:09:46 -07:00 |
tangxifan
|
b787c4e100
|
[Engine] Register QL memory bank as a legal protocol
|
2021-09-09 15:06:51 -07:00 |
tangxifan
|
0aec30bac6
|
[Tool] Update FPGA core engine to support mux default path overloading through bitstream setting file
|
2021-04-19 15:53:33 -06:00 |
tangxifan
|
ba0120bd76
|
[Tool] Remove the limitation on requiring Qb ports for CCFF
|
2020-11-06 11:10:04 -07:00 |
tangxifan
|
0d77916041
|
[Tool] Support multi-region frame-based configuration protocol
|
2020-10-30 10:43:11 -06:00 |
tangxifan
|
8ef6ae32fb
|
[Tool] Bug fix for bitstream estimator due to the current special status of frame-based protocol
|
2020-10-29 17:35:55 -06:00 |
tangxifan
|
987eccf586
|
[Tool] Bug fix in multi-region memory bank; Basic test passed
|
2020-10-29 16:26:45 -06:00 |
tangxifan
|
033c92c365
|
precisely reserve memory for child blocks in bitstream manager
|
2020-07-03 22:47:21 -06:00 |
tangxifan
|
f040fc78a9
|
now reserve blocks in bitstream manager can accurately capture the size
|
2020-07-03 20:06:12 -06:00 |
tangxifan
|
70d9678578
|
reserve child block in bistream manager
|
2020-07-03 14:04:10 -06:00 |
tangxifan
|
6ea857ae6c
|
use fast method to inquire number of bits and blocks in bitstream databases
|
2020-07-03 10:55:25 -06:00 |
tangxifan
|
405824081b
|
reserve configuration blocks and bits in bitstream manager builder to be memory efficient
|
2020-07-02 15:28:52 -06:00 |
tangxifan
|
675a59ecb8
|
Move fpga_bitstream to the libopenfpga library and add XML reader
|
2020-06-20 18:25:17 -06:00 |
tangxifan
|
b91c30191a
|
add input and output net echo in arch bitstream database
|
2020-06-17 00:04:55 -06:00 |
tangxifan
|
2c44c70557
|
bring pb interconnection bitstream generation online
|
2020-02-25 00:28:06 -07:00 |
tangxifan
|
712eeb1340
|
bring bitstream generator for routing modules online
|
2020-02-23 22:09:46 -07:00 |
tangxifan
|
2d17395e13
|
start integrating fpga_bitstream. Bring data structures online
|
2020-02-22 23:04:42 -07:00 |