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[Engine] Bug fix in fabric key generation when computing configurable children

This commit is contained in:
tangxifan 2021-09-22 11:09:46 -07:00
parent ad432e4d95
commit 962acda810
6 changed files with 47 additions and 19 deletions
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1
openfpga/src/base/openfpga_build_fabric.cpp
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@ -132,6 +132,7 @@ int build_fabric(OpenfpgaContext& openfpga_ctx,
VTR_ASSERT(false == fkey_fname.empty());
curr_status = write_fabric_key_to_xml_file(openfpga_ctx.module_graph(),
fkey_fname,
openfpga_ctx.arch().config_protocol.type(),
cmd_context.option_enable(cmd, opt_verbose));
/* If there is any error, final status cannot be overwritten by a success flag */
if (CMD_EXEC_SUCCESS != curr_status) {

13
openfpga/src/fabric/fabric_key_writer.cpp
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@ -14,6 +14,8 @@
#include "openfpga_naming.h"
#include "memory_utils.h"
#include "fabric_key_writer.h"
/* begin namespace openfpga */
@ -29,6 +31,7 @@ namespace openfpga {
***************************************************************************************/
int write_fabric_key_to_xml_file(const ModuleManager& module_manager,
const std::string& fname,
const e_config_protocol_type& config_protocol_type,
const bool& verbose) {
std::string timer_message = std::string("Write fabric key to XML file '") + fname + std::string("'");
@ -65,9 +68,15 @@ int write_fabric_key_to_xml_file(const ModuleManager& module_manager,
/* Create regions for the keys and load keys by region */
for (const ConfigRegionId& config_region : module_manager.regions(top_module)) {
FabricRegionId fabric_region = fabric_key.create_region();
fabric_key.reserve_region_keys(fabric_region, module_manager.region_configurable_children(top_module, config_region).size());
/* Each configuration protocol has some child which should not be in the list. They are typically decoders */
size_t curr_region_num_config_child = module_manager.region_configurable_children(top_module, config_region).size();
size_t num_child_to_skip = estimate_num_configurable_children_to_skip_by_config_protocol(config_protocol_type, curr_region_num_config_child);
curr_region_num_config_child -= num_child_to_skip;
for (size_t ichild = 0; ichild < module_manager.region_configurable_children(top_module, config_region).size(); ++ichild) {
fabric_key.reserve_region_keys(fabric_region, curr_region_num_config_child);
for (size_t ichild = 0; ichild < curr_region_num_config_child; ++ichild) {
ModuleId child_module = module_manager.region_configurable_children(top_module, config_region)[ichild];
size_t child_instance = module_manager.region_configurable_child_instances(top_module, config_region)[ichild];
vtr::Point<int> child_coord = module_manager.region_configurable_child_coordinates(top_module, config_region)[ichild];

1
openfpga/src/fabric/fabric_key_writer.h
View File

@ -16,6 +16,7 @@ namespace openfpga {
int write_fabric_key_to_xml_file(const ModuleManager& module_manager,
const std::string& fname,
const e_config_protocol_type& config_protocol_type,
const bool& verbose);
} /* end namespace openfpga */

20
openfpga/src/fpga_bitstream/build_device_bitstream.cpp
View File

@ -13,6 +13,7 @@
#include "openfpga_naming.h"
#include "memory_utils.h"
#include "module_manager_utils.h"
#include "build_grid_bitstream.h"
@ -84,23 +85,8 @@ size_t rec_estimate_device_bitstream_num_bits(const ModuleManager& module_manage
if (parent_module == top_module) {
for (const ConfigRegionId& config_region : module_manager.regions(parent_module)) {
size_t curr_region_num_config_child = module_manager.region_configurable_children(parent_module, config_region).size();
/* Frame-based configuration protocol will have 1 decoder
* if there are more than 1 configurable children
*/
if ( (CONFIG_MEM_FRAME_BASED == config_protocol_type)
&& (2 <= curr_region_num_config_child)) {
curr_region_num_config_child--;
}
/* Memory configuration protocol will have 2 decoders
* at the top-level
*/
if (CONFIG_MEM_MEMORY_BANK == config_protocol_type
|| CONFIG_MEM_QL_MEMORY_BANK == config_protocol_type) {
VTR_ASSERT(2 <= curr_region_num_config_child);
curr_region_num_config_child -= 2;
}
size_t num_child_to_skip = estimate_num_configurable_children_to_skip_by_config_protocol(config_protocol_type, curr_region_num_config_child);
curr_region_num_config_child -= num_child_to_skip;
/* Visit all the children in a recursively way */
for (size_t ichild = 0; ichild < curr_region_num_config_child; ++ichild) {

22
openfpga/src/utils/memory_utils.cpp
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@ -429,5 +429,27 @@ size_t generate_pb_sram_port_size(const e_config_protocol_type sram_orgz_type,
return sram_port_size;
}
size_t estimate_num_configurable_children_to_skip_by_config_protocol(e_config_protocol_type config_protocol_type,
size_t curr_region_num_config_child) {
size_t num_child_to_skip = 0;
/* Frame-based configuration protocol will have 1 decoder
* if there are more than 1 configurable children
*/
if ( (CONFIG_MEM_FRAME_BASED == config_protocol_type)
&& (2 <= curr_region_num_config_child)) {
num_child_to_skip = 1;
}
/* Memory configuration protocol will have 2 decoders
* at the top-level
*/
if (CONFIG_MEM_MEMORY_BANK == config_protocol_type
|| CONFIG_MEM_QL_MEMORY_BANK == config_protocol_type) {
VTR_ASSERT(2 <= curr_region_num_config_child);
num_child_to_skip = 2;
}
return num_child_to_skip;
}
} /* end namespace openfpga */

9
openfpga/src/utils/memory_utils.h
View File

@ -40,6 +40,15 @@ size_t generate_sram_port_size(const e_config_protocol_type sram_orgz_type,
size_t generate_pb_sram_port_size(const e_config_protocol_type sram_orgz_type,
const size_t& num_config_bits);
/**
* @brief Compute the number of configurable children to be skipped for a given configuration protocol
* For some configuration protocol, the decoders are not counted as configurable children
* (they are included in the list for bitstream generator usage)
* The number of decoders depends on the type of configuration protocol.
*/
size_t estimate_num_configurable_children_to_skip_by_config_protocol(e_config_protocol_type config_protocol_type,
size_t curr_region_num_config_child);
} /* end namespace openfpga */
#endif