tangxifan
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e69aa5ba30
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change type casting for vpr macro
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2020-01-23 14:57:53 -07:00 |
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tangxifan
|
26e6c4012f
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add const context function execution for shell
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2020-01-23 14:50:03 -07:00 |
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tangxifan
|
3cb16a2279
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move basic commands to separated CXX files
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2020-01-23 14:42:49 -07:00 |
Laboratory for Nano Integrated Systems (LNIS)
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1cd4ca1fe2
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Merge pull request #43 from LNIS-Projects/dev
Updated guidelines to clarify the issues that may happen during compilation
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2020-01-23 14:17:46 -07:00 |
AurelienUoU
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712d8dd3a2
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Typo fixing
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2020-01-23 13:25:27 -07:00 |
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tangxifan
|
ba207ee5a5
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start split workload from the main.cpp in openfpga
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2020-01-23 13:24:35 -07:00 |
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AurelienUoU
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cf2c99214e
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Edit Readme
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2020-01-23 13:19:57 -07:00 |
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AurelienUoU
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c51001c853
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Add compilation verification task in openfpga_flow
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2020-01-23 13:13:23 -07:00 |
ganeshgore
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cd69f1870d
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Merge remote-tracking branch 'origin/ganesh_dev' into dev
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2020-01-23 10:07:36 -07:00 |
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ganeshgore
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46bb5ef9d0
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Added disp option in openfpga_flow, Default is --nodisp
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2020-01-23 10:04:38 -07:00 |
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AurelienUoU
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f504922069
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Compilation verification insertion in README
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2020-01-23 09:39:49 -07:00 |
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AurelienUoU
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521faebde2
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Correct unexpected path modification
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2020-01-22 21:03:57 -07:00 |
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AurelienUoU
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85c9f26a9f
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Update documentation about cmake version and graphical interface
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2020-01-22 20:46:49 -07:00 |
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tangxifan
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07ad32241a
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Merge branch 'refactoring' into dev
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2020-01-22 20:30:26 -07:00 |
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tangxifan
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7909a1ad82
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update title for openfpga shell
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2020-01-22 20:29:57 -07:00 |
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tangxifan
|
523f9ac391
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start implement openfpga shell and use vpr as a macro
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2020-01-22 20:20:10 -07:00 |
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tangxifan
|
f6a36e8f76
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Merge branch 'refactoring' into dev
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2020-01-22 19:52:31 -07:00 |
|
tangxifan
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e983966a08
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add macro function support to openfpga shell and update unit test
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2020-01-22 19:30:36 -07:00 |
|
tangxifan
|
6309ef2db4
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Merge branch 'refactoring' into dev
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2020-01-22 17:21:21 -07:00 |
|
tangxifan
|
558f0bb1bd
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bug fixing in shell echo messages and add a test script
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2020-01-22 17:11:24 -07:00 |
|
tangxifan
|
9b79bb2114
|
Merge branch 'refactoring' into dev
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2020-01-22 16:52:23 -07:00 |
|
tangxifan
|
bb8ef9614f
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change to namespace openfpga and bug fixed to avoid easy crash due to wrong options
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2020-01-22 16:49:32 -07:00 |
|
tangxifan
|
f8c5c1a117
|
update shell with new function binding strategy and new help desk print-out
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2020-01-22 16:05:14 -07:00 |
|
tangxifan
|
7073e4d082
|
add shell unit test
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2020-01-21 22:59:53 -07:00 |
|
tangxifan
|
4f26e2519f
|
add shell interface and command execution
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2020-01-21 20:46:24 -07:00 |
|
tangxifan
|
363ab382e5
|
add shell data structure
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2020-01-21 17:24:49 -07:00 |
|
tangxifan
|
b53897b838
|
add how-to-use for command data structure
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2020-01-20 22:53:11 -07:00 |
|
tangxifan
|
7a5b36fe52
|
Add echo command and unit test for command parser
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2020-01-20 20:31:16 -07:00 |
|
tangxifan
|
3ae80a192f
|
add command echo functionality for mini shell
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2020-01-20 19:42:43 -07:00 |
|
tangxifan
|
acdb3818c2
|
start developing mini shell for open fpga
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2020-01-20 18:14:24 -07:00 |
|
tangxifan
|
16752b7e39
|
update on sample arch
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2020-01-20 12:42:08 -07:00 |
|
tangxifan
|
4c5917ac97
|
Merge branch 'refactoring' into dev
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2020-01-19 15:01:09 -07:00 |
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tangxifan
|
07994d424c
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add XML parser and writer for direct connection
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2020-01-19 15:00:19 -07:00 |
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tangxifan
|
10336cbe67
|
add XML parser and writer for routing circuit definition for OpenFPGA architecture
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2020-01-19 14:44:27 -07:00 |
|
tangxifan
|
ebe46d15a9
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add XML parser, writer and linker for configuration protocol data structure
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2020-01-18 21:19:20 -07:00 |
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tangxifan
|
9693c3a12d
|
add XML writer for simulation setting object
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2020-01-18 16:41:42 -07:00 |
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tangxifan
|
bc3130d196
|
add XML parser for simulation setting
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2020-01-18 15:40:20 -07:00 |
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tangxifan
|
2a902c7e55
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add mutators to simulation setting data structure
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2020-01-18 14:07:37 -07:00 |
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tangxifan
|
0de9908d52
|
add accessors to simulation setting data structure
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2020-01-18 12:51:25 -07:00 |
|
tangxifan
|
7a46c85cb0
|
reorganize and clean-up sample architecture
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2020-01-18 10:50:15 -07:00 |
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tangxifan
|
c9da3d5207
|
Merge branch 'dev' of https://github.com/LNIS-Projects/OpenFPGA into dev
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2020-01-17 20:05:33 -07:00 |
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tangxifan
|
ab1b1b7e02
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add XML writer for technology library
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2020-01-17 20:02:56 -07:00 |
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tangxifan
|
df68dddb2a
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Merge branch 'refactoring' into dev
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2020-01-17 19:03:57 -07:00 |
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tangxifan
|
8f2936af54
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finish XML parser for technology library
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2020-01-17 17:43:55 -07:00 |
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tangxifan
|
e54760c677
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add XML parsing for transistors and RRAM parameters in technology library
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2020-01-17 17:32:42 -07:00 |
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tangxifan
|
d48a888804
|
add XML parsing for design parameters in technology library
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2020-01-17 17:22:09 -07:00 |
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tangxifan
|
de0bcc96fb
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add missing file about XML parsers for technology library
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2020-01-17 17:16:32 -07:00 |
|
tangxifan
|
d58186507c
|
add XML parsing for device model library settings
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2020-01-17 17:15:58 -07:00 |
|
tangxifan
|
88a96673e3
|
rename some methods in technology library and start building associated XML parser
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2020-01-17 16:44:57 -07:00 |
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tangxifan
|
6a17abf257
|
Merge branch 'dev' of https://github.com/LNIS-Projects/OpenFPGA into dev
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2020-01-17 15:36:22 -07:00 |