add XML parser and writer for direct connection

This commit is contained in:
tangxifan 2020-01-19 15:00:19 -07:00
parent 10336cbe67
commit 07994d424c
8 changed files with 98 additions and 0 deletions

View File

@ -265,6 +265,9 @@
<routing_segment>
<segment name="L4" circuit_model_name="chan_segment"/>
</routing_segment>
<!--direct_connection>
<direct name="adder" circuit_model_name="direct_interc"/>
</direct_connection-->
<complex_blocks>
<pb_type name="io" idle_mode_name="inpad" physical_mode_name="io_phy"/>
<mode name="io[io_phy]" disable_in_packing="true"/>

View File

@ -42,6 +42,11 @@ struct Arch {
* to circuit models in circuit library
*/
std::map<std::string, CircuitModelId> routing_seg2circuit;
/* Mapping from the names of direct connection
* to circuit models in circuit library
*/
std::map<std::string, CircuitModelId> direct2circuit;
};
} /* namespace openfpga ends */

View File

@ -80,6 +80,10 @@ openfpga::Arch read_xml_openfpga_arch(const char* arch_file_name) {
openfpga_arch.routing_seg2circuit = read_xml_routing_segment_circuit(xml_openfpga_arch, loc_data,
openfpga_arch.circuit_lib);
/* Parse the routing segment circuit definition */
openfpga_arch.direct2circuit = read_xml_direct_circuit(xml_openfpga_arch, loc_data,
openfpga_arch.circuit_lib);
/* Second node should be <openfpga_simulation_setting> */
auto xml_simulation_settings = get_single_child(doc, "openfpga_simulation_setting", loc_data);

View File

@ -184,3 +184,52 @@ std::map<std::string, CircuitModelId> read_xml_routing_segment_circuit(pugi::xml
return seg2circuit;
}
/********************************************************************
* Parse XML codes about <direct_connection> to an object of name-to-circuit mapping
* Note: this function should be called AFTER the parsing of circuit library!!!
*******************************************************************/
std::map<std::string, CircuitModelId> read_xml_direct_circuit(pugi::xml_node& Node,
const pugiutil::loc_data& loc_data,
const CircuitLibrary& circuit_lib) {
std::map<std::string, CircuitModelId> direct2circuit;
/* Parse direct list, this is optional. May not be used */
pugi::xml_node xml_directs= get_single_child(Node, "direct_connection", loc_data, pugiutil::ReqOpt::OPTIONAL);
/* Not found, we can return */
if (!xml_directs) {
return direct2circuit;
}
/* Iterate over the children under this node,
* each child should be named after switch
*/
for (pugi::xml_node xml_direct : xml_directs.children()) {
/* Error out if the XML child has an invalid name! */
if (xml_direct.name() != std::string("direct")) {
bad_tag(xml_direct, loc_data, xml_directs, {"direct"});
}
/* Get the switch name */
std::string direct_name = get_attribute(xml_direct, "name", loc_data).as_string();
/* Get the routing segment circuit model name */
std::string direct_model_name = get_attribute(xml_direct, "circuit_model_name", loc_data).as_string();
CircuitModelId direct_model = find_routing_circuit_model(xml_direct, loc_data,
circuit_lib, direct_model_name,
CIRCUIT_MODEL_WIRE);
/* Ensure that there is no duplicated seg names defined here */
std::map<std::string, CircuitModelId>::const_iterator it = direct2circuit.find(direct_name);
if (it != direct2circuit.end()) {
archfpga_throw(loc_data.filename_c_str(), loc_data.line(xml_direct),
"Direct name '%s' has been defined more than once!\n",
direct_name.c_str());
}
/* Pass all the check, we can add it to the map */
direct2circuit[direct_name] = direct_model;
}
return direct2circuit;
}

View File

@ -26,4 +26,8 @@ std::map<std::string, CircuitModelId> read_xml_routing_segment_circuit(pugi::xml
const pugiutil::loc_data& loc_data,
const CircuitLibrary& circuit_lib);
std::map<std::string, CircuitModelId> read_xml_direct_circuit(pugi::xml_node& Node,
const pugiutil::loc_data& loc_data,
const CircuitLibrary& circuit_lib);
#endif

View File

@ -49,6 +49,9 @@ void write_xml_openfpga_arch(const char* fname,
/* Write the routing segment circuit definition */
write_xml_routing_segment_circuit(fp, fname, openfpga_arch.circuit_lib, openfpga_arch.routing_seg2circuit);
/* Write the direct connection circuit definition */
write_xml_direct_circuit(fp, fname, openfpga_arch.circuit_lib, openfpga_arch.direct2circuit);
fp << "</openfpga_architecture>" << "\n";
/* Write the simulation */

View File

@ -97,3 +97,28 @@ void write_xml_routing_segment_circuit(std::fstream& fp,
/* Finish writing the root node */
fp << "\t" << "</routing_segment>" << "\n";
}
/********************************************************************
* Write direction connection circuit models in XML format
*******************************************************************/
void write_xml_direct_circuit(std::fstream& fp,
const char* fname,
const CircuitLibrary& circuit_lib,
const std::map<std::string, CircuitModelId>& direct2circuit) {
/* If the direct2circuit is empty, we do not output XML */
if (direct2circuit.empty()) {
return;
}
/* Validate the file stream */
openfpga::check_file_stream(fname, fp);
/* Write the root node */
fp << "\t" << "<direct_connection>" << "\n";
/* Write each direct connection circuit definition */
write_xml_routing_component_circuit(fp, fname, std::string("direct"), circuit_lib, direct2circuit);
/* Finish writing the root node */
fp << "\t" << "</direct_connection>" << "\n";
}

View File

@ -28,4 +28,9 @@ void write_xml_routing_segment_circuit(std::fstream& fp,
const CircuitLibrary& circuit_lib,
const std::map<std::string, CircuitModelId>& seg2circuit);
void write_xml_direct_circuit(std::fstream& fp,
const char* fname,
const CircuitLibrary& circuit_lib,
const std::map<std::string, CircuitModelId>& direct2circuit);
#endif