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update on sample arch

This commit is contained in:
tangxifan 2020-01-20 12:42:08 -07:00
parent 07994d424c
commit 16752b7e39
1 changed files with 9 additions and 1 deletions
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10
libopenfpga/libarchopenfpga/arch/sample_arch.xml
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@ -269,11 +269,19 @@
<direct name="adder" circuit_model_name="direct_interc"/>
</direct_connection-->
<complex_blocks>
<pb_type name="io" idle_mode_name="inpad" physical_mode_name="io_phy"/>
<pb_type name="io" physical_mode_name="io_phy"/>
<mode name="io[io_phy]" disable_in_packing="true"/>
<pb_type name="io[io_phy].iopad" circuit_model_name="iopad" mode_bits="1"/>
<pb_type name="io[io_phy].inpad" physical_pb_type_name="iopad" mode_bits="1"/>
<pb_type name="io[io_phy].outpad" physical_pb_type_name="iopad" mode_bits="0"/>
<pb_type name="clb.fle" physical_mode_name="fle_phy" idle_mode_name="n2_lut5">
<pb_type name="clb.fle[fle_phy].frac_logic.frac_lut6" mode_bits="11" circuit_model_name="frac_lut6">
<pb_type name="clb.fle[fle_phy].frac_logic.adder_phy" circuit_model_name="adder">
<pb_type name="clb.fle[fle_phy].frac_logic.ff_phy" circuit_model_name="static_dff">
<mode name="fle_phy" disabled_in_packing="true">
<pb_type name="lut5" mode_bits="01" physical_pb_type_name="frac_lut6" physical_pb_type_index_factor="0.5">
<input name="in" physical_mode_pin="in[5:0]"/>
<output name="out" physical_mode_pin="lut5_out" physical_mode_pin_rotate_offset="1"/>
</complex_blocks>
</openfpga_architecture>
<openfpga_simulation_setting>