tangxifan
|
afdc071c4c
|
[engine] apply code format
|
2022-10-06 18:13:33 -07:00 |
tangxifan
|
e2debd2dde
|
[engine] add missing header files after coding formatter sorts the include files
|
2022-10-06 18:08:57 -07:00 |
tangxifan
|
6d31b319a2
|
[engine] update source files subject to code formatting rules
|
2022-10-06 17:08:50 -07:00 |
tangxifan
|
0d8d8446ee
|
[test] fixed a bug where OPIN for direct connection is included in GSB
|
2022-09-30 15:24:51 -07:00 |
tangxifan
|
fb2693171b
|
[engine] fixed a bug which causes errors in repacker
|
2022-09-28 16:30:11 -07:00 |
tangxifan
|
36b3e64b35
|
[engine] now pb_fixup can also accept vtr's post-routing-clustering sync up results
|
2022-09-28 12:17:16 -07:00 |
tangxifan
|
3285af4107
|
[engine] syntax
|
2022-09-28 11:39:37 -07:00 |
tangxifan
|
51f54bbf20
|
[engine] developing the steps to annotate clustering results
|
2022-09-27 16:54:48 -07:00 |
tangxifan
|
8272d2dcbc
|
[engine] enrich verbose output for repacker, easier to debug
|
2022-09-27 10:46:57 -07:00 |
tangxifan
|
e19ca1c6d1
|
[engine] fixed a bug when decoding bitstream for connnection blocks: now use incoming edges from gsb
|
2022-09-19 18:49:54 -07:00 |
tangxifan
|
c922259c23
|
[engine] remove warnings and update vtr
|
2022-09-19 14:53:30 -07:00 |
tangxifan
|
90ddd2ce32
|
[engine] now get incoming edges for IPINs only from GSB
|
2022-09-19 14:02:13 -07:00 |
tangxifan
|
3c6ef1925c
|
[engine] now sort ipin incoming edges
|
2022-09-19 11:00:08 -07:00 |
tangxifan
|
373566416c
|
Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into vtr_upgrade
|
2022-09-16 16:47:21 -07:00 |
tangxifan
|
f0fe781dbc
|
[engine] fixed a bug
|
2022-09-16 10:45:27 -07:00 |
tangxifan
|
bba5b7b070
|
[engine] syntax
|
2022-09-15 23:04:37 -07:00 |
tangxifan
|
cbc71c75c4
|
[engine] now io indexing follows a natural way
|
2022-09-15 23:01:35 -07:00 |
tangxifan
|
8378ad4bf3
|
[engine] fixed a bug on mistakenly adding I/O child modules for direct connections
|
2022-09-14 17:13:23 -07:00 |
tangxifan
|
036933dc14
|
[engine] fixed more bugs due to the extra modules added to top-level module when using memory bank or frame-based protocols
|
2022-09-14 16:46:10 -07:00 |
tangxifan
|
0425b00af5
|
[engine] fixed a bug for frame-based protocols
|
2022-09-14 16:41:30 -07:00 |
tangxifan
|
cb89488f76
|
[engine] now support a custom list for indexing I/O children in each module
|
2022-09-14 15:54:55 -07:00 |
tangxifan
|
eb8b7e6901
|
[engine] fixed a bug in i/o indexing
|
2022-09-14 11:30:34 -07:00 |
tangxifan
|
1c2192a87d
|
[engine] fixed a few bugs
|
2022-09-12 16:50:32 -07:00 |
tangxifan
|
2fc124e109
|
[engine] now repack has a new option "--ignore_global_nets_on_pins"
|
2022-09-12 16:18:26 -07:00 |
tangxifan
|
e5c7a3df9f
|
[engine] syntax
|
2022-09-07 15:51:54 -07:00 |
tangxifan
|
56619f9a47
|
Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into vtr_upgrade
|
2022-09-07 15:04:05 -07:00 |
tangxifan
|
8d09773e65
|
[engine] remove unnecessary checks from sb mirror checker
|
2022-09-07 11:55:08 +08:00 |
tangxifan
|
e748c7697d
|
[engine] update code comments
|
2022-09-06 13:51:29 -07:00 |
tangxifan
|
eab3580f79
|
[engine] now consider circuit model rather than switchId and SegmentId when identifying GSB structure similarity
|
2022-09-06 13:40:29 -07:00 |
tangxifan
|
59440082ed
|
[engine] fixed some syntax errors
|
2022-09-06 11:55:40 -07:00 |
tangxifan
|
2f84ce5955
|
[engine] now move rr_gsb mirror function outside the class, because of the circuit_lib should be used
|
2022-09-06 11:48:21 -07:00 |
tangxifan
|
b26b2d0ed0
|
Merge branch 'master' into vtr_upgrade
|
2022-09-02 10:05:23 -07:00 |
coolbreeze413
|
04abd1a36f
|
add <array> declaration to fix gcc error
|
2022-09-02 19:26:28 +05:30 |
tangxifan
|
9e1abf5898
|
Merge branch 'master' into vtr_upgrade
|
2022-09-01 21:39:14 -07:00 |
tangxifan
|
d3f08a893c
|
[engine] now frame view will not build nets for configuration bus
|
2022-09-01 20:02:00 -07:00 |
tangxifan
|
001367ea41
|
[engine] syntax
|
2022-09-01 16:40:17 -07:00 |
tangxifan
|
1f5e4d4215
|
[engine] update fabric bitstream implementation
|
2022-09-01 16:29:42 -07:00 |
tangxifan
|
ea6f609181
|
[engine] fixing a bug in fabric bitstream encoding
|
2022-09-01 16:28:17 -07:00 |
tangxifan
|
e4aa6e0ee5
|
[engine] syntax
|
2022-09-01 15:17:39 -07:00 |
tangxifan
|
ee87b5c348
|
[engine] fixed all the remaining syntax errors due to API mismatches
|
2022-09-01 09:57:12 -07:00 |
tangxifan
|
7c5046cf4e
|
[engine] include the correct header file
|
2022-09-01 09:23:05 -07:00 |
tangxifan
|
71ad0721a1
|
Merge branch 'master' into vtr_upgrade
|
2022-08-31 13:56:17 -07:00 |
tangxifan
|
26388dfb2f
|
[engine] fixed a bug which causes errors when writing unique GSB to files
|
2022-08-30 15:45:00 -07:00 |
tangxifan
|
3656154913
|
[engine] fixed syntax errors
|
2022-08-29 21:17:48 -07:00 |
tangxifan
|
2321ea6274
|
[engine] complete the code required to output rr_gsb with options
|
2022-08-29 20:44:16 -07:00 |
tangxifan
|
12a30196e0
|
[engine] updating gsb writer; Unfinished!!!
|
2022-08-29 16:58:48 -07:00 |
tangxifan
|
b9abdbc5d4
|
[engine] enable verbose output
|
2022-08-27 19:59:57 -07:00 |
tangxifan
|
e9d6e7e38a
|
[engine] update vtr and enable more debugging info
|
2022-08-27 19:12:43 -07:00 |
tangxifan
|
0c2b49ddb9
|
[engine] remove debugging log output
|
2022-08-27 13:06:05 -07:00 |
tangxifan
|
25f6c529e0
|
[engine] fixed syntax errors when using clang
|
2022-08-25 09:58:43 -07:00 |