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[engine] fixed syntax errors

This commit is contained in:
tangxifan 2022-08-29 21:17:48 -07:00
parent 50813d90a2
commit 3656154913
4 changed files with 26 additions and 22 deletions
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12
openfpga/src/annotation/rr_gsb_writer_option.cpp
View File

@ -1,6 +1,7 @@
/******************************************************************************
* Memember functions for data structure RRGSBWriterOption
******************************************************************************/
#include <map>
#include "vtr_assert.h"
#include "vtr_log.h"
@ -17,7 +18,7 @@ RRGSBWriterOption::RRGSBWriterOption() {
output_directory_.clear();
unique_module_only_ = false;
exclude_content_ = {false, false, false, false};
gsb_names_.clear();
include_gsb_names_.clear();
verbose_output_ = false;
num_parse_errors_ = 0;
}
@ -76,7 +77,7 @@ void RRGSBWriterOption::set_exclude_content(const std::string& content) {
num_parse_errors_ = 0;
/* Split the content using a tokenizer */
StringToken tokenizer(content);
std::string tokens = tokenizer.split(',');
std::vector<std::string> tokens = tokenizer.split(',');
/* Parse each token */
std::map<std::string, int> token2index = { {"sb", 3}, {"cbx", 1}, {"cby", 2} };
for (std::string token : tokens) {
@ -88,7 +89,8 @@ void RRGSBWriterOption::set_exclude_content(const std::string& content) {
keyword_list += pair.first + "|";
}
keyword_list.pop_back();
VTR_LOG_ERROR("Invalid content '" + token + "' to skip, expect [ " + keyword_list + " ]");
std::string err_msg = std::string("Invalid content '") + token + std::string("' to skip, expect [ ") + keyword_list + std::string(" ]");
VTR_LOG_ERROR(err_msg.c_str());
num_parse_errors_++;
continue;
}
@ -97,10 +99,10 @@ void RRGSBWriterOption::set_exclude_content(const std::string& content) {
}
}
void RRGSBWriterOption::set_include_gsb_names(const std::string& gsb_names) {
void RRGSBWriterOption::set_include_gsb_names(const std::string& content) {
/* Split the content using a tokenizer */
StringToken tokenizer(content);
gsb_names_ = tokenizer.split(',');
include_gsb_names_ = tokenizer.split(',');
}
void RRGSBWriterOption::set_verbose_output(const bool& enabled) {

4
openfpga/src/annotation/rr_gsb_writer_option.h
View File

@ -5,6 +5,8 @@
* Include header files required by the data structure definition
*******************************************************************/
#include <string>
#include <vector>
#include "rr_graph_types.h"
/* Begin namespace openfpga */
namespace openfpga {
@ -53,7 +55,7 @@ class RRGSBWriterOption {
*/
std::array<bool, 4> exclude_content_;
std::vector<std::string> gsb_names_;
std::vector<std::string> include_gsb_names_;
bool verbose_output_;
/* A flag to indicate if the data parse is invalid or not */

25
openfpga/src/annotation/write_xml_device_rr_gsb.cpp
View File

@ -173,10 +173,10 @@ void write_rr_gsb_chan_connection_to_xml(std::fstream& fp,
<< "\" side=\"" << driver_side.to_string()
<< "\" index=\"" << driver_node_index;
if (include_rr_info) {
fp << "\" node_id=\"" << size_t(driver_rr_node);
fp << "\" node_id=\"" << size_t(driver_rr_node)
<< "\" segment_id=\"" << size_t(des_segment_id)
<< "\" segment_name=\"" << rr_graph.get_segment(des_segment_id).name
<< "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(rr_graph.node_type(driver_rr_node), driver_side.get_side(), IN_PORT)
<< "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(rr_graph.node_type(driver_rr_node), driver_side.get_side(), IN_PORT);
}
fp << "\"/>"
<< std::endl;
@ -213,7 +213,7 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
return;
}
VTR_LOGV(verbose,
VTR_LOGV(options.verbose_output(),
"Output internal structure of Switch Block to '%s'\n",
fname.c_str());
@ -250,8 +250,6 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
***************************************************************************************/
static
void write_rr_connection_block_to_xml(const std::string fname_prefix,
const DeviceGrid& vpr_device_grid,
const VprDeviceAnnotation& vpr_device_annotation,
const RRGraph& rr_graph,
const RRGSB& rr_gsb,
const t_rr_type& cb_type,
@ -269,7 +267,7 @@ void write_rr_connection_block_to_xml(const std::string fname_prefix,
return;
}
VTR_LOGV(verbose,
VTR_LOGV(options.verbose_output(),
"Output internal structure of Connection Block to '%s'\n",
fname.c_str());
@ -286,12 +284,9 @@ void write_rr_connection_block_to_xml(const std::string fname_prefix,
<< " num_sides=\"" << rr_gsb.get_num_sides() << "\">" << std::endl;
/* Output each side */
for (size_t side = 0; side < rr_gsb.get_cb_ipin_sides(cb_type); ++side) {
SideManager gsb_side_manager(side);
enum e_side gsb_side = gsb_side_manager.get_side();
for (e_side side : rr_gsb.get_cb_ipin_sides(cb_type)) {
/* IPIN nodes and related connections */
write_rr_gsb_ipin_connection_to_xml(fp, rr_graph, rr_gsb, gsb_side, options.include_rr_info());
write_rr_gsb_ipin_connection_to_xml(fp, rr_graph, rr_gsb, side, options.include_rr_info());
}
fp << "</rr_cb>"
@ -310,7 +305,7 @@ void write_device_rr_gsb_to_xml(const DeviceGrid& vpr_device_grid,
const RRGraph& rr_graph,
const DeviceRRGSB& device_rr_gsb,
const RRGSBWriterOption& options) {
std::string xml_dir_name = format_dir_path(options.output_directory);
std::string xml_dir_name = format_dir_path(options.output_directory());
/* Create directories */
create_directory(xml_dir_name);
@ -318,7 +313,7 @@ void write_device_rr_gsb_to_xml(const DeviceGrid& vpr_device_grid,
vtr::Point<size_t> sb_range = device_rr_gsb.get_gsb_range();
size_t sb_counter = 0;
std::map<t_rr_type, size_t> cb_counters = 0;
std::map<t_rr_type, size_t> cb_counters = { {CHANX, 0}, {CHANY, 0} };
std::map<t_rr_type, std::string> cb_names = { {CHANX, "X-direction"}, {CHANY, "Y-direction"} };
std::vector<std::string> include_gsb_names = options.include_gsb_names();
@ -339,7 +334,7 @@ void write_device_rr_gsb_to_xml(const DeviceGrid& vpr_device_grid,
const RRGSB& rr_gsb = device_rr_gsb.get_sb_unique_module(igsb);
for (t_rr_type cb_type : {CHANX, CHANY}) {
if (options.include_cb_content(cb_type)) {
write_rr_connection_block_to_xml(xml_dir_name, vpr_device_grid, vpr_device_annotation, rr_graph, rr_gsb, cb_type, options);
write_rr_connection_block_to_xml(xml_dir_name, rr_graph, rr_gsb, cb_type, options);
cb_counters[cb_type]++;
}
}
@ -356,7 +351,7 @@ void write_device_rr_gsb_to_xml(const DeviceGrid& vpr_device_grid,
}
for (t_rr_type cb_type : {CHANX, CHANY}) {
if (options.include_cb_content(cb_type)) {
write_rr_connection_block_to_xml(xml_dir_name, vpr_device_grid, vpr_device_annotation, rr_graph, rr_gsb, cb_type, options);
write_rr_connection_block_to_xml(xml_dir_name, rr_graph, rr_gsb, cb_type, options);
cb_counters[cb_type]++;
}
}

7
openfpga/src/base/openfpga_write_gsb.cpp
View File

@ -45,9 +45,14 @@ int write_gsb(const OpenfpgaContext& openfpga_ctx,
options.set_unique_module_only(cmd_context.option_enable(cmd, opt_unique));
options.set_exclude_rr_info(cmd_context.option_enable(cmd, opt_exclude_rr_info));
options.set_exclude_content(cmd_context.option_value(cmd, opt_exclude));
options.set_include_gsb_list(cmd_context.option_value(cmd, opt_gsb_names));
options.set_include_gsb_names(cmd_context.option_value(cmd, opt_gsb_names));
options.set_verbose_output(cmd_context.option_enable(cmd, opt_verbose));
if (!options.valid()) {
VTR_LOG("Detected errors when parsing options!\n");
return CMD_EXEC_FATAL_ERROR;
}
write_device_rr_gsb_to_xml(g_vpr_ctx.device().grid,
openfpga_ctx.vpr_device_annotation(),
g_vpr_ctx.device().rr_graph,