[engine] complete the code required to output rr_gsb with options
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tangxifan
parent
12a30196e0
commit
2321ea6274
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@ -26,7 +26,8 @@ static
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void write_rr_gsb_ipin_connection_to_xml(std::fstream& fp,
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const RRGraph& rr_graph,
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const RRGSB& rr_gsb,
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const enum e_side& gsb_side) {
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const enum e_side& gsb_side,
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const bool& include_rr_info) {
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/* Validate the file stream */
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valid_file_stream(fp);
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@ -37,9 +38,11 @@ void write_rr_gsb_ipin_connection_to_xml(std::fstream& fp,
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/* General information of this IPIN */
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fp << "\t<" << rr_node_typename[rr_graph.node_type(cur_rr_node)]
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<< " side=\"" << gsb_side_manager.to_string()
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<< "\" index=\"" << inode
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<< "\" node_id=\"" << size_t(cur_rr_node)
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<< "\" mux_size=\"" << get_rr_graph_configurable_driver_nodes(rr_graph, cur_rr_node).size()
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<< "\" index=\"" << inode;
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if (include_rr_info) {
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fp << "\" node_id=\"" << size_t(cur_rr_node);
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}
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fp << "\" mux_size=\"" << get_rr_graph_configurable_driver_nodes(rr_graph, cur_rr_node).size()
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<< "\">"
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<< std::endl;
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/* General information of each driving nodes */
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@ -63,9 +66,11 @@ void write_rr_gsb_ipin_connection_to_xml(std::fstream& fp,
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const RRSegmentId& des_segment_id = rr_gsb.get_chan_node_segment(chan_side, driver_node_index);
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fp << "\t\t<driver_node type=\"" << rr_node_typename[rr_graph.node_type(driver_node)]
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<< "\" side=\"" << chan_side_manager.to_string()
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<< "\" node_id=\"" << size_t(driver_node)
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<< "\" index=\"" << driver_node_index
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<< "\" side=\"" << chan_side_manager.to_string();
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if (include_rr_info) {
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fp << "\" node_id=\"" << size_t(driver_node);
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}
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fp << "\" index=\"" << driver_node_index
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<< "\" segment_id=\"" << size_t(des_segment_id)
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<< "\"/>"
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<< std::endl;
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@ -85,7 +90,8 @@ void write_rr_gsb_chan_connection_to_xml(std::fstream& fp,
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const VprDeviceAnnotation& vpr_device_annotation,
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const RRGraph& rr_graph,
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const RRGSB& rr_gsb,
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const enum e_side& gsb_side) {
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const enum e_side& gsb_side,
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const bool& include_rr_info) {
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/* Validate the file stream */
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valid_file_stream(fp);
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@ -113,13 +119,17 @@ void write_rr_gsb_chan_connection_to_xml(std::fstream& fp,
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fp << "\t<" << rr_node_typename[cur_node_type]
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<< " side=\"" << gsb_side_manager.to_string()
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<< "\" index=\"" << inode
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<< "\" node_id=\"" << size_t(cur_rr_node)
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<< "\" segment_id=\"" << size_t(src_segment_id)
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<< "\" segment_name=\"" << rr_graph.get_segment(src_segment_id).name
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<< "\" mux_size=\"" << driver_rr_edges.size()
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<< "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(cur_node_type, gsb_side, OUT_PORT)
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<< "\">"
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<< "\" index=\"" << inode;
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if (include_rr_info) {
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fp << "\" node_id=\"" << size_t(cur_rr_node)
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<< "\" segment_id=\"" << size_t(src_segment_id)
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<< "\" segment_name=\"" << rr_graph.get_segment(src_segment_id).name;
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}
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fp << "\" mux_size=\"" << driver_rr_edges.size();
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if (include_rr_info) {
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fp << "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(cur_node_type, gsb_side, OUT_PORT);
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}
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fp << "\">"
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<< std::endl;
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/* Direct connection: output the node on the opposite side */
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@ -127,12 +137,14 @@ void write_rr_gsb_chan_connection_to_xml(std::fstream& fp,
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SideManager oppo_side = gsb_side_manager.get_opposite();
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fp << "\t\t<driver_node type=\"" << rr_node_typename[cur_node_type]
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<< "\" side=\"" << oppo_side.to_string()
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<< "\" index=\"" << rr_gsb.get_node_index(rr_graph, cur_rr_node, oppo_side.get_side(), IN_PORT)
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<< "\" node_id=\"" << size_t(cur_rr_node)
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<< "\" segment_id=\"" << size_t(src_segment_id)
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<< "\" segment_name=\"" << rr_graph.get_segment(src_segment_id).name
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<< "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(cur_node_type, oppo_side.get_side(), IN_PORT)
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<< "\"/>"
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<< "\" index=\"" << rr_gsb.get_node_index(rr_graph, cur_rr_node, oppo_side.get_side(), IN_PORT);
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if (include_rr_info) {
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fp << "\" node_id=\"" << size_t(cur_rr_node)
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<< "\" segment_id=\"" << size_t(src_segment_id)
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<< "\" segment_name=\"" << rr_graph.get_segment(src_segment_id).name
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<< "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(cur_node_type, oppo_side.get_side(), IN_PORT);
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}
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fp << "\"/>"
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<< std::endl;
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} else {
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for (const RREdgeId& driver_rr_edge : driver_rr_edges) {
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@ -147,22 +159,26 @@ void write_rr_gsb_chan_connection_to_xml(std::fstream& fp,
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SideManager grid_side(rr_graph.node_side(driver_rr_node));
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fp << "\t\t<driver_node type=\"" << rr_node_typename[OPIN]
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<< "\" side=\"" << driver_side.to_string()
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<< "\" index=\"" << driver_node_index
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<< "\" node_id=\"" << size_t(driver_rr_node)
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<< "\" grid_side=\"" << grid_side.to_string()
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<< "\" sb_module_pin_name=\"" << generate_sb_module_grid_port_name(gsb_side, driver_node_side, vpr_device_grid, vpr_device_annotation, rr_graph, driver_rr_node)
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<<"\"/>"
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<< "\" index=\"" << driver_node_index;
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if (include_rr_info) {
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fp << "\" node_id=\"" << size_t(driver_rr_node)
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<< "\" grid_side=\"" << grid_side.to_string()
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<< "\" sb_module_pin_name=\"" << generate_sb_module_grid_port_name(gsb_side, driver_node_side, vpr_device_grid, vpr_device_annotation, rr_graph, driver_rr_node);
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}
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fp <<"\"/>"
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<< std::endl;
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} else {
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const RRSegmentId& des_segment_id = rr_gsb.get_chan_node_segment(driver_node_side, driver_node_index);
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fp << "\t\t<driver_node type=\"" << rr_node_typename[rr_graph.node_type(driver_rr_node)]
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<< "\" side=\"" << driver_side.to_string()
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<< "\" index=\"" << driver_node_index
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<< "\" node_id=\"" << size_t(driver_rr_node)
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<< "\" segment_id=\"" << size_t(des_segment_id)
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<< "\" segment_name=\"" << rr_graph.get_segment(des_segment_id).name
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<< "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(rr_graph.node_type(driver_rr_node), driver_side.get_side(), IN_PORT)
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<< "\"/>"
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<< "\" index=\"" << driver_node_index;
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if (include_rr_info) {
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fp << "\" node_id=\"" << size_t(driver_rr_node);
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<< "\" segment_id=\"" << size_t(des_segment_id)
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<< "\" segment_name=\"" << rr_graph.get_segment(des_segment_id).name
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<< "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(rr_graph.node_type(driver_rr_node), driver_side.get_side(), IN_PORT)
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}
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fp << "\"/>"
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<< std::endl;
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}
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}
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@ -184,16 +200,19 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
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const RRGSB& rr_gsb,
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const RRGSBWriterOption& options) {
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/* If there is a list of gsb list, we skip those which are not in the list */
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if (!include_gsb_names.empty() && include_gsb_names.end() != std::find(include_gsb_names.begin(), include_gsb_names.end(), curr_gsb_name()
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write_rr_switch_block_to_xml(xml_dir_name, vpr_device_grid, vpr_device_annotation, rr_graph, rr_gsb, options);
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/* Prepare file name */
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std::string fname(fname_prefix);
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vtr::Point<size_t> gsb_coordinate(rr_gsb.get_sb_x(), rr_gsb.get_sb_y());
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fname += generate_switch_block_module_name(gsb_coordinate);
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vtr::Point<size_t> sb_coordinate(rr_gsb.get_sb_x(), rr_gsb.get_sb_y());
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std::string curr_sb_name = generate_switch_block_module_name(sb_coordinate);
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fname += curr_sb_name;
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fname += ".xml";
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/* If there is a list of gsb list, we skip those which are not in the list */
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std::vector<std::string> include_gsb_names = options.include_gsb_names();
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if (!include_gsb_names.empty() && include_gsb_names.end() == std::find(include_gsb_names.begin(), include_gsb_names.end(), curr_sb_name)) {
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return;
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}
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VTR_LOGV(verbose,
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"Output internal structure of Switch Block to '%s'\n",
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fname.c_str());
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@ -207,7 +226,7 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
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check_file_stream(fname.c_str(), fp);
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/* Output location of the Switch Block */
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fp << "<rr_gsb x=\"" << rr_gsb.get_x() << "\" y=\"" << rr_gsb.get_y() << "\""
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fp << "<rr_sb x=\"" << rr_gsb.get_x() << "\" y=\"" << rr_gsb.get_y() << "\""
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<< " num_sides=\"" << rr_gsb.get_num_sides() << "\">" << std::endl;
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/* Output each side */
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@ -215,14 +234,11 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
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SideManager gsb_side_manager(side);
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enum e_side gsb_side = gsb_side_manager.get_side();
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/* IPIN nodes and related connections */
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write_rr_gsb_ipin_connection_to_xml(fp, rr_graph, rr_gsb, gsb_side);
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/* routing-track and related connections */
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write_rr_gsb_chan_connection_to_xml(fp, vpr_device_grid, vpr_device_annotation, rr_graph, rr_gsb, gsb_side);
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write_rr_gsb_chan_connection_to_xml(fp, vpr_device_grid, vpr_device_annotation, rr_graph, rr_gsb, gsb_side, options.include_rr_info());
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}
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fp << "</rr_gsb>"
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fp << "</rr_sb>"
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<< std::endl;
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/* close a file */
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@ -240,17 +256,19 @@ void write_rr_connection_block_to_xml(const std::string fname_prefix,
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const RRGSB& rr_gsb,
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const t_rr_type& cb_type,
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const RRGSBWriterOption& options) {
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/* If there is a list of gsb list, we skip those which are not in the list */
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if (!include_gsb_names.empty() && include_gsb_names.end() != std::find(include_gsb_names.begin(), include_gsb_names.end(), curr_gsb_name()
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write_rr_switch_block_to_xml(xml_dir_name, vpr_device_grid, vpr_device_annotation, rr_graph, rr_gsb, options);
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/* Prepare file name */
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std::string fname(fname_prefix);
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vtr::Point<size_t> cb_coordinate(rr_gsb.get_cb_x(cb_type), rr_gsb.get_cb_y(cb_type));
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fname += generate_connection_block_module_name(cb_type, cb_coordinate);
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std::string curr_cb_name = generate_connection_block_module_name(cb_type, cb_coordinate);
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fname += curr_cb_name;
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fname += ".xml";
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/* If there is a list of gsb list, we skip those which are not in the list */
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std::vector<std::string> include_gsb_names = options.include_gsb_names();
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if (!include_gsb_names.empty() && include_gsb_names.end() == std::find(include_gsb_names.begin(), include_gsb_names.end(), curr_cb_name)) {
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return;
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}
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VTR_LOGV(verbose,
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"Output internal structure of Connection Block to '%s'\n",
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fname.c_str());
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@ -273,7 +291,7 @@ void write_rr_connection_block_to_xml(const std::string fname_prefix,
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enum e_side gsb_side = gsb_side_manager.get_side();
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/* IPIN nodes and related connections */
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write_rr_gsb_ipin_connection_to_xml(fp, rr_graph, rr_gsb, gsb_side);
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write_rr_gsb_ipin_connection_to_xml(fp, rr_graph, rr_gsb, gsb_side, options.include_rr_info());
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}
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fp << "</rr_cb>"
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@ -283,7 +301,6 @@ void write_rr_connection_block_to_xml(const std::string fname_prefix,
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fp.close();
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}
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/***************************************************************************************
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* Output internal structure (only the switch block part) of all the RRGSBs
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* in a DeviceRRGSB to XML format
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