Commit Graph

46 Commits

Author SHA1 Message Date
tangxifan 323c4fdc9a clean up documentation build warnings and add guidelines for port naming 2019-12-04 11:59:10 -07:00
AurelienUoU 36f7624b95 Point to point truth table typo fix 2019-10-01 13:07:27 -06:00
AurelienUoU e2867019e1 Typo fixing 2019-09-30 10:38:02 -06:00
AurelienUoU 74f7a3cfb2 Doc fixing 2019-09-30 10:29:42 -06:00
AurelienUoU 5ac79f4805 Point to point documentation 2019-09-30 10:00:46 -06:00
tangxifan 42b528be57 doc updates 2019-08-21 15:11:25 -06:00
tangxifan 9c43b1b753 complete refacotriing the inv and buf part in submodules 2019-08-21 14:54:05 -06:00
tangxifan b207050b03 minor fix in documentation 2019-08-06 14:17:57 -06:00
tangxifan fc93a4941a update documentation 2019-08-06 14:17:56 -06:00
tangxifan 7603850d72 complete documentation for new features 2019-08-06 14:17:56 -06:00
tangxifan 8a046394f8 add documentation for multi-mode configurable block support 2019-07-30 16:47:41 -06:00
Xifan Tang e7b40f06b0 Add documentation for fracturable LUTs 2019-07-17 15:21:07 -04:00
BaudouinChauviere f4b72bd4e1
Update link_circuit_modules.rst 2019-04-01 16:21:59 -06:00
BaudouinChauviere ce300c196c
Update circuit_modules.rst 2019-04-01 16:13:23 -06:00
BaudouinChauviere 6e065ef3b3
Update tech_lib.rst 2019-04-01 16:09:31 -06:00
BaudouinChauviere aed779ca3d
Update spice_sim_setting.rst 2019-04-01 16:08:00 -06:00
BaudouinChauviere 4900caaed9
Update generality.rst 2019-04-01 16:04:17 -06:00
BaudouinChauviere 10cbd2efef
Update index.rst
Commenting the multi mode out until more mature
2018-12-03 11:50:13 -07:00
BaudouinChauviere 8e7def7f88
Update link_circuit_modules.rst
Correction of typos
2018-12-03 11:39:44 -07:00
BaudouinChauviere a4d29aeb1b
Update circuit_model_examples.rst
Typo correction
2018-12-03 11:26:04 -07:00
BaudouinChauviere e39e0219e9
Update circuit_modules.rst
Move the examples from this part to their own
2018-12-03 10:59:20 -07:00
BaudouinChauviere 7a49ca8ce2
Update index.rst
New section in the doc
2018-12-03 10:58:50 -07:00
BaudouinChauviere 99769c1510
Create circuit_model_examples.rst
Better architecture of the doc
2018-12-03 10:58:11 -07:00
Aurelien Alacchi 4a950c6857 Flatten_hierarchy_doc 2018-10-18 16:28:12 -06:00
Aurelien Alacchi e0c2fc2c8a Documentation_code&example_update 2018-10-12 15:50:09 -06:00
Aurelien Alacchi 07380ed1fa Minor_bug_fig_name_correction 2018-10-09 15:33:30 -06:00
Aurelien Alacchi a43574e593 Update_doc_circuit_level_fig_fixed 2018-10-09 15:29:15 -06:00
Aurelien Alacchi d1c01cd68b Update_bug_fig_doc_CL 2018-10-08 17:54:44 -06:00
Aurelien Alacchi 7c51129a33 test42docFig 2018-10-08 16:20:34 -06:00
Aurelien Alacchi 8723722e99 test_correction_bug_fig_doc_CL 2018-10-08 16:18:56 -06:00
Aurelien Alacchi ebd4b282f5 test_correction_figure 2018-10-08 16:00:21 -06:00
Aurelien Alacchi a318f8e20e Update_doc_circuit_level_bug_image 2018-10-08 15:48:54 -06:00
Aurelien Alacchi f79913f379 Update_doc_circuit_level_bug_image 2018-10-08 15:42:19 -06:00
Aurelien Alacchi 44bdca0429 Revert "figure_correction_doc_circuit_level"
This reverts commit 046829bd13.
2018-10-08 15:30:47 -06:00
Aurelien Alacchi 054a2bb186 Revert "bug_correction_fig_circuit_level"
This reverts commit c6cd63462c.
2018-10-08 15:30:36 -06:00
Aurelien Alacchi c6cd63462c bug_correction_fig_circuit_level 2018-10-08 15:30:03 -06:00
Aurelien Alacchi 046829bd13 figure_correction_doc_circuit_level 2018-10-08 15:27:30 -06:00
Aurelien Alacchi cf1dddff5f Merge branch 'master' of https://github.com/LNIS-Projects/OpenFPGA 2018-10-08 15:19:48 -06:00
Aurelien Alacchi cf804b8fb2 Define Circuit Level update 2018-10-08 15:15:44 -06:00
LNIS-Projects 05f70548f3
Add files via upload 2018-10-08 15:02:16 -06:00
Baudouin Chauviere 16c0c4656e Adds titles and WiP tags for new parts. Tutorials included
Added title and WiP tags for comprehension and also to see what is missing and what is going to happen in the near future in the documentation
2018-09-25 14:53:04 -06:00
Baudouin Chauviere 70d303dfb5 Define Circuit doc improvement
Added some content, better spacing for understanding and made some changes in the options we show
2018-09-25 11:53:53 -06:00
tangxifan 5d697da4e7 refine doc hierarchy 2018-09-14 13:27:05 -06:00
唐希凡 0bfbc9b0aa update docs 2018-09-14 13:11:51 -06:00
Xifan Tang fec0daa2a8 Update a draft 2018-09-13 22:58:54 -06:00
Xifan Tang d6d6951496 Adding documentation 2018-09-13 15:38:41 -06:00