tangxifan
|
f139a844ca
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route util adopt RRGraph object
|
2020-02-01 18:01:05 -07:00 |
|
tangxifan
|
400bd76bdc
|
route_tree_timing adopt RRGraph object
|
2020-02-01 17:56:14 -07:00 |
|
tangxifan
|
5139b5d194
|
adapt route_timing to use RRGraph object
|
2020-02-01 17:16:31 -07:00 |
|
tangxifan
|
26523f1b63
|
route_common functions now adopt RRGraph object
|
2020-02-01 16:12:54 -07:00 |
|
tangxifan
|
266b4b6fbe
|
Breadth first router adopt RRGraph object
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2020-02-01 14:45:59 -07:00 |
|
tangxifan
|
3536cc8ed5
|
check rr graph adopt RRGraph object
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2020-02-01 14:17:02 -07:00 |
|
tangxifan
|
bc7988bb9e
|
check_route adopt RRGraph object
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2020-02-01 13:19:47 -07:00 |
|
tangxifan
|
a2f231452a
|
power estimation adapted to use RRGraph object
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2020-02-01 12:26:42 -07:00 |
|
tangxifan
|
653d7d5aa1
|
placer compilation errors elimated for RRGraph deployment
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2020-02-01 11:49:39 -07:00 |
|
tangxifan
|
cb98456d7e
|
finish adaption for stats.cpp
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2020-02-01 10:12:11 -07:00 |
|
tangxifan
|
f3d9067f9b
|
halfway in refactoring the drawer with RRGraph
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2020-01-31 23:25:35 -07:00 |
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tangxifan
|
9d9a2c1402
|
deploying RRGraph to placer
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2020-01-31 21:14:20 -07:00 |
|
tangxifan
|
35c136d8a4
|
start deploy RRGraph in the placement engine
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2020-01-31 19:55:32 -07:00 |
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tangxifan
|
f136dd8820
|
Merge branch 'refactoring' into dev
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2020-01-31 17:29:17 -07:00 |
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tangxifan
|
5e2559dc14
|
now RRGraph is proven to be correct as rr_node in terms of XML output
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2020-01-31 17:27:18 -07:00 |
|
tangxifan
|
5006a4395d
|
bring RRGraph object and writer online
|
2020-01-31 16:39:40 -07:00 |
|
tangxifan
|
9269d7106d
|
move rr_graph back to vpr because the reader and writer requires too much dependency on the core engine
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2020-01-31 15:42:44 -07:00 |
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tangxifan
|
fb0bcd7a48
|
create rr_graph library to enforce unit test on the new data structures as well as compare to legacy rr_node
|
2020-01-31 12:29:50 -07:00 |
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tangxifan
|
7b5ee5c2f6
|
Merge branch 'refactoring' into dev
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2020-01-31 11:37:41 -07:00 |
|
tangxifan
|
75c3507acf
|
add verbose output option for openfpga linking architecture
|
2020-01-31 11:36:58 -07:00 |
|
tangxifan
|
392ab0f027
|
move duplicated codes on message printing to functions
|
2020-01-31 10:53:41 -07:00 |
|
tangxifan
|
afde9808da
|
add check codes for physical pb_graph_node and pb_graph_pin annotation
|
2020-01-31 10:47:05 -07:00 |
|
tangxifan
|
847b2edb41
|
Merge branch 'refactoring' into dev
|
2020-01-30 22:01:32 -07:00 |
|
tangxifan
|
fdc304a0fb
|
fixed a bug in mapping pb_graph pins using rotation offset
|
2020-01-30 22:00:53 -07:00 |
|
tangxifan
|
671b21cbde
|
Merge branch 'refactoring' into dev
|
2020-01-30 21:40:23 -07:00 |
|
tangxifan
|
02d6256e95
|
pass simple test on pb_type annotation for frac_lut5 architecture
|
2020-01-30 21:39:44 -07:00 |
|
tangxifan
|
b63ba31dcb
|
Merge branch 'refactoring' into dev
|
2020-01-30 19:41:26 -07:00 |
|
tangxifan
|
007e1997e6
|
add pb_graph pin annotation
|
2020-01-30 19:40:40 -07:00 |
|
tangxifan
|
d62c9fe86f
|
adding pb_graph_node annotation
|
2020-01-30 16:40:13 -07:00 |
|
tangxifan
|
e48ab8cb44
|
move annotation source files to a separated folder
|
2020-01-30 13:37:41 -07:00 |
|
tangxifan
|
568ed120c2
|
change report naming fix-up to be XML format
|
2020-01-29 21:53:56 -07:00 |
|
tangxifan
|
60d56cbdf1
|
Merge branch 'refactoring' into dev
|
2020-01-29 18:59:27 -07:00 |
|
tangxifan
|
f28ca3ffd0
|
add more echo to log
|
2020-01-29 18:58:57 -07:00 |
|
tangxifan
|
87f1ca1151
|
add naming fix-up report generation
|
2020-01-29 18:56:47 -07:00 |
|
tangxifan
|
2dc4c26257
|
add naming fix-up
|
2020-01-29 17:49:33 -07:00 |
|
tangxifan
|
8c86c0af04
|
add check netlist naming conflict command and functions
|
2020-01-29 16:23:41 -07:00 |
|
tangxifan
|
741d6d03bf
|
Merge branch 'refactoring' into dev
|
2020-01-29 14:30:50 -07:00 |
|
tangxifan
|
d2c47693f6
|
add check codes for mode bits annotation to pb_types and clean up utils source files
|
2020-01-29 14:29:00 -07:00 |
|
tangxifan
|
a4381563bc
|
move check codes to separated source files
|
2020-01-29 13:47:59 -07:00 |
|
tangxifan
|
b67358d2c5
|
add check codes for physical pb_type circuit model annotation
|
2020-01-29 12:56:49 -07:00 |
|
tangxifan
|
a722438fa3
|
add mode bits binding to pb_type annotation
|
2020-01-29 12:27:55 -07:00 |
|
tangxifan
|
24b180b298
|
change the mode bit storage in annotation data structure from string to vector of integers
|
2020-01-29 11:59:20 -07:00 |
|
tangxifan
|
61b487eb75
|
show more information in the log file
|
2020-01-29 11:29:41 -07:00 |
|
tangxifan
|
399ba8d648
|
add pb type port mapping to circuit model ports
|
2020-01-29 11:24:14 -07:00 |
|
tangxifan
|
cf3c5b5c42
|
add circuit model type checking for physical pb_type annotation
|
2020-01-29 10:41:02 -07:00 |
|
tangxifan
|
bfaa2442a2
|
Merge branch 'refactoring' into dev
|
2020-01-28 21:59:57 -07:00 |
|
tangxifan
|
8a7a4dc48e
|
add physical type annotation for interconnects and inference
|
2020-01-28 21:59:10 -07:00 |
|
tangxifan
|
bb7fa2af77
|
add pb interconnect binding to circuit model
|
2020-01-28 17:04:10 -07:00 |
|
tangxifan
|
1651c9ca18
|
add binding between physical pb_type and circuit models
|
2020-01-28 16:03:02 -07:00 |
|
tangxifan
|
a4a84ca35b
|
add check codes for physical pb_type and port annotation
|
2020-01-28 15:27:00 -07:00 |