start deploy RRGraph in the placement engine
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5e2559dc14
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@ -40,8 +40,9 @@
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#include "vtr_flat_map.h"
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#include "vtr_cache.h"
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/* Header for rr_graph related definition */
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/* Xifan Tang - Header for rr_graph related definition */
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#include "rr_graph_types.h"
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#include "rr_graph_obj.h"
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/*******************************************************************************
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* Global data types and constants
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@ -1137,6 +1138,10 @@ struct t_trace {
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t_trace* next;
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int index;
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short iswitch;
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/* Xifan Tang - RRGraph unique ids */
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RRNodeId node_id;
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RRSwitchId switch_id;
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};
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/* Extra information about each rr_node needed only during routing (i.e. *
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@ -1160,6 +1165,9 @@ struct t_trace {
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* occ: The current occupancy of the associated rr node */
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struct t_rr_node_route_inf {
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int prev_node;
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/* Xifan Tang - prev_node for RRGraph object */
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RRNodeId prev_node_id;
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t_edge_size prev_edge;
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float pres_cost;
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@ -880,10 +880,10 @@ void init_draw_coords(float width_val) {
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return; //do not initialize only if --disp off and --save_graphics off
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/* Each time routing is on screen, need to reallocate the color of each *
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* rr_node, as the number of rr_nodes may change. */
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if (device_ctx.rr_nodes.size() != 0) {
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if (device_ctx.rr_graph.nodes().size() != 0) {
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draw_state->draw_rr_node = (t_draw_rr_node*)vtr::realloc(draw_state->draw_rr_node,
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(device_ctx.rr_nodes.size()) * sizeof(t_draw_rr_node));
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for (size_t i = 0; i < device_ctx.rr_nodes.size(); i++) {
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(device_ctx.rr_graph.nodes().size()) * sizeof(t_draw_rr_node));
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for (size_t i = 0; i < device_ctx.rr_graph.nodes().size(); i++) {
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draw_state->draw_rr_node[i].color = DEFAULT_RR_NODE_COLOR;
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draw_state->draw_rr_node[i].node_highlighted = false;
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}
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@ -304,16 +304,16 @@ static float route_connection_delay(
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for (int driver_ptc : best_driver_ptcs) {
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VTR_ASSERT(driver_ptc != OPEN);
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int source_rr_node = get_rr_node_index(device_ctx.rr_node_indices, source_x, source_y, SOURCE, driver_ptc);
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RRNodeId source_rr_node = device_ctx.rr_graph.find_node(source_x, source_y, SOURCE, driver_ptc);
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VTR_ASSERT(source_rr_node != OPEN);
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VTR_ASSERT(source_rr_node != RRNodeId::INVALID());
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for (int sink_ptc : best_sink_ptcs) {
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VTR_ASSERT(sink_ptc != OPEN);
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int sink_rr_node = get_rr_node_index(device_ctx.rr_node_indices, sink_x, sink_y, SINK, sink_ptc);
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RRNodeId sink_rr_node = device_ctx.rr_graph.find_node(sink_x, sink_y, SINK, sink_ptc);
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VTR_ASSERT(sink_rr_node != OPEN);
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VTR_ASSERT(sink_rr_node != RRNodeId::INVALID());
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if (!measure_directconnect && directconnect_exists(source_rr_node, sink_rr_node)) {
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//Skip if we shouldn't measure direct connects and a direct connect exists
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@ -322,7 +322,7 @@ static float route_connection_delay(
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{
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successfully_routed = route_profiler.calculate_delay(
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source_rr_node, sink_rr_node,
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size_t(source_rr_node), size_t(sink_rr_node),
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router_opts,
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&net_delay_value);
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}
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@ -933,29 +933,29 @@ void OverrideDelayModel::compute_override_delay_model(
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}
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}
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bool directconnect_exists(int src_rr_node, int sink_rr_node) {
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bool directconnect_exists(RRNodeId src_rr_node, RRNodeId sink_rr_node) {
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//Returns true if there is a directconnect between the two RR nodes
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//
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//This is checked by looking for a SOURCE -> OPIN -> IPIN -> SINK path
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//which starts at src_rr_node and ends at sink_rr_node
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auto& device_ctx = g_vpr_ctx.device();
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auto& rr_nodes = device_ctx.rr_nodes;
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auto& rr_graph = device_ctx.rr_graph;
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VTR_ASSERT(rr_nodes[src_rr_node].type() == SOURCE && rr_nodes[sink_rr_node].type() == SINK);
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VTR_ASSERT(rr_graph.node_type(src_rr_node) == SOURCE && rr_graph.node_type(sink_rr_node) == SINK);
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//TODO: This is a constant depth search, but still may be too slow
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for (t_edge_size i_src_edge = 0; i_src_edge < rr_nodes[src_rr_node].num_edges(); ++i_src_edge) {
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int opin_rr_node = rr_nodes[src_rr_node].edge_sink_node(i_src_edge);
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for (const RREdgeId& src_edge : rr_graph.node_out_edges(src_rr_node)) {
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RRNodeId opin_rr_node = rr_graph.edge_sink_node(src_edge);
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if (rr_nodes[opin_rr_node].type() != OPIN) continue;
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if (rr_graph.node_type(opin_rr_node) != OPIN) continue;
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for (t_edge_size i_opin_edge = 0; i_opin_edge < rr_nodes[opin_rr_node].num_edges(); ++i_opin_edge) {
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int ipin_rr_node = rr_nodes[opin_rr_node].edge_sink_node(i_opin_edge);
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for (const RREdgeId& opin_edge : rr_graph.node_out_edges(opin_rr_node)) {
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RRNodeId ipin_rr_node = rr_graph.edge_sink_node(opin_edge);
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if (rr_nodes[ipin_rr_node].type() != IPIN) continue;
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if (rr_graph.node_type(ipin_rr_node) != IPIN) continue;
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for (t_edge_size i_ipin_edge = 0; i_ipin_edge < rr_nodes[ipin_rr_node].num_edges(); ++i_ipin_edge) {
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if (sink_rr_node == rr_nodes[ipin_rr_node].edge_sink_node(i_ipin_edge)) {
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for (const RREdgeId& ipin_edge : rr_graph.node_out_edges(ipin_rr_node)) {
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if (sink_rr_node == rr_graph.edge_sink_node(ipin_edge)) {
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return true;
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}
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}
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@ -1,6 +1,7 @@
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#ifndef TIMING_PLACE_LOOKUP_H
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#define TIMING_PLACE_LOOKUP_H
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#include "place_delay_model.h"
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#include "rr_graph_obj.h"
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std::unique_ptr<PlaceDelayModel> compute_place_delay_model(const t_placer_opts& placer_opts,
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const t_router_opts& router_opts,
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@ -11,6 +12,6 @@ std::unique_ptr<PlaceDelayModel> compute_place_delay_model(const t_placer_opts&
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const int num_directs);
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std::vector<int> get_best_classes(enum e_pin_type pintype, t_physical_tile_type_ptr type);
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bool directconnect_exists(int src_rr_node, int sink_rr_node);
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bool directconnect_exists(RRNodeId src_rr_node, RRNodeId sink_rr_node);
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#endif
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@ -336,7 +336,7 @@ bool feasible_routing() {
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auto& device_ctx = g_vpr_ctx.device();
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auto& route_ctx = g_vpr_ctx.routing();
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for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
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for (size_t inode = 0; inode < device_ctx.rr_graph.nodes().size(); inode++) {
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if (route_ctx.rr_node_route_inf[inode].occ() > device_ctx.rr_nodes[inode].capacity()) {
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return (false);
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}
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@ -351,7 +351,7 @@ std::vector<int> collect_congested_rr_nodes() {
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auto& route_ctx = g_vpr_ctx.routing();
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std::vector<int> congested_rr_nodes;
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for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
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for (size_t inode = 0; inode < device_ctx.rr_graph.nodes().size(); inode++) {
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short occ = route_ctx.rr_node_route_inf[inode].occ();
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short capacity = device_ctx.rr_nodes[inode].capacity();
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@ -362,14 +362,14 @@ std::vector<int> collect_congested_rr_nodes() {
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return congested_rr_nodes;
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}
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/* Returns a vector from [0..device_ctx.rr_nodes.size()-1] containing the set
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/* Returns a vector from [0..device_ctx.rr_graph.nodes().size()-1] containing the set
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* of nets using each RR node */
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std::vector<std::set<ClusterNetId>> collect_rr_node_nets() {
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auto& device_ctx = g_vpr_ctx.device();
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auto& route_ctx = g_vpr_ctx.routing();
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auto& cluster_ctx = g_vpr_ctx.clustering();
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std::vector<std::set<ClusterNetId>> rr_node_nets(device_ctx.rr_nodes.size());
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std::vector<std::set<ClusterNetId>> rr_node_nets(device_ctx.rr_graph.nodes().size());
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for (ClusterNetId inet : cluster_ctx.clb_nlist.nets()) {
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t_trace* trace_elem = route_ctx.trace[inet].head;
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while (trace_elem) {
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@ -449,7 +449,7 @@ void pathfinder_update_cost(float pres_fac, float acc_fac) {
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auto& device_ctx = g_vpr_ctx.device();
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auto& route_ctx = g_vpr_ctx.mutable_routing();
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for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
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for (size_t inode = 0; inode < device_ctx.rr_graph.nodes().size(); inode++) {
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occ = route_ctx.rr_node_route_inf[inode].occ();
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capacity = device_ctx.rr_nodes[inode].capacity();
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@ -1003,7 +1003,7 @@ void alloc_and_load_rr_node_route_structs() {
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auto& route_ctx = g_vpr_ctx.mutable_routing();
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auto& device_ctx = g_vpr_ctx.device();
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route_ctx.rr_node_route_inf.resize(device_ctx.rr_nodes.size());
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route_ctx.rr_node_route_inf.resize(device_ctx.rr_graph.nodes().size());
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reset_rr_node_route_structs();
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}
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@ -1014,10 +1014,11 @@ void reset_rr_node_route_structs() {
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auto& route_ctx = g_vpr_ctx.mutable_routing();
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auto& device_ctx = g_vpr_ctx.device();
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VTR_ASSERT(route_ctx.rr_node_route_inf.size() == size_t(device_ctx.rr_nodes.size()));
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VTR_ASSERT(route_ctx.rr_node_route_inf.size() == size_t(device_ctx.rr_graph.nodes().size()));
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for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
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for (size_t inode = 0; inode < device_ctx.rr_graph.nodes().size(); inode++) {
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route_ctx.rr_node_route_inf[inode].prev_node = NO_PREVIOUS;
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route_ctx.rr_node_route_inf[inode].prev_node_id = RRNodeId::INVALID();
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route_ctx.rr_node_route_inf[inode].prev_edge = NO_PREVIOUS;
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route_ctx.rr_node_route_inf[inode].pres_cost = 1.0;
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route_ctx.rr_node_route_inf[inode].acc_cost = 1.0;
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@ -1826,7 +1827,7 @@ void print_invalid_routing_info() {
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}
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}
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for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
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for (size_t inode = 0; inode < device_ctx.rr_graph.nodes().size(); inode++) {
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int occ = route_ctx.rr_node_route_inf[inode].occ();
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int cap = device_ctx.rr_nodes[inode].capacity();
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if (occ > cap) {
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@ -27,7 +27,7 @@
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/* Array below allows mapping from any rr_node to any rt_node currently in
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* the rt_tree. */
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static std::vector<t_rt_node*> rr_node_to_rt_node; /* [0..device_ctx.rr_nodes.size()-1] */
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static std::vector<t_rt_node*> rr_node_to_rt_node; /* [0..device_ctx.rr_graph.nodes().size()-1] */
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/* Frees lists for fast addition and deletion of nodes and edges. */
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@ -73,7 +73,7 @@ bool alloc_route_tree_timing_structs(bool exists_ok) {
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auto& device_ctx = g_vpr_ctx.device();
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bool route_tree_structs_are_allocated = (rr_node_to_rt_node.size() == size_t(device_ctx.rr_nodes.size())
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bool route_tree_structs_are_allocated = (rr_node_to_rt_node.size() == size_t(device_ctx.rr_graph.nodes().size())
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|| rt_node_free_list != nullptr);
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if (route_tree_structs_are_allocated) {
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if (exists_ok) {
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@ -84,7 +84,7 @@ bool alloc_route_tree_timing_structs(bool exists_ok) {
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}
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}
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rr_node_to_rt_node = std::vector<t_rt_node*>(device_ctx.rr_nodes.size(), nullptr);
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rr_node_to_rt_node = std::vector<t_rt_node*>(device_ctx.rr_graph.nodes().size(), nullptr);
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return true;
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}
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@ -1,4 +1,5 @@
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#pragma once
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#include "rr_graph_obj.h"
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/************** Types and defines exported by route_tree_timing.c ************/
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struct t_rt_node;
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struct t_linked_rt_edge {
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t_rt_node* child;
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short iswitch;
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/* Xifan Tang - RRGraph switch*/
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RRSwitchId iswitch_id;
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t_linked_rt_edge* next;
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};
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@ -41,8 +46,16 @@ struct t_rt_node {
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} u;
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t_rt_node* parent_node;
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short parent_switch;
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/* Xifan Tang - RRGraph switch*/
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RRSwitchId parent_switch_id;
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bool re_expand;
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int inode;
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/* Xifan Tang - RRGraph node */
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RRNodeId inode_id;
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float C_downstream;
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float R_upstream;
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float Tdel;
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