40f6b5a3fe
[lib] fixed a few bugs
2023-02-22 21:23:08 -08:00
a9d5e4dfbd
[lib] update example clock arch xml
2023-02-22 21:18:00 -08:00
d1133000ba
[lib] code format
2023-02-22 21:03:04 -08:00
aafd1e6fb3
[lib] syntax
2023-02-22 21:02:35 -08:00
b2ef1db5f4
[lib] finishing up code changes; start debugging
2023-02-22 20:46:18 -08:00
1c8a5eb098
[lib] adding linker
2023-02-22 20:29:32 -08:00
bf2876c60e
[lib] developing linker
2023-02-22 18:36:22 -08:00
ce20a16aad
[lib] adding unit test
2023-02-22 18:26:18 -08:00
b37deb4b02
[lib] adding writer
2023-02-22 18:21:28 -08:00
5cd310c4cc
[lib] adding missing apis
2023-02-22 15:04:52 -08:00
7bc843b74a
[lib] developing xml parser for clk arch
2023-02-22 13:23:09 -08:00
25e43b47da
[lib] first round of data structure on clock arch
2023-02-22 12:18:44 -08:00
9eb2374bc6
[lib] developing
2023-02-21 22:29:25 -08:00
fe594acab1
[lib] adding clock network data structure
2023-02-21 16:53:05 -08:00
e7fc065032
[lib] start developing clock arch data structure and I/O
2023-02-21 15:06:35 -08:00
f4e017f06c
Merge pull request #1068 from lnis-uofu/dependabot/submodules/yosys-0f2d226
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Bump yosys from `1cfedc9` to `0f2d226`
2023-02-21 12:46:25 -08:00
f9475ee6e3
Bump yosys from `1cfedc9` to `0f2d226`
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Bumps [yosys](https://github.com/YosysHQ/yosys ) from `1cfedc9` to `0f2d226`.
- [Release notes](https://github.com/YosysHQ/yosys/releases )
- [Commits](1cfedc90ce...0f2d226ae9
2023-02-21 07:58:32 +00:00
eabf44ac31
Merge pull request #1066 from lnis-uofu/patch_update
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Pulling refs/heads/master into master
2023-02-18 16:07:15 -08:00
cea7892686
Updated Patch Count
2023-02-19 00:02:50 +00:00
f99e76942c
Merge pull request #1064 from lnis-uofu/dependabot/submodules/yosys-1cfedc9
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Bump yosys from `b1a0111` to `1cfedc9`
2023-02-18 14:15:07 -08:00
69a4fed95d
Merge pull request #1065 from lnis-uofu/dependabot/submodules/yosys-plugins-43308c1
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Bump yosys-plugins from `345fe14` to `43308c1`
2023-02-18 14:14:31 -08:00
6433b2ec94
Merge pull request #1061 from lnis-uofu/dependabot/submodules/vtr-verilog-to-routing-9e53e9a
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Bump vtr-verilog-to-routing from `62e42cf` to `9e53e9a`
2023-02-18 14:14:13 -08:00
81253ca48e
Bump yosys-plugins from `345fe14` to `43308c1`
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Bumps [yosys-plugins](https://github.com/SymbiFlow/yosys-symbiflow-plugins ) from `345fe14` to `43308c1`.
- [Release notes](https://github.com/SymbiFlow/yosys-symbiflow-plugins/releases )
- [Commits](345fe14ee2...43308c1432
2023-02-17 07:59:03 +00:00
f081a12204
Bump yosys from `b1a0111` to `1cfedc9`
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Bumps [yosys](https://github.com/YosysHQ/yosys ) from `b1a0111` to `1cfedc9`.
- [Release notes](https://github.com/YosysHQ/yosys/releases )
- [Commits](b1a011138c...1cfedc90ce
2023-02-17 07:58:58 +00:00
415982f7c4
Bump vtr-verilog-to-routing from `62e42cf` to `9e53e9a`
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Bumps [vtr-verilog-to-routing](https://github.com/verilog-to-routing/vtr-verilog-to-routing ) from `62e42cf` to `9e53e9a`.
- [Release notes](https://github.com/verilog-to-routing/vtr-verilog-to-routing/releases )
- [Commits](62e42cfbf7...9e53e9a0a7
2023-02-16 07:58:43 +00:00
9f7e8cbf1d
Merge pull request #1059 from lnis-uofu/patch_update
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Pulling refs/heads/master into master
2023-02-14 16:24:45 -08:00
920ac231f2
Updated Patch Count
2023-02-15 00:02:29 +00:00
a60eea8a79
Merge pull request #1057 from lnis-uofu/dependabot/submodules/yosys-plugins-345fe14
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Bump yosys-plugins from `08430ec` to `345fe14`
2023-02-14 10:49:01 -08:00
ce4f30353d
Bump yosys-plugins from `08430ec` to `345fe14`
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Bumps [yosys-plugins](https://github.com/SymbiFlow/yosys-symbiflow-plugins ) from `08430ec` to `345fe14`.
- [Release notes](https://github.com/SymbiFlow/yosys-symbiflow-plugins/releases )
- [Commits](08430ec4f5...345fe14ee2
2023-02-14 08:00:43 +00:00
e2ef274d61
Merge pull request #1054 from lnis-uofu/patch_update
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Pulling refs/heads/master into master
2023-02-12 16:23:31 -08:00
23052f35ed
Updated Patch Count
2023-02-13 00:02:16 +00:00
7c1f8cd746
Updated docker version
2023-02-12 12:36:53 -07:00
cdf6f2a171
Added extensions to docker file
2023-02-12 12:36:21 -07:00
f27aaaa5ae
Updated dockerfile version
2023-02-12 12:01:40 -07:00
541116faf5
Updated docker image
2023-02-12 12:00:29 -07:00
6c3767a499
Updating docker file for binder
2023-02-12 10:41:25 -08:00
10ffa82804
Merge pull request #1053 from lnis-uofu/demo_tasks
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Updated demo tasks
2023-02-12 05:40:38 -08:00
4f6b8c0905
Updated regression tests
2023-02-11 22:11:06 -07:00
45933ecbdd
Merge remote-tracking branch 'origin/master' into demo_tasks
2023-02-11 19:27:28 -07:00
64b20c1942
Merge pull request #1052 from lnis-uofu/refactor_task_py
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Refactor run_fpga_task.py and run_fpga_flow.py
2023-02-11 18:18:50 -08:00
f7c710e95e
renamed yosys_vpr_template fabric_netlist_gen_template
2023-02-11 18:33:06 -07:00
b2bdfb7475
Strip down task
2023-02-11 18:32:06 -07:00
b71a1014e8
renamed vpr_blif_template to fabric_verification_template
2023-02-11 18:29:21 -07:00
6a48f1eb05
Updated demo projects
2023-02-11 18:24:20 -07:00
a6263c44af
Updated format
2023-02-11 18:12:04 -07:00
2afb91596f
Refactored run_openfpga_task.py
2023-02-11 18:04:54 -07:00
0b27661d88
Merge pull request #1051 from lnis-uofu/patch_update
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Pulling refs/heads/master into master
2023-02-10 18:10:19 -08:00
dcdf3ea3d1
Updated Patch Count
2023-02-11 00:02:14 +00:00
9eb989ceee
Merge pull request #1050 from scott-temple/patch-1
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fix mux syntax in circuit_model_examples
2023-02-10 11:04:28 -08:00
55be8f491e
fix mux syntax in circuit_model_examples
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the documentation is inconsistent about using underscores or dashes when describing a mux. It used one-level, but multi_level. Only underscores are valid in openfpga
2023-02-10 10:22:37 -07:00
tangxifan
dependabot[bot]
github-actions[bot]
Ganesh Gore
scott-temple