tangxifan
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059f8ca112
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[engine] fixed a bug in repack when only invisible routing sinks are found
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2023-01-20 21:50:59 -08:00 |
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tangxifan
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693404d1ac
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[engine] code format
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2023-01-19 11:23:34 -08:00 |
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tangxifan
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3bcec24dca
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[engine] fixed a bug
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2023-01-19 11:22:44 -08:00 |
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tangxifan
|
2ba4249518
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[engine] add black list for repacker to pick routing traces
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2023-01-19 11:01:31 -08:00 |
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tangxifan
|
ac8c0e243c
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[core] code format
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2023-01-15 12:13:59 -08:00 |
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tangxifan
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cab7e04901
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[core] fixed a bug in repacker to avoid routing constrained nets
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2023-01-15 12:13:12 -08:00 |
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tangxifan
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2a0e512ac9
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[code] format
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2023-01-14 23:05:42 -08:00 |
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tangxifan
|
4242c39b01
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[core] fixed a bug in handling design constraints in repack
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2023-01-14 23:05:04 -08:00 |
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tangxifan
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0af6c76239
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[engine] code format
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2022-10-13 16:27:57 -07:00 |
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tangxifan
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d1f3338837
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[engine] now repacker find only routable pins when given a net to search routing traces
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2022-10-13 16:26:45 -07:00 |
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tangxifan
|
31da9bf6ea
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[engine] now repack can find a routing trace from the port in the same type at top-level pb_graph_node
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2022-10-13 15:10:25 -07:00 |
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tangxifan
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6d31b319a2
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[engine] update source files subject to code formatting rules
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2022-10-06 17:08:50 -07:00 |
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tangxifan
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373566416c
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Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into vtr_upgrade
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2022-09-16 16:47:21 -07:00 |
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tangxifan
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1c2192a87d
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[engine] fixed a few bugs
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2022-09-12 16:50:32 -07:00 |
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tangxifan
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2fc124e109
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[engine] now repack has a new option "--ignore_global_nets_on_pins"
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2022-09-12 16:18:26 -07:00 |
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tangxifan
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b9abdbc5d4
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[engine] enable verbose output
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2022-08-27 19:59:57 -07:00 |
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tangxifan
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148da80869
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[Tool] Add new syntax about physical_pb_port_rotate_offset to support fracturable heterogeneous block mapping between operating modes and physical modes
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2021-04-24 14:53:29 -06:00 |
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tangxifan
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0709e5bb81
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[Tool] Fixed a bug in the routing trace finder for direct connections inside repacker
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2021-04-24 13:27:44 -06:00 |
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tangxifan
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96ce6b545f
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[Tool] Patch repack to consider design constraints for pins that are not equivalent
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2021-04-21 13:53:08 -06:00 |
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tangxifan
|
df7b436ac7
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[Tool] Patch repacker to support duplicated nets due to adder nets
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2021-02-23 19:01:18 -07:00 |
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tangxifan
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a5b8b2a64a
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[Tool] Use dedicated function to identify wire LUT created by repacker
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2021-02-18 19:37:44 -07:00 |
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tangxifan
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aae03482f5
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[Tool] Bug fix for wire LUT identification by repacker. Create a dedicated function to identify these LUTs and store the results in shared database
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2021-02-18 19:37:17 -07:00 |
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tangxifan
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0c409b5bcc
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[Tool] Add bitstream annotation support
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2021-02-01 20:49:36 -07:00 |
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tangxifan
|
8c311b8282
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[Tool] Bug fix in repacker for considering design constraints
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2021-01-17 12:26:14 -07:00 |
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tangxifan
|
2efe513122
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[Tool] Now repack consider design constraints; test pending
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2021-01-16 21:57:17 -07:00 |
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tangxifan
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bb8e7e25c2
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[Tool] Start deploying design constraints in repack engine
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2021-01-16 21:27:12 -07:00 |
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tangxifan
|
26f1a5d9ec
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[OpenFPGA Tool] Bug fix for repacking no local routing architecture
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2020-09-21 22:22:03 -06:00 |
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tangxifan
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9cfb2f52ef
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[OpenFPGA code] bug fix for fully equivalent outputs of pb_type
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2020-09-16 19:26:46 -06:00 |
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tangxifan
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e10cafe0a5
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Critical patch on repacking about wire LUT support.
Previously, the wire LUT identification is too naive and does not consider all the cases
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2020-04-19 16:42:31 -06:00 |
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tangxifan
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2e3a811f4f
|
critical bug fixed in repacking. This is due to depop50% local routing where the same net may be mapped to two different pins in the same pb_graph_pin. Now we restrict the pin searching. But in long term, we should sync the pb_route results to post routing results
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2020-04-18 21:04:46 -06:00 |
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tangxifan
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808853db0b
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critical bug fixed for find proper pb_route traceback
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2020-03-13 12:26:37 -06:00 |
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tangxifan
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8921905bec
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annotate multiple-source and multiple-sink nets from pb to lb router
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2020-03-12 19:21:13 -06:00 |
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tangxifan
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410dcf6ab6
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debugged LUT bitstream
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2020-02-26 11:42:18 -07:00 |
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tangxifan
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9583731531
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add results saver for lb router
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2020-02-22 22:10:32 -07:00 |
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tangxifan
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926e429374
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add save repacking results in physical pb
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2020-02-21 20:39:49 -07:00 |
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tangxifan
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12f2888c7c
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add physical pb data structure and basic allocator
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2020-02-21 17:47:27 -07:00 |
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tangxifan
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b035b4c87f
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debugged with Lbrouter. Next step is to output routing traces to physical pb data structure
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2020-02-21 12:16:50 -07:00 |
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tangxifan
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1b66e837ba
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bug fixing for lb router. Add physical mode to default node expanding settings
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2020-02-21 11:29:00 -07:00 |
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tangxifan
|
0b0e00b5f4
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debugging the LbRouter
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2020-02-20 21:56:15 -07:00 |
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tangxifan
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3e07d7d5e0
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finish net addition to LbRouter. Found a bug in pb pin fix-up. Need to consider clustered I/O block z offset
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2020-02-20 20:26:20 -07:00 |
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tangxifan
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fdb27c5a6b
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move lb_rr_graph construction to repack command
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2020-02-20 13:24:34 -07:00 |
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tangxifan
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409b3f6896
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add lb_rr_graph builder for the refactored version
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2020-02-17 21:11:56 -07:00 |
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tangxifan
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8e97443410
|
start working on repack
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2020-02-17 17:57:43 -07:00 |