[Tool] Bug fix in repacker for considering design constraints
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@ -240,9 +240,9 @@ std::vector<t_pb_graph_pin*> find_routed_pb_graph_pins_atom_net(const t_pb* pb,
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* Note: this is ONLY applicable to the pb_pin of top-level pb_graph_node
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***************************************************************************************/
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static
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int find_pb_route_remapped_source_pb_pin(const t_pb* pb,
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const t_pb_graph_pin* source_pb_pin,
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const AtomNetId& atom_net_id) {
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std::vector<int> find_pb_route_remapped_source_pb_pin(const t_pb* pb,
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const t_pb_graph_pin* source_pb_pin,
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const AtomNetId& atom_net_id) {
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VTR_ASSERT(true == source_pb_pin->parent_node->is_root());
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std::vector<int> pb_route_indices;
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@ -268,9 +268,7 @@ int find_pb_route_remapped_source_pb_pin(const t_pb* pb,
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}
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}
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VTR_ASSERT(1 == pb_route_indices.size());
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return pb_route_indices[0];
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return pb_route_indices;
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}
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/***************************************************************************************
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@ -424,44 +422,87 @@ void add_lb_router_nets(LbRouter& lb_router,
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break;
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}
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}
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/* Find the constrained net mapped to this pin in clustering results */
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AtomNetId constrained_atom_net_id = AtomNetId::INVALID();
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/* If the pin is constrained, we need to
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* - if this is an open net, for invalid net then
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* - if this is valid net name, find the net id from atom_netlist and overwrite the atom net id to mapped
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* - if this is valid net name, find the net id from atom_netlist
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* and overwrite the atom net id to mapped
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*/
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if (!constrained_net_name.empty()) {
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if (std::string(REPACK_DESIGN_CONSTRAINT_OPEN_NET) == constrained_net_name) {
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atom_net_id == AtomNetId::INVALID();
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} else {
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VTR_ASSERT_SAFE(std::string(REPACK_DESIGN_CONSTRAINT_OPEN_NET) != constrained_net_name);
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atom_net_id = atom_ctx.nlist.find_net(constrained_net_name);
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if (std::string(REPACK_DESIGN_CONSTRAINT_OPEN_NET) != constrained_net_name) {
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constrained_atom_net_id = atom_ctx.nlist.find_net(constrained_net_name);
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if (false == atom_ctx.nlist.valid_net_id(constrained_atom_net_id)) {
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VTR_LOG_WARN("Invalid net '%s' to be constrained! Will drop the constraint in repacking\n",
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constrained_net_name.c_str());
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}
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}
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} else {
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VTR_ASSERT_SAFE(constrained_net_name.empty());
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constrained_atom_net_id = atom_net_id;
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}
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/* Bypass unmapped pins */
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if (AtomNetId::INVALID() == atom_net_id) {
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/* Bypass unmapped pins. There are 4 conditions to consider
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* +======+=================+=============+================================+
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* | Case | Packing results | Constraints | Decision to route |
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* +======+=================+=============+================================+
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* | 0 | Unmapped | Unmapped | No routing needed |
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* +======+=================+=============+================================+
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* | 1 | Unmapped | Mapped | Find the pb source pin that |
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* | | | | drives the constrained net and |
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* | | | | use it to find sink nodes |
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* +======+=================+=============+================================+
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* | 2 | Mapped | Unmapped | No routing needed |
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* +======+=================+=============+================================+
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* | 3 | Mapped | Mapped | Route with the constrained net |
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* | | | | but use the packing net id to |
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* | | | | find the sink nodes to route |
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* +======+=================+=============+================================+
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*/
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if (AtomNetId::INVALID() == constrained_atom_net_id) {
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continue;
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}
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/* If we have a net to route, it must be the constrained net */
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AtomNetId atom_net_id_to_route = constrained_atom_net_id;
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/* The outputs of pb_graph_node is INTERMEDIATE node in the routing resource graph,
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* they are all connected to a common source node
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*/
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LbRRNodeId source_lb_rr_node = lb_rr_graph.find_node(LB_INTERMEDIATE, source_pb_pin);
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VTR_ASSERT(true == lb_rr_graph.valid_node_id(source_lb_rr_node));
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int pb_route_index = find_pb_route_remapped_source_pb_pin(pb, source_pb_pin, atom_net_id);
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/* As the pin remapping is allowed during routing, we should
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* - Find the routing traces from packing results which is mapped to the net
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* from the same port (as remapping is allowed for pins in the same port only)
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* - Find the source pb_graph_pin that drives the routing traces during packing
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* - Then we can find the sink nodes
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*/
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std::vector<int> pb_route_indices = find_pb_route_remapped_source_pb_pin(pb, source_pb_pin, atom_net_id_to_route);
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/* It could happen that the constrained net is NOT used in this clb, we just skip it for routing
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* For example, a clkB net is never mapped to any ports in the pb that is clocked by clkA net
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* */
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int pb_route_index;
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if (0 == pb_route_indices.size()) {
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continue;
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} else {
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VTR_ASSERT(1 == pb_route_indices.size());
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pb_route_index = pb_route_indices[0];
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}
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t_pb_graph_pin* packing_source_pb_pin = get_pb_graph_node_pin_from_block_pin(block_id, pb_route_index);
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VTR_ASSERT(nullptr != packing_source_pb_pin);
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/* Find all the sink pins in the pb_route, we walk through the input pins and find the pin */
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std::vector<t_pb_graph_pin*> sink_pb_graph_pins = find_routed_pb_graph_pins_atom_net(pb, source_pb_pin, packing_source_pb_pin, atom_net_id, device_annotation, pb_pin_mapped_nets, pb_graph_pin_lookup_from_index);
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std::vector<t_pb_graph_pin*> sink_pb_graph_pins = find_routed_pb_graph_pins_atom_net(pb, source_pb_pin, packing_source_pb_pin, atom_net_id_to_route, device_annotation, pb_pin_mapped_nets, pb_graph_pin_lookup_from_index);
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std::vector<LbRRNodeId> sink_lb_rr_nodes = find_lb_net_physical_sink_lb_rr_nodes(lb_rr_graph, sink_pb_graph_pins, device_annotation);
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VTR_ASSERT(sink_lb_rr_nodes.size() == sink_pb_graph_pins.size());
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/* Printf for debugging only, may be enabled if verbose is enabled
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*/
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/* Output verbose messages for debugging only */
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VTR_LOGV(verbose,
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"Pb route for Net %s:\n",
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atom_ctx.nlist.net_name(atom_net_id).c_str());
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atom_ctx.nlist.net_name(atom_net_id_to_route).c_str());
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VTR_LOGV(verbose,
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"Source node:\n\t%s -> %s\n",
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source_pb_pin->to_string().c_str(),
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@ -477,7 +518,7 @@ void add_lb_router_nets(LbRouter& lb_router,
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add_lb_router_net_to_route(lb_router, lb_rr_graph,
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std::vector<LbRRNodeId>(1, source_lb_rr_node),
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sink_lb_rr_nodes,
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atom_ctx, atom_net_id);
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atom_ctx, atom_net_id_to_route);
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net_counter++;
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}
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