[engine] now repacker find only routable pins when given a net to search routing traces

This commit is contained in:
tangxifan 2022-10-13 16:26:45 -07:00
parent 33e2b16cb1
commit d1f3338837
3 changed files with 28 additions and 1 deletions

View File

@ -11,6 +11,7 @@
#include "build_physical_lb_rr_graph.h"
#include "lb_router.h"
#include "lb_router_utils.h"
#include "pb_graph_utils.h"
#include "pb_type_utils.h"
#include "physical_pb_utils.h"
#include "repack.h"
@ -290,7 +291,7 @@ static std::vector<int> find_pb_route_by_atom_net(
if (pb_route_indices.empty()) {
for (int pin : candidate_pool) {
if (pb->pb_route.at(pin).pb_graph_pin->parent_node->is_root() && source_pb_pin->port->type == pb->pb_route.at(pin).pb_graph_pin->port->type) {
if (pb->pb_route.at(pin).pb_graph_pin->parent_node->is_root() && is_pb_graph_pins_share_interc(source_pb_pin, pb->pb_route.at(pin).pb_graph_pin)) {
pb_route_indices.push_back(pin);
}
}

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@ -70,4 +70,28 @@ t_interconnect* pb_graph_pin_interc(t_pb_graph_pin* pb_graph_pin,
return interc;
}
/********************************************************************
* This function identifies if two pb graph pins share at least one interconnect model
* The two pins should be in the same type of port, for example, both are inputs.
* Each pin may drive a number of outgoing edges while each edge represents different interconnect model
* By iterating over outgoing edges for each pin, common interconnect model may be found
*******************************************************************/
bool is_pb_graph_pins_share_interc(const t_pb_graph_pin* pinA, const t_pb_graph_pin* pinB) {
if (pinA->port->type != pinB->port->type) {
return false;
}
std::vector<t_interconnect*> pinA_interc_list;
for (auto out_edge : pinA->output_edges) {
if (pinA_interc_list.end() == std::find(pinA_interc_list.begin(), pinA_interc_list.end(), out_edge->interconnect)) {
pinA_interc_list.push_back(out_edge->interconnect);
}
}
for (auto out_edge : pinB->output_edges) {
if (pinA_interc_list.end() != std::find(pinA_interc_list.begin(), pinA_interc_list.end(), out_edge->interconnect)) {
return true;
}
}
return false;
}
} /* end namespace openfpga */

View File

@ -22,6 +22,8 @@ std::vector<t_pb_graph_pin*> pb_graph_pin_inputs(
t_interconnect* pb_graph_pin_interc(t_pb_graph_pin* pb_graph_pin,
t_mode* selected_mode);
bool is_pb_graph_pins_share_interc(const t_pb_graph_pin* pinA, const t_pb_graph_pin* pinB);
} /* end namespace openfpga */
#endif