This patch is used to fix Error: timed out while waiting for target halted
when executing monitor reset halt for some nuclei fpga bitstreams
1. we need to issue halt req when halt is required
2. we need to wait if halt req is sent, and wait for the halt req
really finished
Change-Id: I1be58732eb2a96d91173f1cfee1d6ac6cb9fe17a
Signed-off-by: Huaqi Fang <578567190@qq.com>
Also optimized markdown format for better live preview in website.
Change-Id: I470be668362017ee52bc2f86ed295b42d6a83611
Signed-off-by: Huaqi Fang <578567190@qq.com>
- When `fileio` is valid, close it;
- When `temp` exists, free its memory;
- This ensures proper resource management.
Change-Id: I66be66e3945415f2e970ea47c077942be5977541
Signed-off-by: Huaqi Fang <578567190@qq.com>
IDE didn't catch the error code, so it should just return E_OK, but
print error log in openocd log, so user can investigate it
Change-Id: I082c32214472c43fa30eb532b7fc498ff7f73583
Signed-off-by: Huaqi Fang <578567190@qq.com>
This code forced all harts to halt when they reported a mixture of
halted and non-halted status. This breaks long-running algorithms run
on a single core under SMP, because the first poll will force the core
executing the algorithm to halt.
Fix by adding an exception when all running cores are running under
debugger control (target->status == 4). Do not force harts to halt in
this case.
Change-Id: I940172926ed9b80b95891d8aecbd10897e148585
Signed-off-by: wangyanwen <wangyanwen@nucleisys.com>
- Check target state before MMU query
- Force sysbus access during runtime writes
- Restore original settings after access
Change-Id: Idf244be0425d5c1584d092e1c2693ad11c941d12
Signed-off-by: Huaqi Fang <578567190@qq.com>
- Only log error if target is not running or in debug running state.
- Refine logging for consistency across functions.
Change-Id: Ic1a8b0e379dca06f01786feb9aa9ef5892e1d789
Signed-off-by: Huaqi Fang <578567190@qq.com>
It can be used for reading/writing multiple non-contiguous
chunks of memory with minimum latency using sba method
based on a0a1aed80f
Change-Id: If52bf14875f36229e315970643d11983ae2e539d
Signed-off-by: Huaqi Fang <578567190@qq.com>
The following changes are added
Change-Id: I1c185d6017674c756871812effffd3ece7e43fc4
ci: split deploy_openocd job to deploy and link two jobs
- deploy job will only install openocd into share environment
- link job will link this version of openocd to latest
Change-Id: I9e6f524cb8237bbed146f50ebb8f342f7549ad4a
Signed-off-by: Huaqi Fang <578567190@qq.com>
ci: install openocd zip into share environment when deploy
Change-Id: I34726e72edc1db29c3bea5ca6aacb69c959d6d75
Signed-off-by: Huaqi Fang <578567190@qq.com>
ci: optimize deploy job and upload deploy zip into artifacts
Change-Id: I7f2e4182077acf193c3c4ab851643cf6ca6d6759
Signed-off-by: Huaqi Fang <578567190@qq.com>
ci: git submodule update should not use with --remote for ci repo update
see https://git-scm.com/book/en/v2/Git-Tools-Submodules
Change-Id: I38d57199f79b1eee6d312140d46fa0e8568dec9c
Signed-off-by: Huaqi Fang <578567190@qq.com>
In Nuclei RISC-V Processor, Vector Module can be configured to lite version
which vslide1down_vx instruction maybe not present, so we need to find other
ways to read and write vector registers, this commit is a workaround to do this.
Change-Id: I6e01666ec49d2876942b09b7e5d14c3fcc76854f
Signed-off-by: wangyanwen <wangyanwen@nucleisys.com>
init resethalt is used to halt the cpu when reset
Change-Id: I5c504599c10da204c0e9f933d33f61fe75ed033c
Signed-off-by: wangyanwen <wangyanwen@nucleisys.com>
- cm32m4xxr flash driver is for cm32m4xxr devices
- nuspi flash driver is for nuclei evalsoc devices
- custom flash driver is for customized flash driver
without modify openocd source code, see https://github.com/riscv-mcu/openflashloader
Change-Id: I86c4f0298707b5cfdfb77b6d8f4cbed3a189ddf0
Signed-off-by: wangyanwen <wangyanwen@nucleisys.com>
* Registers were not invalidated if the hart became unavailable.
* Improved logging in the case register invalidation involves loss of
information.
Change-Id: Icfb5e190dd6dcb1a97e4d314d802466cab7a01e4
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
wangyanwen
Huaqi Fang
方华启
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Evgeniy Naydanov
Evgeniy Naydanov