Commit Graph

3099 Commits

Author SHA1 Message Date
Mikhail Rasputin 6d45e485f9 target: fix registers reading from non examined target
If a target is not examined when the debugger tries to connect to it
then it can lead to undesired/undefined behavior.

In particular it leads to a zero pointer dereference on the aarch64.


Change-Id: I67f2b714ab8b2727fd36f3de16d7f9017b4c55fe
Signed-off-by: Mikhail Rasputin <mikhail.godlike.rasputin@yandex.ru>
Reviewed-on: http://openocd.zylin.com/5727
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-08-08 22:17:08 +01:00
Antonio Borneo 7c66df13ef target/arm11: fix memory leaks, including register cache
There is no deinit_target method, so few memory allocations leak
at openocd exit.
Issue identified by tracking all calls to arm_dpm_setup().

Implement the method arm11_dpm_deinit() to free all the memory
allocated in arm11_dpm_init() and call it in the new
arm11_deinit_target().

NOT TESTED on real HW.

Change-Id: Icab86e290fc2db14f70eb84c8286357aadb02a35
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5694
Tested-by: jenkins
2020-08-02 10:48:52 +01:00
Antonio Borneo 768502403e target: use one second timeout while halting target at gdb attach
By default GDB timeouts after 2 seconds, even if this value can be
modified with GDB command "set remotetimeout".
On OpenOCD side, the default event for GDB attach is to halt the
target and wait it to halt. But here the default timeout of the
halt command is 5 seconds!
If the target cannot be halted (e.g. it's kept in reset by another
core or the debugger doesn't have enough privileges) then GDB will
timeout while OpenOCD is still waiting and is unable to
communicate with GDB.

Decrease the halt timeout to 1 second in the default GDB attach
event handler.

Change-Id: I231c740816bb6a0d74b0bc679a368a6cbfb34824
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5687
Tested-by: jenkins
2020-08-02 10:48:41 +01:00
Antonio Borneo 480ba8ca88 target: fix minor typos and duplicated words
Change-Id: I8deb0017dc66a243e3dd51e285aa086db500decd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5766
Tested-by: jenkins
2020-07-26 23:09:45 +01:00
Antonio Borneo f5cc8360fd target/arm720t: fix memory leak of register cache
There is no method to free the register cache, allocated in
arm720t_init_target().
Issue identified by tracking all calls to arm7tdmi_init_target().

Implement the method arm720t_deinit_target() by calling directly
arm7tdmi_deinit_target().

NOT TESTED on a real arm720t target.
Tested on a arm926ejs (SPEAr320) by hacking the target type and
pretending it is a xscale:
	sed -i s/arm926ejs/arm720t/ tcl/target/spear3xx.cfg

Change-Id: I53c1f46c1a355a710e8df01468b19220671569dc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5697
Tested-by: jenkins
2020-07-26 20:12:56 +01:00
Antonio Borneo 19aa77cc7f target/arm7tdmi: fix memory leak of register cache
There is no method to free the register cache, allocated in
arm7tdmi_init_target(), so we get a memory leak.
Issue identified by tracking all calls to arm_build_reg_cache().

Implement the method arm7tdmi_deinit_target() that in turn calls
arm7tdmi_free_reg_cache().

NOT TESTED on a real arm7tdmi target.
Tested on a arm926ejs (SPEAr320) by hacking the target type and
pretending it is a arm7tdmi:
	sed -i s/arm926ejs/arm7tdmi/ tcl/target/spear3xx.cfg

Change-Id: Iad465b708eb4ebb298725d7155fea76357e9045c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5696
Tested-by: jenkins
2020-07-26 20:12:48 +01:00
Antonio Borneo df1dcc27ee target/xscale: fix memory leak of register cache
There is no method to free the register cache, allocated in
xscale_build_reg_cache(), so we get a memory leak.
Issue identified by tracking all calls to arm_build_reg_cache().

Implement the method xscale_deinit_target() that in turn calls the
new xscale_free_reg_cache().
Fix leak of struct xscale.

NOT TESTED on a real xscale target.
Tested on a arm926ejs (SPEAr320) by hacking the target type and
pretending it is a xscale:
	sed -i s/arm926ejs/xscale/ tcl/target/spear3xx.cfg

Change-Id: Ibb2104c42411b76f4bb77c2fa387d1b85a3d2d5d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5695
Tested-by: jenkins
2020-07-26 20:12:34 +01:00
Antonio Borneo 580b8f5da0 target: fix memory leaks on targets based on arm9tdmi
Similarly to the fix for arm926ejs (also base on arm9tdmi), fix
the other targets based on arm9tdmi.
The fix for arm926ejs is tested on SPEAr320 target.

This fix is proposed separately because is not tested on a correct
target device, but tested on SPEAr320 by hacking the target type
and pretending it is the correct one, e.g.:
	sed -i s/arm926ejs/arm920t/ tcl/target/spear3xx.cfg

The memory leaks detected and fixed are:
- arm register cache;
- EmbeddedICE register cache;
- arm_jtag_reset_callback internal data;
- struct <target_type>_common.

Change-Id: I565f9a5bf144a9df78474434d86a64127ef0fbe5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5699
Tested-by: jenkins
2020-07-26 20:12:21 +01:00
Jiri Kastner 2f40d069a1 src/target/arm_adi_v5.c: add Cortex-A35 related entries
ROM Table registers:
https://developer.arm.com/documentation/100236/0100/debug/rom-table/rom-table-peripheral-identification-registers
Debug reisters:
https://developer.arm.com/documentation/100236/0100/debug/memory-mapped-debug-registers/external-debug-peripheral-identification-registers
PMU registers:
https://developer.arm.com/documentation/100236/0100/debug/pmu-registers/performance-monitors-peripheral-identification-registers
CTI registers:
https://developer.arm.com/documentation/100236/0100/debug/cti-registers/cti-peripheral-identification-registers

Change-Id: Ibd57d91fb9b66bc46929f4e93d0bf23c2a32f11a
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/5773
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-07-26 20:10:40 +01:00
Jiri Kastner 765c319277 src/target/arm_adi_v5.c: resorted ids
Change-Id: Ieeccf48254032244a86d6cd35793f8f6076527e9
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/5772
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:09:30 +01:00
Evgeniy Didin 8fea8460db target/arc: Introduce Actionpoints support
Actionpoint mechanism allows to setup HW breakpoints and watchpoints on Synopsys ARC CPUs.
This mechanism is controlled by DEBUG register and by a set of auxilary registers.
Each actionpoint is controlled by 3 aux registers: Actionpoint(AP) match mask(AP_AMM),
AP match value(AP_AMV) and AP control(AC).

Note: some fields of actionpoint_t structure will be used in further
support of watchpoints.

Change-Id: I4efb24675f247cc19d9122501c9e63c3126fcab4
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5763
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:08:21 +01:00
Antonio Borneo 996ff5bcfc coding style: add arguments to function prototypes
Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types FUNCTION_ARGUMENTS -f {} \;

This patch also fixes an incorrect function prototype in zy1000.c.
ZY1000 minidriver implementation overrides the function
arm11_run_instr_data_to_core_noack_inner(), but the prototype is
not the same as in src/target/arm11_dbgtap.c and to avoid compile
error it was changed also the prototype of the called function
arm11_run_instr_data_to_core_noack_inner_default().

Change-Id: I476cda8cdb0e1e280795b3b43ca95c40d09e4a3d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5630
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-07-08 22:08:19 +01:00
Antonio Borneo e2315ccffd coding style: fix space separation
The checkpatch script from Linux kernel v5.1 complains about using
space before comma, before semicolon and between function name and
open parenthesis.
Fix them!

Issue identified using the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types SPACING -f {} \;

The patch only changes amount and position of whitespace, thus
the following commands show empty diff
	git diff -w
	git log -w -p
	git log -w --stat

Change-Id: I1062051d7f97d59922847f5061c6d6811742d30e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5627
Tested-by: jenkins
2020-07-08 22:08:08 +01:00
Antonio Borneo bf34629294 coding style: fix print of hex values as decimal
It is an error to prefix with "0x" the print of values in decimal.
Replace the incorrect decimal format specifier with PRIx32.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types PRINTF_0XDECIMAL -f {} \;

Change-Id: I2eb867ef654527b2737ba573a405ec8f97c6a739
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5624
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-07-08 22:07:56 +01:00
Antonio Borneo f29d157882 target/arm926ejs: fix memory leaks
The memory leaks detected and fixed are:
- arm register cache;
- EmbeddedICE register cache;
- arm_jtag_reset_callback internal data;
- struct arm926ejs_common.

Issue identified with valgrind.
Tested on SPEAr320 based on arm926ejs.

Change-Id: If2bed02c516051ce4d0eb29b204a3f3337fe5d6a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5698
Tested-by: jenkins
2020-07-08 22:07:38 +01:00
Antonio Borneo 7c88e76a76 target: do not print an error on shutdown in target events
Before commit b3ce5a0ae5 ("target: use LOG_USER to print errors
in events") an error in an event handler was silently lost, while
now the associated message is printed out.

A "shutdown" command in a target event (e.g. in gdb-detach) causes
the event to end with error code ERROR_COMMAND_CLOSE_CONNECTION,
that triggers the error message:
	shutdown command invoked
	Error executing event <event-name> on target <target-name>:

The error code returned by the command "shutdown" is required to
stop the execution in a script/proc and avoid executing any
further command in the script/proc.
It is then normal to get an error code from the "shutdown" command
and it should not be printed out.

Intercept the return code of the event in case of "shutdown", then
skip scheduling other target events and return without printing
the incorrect error message.

Change-Id: Ia3085fb46beacb90a5e4bf0abf7c6e28bb9e6a9b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Laurent Lemele <laurent.lemele@st.com>
Reviewed-on: http://openocd.zylin.com/5710
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
2020-06-27 15:34:51 +01:00
Evgeniy Didin 057aed11a2 target/arc: Introduce L1I,L1D,L2 caches support
With this commit we introduce L1 and L2 cache
flush and invalidate operations which are necessary for
getting/setting actual data during memory r/w operations.

We introduce L2 cache support, which is not presented
on currently support EMSK board. But L2 is presented
on HSDK board, which soon will be introduced.

Change-Id: I2fda505a47ecb8833cc9f5ffe24f6a4e22ab6eb0
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5688
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-27 15:34:24 +01:00
Lucas 2e6904eef5 aarch64: Add support for debugging in HYP mode on ARMv8-A cores
When debugging an ARMv8-A/AArch32 target running HYP mode, OpenOCD would
throw the following error to GDB on most operations (step, set breakpoint):

	cannot read system control register in this mode

The mode in question is 0x1A, a privilege level 2 mode available on cores
that have the virtualization extensions (such as the Raspi 3).

Note: this mode is only used when running in AArch32 compatibility mode.

Signed-off-by: Lucas Jenss <public@x3ro.de>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Change-Id: Ia8673ff34c5b3eed60e24d8da57c3ca8197a60c2
Reviewed-on: http://openocd.zylin.com/5255
Tested-by: jenkins
Reviewed-by: Lucas Jenß <lucas.jenss@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-27 15:33:57 +01:00
Marc Schink 5a79481d3b target/armv7m_trace: Calculate prescaler for external capture devices
This fixes a regression introduced in "2dc88e1479f29ef0141b05bfcd907ad9a3e2d54c"

Change-Id: I04dc19ed30118a4c499b83732700b2ee0fdb67b6
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5610
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-06-18 10:11:02 +01:00
Antonio Borneo f0909fe9e5 coding style: fix multi-line dereferencing
Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types MULTILINE_DEREFERENCE -f {} \;

Change-Id: Icba05613e22a72ecc3e6a0aad7cb6b479496146f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5629
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-06-06 18:06:05 +01:00
Antonio Borneo 6f88aa0fb3 target/cortex_a: fix memory leak of register cache
There is no method to free the register cache, allocated in
armv4_5, so we get a memory leak.
Issue identified by valgrind.

Implement the method arm_free_reg_cache() and call it in cortex_a
deinit and to exit for error during arm_dpm_setup().
Tested on dual cortex-A stm32mp15x.
This change is inspired from similar fix in commit b01b5fe13a
("armv7m: Fix memory leak in register caching.").

The same allocation is also used by target types "arm7tdmi",
"arm9tdmi", "arm11" and "xscale" but they all lack the deinit
method and I do not have relevant HW to test the fix. For such
reasons they are not addressed in this patch.

Change-Id: I4da1e1f12e36ec245d1f3b11a4eafcbd9a1d2e25
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5693
Tested-by: jenkins
2020-06-06 18:05:29 +01:00
Antonio Borneo 061cae171c target/mem_ap: fix two memory leaks
The target mem_ap misses the method 'deinit_target' and does not
free the memory allocated during 'target create' and 'configure'.

Add the missing method and free the allocated memory.
Issue identified with valgrind.

Change-Id: If0d0114a75dd76a8b65c2d46d96c6085fd31a09d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5700
Tested-by: jenkins
2020-06-06 18:05:08 +01:00
Antonio Borneo 37330f89d7 target/cortex-m: enable C_DEBUGEN during examine
Current code for Cortex M does not set C_DEBUGEN as soon as
possible, (which means during target examine), but later-on either:
1) at command 'halt' (e.g. for 'gdb-attach' event);
2) at command 'soft_reset_halt';
3) at commands 'reset', 'reset halt' or 'reset init';
4) during polling, but only if the target:
    = enter in 'double fault', or
    = exit from a reset, or
    = halts (not possible if C_DEBUGEN is not set)

Plus, if commands in 1) or 2) are executed before the very first
poll of the target, the value of 'cortex_m->dcb_dhcsr' is used not
initialized while writing it back in DCB_DHCSR.

Another side effect of this situation is that it's possible to set
a HW breakpoint with the target running, while C_DEBUGEN is not
set. Accordingly to [1], C1.3.1 "Debug authentication":
    When DGBEN is LOW and DHCSR.S_HALT == 0:
    ...
    FPB breakpoints do not generate an entry to Debug state and,
    if no DebugMonitor exception is generated, will escalate to
    HardFault, Lockup, or be ignored.
On STM32MP15x I get HW breakpoint ignored, while on STM32F411 I
get HardFault.
E.g. following these steps:
- power-on a pre-flashed board that starts running the firmware;
- connect openocd, without halting or resetting the board;
- set a HW breakpoint to some address often executed;
- wait, but the board doesn't halt ...;
- type the command 'halt';
- if the Cortex-M has HardFault it would be visible and the fault
  is at the breakpoint address;
- if no HardFault then type the command 'resume';
- wait and the board will finally halt at the HW breakpoint.

A similar issue has been detected on Cortex-A code and fixed by
commit bff87a7f28 ("target/cortex_a: enable DSCR_HALT_DBG_MODE
during examine").
Follow the same approach and set C_DEBUGEN during examine.
Also, initialize 'cortex_m->dcb_dhcsr' during examine.

[1] ARM DDI 0403E "ARM v7-M Architecture Reference Manual"

Change-Id: I5b0b23403634f7dfce38f104bba9f59c33eb3e99
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5702
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Moritz Fischer <moritzf@google.com>
2020-06-06 18:04:36 +01:00
Tarek BOCHKATI 2d3bbcd566 arm_adi_v5: dap_ti_be_32_quirks_command minor simplification
use handle_command_parse_bool within dap_ti_be_32_quirks_command to make
it shorter and simpler.

Change-Id: Ice179cc477933b27e27235dc2ade23fe655e233d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5708
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-06 18:03:12 +01:00
Tarek BOCHKATI cdb6918c87 arm_adi_v5: enhance command error reporting
avoid the usage of ERROR_COMMAND_SYNTAX_ERROR when
ERROR_COMMAND_ARGUMENT_INVALID is more adequate.

Change-Id: Ic9aaedb93fedd45efee1b39f8ea20185f01af2da
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5654
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-06 18:02:21 +01:00
Antonio Borneo 3b5a24c13b openocd: properly use jim data types
The jim library exports all the data types through typedef, so
there is no need to use the internal struct types.

Fix the few remaining inconsistencies in the code.

Change-Id: Id4ae0083563ea7a371833374e7b39f17158f66a4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5662
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-24 21:36:43 +01:00
Ake Rehnman 2bc24c06d3 stm8 target: make adapter speed settings work
Previously the adapter speed settings were hard-coded to
connect with low speed then switch over to high speed
regardless what was mentioned in the cfg files. Now the
stm8 target intercept adapter speed settings and configure
the stm8 control registers accordingly.

Change-Id: I7419514e5214e4b43b9d51253cf5b7f04a233533
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/5548
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24 21:34:48 +01:00
Antonio Borneo ac05f929ed swim: fix adapter speed handling
SWIM transport only supports two adapter speeds:
- "low speed"  equal to 363 kHz (8 MHz / 22)
- "high speed" equal to 800 kHz (8 MHz / 10)

Replace the previous convention that use "0" or "1" for "low" or
"high" speed with the effective speed in kHz.
Rework the implementation of stlink_speed_swim().
Set low speed in the stm8 config files, because only low speed is
permitted at debug connection; the previous code ignores the
initial value.

Change-Id: I2484c9419a2c554c59eb6b9216339393ab0b54f3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5529
Tested-by: jenkins
2020-05-24 21:31:21 +01:00
Antonio Borneo ac18e960ce swim: abstract the transport in stm8 target
SWIM is implemented by (ab)using the HLA API. This was acceptable
when OpenOCD code did not provided a clear separation between
transports and related APIs. Still today SWIM in OpenOCD is only
supported by STLink, so the decision to re-use the HLA API was the
simpler way to implement it.
After commit efd1d64222 ("adapter: switch from struct
jtag_interface to adapter_driver") the transports API are better
split and SWIM can be implemented as a separate set of API. This
would open the possibility to extend OpenOCD for other adapters
that provide SWIM, e.g. versaloon, or through SPI emulation [1].

Introduce a new set of files swim.[ch] to handle the SWIM API.
Beside the API that almost match the transport low-level data
communication (system_reset, read_mem, write_mem), add a further
API reconnect. Today, inside HLA STLink code, the reconnect is
implemented by hacking the HLA API state(). Please notice that
due to this hack the return type is incorrect; stlink_usb_state()
returns ERROR_OK in SWIM mode, while its return type is enum
target_state. Ignore the type mismatch and still call the HLA API
state in the new SWIM API reconnect. Further commit will fix it.

[1] http://kuku.eu.org/?projects/stm8spi/stm8spi

Change-Id: I52018e1e2200cbd41af8e5031f7b35dc761b61d6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5528
Tested-by: jenkins
2020-05-24 21:29:42 +01:00
Tarek BOCHKATI ac870d80a9 arm_disassembler: fix typo 'ARM_UNKNOWN_INSTUCTION' to '.._INSTRUCTION'
Change-Id: I3a3d566fe96fb1497cf8337389e993e0f728a64b
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5657
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24 21:26:47 +01:00
Antonio Borneo 11c5efd2ec target/arc: fix build with clang
Commit da41bce3ae ("target/arc: introduce breakpoint
functionality") introduces a mismatch between the format string
and one int constant.

Change the format string to match the int constant.

Change-Id: I0d59552205551b90e165c0a2e3fef247ad0c7701
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: da41bce3ae ("target/arc: introduce breakpoint functionality")
Reviewed-on: http://openocd.zylin.com/5655
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-05-14 20:28:24 +01:00
iosabi dadf46f618 cortex_m: make bit fields in cortex_m unsigned.
Expression like (0xffff << 16) evaluate to type int, which is not able
to hold that value, producing a warning when compiling with
-fsanitize=undefined. This patch makes most of the cortex_m constants
unsigned using the BIT() macro or appending "ul" when possible to fix
the undefined behavior warning.

Signed-off-by: iosabi <iosabi@protonmail.com>
Change-Id: I7af194305ef612d7a32e74eaf9f11dd85fa87f32
Reviewed-on: http://openocd.zylin.com/5583
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-12 06:05:45 +01:00
Antonio Borneo 59cc1f6629 coding style: open function's brace at beginning of new line
Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types OPEN_BRACE -f {} \;

Change-Id: I6d1356ed11e2699525f384efb7556bc2efdc299f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5628
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-05-09 14:41:31 +01:00
Antonio Borneo e41c3f78d1 coding style: wrap lines longer than 120 chars
The coding style is quite permissive allowing 120 chars per line,
but abuses are still present.
Fix them, wrapping the lines.

Change-Id: I94d66b651d759a60ec35f7ba115c43933e70ed69
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5626
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-09 14:40:52 +01:00
Antonio Borneo 1946b50dba coding style: let "else" follow the close brace
The statement "else" should not be on a new line when follows a
close brace '}'. Fix it!

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types ELSE_AFTER_BRACE -f {} \;

Change-Id: I8af247ec3f75a69713d7cb1e73881254d16c189e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5623
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:40:14 +01:00
Antonio Borneo 185834ef8a coding style: add missing space when split strings
Long strings are split across few lines; usually split occurs at
the white space between two words.
Check that the space between the two words is still present.
While there, adjust the amount of space between words.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types MISSING_SPACE -f {} \;

Change-Id: I28b9a65564195ba967051add53d1c848c7b8fb30
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5620
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:44 +01:00
Antonio Borneo 4f459660a9 coding style: avoid unnecessary line continuations
Line continuation, adding a backslash as last char of the line, is
requested in multi-line macro definition, but is not necessary in
the rest of C code.

Remove it where present.

Identified by checkpatch script from Linux kernel v5.1 using the
command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types LINE_CONTINUATIONS -f {} \;

Change-Id: Id0c69e93456731717a7b290b16580e9f8ae741bc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5619
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:29 +01:00
Antonio Borneo e66bb9d312 coding style: add parenthesis around the argument of sizeof
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like parenthesis.

This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command:

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types SIZEOF_PARENTHESIS --fix-inplace -f {} \;

Change-Id: I8adb325bdb0e13211f8bae8b4770ec1979c176bf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5618
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:19 +01:00
Antonio Borneo 9b29cb58ac coding style: remove useless break after a goto or return
In a switch/case statement, a break placed after a goto or return
is never executed.
The script checkpatch available in Linux kernel v5.1 issues a
warning for such unused break statements.
In the process of reviewing the new checkpatch for its inclusion
in OpenOCD, let's get rid of these warnings.

The script checkpatch is unable to fixup automatically this case.
Thanks to having "break" command using a single code line, this
patch has been generated using the script below:

	find src/ -type f -exec ./tools/scripts/checkpatch.pl -q \
	 --types UNNECESSARY_BREAK -f {} \; \
	| sed -n '/^#/{s/^.*FILE: //;s/:$//;s/:/ /;p}' \
	| awk 'function P() {print "sed -i '\''"b"'\'' "a};
	       {
	         if ($1!=a) {
	           if (a) {P()};
	           a=$1;
	           b=$2"{d}";
	         } else {
	           b=b";"$2"{d}"
	         }
	       };
	       END {P()}'

Change-Id: I56ca098faa5fe8d1e3f712dc0a029a3f10559d99
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5617
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:05 +01:00
Evgeniy Didin da41bce3ae target/arc: introduce breakpoint functionality
With this patch we introduce set/unset breakpoints
routines and add/remove bp handlers.
Currently soft breakpoints are only supported.

Changes since v1:
* Change if-statement in arc_remove_breakpoint
* Squash changes from http://openocd.zylin.com/#/c/5641/
  in this commit to fix build.

Change-Id: Ib10ccdb02fd1606e4f407f012b1bee106a8ffccd
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5641
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-05-08 21:23:05 +01:00
Evgeniy Didin c693508f77 target/arc: introduce arc_read/write_instruction functions
This commit introduces helper instruction read/write functions
for further bp functionality.

Change-Id: I619fbe2870ef6365c29ed1618bb83b6f7eb84690
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5640
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-05-08 15:09:46 +01:00
Evgeniy Didin 0af37282c7 target/arc: Add initial stepping functions
Change-Id: I84845f2ec6f1cff975990f0a495165a02de33227
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5643
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-05-08 05:57:12 +01:00
Tomas Vanek e888fe3987 target/armv7m: cosmetic refactorization
Introduce a variable 'size' and reduce the number of dereferencing
*reg_list_size by using the variable.

Change-Id: I3bdf1485a4ed8e34435e8acb3efd0df8d802508c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5326
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-03 21:42:23 +01:00
Antonio Borneo 6572dd97b3 coding style: src: remove empty lines at end of text files
Empty lines at end of text files are useless.
Remove them.

Change-Id: Ibac9b36682d58f81e34ca2b51e6260e7d472fb0e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5172
Tested-by: jenkins
2020-05-02 15:40:21 +01:00
Kevin Burke 86cf8d9fb0 target/armv8: Add ARM target name on halt status
The CPU target name is added to the HALT status message so the user
can see which target halted at the designated program counter.

Tested on an Ampere eMAG8180 and Quicksilver silicon

Change-Id: I51e6f21296c85a822df28c5b7c4068e8ff66f29e
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5571
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-24 17:39:41 +01:00
Tomas Vanek ff9ee132e5 target/armv7m: minor fixes of target algo exit point check
Introduce a new ERROR_TARGET_ALGO_EXIT as currently used
ERROR_TARGET_TIMEOUT should be reserved for the timeout only.

Do not load PC directly from CPU HW as the register value
has already been cached.

Change-Id: I0d3630da41fd021676789dc12b52545cc0432ba8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5329
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-21 16:49:02 +01:00
Florian Fainelli 5c6e32612d Remove BUILD_TARGET64
BUILD_TARGET64 creates a larger test matrix and mostly gates the
building of the aarch64/armv8 target, make that unconditional, which
would help fixing any issues with 64-bit address types anyway.

Rebased by Antonio Borneo after commit 1fbe8450a9 ("mips: Add
MIPS64 support")

Change-Id: I219f62b744d540d9dde9a42e6b63fd7d91df3dbb
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5240
Tested-by: jenkins
2020-04-21 12:55:41 +01:00
Evgeniy Didin ea4f98046f target/arc: remove saving context during reset
In arc_poll() function we handle the cases, when jtag indicates, that
processor is halted, but target->state is not TARGET_HALTED.
In case, when processor was halted and target->state was TARGET_RUNNING,
we should save context. At the same time if target->state was TARGET_RESET
we do not need to save context.

Changes: 16.04:
Fix - Move setting target->state = TARGET_HALT after
"target->state == TARGET_RUNNIG" check, otherwise
this check makes no sense

Change-Id: I92ab6ec71cf58273bb8401d14a562035de3deab4
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5524
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-20 18:22:53 +01:00
Antonio Borneo 17ac52360f cortex_m: remove deprecation for soft_reset_halt
The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe3295 ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
It also get useful to handle the reset on some problematic chip,
as in http://openocd.zylin.com/5489

Replace the warning about deprecation with a more light debug
message.

Change-Id: I52de6359475ba31014ae77e596a87fe88b252177
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5514
Tested-by: jenkins
Reviewed-by: Edward Fewell <efewell@ti.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-12 22:03:22 +01:00
Antonio Borneo 4873503ae4 cortex_a: don't wait for target halted in deassert_reset()
The tcl script src/target/startup.tcl has already the proper
centralized support to wait for all targets to halt after the
command "reset halt". The extra wait in cortex_a_deassert_reset()
is not required.
This extra wait is also an issue for multi-core support, because
waiting for one core to halt can delay the halt request to the
other cores.

Replace the indirect call to cortex_a_halt(), that embeds the wait
for halt, with a low-level halt sequence.

The on-going work on the reset framework is compatible with this
change; in fact it keeps in startup.tcl the wait for targets to
halt, even if current code proposal for cortex_a simply removes
the function cortex_a_deassert_reset().

Change-Id: Ic661c3791a29ba7d520e31f85a61f939a646feb5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5472
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-12 22:03:00 +01:00
Jan Matyas 25efc15069 target: added events TARGET_EVENT_STEP_START and _END
Events TARGET_EVENT_STEP_START and TARGET_EVENT_STEP_END
have been added - analogous to already existing events
TARGET_EVENT_RESUME_*.

This is an example of a concrete use case where having
these events is important:

In RISC-V processors without Debug Program Buffer, OpenOCD
cannot execute fence/fence.i when resuming or single-
stepping. With these events implemented, the user can
instead provide custom operations to achieve that same
effect prior to resuming the processor.

Change-Id: I786348ff08940759d99b0f24e9e0ed5a44581094
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5551
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
2020-04-09 11:06:39 +01:00
Tarek BOCHKATI 4ce4aa752b armv8: log the register name which we failed to read or write
when openocd fails to read armv8 register, the user is not informed
which register has caused the error.

for example, in AArch32 state ESR_EL3 read/write is not supported,
thus armv8_dpm_read_current_registers is always failing without mentioning
which register has caused the error.

Change-Id: I24c5abbda9fac24fb77a01777ed15261aeaaf800
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5516
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-05 14:11:43 +01:00
Evgeniy Didin f00070edaf target/arc_cmd: Improve argument checks for commands
Add more argument check for "add-reg" command.

Changes since first revision:
-Removed arguments limitation(50 maximum) for "arc_set_reg_exists".

Changes:
25.03:
Removed inconsistency in "add-reg" function. Actually
"-type" option is optional and if it is not set,
register type is "int".

Change-Id: Ia21e6baf4fbda162f7811cd0fe305fc86ddafcfd
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5523
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-27 07:09:41 +00:00
Marc Schink 5ceae0eef4 target: Add possibility to remove all breakpoints
Change-Id: I46acd57956846d66bef974e0538452462b197cd0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4916
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-26 19:30:45 +00:00
Marc Schink 9960e805b3 target: Add function to remove all breakpoints
Change-Id: I4718926844a2c8bcfd78d7a8792f6ded293548ef
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4915
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-26 19:30:34 +00:00
Marc Schink aff486b6a0 rtos: Destroy RTOS and fix memory leak
The memory leak can be reproduced by using an arbitrary RTOS
and valgrind:

 $ valgrind --leak-check=full --show-leak-kinds=all

[...]
==9656== 224 (80 direct, 144 indirect) bytes in 1 blocks are definitely lost in loss record 3 of 3
==9656==    at 0x483CD99: calloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
==9656==    by 0x1C541A: os_alloc (rtos.c:79)
==9656==    by 0x1C569E: os_alloc_create (rtos.c:111)
==9656==    by 0x1C569E: rtos_create (rtos.c:153)
==9656==    by 0x1AE332: target_configure (target.c:4899)
==9656==    by 0x1AF228: jim_target_configure (target.c:4952)
==9656==    by 0x1C9EF9: command_unknown (command.c:1066)
==9656==    by 0x313284: JimInvokeCommand (jim.c:10364)
==9656==    by 0x313FB6: Jim_EvalObj (jim.c:10814)
==9656==    by 0x3154A3: Jim_EvalFile (jim.c:11207)
==9656==    by 0x316015: Jim_SourceCoreCommand (jim.c:15230)
==9656==    by 0x313284: JimInvokeCommand (jim.c:10364)
==9656==    by 0x313B8B: JimEvalObjList (jim.c:10605)
[...]

Change-Id: I2cd41a154fb8570842601ff4e3e76502f5908f49
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5479
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-17 16:40:14 +00:00
Antonio Borneo b5d2b1224f target/cortex_a: add hypervisor mode
Hypervisor mode is present only if the optional virtualization
extensions are available. Moreover, virtualization extensions
require that also security extensions are implemented.

Add the required infrastructure for the shadowed registers in
hypervisor mode.
Make monitor shadowed registers visible in hypervisor mode too.
Make hypervisor shadowed registers visible in hypervisor mode
only.
Check during cortex_a examine if virtualization extensions are
present and then conditionally enable the visibility of both
hypervisor and monitor modes shadowed registers.

Change-Id: I81dbb1ee8baf4c9f1a2226b77c10c8a2a7b34871
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5261
Tested-by: jenkins
2020-03-12 10:11:19 +00:00
Antonio Borneo 6900c5af4e armv7a: access monitor registers only with security extensions
Accordingly to ARM DDI 0406C at B1.5, the security extensions for
armv7a are optional extensions and can be detected by reading
ID_PFR1.
The monitor mode is part of the security extensions and the shadow
registers "sp_mon", "lr_mon" and "spsr_mon" are only present with
the security extensions.

Read the register ID_PFR1 during cortex_a examine, determine if
security extension is present and then conditionally enable the
visibility of the monitor mode shadow registers.

Change-Id: Ib4834698659046566f6dc5cd35b44de122dc02e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5259
Tested-by: jenkins
2020-03-12 10:10:33 +00:00
Antonio Borneo 9626402c5a target/armv4_5: remove unused macro
The macro ARMV4_5_CORE_REG_MODENUM() is unused.
Remove it!

Change-Id: I183df57bd86c9428710ea3583e43fba88fd26e0a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5260
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2020-03-12 10:09:15 +00:00
Antonio Borneo fba438fde7 arm: Use different enum for core_type and core_mode
The fields core_type and core_mode use the same enum arm_mode
but encode different information, making the code less immediate
to read.

Use a different enum arm_core_type for the field core_type.
The code behavior is not changed.

Change-Id: I60f2095ea6801dfe22f6da81ec295ca71ef90466
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5258
Tested-by: jenkins
2020-03-12 10:05:42 +00:00
Antonio Borneo f447c31b30 arm: fix reg num for Monitor mode
Commit 2efb1f14f6 ("Add GDB remote target description support
for ARM4") inserts two additional registers "sp" and "lr" in the
table arm_core_regs[], thus shifting by two the position of the
last three registers already present
	"sp_mon" moved from index 37 to 39
	"lr_mon" moved from index 38 to 40
	"spsr_mon" moved from index 39 to 41
Part of the code is updated (e.g. enum defining ARM_SPSR_MON and
array arm_mon_indices[]), but it's missing the update of mapping
in armv4_5_core_reg_map[].

Fix armv4_5_core_reg_map[].

Change-Id: I0bdf766183392eb738206b876cd9559aacc29fa0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 2efb1f14f6 ("Add GDB remote target description support for ARM4")
Reviewed-on: http://openocd.zylin.com/5257
Tested-by: jenkins
2020-03-12 10:05:30 +00:00
Antonio Borneo 939febecca target: fix crash with jimtcl 0.78
The jimtcl commit 41c5ff1809f5 ("jim.c: Fix Object leak in zlib
support") https://repo.or.cz/jimtcl.git/commit/41c5ff1809f5
makes Jim_SetResultFormatted() freeing the parameters that have
zero refcount.

OpenOCD commit 559d08c19e ("jim tests: use installed") adds the
only code instance in OpenOCD that first passes a zero refcount
object to Jim_SetResultFormatted() and then frees it.
By switching jimtcl version to 0.78 or newer this causes a crash
of OpenOCD.
To trigger the crash in a telnet session, check that the current
target is running and type:
	[target current] arp_waitstate halted 1

Remove the call to Jim_FreeNewObj() after the call to
Jim_SetResultFormatted().

Change-Id: I5f5a8bca96a0e8466ff7b789fe578ea9785fa550
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5453
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-12 10:03:57 +00:00
Tarek BOCHKATI 221fe49879 semihosting: add semihosting handlers to AArch64
note: this works only when the PE is in AArch64 state

Change-Id: Id6a336ca7d201df72bd1aaaeccce4185473fc1bd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5474
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:48:56 +00:00
Matthias Welwarsky afe899f938 cortex_a: warn on broken debug_base setting
A common problem with target configurations appears to be broken
debug base address configuration. ARM DDI0406C.d specifies in App. D,
1.4.1, that bit 31 of the debug base address serves as identification
of an external debugger, as opposed to an internal access to memory
mapped debug registers by the CPU. External accesses are treated
as privileged and require no debug authentification via the lock
access register.

Sometimes the base address of a debug component is wrong even
in the targets' ROM table. In this case, the correct base address
must be specified using the -dbgbase argument when creating the
target.

This patch adds a warning when bit 31 of the debug base address
is not set, as a hint to the user.

Change-Id: I9c41d85a138123c657ef655e3436a2aa39249dcc
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/5105
Tested-by: jenkins
Reviewed-by: Tommy Vestermark <tov@vestermark.dk>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:48:25 +00:00
Tarek BOCHKATI a8b1bd8376 target/armv8_opcodes: use T32 instructions when the PE is in AArch32 state
As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a)
in Chapter H4.3 DCC and ITR access modes:
    Writes to EDITR trigger the instruction to be executed if the PE
    is in Debug state:
      - If the PE is in AArch64 state, this is an A64 instruction.
      - If the PE is in AArch32 state, this is a T32 instruction

But in armv8_opcodes specifically in t32_opcodes we were using some
A32 instructions for HLT, LDRx and STRx opcodes.

Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access
when the PE is in AArch32 state.

Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5346
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:47:08 +00:00
Tarek BOCHKATI a154973896 target/aarch64: fix soft breakpoint when PE is in AArch32 state
Before this patch aarch64_set_breakpoint was using either A64, or A32
HLT opcode by relying on armv8_opcode helper.
This behaviors ignores the fact that in AArch32 state the core could
execute Thumb-2 instructions, and gdb could request to insert a soft
bkpt in a Thumb-2 code chunk.

In this change, we check the core_state and bkpt length to know the
correct opcode to use.

Note: based on https://sourceware.org/gdb/current/onlinedocs/gdb/ARM-Breakpoint-Kinds.html
      if bkpt length/kind == 3, we should replace a 32-bit Thumb-2 opcode,
      then we use twice the 16 bits Thumb-2 bkpt opcode and we fix-up the
      length to 4 bytes, in order to set correctly the bpkt.

Change-Id: I8f3551124412c61d155eae87761767e9937f917d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5355
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:46:43 +00:00
Tarek BOCHKATI 4845b54372 target/aarch64: fix minor stepping issue with gdb
when using step command from gdb the step happens without any issue,
but aarch64_step call explicitly aarch64_poll which consumes the
status change to HALTED, so it does not inform gdb that the step has
finished.

by removing this call, all is back to normal and openocd could inform gdb
that the step has finished.

Change-Id: I9366aecd20f7d52259b050b8653189b67d9299d0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5354
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:45:36 +00:00
Tomas Vanek 9f4659ae6b target: add examine-fail event
A configuration script may want to check the reason why examine fails
e.g. device has security lock engaged.

tcl/target/kx.cfg and klx.cfg is modified to use the new event
for testing of the security lock of Kinetis MCU

Change-Id: Id1d3a79d24e84b513f4ea35586cd2ab0437ff9b3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4289
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:43:55 +00:00
Tarek BOCHKATI a99bf2ea94 semihosting: reorganize semihosting commands
the same semihosting handlers chain is declared twice:
 1. in src/target/armv4_5.c
 2. in src/target/riscv/riscv.c

to make it simpler we moved the declaration into
'src/target/semihosting_common.c' under semihosting_common_handlers[].
then we used this into both of armv4_5.c and riscv.c

Change-Id: If813b3fd5eb2476658f1308f741c4e805141f617
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5473
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Liviu Ionescu <ilg@livius.net>
2020-03-10 20:20:22 +00:00
Tomas Vanek a2e822834d helper/binarybuffer: fix clang static analyzer warnings
Writing bits to an uninitialized buffer generated false warnings.
Zero buffers before setting them by buf_set_u32|64()
(do it only if bit-by-bit copy loop is used,
zeroed buffer is not necessary if a fast path write is used)

Change-Id: I2f7f8ddb45b0cbd08d3e249534fc51f4b5cc6694
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5383
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-03-07 15:30:05 +00:00
Tomas Vanek 4e981bc27c target/arm920t: fix clang static analyzer warning
Change-Id: I570dfb8b20a3f187f1fe660343cf0b75691e2c30
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5375
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07 15:29:44 +00:00
Evgeniy Didin 39d54ee969 target/arc: fix clang static analyzer warnings
Fixes:
* Removed typo in *bitfields initializations.
* Removed potentional memory leak allocating
  reg_data_type_struct_field/reg_data_type_flags_field objects.
* Initialize buffers with "0" before usage in buf_set_u32().
* Removed memory leak in jim_arc_add_reg().

Change-Id: Iefde57cd4a48c4f3350c376475df8642607f52ff
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5480
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-29 15:58:21 +00:00
Evgeniy Didin 9ee9bdd2f9 Introduce ARCv2 architecture related code
This patch is an initial bump of ARC-specific code
which implements the ARCv2 target(EMSK board) initializing
routine and some basic remote connection/load/continue
functionality.

Changes:
03.12.2019:
-Add return value checks.
-Using static code analizer next fixes were made:
        Mem leak in functions:
                arc_jtag_read_memory,arc_jtag_read_memory,
                arc_jtag_write_registers, arc_jtag_read_registers,
                jim_arc_add_reg_type_flags, jim_arc_add_reg_type_struct,
                arc_build_reg_cache, arc_mem_read.
        Dead code in "arc_mem_read";
        In arc_save_context, arc_restore_context correct arguments
        in"memset" calls.
        In "build_bcr_reg_cache", "arc_build_reg_cache" check
        if list is not empty.

29.12.2019
-Moved code from arc_v2.c to arc.c
-Added checks of the result of calloc/malloc calls
-Reworked arc_cmd.c: replaced spagetty code with functions
-Moved to one style in if statements - to "if(!bla)"
-Changed Licence headers

22.01.2020
-Removed unused variables in arc_common
-Renamed register operation functions
-Introduced arc_deinit_target function
-Fixed interrupt handling in halt/resume:
        * add irq_state field in arc_common
        * fix irq enable/disable calls ( now STATUS32 register is used)
-Switched from buf_set(get)_us32() usage to target_buffer_set(get)_u32()
-Made some cleanup

30.01.2020
-Removed redundant arc_register struct, moved target link to arc_reg_desc
-Introduced link to BCR reg cache in arc_common for freeing memory.
-Now arc_deinit_target frees all arc-related allocated memory.
	Valgrind shows no memory leaks.
-Inroduced arch description in arc.c

01.02.2020
-Remove small memory allocations in arc_init_reg. Instead created reg_value
	and feature fields in arc_reg_desc.
-Add return value for arc_init_reg() func.
-Replaced some integer constants(61,62,63) with defines.
-Removed redundant conversions in arc_reg_get_field().
-Moved iccm/dccm configuration code from arc_configure()
	to separate functions.

19.02.2020
-Change sizeof(struct) to sizeof(*ptr) in allocations
-Changed if/while(ptr != NULL) to if/while(ptr)
-Removed unused variables from struct arc_jtag
-Add additional structs to arc_reg_data_type
 to reduce amount of memory allocations calls
 and simplifying memory freeing.
-Add helper arc_reg_bitfield_t struct which includes
 reg_data_type_bitfield object and char[] name. Reduces
 memory allocations calls.
-Add limit for reg_type/reg_type_field names(20 symbols).
-Add in jim_arc_add_reg_type*() functions additional
 argnument checks(amount of field/name size).
-In jim_arc_add_reg_type*() reduced amount of memory allocations.
-Cleanup of jim_arc_add_reg_type*() functions.
-For commands update ".usage" fields according docopt.
-Cleanup in arc_jtag.c
-Renamed functions which require jtag_exeutre_queue() to arc_jtag_enque_*()
-Add arc_jtag_enque_register_rw() function, which r/w to jtag ir/dr regs
 during regiter r/w.

24.02:
-Change include guards in arc* files according coding style
-Remove _t suffix in struct arc_reg_bitfield_t
-Some cleanup

Change-Id: I6ab0e82b12e6ddb683c9d13dfb7dd6f49a30cb9f
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5332
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-27 06:46:51 +00:00
Antonio Borneo e7306d361b coding style: fix space around pointer's asterisk
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like spacing.

This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command
	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types POINTER_LOCATION --fix-inplace -f {} \;
then manually reviewed.

OpenOCD coding style does not mention the space around pointer's
asterisk, so no check is enforced. This patch only makes the style
uniform across the files.

The patch only changes amount and position of whitespace, thus
the following commands show empty diff
	git diff -w
	git log -w -p
	git log -w --stat

Change-Id: Iefb4998e69bebdfe0d1ae65cadfc8d2c4f166d13
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5197
Tested-by: jenkins
2020-02-24 10:30:36 +00:00
Antonio Borneo beb610555a adi_v5_dapdirect: fix connect under reset
Deassert the reset only if connect under reset is not required;
otherwise, assert the reset.
This fix aligns the behavior of connect under reset in dapdirect
with the behavior in jtag and swd.

Change-Id: I937ef4320b44e51ef6cb0e349e12348dbfbe4abb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5415
Tested-by: jenkins
2020-02-24 10:28:46 +00:00
Tomas Vanek 35f846fd52 target/adi_v5_swd: fix clang static analyzer warning
Change-Id: I24b3e74b62fad469e3150ad97a10a9ab69c2793b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5374
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-23 21:36:36 +00:00
Antonio Borneo 5481401514 armv8: check the core state to pass the correct arch to gdb
Commit 3799eded67 ("target/aarch64: add support for
multi-architecture gdb") passes the constant string "aarch64" as
architecture to gdb. This is not working if the core is running
in 32 bits mode; gdb reports:
	Truncated register 8 in remote 'g' packet
then closes the connection with OpenOCD.

Make the architecture string dependant from the current state of
the core.

Change-Id: I16e1614ea02ba29bf87f450b3dfe25c83c9a3612
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5234
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2020-02-15 15:38:39 +00:00
Antonio Borneo 8105c46ba5 coding style: remove unnecessary parentheses
Identified by checkpatch script from Linux kernel v5.1 using the
command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types UNNECESSARY_PARENTHESES -f {} \;

then fixed manually.

Change-Id: Ia2d9a0953d9b89fc87dc1195aa05c7f63c068c48
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5196
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-15 15:37:20 +00:00
Antonio Borneo b5c883f298 target/nds32: fix type of magic number
The macro NDS32_COMMON_MAGIC was cast-ed to int to avoid compile
time error for comparison type mismatch while comparing it with
the field common_magic.
This is incorrect because the macro value is a 32 bit unsigned
value; better changing the type of the field common_magic to keep
the unsigned value.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types TYPECAST_INT_CONSTANT -f {} \;

Change-Id: Ib5924b6cecdffe70ab5c78d3b30a9c8e4deb7c7b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5193
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-15 15:36:56 +00:00
Oleksij Rempel 70babcc00b move ftdi_location deprecation helper to proper place
Change-Id: I927d4e918acbf321aea1dd7a8de95fbaa8fbbbf0
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/5278
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-01-29 05:35:36 +00:00
Tomas Vanek dc95dd036f target/arm_cti: fix regression from Tcl_return_values series
Since commit 7f260f5009 native OpenOCD
command handlers should not directly use Jim_SetResult functions.
The Tcl result of a native command is built as concatenation of
command_print() strings and Jim_SetResult() is called after return
of the command handler.

Replace "wrong number of args" error messages (now not delivered to user)
by simply return ERROR_COMMAND_SYNTAX_ERROR

Change-Id: I40c1374a13859cefbdef68e0f1c13ab93538bd50
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5363
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-01-27 09:19:17 +00:00
Jiri Kastner f98099507f mips_ejtag: there is no DCR.MIPS64 bit
available revisions (2.60, 3.10, 5.06 and 6.10) of
MD00047 (EJTAG specification), have only in IMPCODE
MIPS32/MIPS64 bit/flag.

Change-Id: If9191b6ced760c59bb7551bb041cd72b0a060bb1
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4628
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2020-01-20 06:28:49 +00:00
Tomas Vanek 7fffa3cbc6 target/xscale: remove duplicated command
Reported by clang static analyzer.

Change-Id: I893af10852af4885507ed62d024008159a80dd56
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5382
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:46:38 +00:00
Tomas Vanek af0dda8266 target/etm: add check for calloc error
and fix one more clang static analyzer warning.

Change-Id: I17f03e318e1cf7617e7f753e7ca960552be547e5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5381
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:46:27 +00:00
Tomas Vanek fe6bb7eac8 target/semihosting_common: fix minor memory leak
Reported by clang static analyzer.

Change-Id: Ie663f49d92588c0d8b502cfdd8fc34004b308066
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5380
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:46:12 +00:00
Tomas Vanek 57afa176ce target/target: fix clang static analyzer warnings
Change-Id: I23e6586be60915f21a7179a994a1ec93fb9b2c36
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5379
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:58 +00:00
Tomas Vanek b04d9c05f0 target/avr32_jtag: fix error returns
Fixed only 2 error returns discovered by clang static analyzer.
There are obviously many more missing error tests in avr32_jtag.c
These was not fixed to keep this change minimal.
Not tested with hw.

Change-Id: I6c79f6248db774990ddb42c0dacdb621651ed69e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5378
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:37 +00:00
Tomas Vanek 8bb1998e6a target/arm_dpm: add missing error returns
Discoverd by clang static analyzer.

Change-Id: I93d5de0a36216e62b170fe8cc870431226a7777f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5377
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:30 +00:00
Tomas Vanek 5dd5cf26bd target/arm946e: add missing error detection
Discoverd by clang static analyzer.
While on it remove useless type casts from arm946e_read_cp15() parameter.

Change-Id: I549e19685b431400243800ee0f7d1bbe6cdb14b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5376
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:19 +00:00
Christopher Head ed8fa09cff target/target: parse value as proper type
The `value` variable is passed into `target_fill_mem` as its
second-to-last parameter. That parameter is of type `uint64_t`. It is
appropriate to parse the value as that type, since otherwise a target
with a 32-bit address space but 64-bit data write capabilities would not
be able to exercise those capabilities.

Change-Id: Ib336d47d42c27cd2b5ba1206b04e8f740f167dba
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5219
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-01-14 11:41:11 +00:00
Antonio Borneo 944d3e6771 stlink: add DAP direct driver
STLINK-V3 and the new firmware V2J24 for ST-LINK/V2 provide API
to directly access the DAP registers.
This mode permits to use the native target in cortex_m.c, with no
need to override it with the target in hla_target.c.
Other advantages wrt HLA are: support for Cortex-A cores, support
for SoC multi-core and/or multi AP, support for OpenOCD commands
"dap" thus including control of CSW.
This obsoletes the existing HLA driver for ST-Link, that should
anyway be kept for those cases where it's not possible to update
the ST-Link firmware.

This commit introduces the minimal implementation for direct DAP
access. The implementation is much slower than the HLA because
every memory transfer requires several USB packets. Further
commits will close the performance gap.
The whole ST-Link driver is compiled under BUILD_HLADAPTER, to
remove the need to split the driver between the two modes. This
has to be reworked, but it's quite invasive!
A new interface file stlink-dap.cfg is added and should be used
in place of stlink.cfg to enable the DAP mode.
Documentation is updated and reports limitation on the maximum AP
number that can be accessed by ST-Link for some firmware already
tested.

Change-Id: I932ffe16bc81d00b1fe489e2944fda13470cce9b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4904
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:40:36 +00:00
Antonio Borneo a61ec3c1d7 adi_v5_dapdirect: add support for adapter drivers that provide DAP API
Some high level adapters, like STLINK-V3 and new firmware for
ST-Link/V2, provide API to directly access the DAP registers
hiding the details of the physical transport JTAG or SWD.
OpenOCD has already the intermediate API in struct dap_ops that
are suitable for such adapters, but are not exposed to the
adapter drivers.

Add in struct adapter_driver two independent struct dap_ops for
the cases of physical JTAG and SWD transport.
Add new transport names "dapdirect_jtag" and "dapdirect_swd", to
be used by the drivers that provide one or both DAP API.
Add the necessarily glue in target/adi_v5_dapdirect.c

Change-Id: I2bb8e3a80fba750f2c218d877cfa5888428e3c28
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4903
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:40:25 +00:00
Antonio Borneo efd1d64222 adapter: switch from struct jtag_interface to adapter_driver
To reorganize the adapters code, introduce an adapter_driver
struct that contains all the adapter generic part, while
keeping in two separate struct the specific API jtag_ops and
swd_ops.
Move the allocation of *adapter_driver from the JTAG-specific
file core.c to the more adapter-specific file adapter.c
While splitting the old jtag_interface for every driver, put
the fields in the same order as in the struct declaration so
we keep a consistent code across all the drivers.

While other transport specific API could/would be added as
separate ops, nothing is done here for HLA.

Change-Id: I2d60f97ac514c0dd2d93a6ec9be66fd9d388dad5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4900
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:39:37 +00:00
Antonio Borneo 0f24549ce9 hla: use the new system_reset API
HLA uses its own internal driver's API to control the adapter's
system reset, but at the same time it calls jtag_add_reset() to
avoid breaking the internal logic of OpenOCD. This implicitly
forces HLA to rely on jtag queue mechanism, even if HLA has no
link with JTAG state machine. It requires HLA to implement an
empty execute_queue() to comply with the JTAG queue.

Modify the HLA framework and the HLA targets to use the new
adapter API for system_reset and decouple HLA from JTAG queue.
Rename the HLA static functions adapter_assert_reset() and
adapter_deassert_reset() to avoid overlap with the global
functions with same name.
While there, fix a minor typo in a comment s/incase/in case/.

Do not remove from HLA the JTAG specific API execute_queue(),
even if not required anymore, because OpenOCD code still has
calls to jtag_execute_queue() in case of non JTAG transport.

Change-Id: I0e65e3e557bd665bd3d3aeaa84ea609b55a05e48
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4896
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:37:34 +00:00
Antonio Borneo 8850eb8f2c swd: get rid of jtag queue to assert/deassert srst
The transport SWD uses the JTAG queue to assert/deassert the
system reset srst. This is the major inconsistency that has to be
removed to properly split JTAG and SWD.

Introduce a new driver API, reset(), to controls both the signals
trst and srst in the driver, skipping the JTAG queue. Put the new
API in struct jtag_interface, even if in this patch it's used for
SWD only; the goal is to get it reused by the other transports.

Add the implementation of the API in all the drivers that
implement SWD. Such implementation is almost the same of the old
code in JTAG queue.

Create a wrapper adapter_system_reset() to use the new API and
remove the SWD specific swd_add_reset(). In the wrapper replace
jtag_add_sleep() with jtag_sleep(), because the former uses the
JTAG queue too.
Rename the old jtag_add_reset() as legacy_jtag_add_reset() with
the target to remove it when all drivers would be ported to the
new reset API. Create a new jtag_add_reset() that calls the
legacy function for drivers still on the old reset API.

Use the new API also on JTAG transport for the drivers that can
support both SWD and JTAG.

For the moment, do not modify the implementation of JTAG-only
drivers, which will continue using the usual method. This should
be cleaned-up in future commits.

Change-Id: I32331c88313f6059b25e12c6bb0156aebc1c074f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4895
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:15:12 +00:00
Antonio Borneo be2d25efcc arm_adi_v5: add API send_sequence() and use it
The method to send an arbitrary sequence to DAP depends on the
transport and is thus different on JTAG and SWD. This is already
coded in dap_to_jtag() and dap_to_swd().

Add a new API send_sequence() in struct dap_ops.
Add the implementations of send_sequence() in adi_v5_jtag.c and
adi_v5_swd.c
Rewrite dap_to_jtag() and dap_to_swd() using the new API.
Move the enum swd_special_seq in arm_adi_v5.h to solve a circular
dependencies among swd.h and arm_adi_v5.h

Change-Id: I9db13a00f129761eab283783c094cfff2dd92610
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4902
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:24:54 +00:00
Tarek BOCHKATI 0750a7c085 target/arm_cti: add new 'ack' and 'channel' commands
these commands have been introduced to ease the manipulation of CTI trough
script files, these commands are:
 - $cti_name ack $event : to acknowledge a CTI event
 - $cti_name channel $channel_number $operation: to perform an operation
    on a specific channel, the possible operations are:
    gate, ungate, set, clear and pulse

Change-Id: I35463867a3c85072f3776c3aeb1e5788953ec435
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5315
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-01-02 21:19:27 +00:00
Marc Schink 2dc88e1479 target/armv7m_trace: Improve SWO frequency auto-detection
The SWO frequency auto-detection with J-Link adapters does not work
properly in the current implementation. This is because the trace layer
has only information about the highest possible SWO frequency supported
by the adapter. With that the trace layer calculates the SWO prescaler
which usually leads to a frequency deviation greater than what is
permitted by J-Link adapters.

Move the calculation of the SWO prescaler from the trace layer into the
trace configuration of the adapter to overcome this problem.
The adapter has the necessary information to choose a suitable SWO
frequency and calculate the corresponding prescaler that complies with
the maximum allowed frequency deviation.

Tested with:
  - STM32L152RC Discovery Kit (ST-Link)
  - EFM32GG-STK3700 (J-Link)

Change-Id: I38ff2b89d32f0a92c597989b590afe5c75cf4902
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3903
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-12-21 19:25:32 +00:00
Antonio Borneo e8d4074cf8 target/armv4_5: use c99 array designator to init arm_core_regs[]
During code analysis and development, counting again and again the
lines to find the index of the register is a boring error-prone
brain-damaging activity.
Use the c99 syntax and add once forever the array designators to
specify the index values.
The code behavior is not changed.

Change-Id: I2c70f70794475679efb91a8dfadc00f50715bd3f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5256
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:42:41 +00:00
Antonio Borneo f476c9eec4 gdb_server: fix string length with semihosting_fileio
The GDB file-I/O remote protocol extension, used for implementing
the semihosting file I/O, requires the length of strings to
include the trailing zero character, as explicitly stated inside a
comment in GDB source code [1]:
	/* 1. Parameter: Ptr to pathname / length incl. trailing zero.  */

ARM specification for semihosting [2] requires the string length
to not include the trailing zero character, e.g. in SYS_OPEN
specifications:
	"field 3: An integer that gives the length of the string
	 pointed to by field 1. The length does not include the
	 terminating null character that must be present."

The mismatch above requires OpenOCD to add "one" to the string
length before passing it to GDB. Such conversion is missing
either in the generic semihosting provider of the data, the
function semihosting_common(), and in the consumer of the data,
the gdb_server function gdb_fileio_reply().
The conversion is already implemented in the target specific
function nds32_get_gdb_fileio_info(), but it's not the preferred
place for such GDB specific requirement.

This issue affects the semihosting calls "open", "unlink",
"rename" and "system".

Remove the "+1" conversion from nds32_get_gdb_fileio_info().
Add the "+1" conversion in gdb_fileio_reply().

[1] http://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;f=gdb/remote-fileio.c;h=11c141e42c4d#l381
[2] "Semihosting for AArch32 and AArch64, Release 2.0"
    https://static.docs.arm.com/100863/0200/semihosting.pdf

Change-Id: I35461bcb30f734fe2d51f7f0d418e3d04b4af506
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5322
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:40:55 +00:00