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cortex_a: don't wait for target halted in deassert_reset() 

The tcl script src/target/startup.tcl has already the proper
centralized support to wait for all targets to halt after the
command "reset halt". The extra wait in cortex_a_deassert_reset()
is not required.
This extra wait is also an issue for multi-core support, because
waiting for one core to halt can delay the halt request to the
other cores.

Replace the indirect call to cortex_a_halt(), that embeds the wait
for halt, with a low-level halt sequence.

The on-going work on the reset framework is compatible with this
change; in fact it keeps in startup.tcl the wait for targets to
halt, even if current code proposal for cortex_a simply removes
the function cortex_a_deassert_reset().

Change-Id: Ic661c3791a29ba7d520e31f85a61f939a646feb5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5472
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
This commit is contained in:
Antonio Borneo 2020-02-12 22:26:51 +01:00
parent cbbc56f7f7
commit 4873503ae4
1 changed files with 3 additions and 1 deletions
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4
src/target/cortex_a.c
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@ -1703,6 +1703,7 @@ static int cortex_a_assert_reset(struct target *target)
static int cortex_a_deassert_reset(struct target *target)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
int retval;
LOG_DEBUG(" ");
@ -1721,7 +1722,8 @@ static int cortex_a_deassert_reset(struct target *target)
LOG_WARNING("%s: ran after reset and before halt ...",
target_name(target));
if (target_was_examined(target)) {
retval = target_halt(target);
retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
armv7a->debug_base + CPUDBG_DRCR, DRCR_HALT);
if (retval != ERROR_OK)
return retval;
} else