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src/target/arm_adi_v5.c: add Cortex-A35 related entries 

ROM Table registers:
https://developer.arm.com/documentation/100236/0100/debug/rom-table/rom-table-peripheral-identification-registers
Debug reisters:
https://developer.arm.com/documentation/100236/0100/debug/memory-mapped-debug-registers/external-debug-peripheral-identification-registers
PMU registers:
https://developer.arm.com/documentation/100236/0100/debug/pmu-registers/performance-monitors-peripheral-identification-registers
CTI registers:
https://developer.arm.com/documentation/100236/0100/debug/cti-registers/cti-peripheral-identification-registers

Change-Id: Ibd57d91fb9b66bc46929f4e93d0bf23c2a32f11a
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/5773
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This commit is contained in:
Jiri Kastner 2020-07-15 11:30:34 +02:00 committed by Antonio Borneo
parent 765c319277
commit 2f40d069a1
1 changed files with 4 additions and 0 deletions
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4
src/target/arm_adi_v5.c
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@ -1080,6 +1080,7 @@ static const struct {
{ ARM_ID, 0x4a3, "Cortex-A53 ROM", "(v7 Memory Map ROM Table)", },
{ ARM_ID, 0x4a4, "Cortex-A72 ROM", "(ROM Table)", },
{ ARM_ID, 0x4a9, "Cortex-A9 ROM", "(ROM Table)", },
{ ARM_ID, 0x4aa, "Cortex-A35 ROM", "(v8 Memory Map ROM Table)", },
{ ARM_ID, 0x4af, "Cortex-A15 ROM", "(ROM Table)", },
{ ARM_ID, 0x4b5, "Cortex-R5 ROM", "(ROM Table)", },
{ ARM_ID, 0x4c0, "Cortex-M0+ ROM", "(ROM Table)", },
@ -1087,6 +1088,7 @@ static const struct {
{ ARM_ID, 0x4c4, "Cortex-M4 ROM", "(ROM Table)", },
{ ARM_ID, 0x4c7, "Cortex-M7 PPB ROM", "(Private Peripheral Bus ROM Table)", },
{ ARM_ID, 0x4c8, "Cortex-M7 ROM", "(ROM Table)", },
{ ARM_ID, 0x4e0, "Cortex-A35 ROM", "(v7 Memory Map ROM Table)", },
{ ARM_ID, 0x906, "CoreSight CTI", "(Cross Trigger)", },
{ ARM_ID, 0x907, "CoreSight ETB", "(Trace Buffer)", },
{ ARM_ID, 0x908, "CoreSight CSTF", "(Trace Funnel)", },
@ -1129,6 +1131,7 @@ static const struct {
{ ARM_ID, 0x9d3, "Cortex-A53 PMU", "(Performance Monitor Unit)", },
{ ARM_ID, 0x9d7, "Cortex-A57 PMU", "(Performance Monitor Unit)", },
{ ARM_ID, 0x9d8, "Cortex-A72 PMU", "(Performance Monitor Unit)", },
{ ARM_ID, 0x9da, "Cortex-A35 PMU/CTI/ETM", "(Performance Monitor Unit/Cross Trigger/ETM)", },
{ ARM_ID, 0xc05, "Cortex-A5 Debug", "(Debug Unit)", },
{ ARM_ID, 0xc07, "Cortex-A7 Debug", "(Debug Unit)", },
{ ARM_ID, 0xc08, "Cortex-A8 Debug", "(Debug Unit)", },
@ -1139,6 +1142,7 @@ static const struct {
{ ARM_ID, 0xc15, "Cortex-R5 Debug", "(Debug Unit)", },
{ ARM_ID, 0xc17, "Cortex-R7 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd03, "Cortex-A53 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd04, "Cortex-A35 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd07, "Cortex-A57 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd08, "Cortex-A72 Debug", "(Debug Unit)", },
{ 0x097, 0x9af, "MSP432 ROM", "(ROM Table)" },