Commit Graph

11247 Commits

Author SHA1 Message Date
Antonio Borneo 1c5c1d1782 README: cleanup requirements for pkg-config
FreeBSD fully supports pkg-config; the .pc files for the internal
libusb has been added with
	https://cgit.freebsd.org/src/commit/?id=041d3f3f09b8
and became part of FreeBSD 10.0 in 2014-01-16.

Remove the obsoleted requirements for adding .pc files.

While there, add pkgconf as an alternative to pkg-config.

Change-Id: I16aea735c44107cb71945f225a979682c8c92d0a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7255
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
2022-10-15 15:59:00 +00:00
Erhan Kurubas 3b8333bd3f target/xtensa: fill register number field in the cache
Currently 'number' field is zero in the register cache and
this causes an issue on `rtos get_thread_reg_list` calls.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Iaef11e01f55d012969bbc1933f82847d5e02fec5
Reviewed-on: https://review.openocd.org/c/openocd/+/7246
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-15 15:58:44 +00:00
Erhan Kurubas 2d5d8a5a62 target/esp32s2: check xtensa_poll return value
Although scan build couldn't catch, return value overwritten
without checking.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I02b10002b03640604315047e8a8a639824724c16
Reviewed-on: https://review.openocd.org/c/openocd/+/7247
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-15 15:57:57 +00:00
Erhan Kurubas 45c9e1e8c0 tcl/xtensa: some fixes at xtensa-core-esp32s3.cfg
Some config changes required to run ESP32-S3 with full feature set

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I38022bb5ff5830e1cf9d11d6fe795ea99d91e9db
Reviewed-on: https://review.openocd.org/c/openocd/+/7254
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-15 15:57:36 +00:00
Erhan Kurubas 48317d86d3 tcl/xtensa: some fixes at xtensa-core-esp32s2.cfg
Some config changes required to run ESP32-S2 with full feature set

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ie0a742442254ec6e95d4e05be40213b079a94dab
Reviewed-on: https://review.openocd.org/c/openocd/+/7253
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-15 15:57:12 +00:00
Erhan Kurubas 46a61ea7ab tcl/xtensa: some fixes at xtensa-core-esp32.cfg
Some config changes required to run ESP32 with full feature set

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I484324f8497ec7934bb73164c638fc5f6460fcc4
Reviewed-on: https://review.openocd.org/c/openocd/+/7252
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-15 15:56:54 +00:00
Anatoly Parshintsev fe5c7d7a35
[riscv] step operation handler should respect handle_breakpoints parameter (#741)
* [riscv] step operation handler should respect handle_breakpoints parameter

When step operation is requested the OpenOCD frontend (like gdb server
or TCL server) has an option to control how existing breakpoints are
handled upon step.

Some OpenOCD frontends (like gdbserver) may choose to disable special
handling of existing breakpoints - thus handle_breakpoints is set to 0,
while others (like TCL server) expect target handler to temporary
disable the matching breakpoint to allow the step operation to complete
successfully.

In the current implementation handle_breakpoints parameter was ignored
by target-specific handler. Thus, the following sequence of commands:

```
halt
bp <current_pc> 4
step
```

Resulted in *step* operation to not change PC because of bp match.

This commit addresses this issue.

* Adjusted calls to logging facilities (addressed review comments)

Co-authored-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Anatoly Parshintsev <114445139+aap-sc@users.noreply.github.com>

Signed-off-by: Anatoly Parshintsev <114445139+aap-sc@users.noreply.github.com>
Co-authored-by: Tim Newsome <tim@sifive.com>
2022-10-14 09:40:16 -07:00
Tim Newsome a50b280558
Properly track selecting multiple harts at once. (#743)
* Properly track selecting multiple harts at once.

use_hasel is a bit of a hack.

Change-Id: Ia589ebc16bca32038d915df9988361b88e940917
Signed-off-by: Tim Newsome <tim@sifive.com>

* Clarifying comment.

Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>

* Rename set_hartsel to set_dmcontrol_hartsel

Change-Id: Iab28531281aa6fc604ec7d34974ed444ea9ea850

* Make set_dmcontrol_hartsel() more idiomatic.

Change-Id: I56a885043c515359e33b9c8a03aed637c81d1486

* Use constant for multiple harts instead of -1.

Change-Id: Iefeaf74202f2b4918d21f15f7ff7ca514175b8fb
Signed-off-by: Tim Newsome <tim@sifive.com>

Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
2022-10-12 08:57:00 -07:00
Tim Newsome bed28d5ec7 filter_openocd: Prefer high repetitions.
I'd rather see "these 10 lines were repeated 100 times" than "these 100
lines were repeated 10 times."

Change-Id: I88fcf86b10c5fb0ba1d19b21fe054065da90fedd
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-10-12 08:53:50 -07:00
Tomas Vanek 9d5f833fbd tcl/target: fix rp2040-core0.cfg work area backup.
The work area should be backed up.
The flash probe runs an algorithm on the target CPU.
The flash is probed during gdb connect if gdb_memory_map is enabled
(is enabled by default).
Without backup the target memory gets corrupted on gdb connect.

Change-Id: I3344b9dc6cbf904d49f3b05ab104b541d1d63422
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7257
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
2022-10-12 11:12:09 +00:00
Tim Newsome 4270857a76 target/riscv: Clean up halt_go for multiple harts.
Also add an early exit for if any harts are unavailable.

Change-Id: I0875d4d213c9faf87b219d8d57e440881366c8f8
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-10-11 13:57:55 -07:00
Tim Newsome 51aa8053e2
Merge pull request #745 from dmitryryzhov/fix-braces
Fix incorrect braces caused by #732
2022-10-10 09:51:12 -07:00
Tim Newsome f6163aacb4
Merge pull request #744 from mrv96/cjtag
Handle correctly cJTAG reset
2022-10-10 09:43:11 -07:00
Tomas Vanek dc6cad855d target: re-examine before arp_waitstate in ocd_process_reset_inner
arp_waitstate will not work on not-examined state

Change-Id: I56c3e1c7e63af108e4ed1dbacebb567f9bf46264
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7230
Tested-by: jenkins
Reviewed-by: Erwan Gouriou
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 08:53:51 +00:00
Tomas Vanek 1f84f34850 target/hla_target: try to re-examine under reset in hl_assert_reset()
An application often idling in real sleep mode may make a Cortex-M target
hard to access as CPU clock are gated and debug requests are responded
by WAIT ack.

Try to examine the target under reset as the last resort.

Change-Id: I7c3de39fb1e6c23b76e2a0a85ab75f23aac94c4d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7229
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 08:52:45 +00:00
Tomas Vanek f65d1da013 target/cortex_m: try to re-examine under reset in cortex_m_assert_reset()
An application often idling in real sleep mode may make a Cortex-M target
hard to access as CPU clock are gated and debug requests are responded
by WAIT ack.

Try to examine the target under reset as the last resort.

Change-Id: Ife875a966a838c37dde987bc584ad0a1f4d020d6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7228
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 08:49:52 +00:00
Tomas Vanek b991c416b7 target/cortex_m: make reset robust again
After merging [1] 'reset halt' does not work on not responding Cortex-M.

Relax the examined tests and try to set vector catch VC_CORERESET
if debug_ap is available.

While on it add an info about examination state to debug logs.

Fixes: [1] commit 98d9f1168c ("target: reset target examined flag if target::examine() fails")
Change-Id: Ie2e018610026180af5997d70231061a275f05c76
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6745
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 08:46:12 +00:00
Antonio Borneo 978c115dac openocd: fix build with 'configure --without-capstone'
When configure option --without-capstone is used, the macro
HAVE_CAPSTONE is not defined in config.h, and the following lines
are instead present:
	/* 1 if you have Capstone disassembly framework. */
	/* #undef HAVE_CAPSTONE */

This cause compile error with message:
	arm_disassembler.h:190:5: error: "HAVE_CAPSTONE" is not
		defined, evaluates to 0 [-Werror=undef]
	  190 | #if HAVE_CAPSTONE
	      |     ^~~~~~~~~~~~~

This is caused by configure.ac that does not call AC_DEFINE when
--without-capstone option is present.

Fix configure.ac to always provide the autoconf macro
HAVE_CAPSTONE, with either value 0 or 1.

Change-Id: Ie5ac98b2c25746dd721812c91baaac61ec877ecd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7224
Tested-by: jenkins
2022-10-08 07:59:44 +00:00
Daniel Goehring a69b382efd target/adiv5: 64-bit TAR setup bugfix
For 64-bit TAR setup, if 'tar_valid == false' perform the upper 32-bit
write even if the cached copy matches the upper TAR value to be written.

Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Change-Id: I320377dc90a9d1d7b64cbb281b2527e56c7621ee
Reviewed-on: https://review.openocd.org/c/openocd/+/7245
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2022-10-08 07:55:35 +00:00
Nishanth Menon 8bf5482754 tcl/target/ti_k3: Handle swd vs jtag
Since all the device definition when accessing device from jtag is also
valid when accessing from swd, lets make sure the configuration can
handle the same.

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I5af071137fd8c3b52cc4ef72401f8eba952f9cad
Reviewed-on: https://review.openocd.org/c/openocd/+/7090
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 07:55:08 +00:00
Daniel Anselmi d6ae732f6e fix leaky file-handle in virtex2 driver
Change-Id: I2784a66c42be71f2982dff7746f9fb2eb1dc8ca6
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7243
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 07:54:49 +00:00
Daniel Anselmi d983114855 don't return ERROR_OK in error cases
Change-Id: I7e046df85838692c9044fe9c9d67e8b2c821eb0f
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7236
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2022-10-08 07:54:39 +00:00
Daniel Anselmi 0a7e172420 fix memory leak in virtex2 driver
Change-Id: Ia08f7aaad25631132885acd5898477c1106f0ec4
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7235
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 07:54:02 +00:00
Erhan Kurubas cff2cf373f target/xtensa: pass correct buffer on read memory retry
Read values must be at albuff so that can be copied to buffer
on function exit.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I74a533e8f12f1002ca06a98a7c7cd928552b4cc5
Reviewed-on: https://review.openocd.org/c/openocd/+/7226
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 07:53:12 +00:00
Erhan Kurubas 10b08d5ac5 target/xtensa: rename pc and ps macro names
Actually they are the base of epc and eps

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I4f43b9609a9929399fb5d3fa0203efc8a98e94c9
Reviewed-on: https://review.openocd.org/c/openocd/+/7227
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 07:52:49 +00:00
Keith Packard af75d70dc5 flash/nor/at91samd: Use 32-bit register writes for ST-Link compat
ST-Link v2 dongles can be used with many cortex-m parts, but they have
one limitation -- they can only perform 8-bit and 32-bit writes to the
target. 16-bit writes are done using a pair of 8-bit writes. While not
usually an issue, in the case of the at91samd flash driver, the 16-bit
'command' register must have both halves written in the same
operation.

Fortunately, this register has two pad bytes above it in the address
space, making it safe to always access with 32-bit operations.

Change-Id: I44b0db9406982a8db5818c0533d3101618741db2
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7234
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 07:52:28 +00:00
Evgeniy Naydanov 0cedf10f8f Remove duplicate of a counter in hwthread_update_threads
There is no need to count number of examined threads twice.

Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: Id32ead853d1ddcd4e67062d6f795700feb20cb4b
Reviewed-on: https://review.openocd.org/c/openocd/+/7223
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-10-08 07:52:12 +00:00
Tomas Vanek 759d581fde jtag/drivers/bitbang: reduce debug verbosity
The bitbang driver floods the log by many messages with very
little informational value.

Remove some LOG_DEBUGs, convert some others to LOG_DEBUG_IO.

Change-Id: I0c7539467b45543e12932c67dc71e86d58c8c6cd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7220
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Tested-by: jenkins
2022-10-08 07:51:46 +00:00
Tomas Vanek 1d77fc74e1 jtag/drivers/cmsis_dap: add LOG_DEBUG_IO to cmsis_dap_metacmd_targetsel
Make write to DP_TARGETSEL is logged the similar way as other DP register
read/writes.

While on it fix checkpatch message
'Concatenated strings should use spaces between elements'

Change-Id: I98f724c984e8c4610cc461340f4c4a7cc9627ed9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7219
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Tested-by: jenkins
2022-10-08 07:48:19 +00:00
Tomas Vanek 48507e3b10 target/armv7m: show target name in 'halted' message
Change-Id: I13e9a33677632d52122585203252fc4ef0c52a2a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7237
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 07:47:09 +00:00
Tomas Vanek bced97cce9 target/armv7m: prevent storing invalid register
armv7m_start_algorithm() stored all non-debug execution
registers from register cache without checking validity.

Check if the register cache is valid.
Try to read from CPU if not valid.
Issue a warning if register read fails.

Change-Id: I365f86d65243230cf521b13909575e5986a87a50
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7240
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
2022-10-08 07:46:16 +00:00
Tomas Vanek dce9a03cb2 flash/nor/rp2040: fix setting sp
The num_reg_params parameter of target_run_algorithm() was not
updated when setting "sp" was introduced. Therefore "sp" as the last
register parameter was not passed to a target algo.

Introduce a new helper variable with correct count of register parameters
and use it everywhere needed.

Change-Id: I934a71380783d98917167f1569145808ef23540f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7225
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
2022-10-08 07:45:18 +00:00
mrv96 0c6121d92a (Re)Init cJTAG before move JTAG to reset state
Signed-off-by: mrv96 <mrv96@users.noreply.github.com>
2022-10-07 16:07:33 +02:00
mrv96 29983fd98d (Re)Init cJTAG only after trst (not after srst) 2022-10-07 15:47:44 +02:00
Dmitry Ryzhov 01ae0f2122 Fix incorrect braces caused by #732 2022-10-07 16:34:59 +03:00
Tim Newsome b411a955c8
Merge pull request #742 from mrv96/cjtag
Fix Digilent JTAG-HS2 cJTAG configuration script
2022-10-06 09:43:11 -07:00
mrv96 342ca4a832 Fix Digilent JTAG-HS2 cJTAG configuration script
Signed-off-by: mrv96 <mrv96@users.noreply.github.com>
2022-10-05 19:42:15 +02:00
Tim Newsome 0f12a01007 riscv: Minor formatting cleanup.
Change-Id: I0256fd047d8369ca7b327172225a9d1f827673c5
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-10-05 10:23:45 -07:00
mrv96 088a3596a0 Use TMSC_EN signal for cJTAG escape seq if defined
Signed-off-by: mrv96 <mrv96@users.noreply.github.com>
2022-10-05 10:16:53 -07:00
mrv96 bd5649dfbe Support cJTAG JScan3 mode 2022-10-05 10:16:53 -07:00
mrv96 f61098c225 Rename ftdi_oscan1 to ftdi_cjtag 2022-10-05 10:16:53 -07:00
mrv96 b70ccf297f OScan1 code cleanup
- change OSCAN1 to OScan1
- fix spacing
2022-10-05 10:16:53 -07:00
Tim Newsome 6d4ba7cca8
Merge pull request #738 from riscv/current_hartid
Remove riscv_info_t.current_hartid
2022-10-04 13:17:59 -07:00
Tim Newsome 84365e65e5 Remove riscv_info_t.current_hartid
This was used to track which hart a given operation must apply to. But
we already have a target associated with each operation, and from there
we can find the desired hart id. dm013_info_t already tracks
current_hartid (meaning which hart ID is currently selected by the DM).

This makes the code simpler to understand. Also it turns out we don't
need to make sure the correct hart ID is currently selected because
there are only a few real entry points.

Change-Id: Ibe8d5e156523397f245edd6ec0a5df3239b717bf
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-09-30 10:21:38 -07:00
Tim Newsome 550a66e720
Use LOG_TARGET_FOO() functions in more places. (#731)
Change-Id: Id2266dbfb6209bf0676f28e7383a12705ce2a70e
Signed-off-by: Tim Newsome <tim@sifive.com>

Signed-off-by: Tim Newsome <tim@sifive.com>
2022-09-29 15:09:49 -07:00
Tim Newsome 23df83e830
Merge pull request #727 from riscv/poll_backoff
Make poll backoff time based.
2022-09-27 10:13:12 -07:00
Tim Newsome e53fd14f50
Merge pull request #733 from en-sc/en-sc/remove-erroneous-debuglog
Remove incorrect debug_log in wait_for_idle
2022-09-27 10:00:40 -07:00
Tim Newsome d427e136d3
Merge pull request #732 from en-sc/en-sc/error-code-regwrite-direct
Propagate error code in register_read/write_direct
2022-09-27 10:00:24 -07:00
Tomas Vanek ae937791d3 flash/nor/rp2040: remove new line from error message
Change-Id: Idf3bce842b4507c1f12692b5fbcd6730637de9db
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7216
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Tested-by: jenkins
2022-09-27 08:49:08 +00:00
Tomas Vanek 3fdd3249b5 flash/nor/rp2040: use LOG_TARGET_xxx to show core name
Change-Id: Ic76e1c6306ece18b3590beaad4d5b224d4449aa0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7188
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2022-09-27 08:48:52 +00:00