Commit Graph

10526 Commits

Author SHA1 Message Date
Marc Schink 6ed058933c doc: Refurbish manual page
Remove the outdated option '--pipe' and bring the description of OpenOCD
up to date without focus on JTAG only.

Change-Id: If52e936a366dde21c1dd514bd3960d100b540e77
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8347
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-07-13 16:46:36 +00:00
Marc Schink 636f003eee AUTHORS: Refer to source code and Git history
The list of authors and contributors is not maintained and outdated for
years now. Refer to the source code and Git history instead of keeping a
separate list.

Change-Id: I9a92e8e0d5073b56030bc36086b76e28de96389f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8346
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-07-13 16:46:06 +00:00
Marc Schink 31e0fc4a7a doc: Remove outdated '-pipe' option
Change-Id: Ie3a7a3aaf69485f16b2447bd1dfa7622b584c7c0
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8348
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-07-13 16:45:34 +00:00
Antonio Borneo 2fe392ef50 flash: psoc6: drop use of 'coreid' to identify the CPU
The flag '-coreid' is used by the command 'target create' to
specify the debug controller of the target, either in case of a
single debug controller for multiple CPU (e.g. RISC-V harts) or
in case of multiple CPU on a DAP access port (e.g. Cortex-A SMP
cluster).
It is also currently used to specify the CPU ID in a SMP cluster,
but this is going to be reworked.

This flag has no effects on Cortex-M; ARM specifies that only one
CPU Cortex-M can occupy the DAP access port by using hardcoded
addresses.

The flash driver 'psoc6' uses the flag '-coreid' to detect if the
current target is the Cortex-M0 on AP#1 or the Cortex-M4 on AP#2
in the SoC.
There are other ways to run such detection, without using such
unrelated '-coreid' flag, e.g. using the AP number or the arch
type of the target.

Use the arch type to detect Cortex-M0 (ARM_ARCH_V6M) vs Cortex-M4
(ARM_ARCH_V7M).
Drop the flags '-coreid' from the psoc6 configuration file.

Change-Id: I0b9601c160dd4f2421a03ce6e3e7c55c6212f714
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8128
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-07-13 16:44:53 +00:00
Antonio Borneo c9f22c79df doc: document 'target create' flags '-dbgbase' and '-coreid'
Add to the command 'target create' the description for the flags
'-dbgbase' and '-coreid'.
Report that '-coreid' is currently used for purposes other than
CPU detection/examination, and that such uses are going to be
re-considered.

Change-Id: I25c839e3653101234c5862ce9da77019a5bb3249
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8129
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2024-07-13 16:44:26 +00:00
Tomas Vanek 23c33e1d3a target/cortex_m: workaround Cortex-M7 erratum 3092511
When an asynchronous exception occurs at the same time
as a breakpoint event (either hardware breakpoint or software breakpoint),
it is possible for the processor to halt at the beginning of the
exception handler instead of the instruction address pointed
by the breakpoint.

During debug entry in exception handler state and with BKPT bit set
as the only break reason in DFSR, check if there is a breakpoint, which
have triggered the debug halt. If there is no such breakpoint,
resume execution. The processor services the interrupt and
halts again at the correct breakpoint address.

The workaround is not needed during target algo run (debug_execution)
because interrupts are disabled in PRIMASK register.

Also after single step the workaround resume never takes place:
the situation is treated as error.

Link: https://developer.arm.com/documentation/SDEN1068427/latest/
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I8b23f39cedd7dccabe7e7066d616fb972b69f769
Reviewed-on: https://review.openocd.org/c/openocd/+/8332
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Liviu Ionescu
2024-07-01 03:32:22 +00:00
Tomas Vanek ad87fbd1cf tcl/interface: support for Raspberry Pi 5
Make sure raspberrypi-native.cfg cannot be used on RPi5.

Add raspberrypi5-gpiod.cfg which uses linuxgpiod adapter driver.
Issue a warning if PCIe is in power save mode.

While on it, re-format warnings issued from Tcl to look similar
to LOG_WARNING() output.

Change-Id: If19b0350bd5fff83d9a0c65999e33b161fb6957a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8333
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
2024-06-25 07:23:18 +00:00
Antonio Borneo 67be8188bb Remove other '_s' suffix from structs
Most of the work is already done by [1].
Remove few more '_s' suffix and also fix some comment referring to
the old name of the struct.

Link: https://review.openocd.org/c/openocd/+/8340
Change-Id: Ifddc401c3b05e62ece3aa7926af1e78f0c4a671e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8341
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-06-23 09:33:47 +00:00
Marc Schink 6b984a54c9 Remove '_s' suffix from structs
Change-Id: I956acce316e60252b317daa41274403d87f704b8
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8340
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-23 09:33:33 +00:00
Marc Schink 92e8823ebd server/gdb: Use LOG_TARGET_xxx() to show target name
The output "gdb port disabled" is confusing without reference to the
target. Use LOG_TARGET_INFO() to output the target name.

While at it, use LOG_TARGET_xxx() for all log statements where the
target name is already used.

Change-Id: I70b134145837db623e008a4a6c0be0008d9a0d87
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8313
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-23 09:33:13 +00:00
Timur Golubovich 23ba602ca5 remote_bitbang: fix assertion failure for the cases when connection is abruptly terminated
Changes affect the function remote_bitbang_fill_buf.
When read_socket returns 0, socket reached EOF and there is
no data to read. But if request was blocking, the caller
expected some data. Such situations should be treated as ERROR.

Change-Id: I02ed484e61fb776c1625f6e36ab14c85891939b2
Signed-off-by: Timur Golubovich <timur.golubovich@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8325
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-23 09:32:08 +00:00
Antonio Borneo dde096e03f itm: fix default initialization
Commit f9509c92db ("itm: rework itm commands before 'init'")
ignores the default enable of ITM channel 0, that is applied when
no 'itm port[s]' is issued.

Call armv7m_trace_itm_config() unconditionally to handle it.

Change-Id: I3e85d0b063ed38c1552f6af9ea9eea2e76aa9025
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Paul Fertser <fercerpav@gmail.com>
Fixes: f9509c92db ("itm: rework itm commands before 'init'")
Reviewed-on: https://review.openocd.org/c/openocd/+/7900
Reviewed-by: <post@frankplowman.com>
Tested-by: jenkins
2024-06-23 09:30:43 +00:00
Antonio Borneo 198fecf5e4 target: aarch64: access reg SPSR_EL1 only in EL1, EL2 and EL3
The register SPSR_EL1 is accessible and it's content is relevant
only when the target is in EL1 or EL2 or EL3.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd5384000, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $SPSR_EL1
or through OpenOCD command
        reg SPSR_EL1

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.

Change-Id: Ia0f984d52920cc32b8ee31157d62c13dea616a3a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8276
Tested-by: jenkins
2024-06-23 09:29:43 +00:00
Antonio Borneo b5dfef7577 target: aarch64: access reg ESR_EL1 only in EL1, EL2 and EL3
The register ESR_EL1 is accessible and it's content is relevant
only when the target is in EL1 or EL2 or EL3.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd5385200, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $ESR_EL1
or through OpenOCD command
        reg ESR_EL1

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.

Change-Id: Icd65470c279e5cfd03091db6435cdaa1c447644c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8275
Tested-by: jenkins
2024-06-23 09:29:37 +00:00
Antonio Borneo f39f136e01 target: aarch64: access reg ELR_EL1 only in EL1, EL2 and EL3
The register ELR_EL1 is accessible and it's content is relevant
only when the target is in EL1 or EL2 or EL3.

Without this patch, an error:
	Error: Opcode 0xd5384020, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
	x/p $ELR_EL1
or through OpenOCD command
	reg ELR_EL1

Detect the EL and return error if the register cannot be accessed.

Change-Id: I402dda4cd9dae502b05572fc6c1a8f0edf349bb1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8274
Tested-by: jenkins
2024-06-23 09:29:29 +00:00
Antonio Borneo 2a63fabd09 target: aarch64: access reg SPSR_EL2 only in EL2 and EL3
The register SPSR_EL2 is accessible and it's content is relevant
only when the target is in EL2 or EL3.
Virtualization SW in EL1 can also access it, but this either
triggers a trap to EL2 or returns SPSR_EL1. Debugger should not
mix the real SPSR_EL2 with the virtual register.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd53c4000, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $SPSR_EL2
or through OpenOCD command
        reg SPSR_EL2

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.

Change-Id: If3792296b36282c08d597dd46cfe044d6b8288ea
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8273
Tested-by: jenkins
2024-06-23 09:29:22 +00:00
Antonio Borneo 766a84b798 target: aarch64: access reg ESR_EL2 only in EL2 and EL3
The register ESR_EL2 is accessible and it's content is relevant
only when the target is in EL2 or EL3.
Virtualization SW in EL1 can also access it, but this either
triggers a trap to EL2 or returns ESR_EL1. Debugger should not mix
the real ESR_EL2 with the virtual register.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd53c5200, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $ESR_EL2
or through OpenOCD command
        reg ESR_EL2

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.

Change-Id: Icb32b44886d50907f29b068ce61e4be8bed10208
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8272
Tested-by: jenkins
2024-06-23 09:29:16 +00:00
Antonio Borneo 190176a6bc target: aarch64: access reg ELR_EL2 only in EL2 and EL3
The register ELR_EL2 is accessible and it's content is relevant
only when the target is in EL2 or EL3.
Virtualization SW in EL1 can also access it, but this either
triggers a trap to EL2 or returns ELR_EL1. Debugger should not mix
the real ELR_EL2 with the virtual register.

Without this patch, an error:
	Error: Opcode 0xd53c4020, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
	x/p $ELR_EL2
or through OpenOCD command
	reg ELR_EL2

Detect the EL and return error if the register cannot be accessed.

Change-Id: Idf02b42a7339df83260c1e44ceabbb05fbf392b9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8271
Tested-by: jenkins
2024-06-23 09:29:04 +00:00
Antonio Borneo 405e78771b target: aarch64: access reg SPSR_EL3 only in EL3
The register SPSR_EL3 is accessible and it's content is relevant
only when the target is in EL3.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd53e4000, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $SPSR_EL3
or through OpenOCD command
        reg SPSR_EL3

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.

Change-Id: I00849d99feeb96589c426fcafda98127dbd19a67
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8270
Tested-by: jenkins
2024-06-23 09:28:48 +00:00
Antonio Borneo 2306809160 target: aarch64: access reg ESR_EL3 only in EL3
The register ESR_EL3 is accessible and it's content is relevant
only when the target is in EL3.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd53e5200, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $ESR_EL3
or through OpenOCD command
        reg ESR_EL3

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.
Drop the FIXME comment on Aarch32 case, as the register exists in
Aarch64 only.

Change-Id: Ie8c69dc7b50ae81a52506cf151c8e64e15752d0d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8269
Tested-by: jenkins
2024-06-23 09:28:40 +00:00
Antonio Borneo 8c75e47603 target: aarch64: access reg ELR_EL3 only in EL3
The register ELR_EL3 is accessible and it's content is relevant
only when the target is in EL3.

Without this patch, an error:
	Error: Opcode 0xd53e4020, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
	x/p $ELR_EL3
or through OpenOCD command
	reg ELR_EL3

Detect the EL and return error if the register cannot be accessed.

Change-Id: I545abb196e5c34e462c7e5d5d3ec952e588642da
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8268
Tested-by: jenkins
2024-06-23 09:28:32 +00:00
Antonio Borneo bcd6a10223 target: armv8_dpm: silence error on register R/W
The command 'gdb_report_register_access_error' is used to silence
errors while reading registers and not reporting them to GDB.
Nevertheless, the error is printed by a LOG_ERROR() in armv8_dpm.

Change the message to LOG_DEBUG().
It will still cause the error to be propagated and eventually
printed by the caller (e.g. by the command 'reg').

Change-Id: Ic0db74fa28235d686ddd21a5960c52ae003e0931
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8267
Tested-by: jenkins
2024-06-23 09:28:21 +00:00
Antonio Borneo 91043cecee target: aarch64: align armv8_read_reg() and armv8_read_reg32()
These functions are today always called with non-NULL parameter
regval, so the actual check is not needed.
Anyway, for any future code change, check the parameter at the
entry of the functions and return error if it is not valid.
Simplify the check to assign the result value and align the code
of the two functions.

Change-Id: Ie4d98063006d70d9e2bcfc00bc930133caf33515
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8266
Tested-by: jenkins
2024-06-23 09:28:08 +00:00
Marc Schink c5358c84ad target: Do not use LOG_USER() for error messages
Use LOG_TARGET_ERROR() to print the error messages and additionally add
a reference to the related target.

Change-Id: I06722f3911ef4034fdd05dc9b0e2571b01b657a4
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8314
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2024-06-17 14:05:25 +00:00
Tomas Vanek 4892e32294 target/cortex_m: allow poll quickly get out of TARGET_RESET state
cortex_m_poll_one() detects reset testing S_RESET_ST sticky bit.
If the signal comes unexpectedly, poll must return TARGET_RESET state.

On the contrary in case of polling inside of an OpenOCD reset command,
TARGET_RESET has been has already been set and we need to get out of
it as quickly as possible.

The original code needs 2 polls: the first clears S_RESET_ST
and keeps TARGET_RESET state, the current TARGET_RUNNING or TARGET_HALTED
is reflected as late as the second poll is done.

Change the logic to keep in TARGET_RESET only when necessary.

See also [1]

Link: [1] 8284: tcl/target: ti_cc3220sf: Use halt for CC3320SF targets | https://review.openocd.org/c/openocd/+/8284
Fixes: https://sourceforge.net/p/openocd/tickets/360/
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I759461e5f89ca48a6e16e4b4101570260421dba1
Reviewed-on: https://review.openocd.org/c/openocd/+/8285
Tested-by: jenkins
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2024-06-17 14:04:49 +00:00
Daniel Anselmi bf4be566a7 pld: small documentation fixes.
Change-Id: I969f51c38fc0c34c6bdba98b0e618d7f28ea4052
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/8084
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-15 14:25:17 +00:00
Daniel Anselmi 9bc7a381b2 pld/intel: remove idcodes from intel.c
Remove list of id codes for all families.
Maintain a list with id, bscan-length and check position
in the tcl config files for each family.

The Intel FPGA Driver option 'family' is not otional anymore.

Change-Id: I9a40a041069e84f6b4728f2cd715756a36759c89
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/8083
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-15 14:25:05 +00:00
Daniel Anselmi 7e4c9609ca pld/intel: remove duplicated code
Change-Id: I043d16c77ce97d3e888774747ed6bfc4c7e63c04
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/8082
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-15 14:24:32 +00:00
George Voicu b1600bb342 tcl/board: Support for Digilent Nexys 2 board
Support Digilent Nexys 2 board JTAG chain

Signed-off-by: George Voicu <razvanvg@hotmail.com>
Change-Id: I350f80b49303c4b0402d93ebc120a591ef727551
Reviewed-on: https://review.openocd.org/c/openocd/+/7336
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-15 14:14:11 +00:00
George Voicu a420f00d10 tcl/fpga: Support for Xilinx Spartan3 series devices
Tap definition for Xilinx Spartan 3/3E/3A/3AN/3A-DSP devices.

Signed-off-by: George Voicu <razvanvg@hotmail.com>
Change-Id: Ieda2b61fc270840f9192976697fcac259c45e3b8
Reviewed-on: https://review.openocd.org/c/openocd/+/7335
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-15 14:13:58 +00:00
George Voicu ed30c9a572 tcl/fpga/xilinx-dna: Support for reading Spartan3 DNA code
Add Xilinx Spartan3 ISC_DNA instruction

Signed-off-by: George Voicu <razvanvg@hotmail.com>
Change-Id: Iaddb079c9fdd1b91c65def36878fe81783098696
Reviewed-on: https://review.openocd.org/c/openocd/+/7331
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-15 14:13:28 +00:00
Antonio Borneo b49e03f77e target/arm_tpiu_swo: Fix memory leak on error
In case of fail to allocate 'obj->name', the memory allocated for
'obj->out_filename' is not freed, thus leaking.

Since 'obj' is allocated with calloc(), thus zeroed, switch to use
the common error exit path for both allocations of 'obj->name' and
'obj->out_filename'.

Fixes: 2506ccb509 ("target/arm_tpiu_swo: Fix division by zero")
Change-Id: I412f66ddd7bf7d260cee495324058482b26ff0c5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8300
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
2024-06-15 14:12:06 +00:00
Evgeniy Naydanov 400cf213c0 fix GCC's `-Wcalloc-transposed-args` warning
GCC 14.1.0 warns about calls to `calloc()` with element size as the
first argument.
Link: https://gcc.gnu.org/onlinedocs/gcc-14.1.0/gcc/Warning-Options.html#index-Wcalloc-transposed-args

Change-Id: I7d44a74a003ee6ec49d165f91727972478214587
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8301
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-06-15 14:11:16 +00:00
Tomas Vanek e4c0904731 flash/nor/nrf5: handle ERROR_WAIT during nRF91 flash erase
Erase is initiated by write to a flash address. Due to the
silicon errata of nRF91 the write stalls the bus until the page erase
is finished (takes up to 87ms).
If the adapter does not handle SWD WAIT properly, the following read
in nrf5_wait_for_nvmc() returns ERROR_WAIT.

Wait for fixed time before accessing AP. Not nice, but the only
working solution until all adapters handle SWD WAIT.

If the fixed wait does not suffice, continue the wait loop after a delay.
It makes some unnecessary noise however erase works.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I63faf38dad79440a0117ed79930442bd2843c6db
Reviewed-on: https://review.openocd.org/c/openocd/+/8115
Reviewed-by: Tomáš Beneš <tomas@dronetag.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 09:20:14 +00:00
Tomas Vanek 70b362d4f4 flash/nor/nrf5: show proper SoC type on newer nRF91 devices
Since nRF9160 Product Specification v2.1 the new UICR SIPINFO
fields should be preferred over UICR INFO.
Tested on nRF9161.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Ib8005b3b6292aa20fa83c1dcebd2de27df58b661
Reviewed-on: https://review.openocd.org/c/openocd/+/8114
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 09:19:14 +00:00
Tomas Vanek 17be341d38 tcl/target: add nRF53 and nRF91 config files
Both devices can be configured with or without SWD multidrop.

nRF53 network core is examined on demand to avoid problems
when the core is forced off.

Change-Id: I08f88ff48ff7ac592e9214b89ca8e5e9428573a5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8113
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-08 09:12:14 +00:00
Tomas Vanek d94daf776c flash/nor/nrf5: add basic nRF53 and nRF91 support
Probes all flash and UICR areas.
Flash erase and write tested.

On nRF53 mass erase works on the application core flash bank only.
The Tcl script nrf53_recover can serve as the workaround on the
network core.
TODO: mass erase of the nRF53 network core flash.

Some ideas taken from [1] and [2].

Change-Id: I8e27a780f4d82bcabf029f79b87ac46cf6a531c7
Link: [1] 7404: flash: nor: add support for Nordic nRF9160 | https://review.openocd.org/c/openocd/+/7404
Link: [2] 8062: flash: nor: add support for Nordic nRF9160 | https://review.openocd.org/c/openocd/+/8062
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8112
Reviewed-by: Tomáš Beneš <tomas@dronetag.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 09:04:34 +00:00
Tomas Vanek fc7a428fc2 flash/nor/nrf5: make flash erase little faster
Enable and disable erase mode only once
instead of toggling it for each sector.

Refactor to decrease the number of call levels.

Change-Id: Ie546a4fc24da0eea2753a2bebaa63d941ef7aa1d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8111
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 09:03:53 +00:00
Tomas Vanek 37f9485cef flash/nor/nrf5: introduce address maps
Preparatory change before extending support to nRF53 and 91.

While on it, rename nRF51 and 52 specific routines and constants.

Change-Id: I46bc496cef5cbde46d6755a4b908c875351f6612
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8110
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 08:59:53 +00:00
Paul Fertser ed9203f4aa gdb_server: do not start multiple instances on "pipe"
For configurations which include multiple targets and the "pipe" mode is
requested only the first gdb_server instance should be enabled,
otherwise GDB gets confusing replies, goes out of sync and the session
fails in weird ways.

Compile-tested only.

Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Change-Id: If8f13aa7b58e9b0dc6d5ae88cf75538b34cc1218
Reviewed-on: https://review.openocd.org/c/openocd/+/8222
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 08:51:20 +00:00
Marc Schink 1fba55a9b6 flash/nor/tcl: Fix memory leak of flash bank name
Change-Id: I54cd1ee479a0570ae849a71be47c82eebd1ae454
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8303
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-08 08:50:55 +00:00
Marc Schink 0a3217b8ff tcl/board: Add config for NXP FRDM-KV31F
Change-Id: I4d7cd1bcadd8159e4830107c2788708aef02add0
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8299
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 08:46:36 +00:00
Marc Schink 84126893ff tcl/board: Add config for NXP FRDM-KV11Z
Change-Id: I9cd497a085f8f9c7854ae3b96e60a73b3b050d0e
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8298
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-08 08:46:24 +00:00
Parshintsev Anatoly d382c95d57 target/riscv: support for smp group manipulation
this functionality allows to query if a target belongs to some smp group
and to dynamically turn on/off smp-specific behavior

Change-Id: I67bafb1817c621a38ae4a2f55e12e4143e992c4e
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8296
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 08:45:44 +00:00
Tim Newsome 2f8bb252ff doc: Minimally describe the BSCAN tunnel interface.
Add minimal documentation for the BSCAN tunnel interface.
This is based on Tim Newsome <tim@sifive.com>'s work on
the RISC-V fork.

Change-Id: I5e0cd6972cb90649670249765e9bb30c2847eea6
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8297
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 08:45:21 +00:00
Mark Featherston 9623069e80 jtag/drivers/ftdi: Use command_print instead of LOG_USER for get_signal
LOG_USER only outputs to user interfaces, but leaves no way to get the
FTDI inputs over the RPC interface. Switch to command_print so this
string goes to both logs and the RPC interface.

Change-Id: I99024194b6687b88d354ef278aa25f372c862c22
Signed-off-by: Mark Featherston <mark@embeddedts.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8294
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
2024-06-08 08:45:04 +00:00
Antonio Borneo 72b39088ee target: reset examine after assert_reset
For some target, the API assert_reset() checks if the target has
been examined, with target_was_examined(), to perform conditional
operations like:
- assert adapter's srst;
- write some register to catch the reset vector;
- invalidate the register cache.

Targets created with -defer-examine gets the examine flag reset
right before entering in their assert_reset(), disrupting the
actions above.

For targets created with -defer-examine, move the reset examine
after the assert_reset().

Change-Id: If96e7876dcace8905165115292deb93a3e45cb36
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8293
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-06-08 08:44:36 +00:00
Noah Moroze b5e7118048 src/helper/startup: fix syntax errors
The missing closing brackets were caught by tclint v0.2.5
(https://github.com/nmoroze/tclint):

```
tclint src/helper/startup.tcl | grep "syntax error"
```

The improperly escaped backslash was caught by manual inspection during
code review.

Change-Id: I8cd44e58040d4627f6b2fc8b88ca8a930cda0ba6
Signed-off-by: Noah Moroze <noahmoroze@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8282
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 08:44:18 +00:00
Noah Moroze 7050cade9d tcl/chip/st/spear: fix syntax errors
While the current jimtcl does not consider this an error, the Tcl
dodekalogue states that strings terminate at the second double quote
character (see https://www.tcl.tk/man/tcl/TclCmd/Tcl.htm#M8).

These syntax errors were caught by tclint v0.2.5
(https://github.com/nmoroze/tclint):

```
tclint tcl/chip/st/spear/spear3xx_ddr.tcl | grep "syntax error"
```

Change-Id: I2763d93095e3db7590644652f16b7b24939d6cae
Signed-off-by: Noah Moroze <noahmoroze@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8281
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08 08:44:04 +00:00
Noah Moroze 223e3d8fe7 tcl/target/c100helper: fix syntax errors
Fixes: 64d89d5ee1 ("tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change")

These syntax errors were caught by tclint v0.2.5
(https://github.com/nmoroze/tclint):

```
tclint tcl/target/c100helper.tcl | grep "syntax error"
```

Change-Id: I511c54353c4853560adca6b4852d48df2aade283
Signed-off-by: Noah Moroze <noahmoroze@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8280
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-08 08:43:30 +00:00