Commit Graph

7338 Commits

Author SHA1 Message Date
Matthias Welwarsky 6c096b2234 aarch64: fix first examination
properly decode debug capabilities, remove superfluous register
accesses.

Change-Id: I2cca699b515262dd2a508d7be97826eb17b9c607
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky b273ec93c6 aarch64: correct display for aarch64 state
Aarch64 state has different PSTATE and exception level model.
Correct the printout e.g. in poll command.

Change-Id: I1820fd1836c7076ae0aa405fa335fd1a14a2e5b3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky f442a530fa aarch64: use symbolic constant for register count
Aarch64 has 34 registers, but use ARMV8_LAST_REG instead of
raw integer constant.

Change-Id: I86481899ade74f27fc90eff9f367d444c03e535e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky 03861123d7 aarch64: remove armv7-a virt-to-phys code
Page table layout in aarch64 is very different from armv7-a layout.
Remove the incorrect handling, to be replaced correct armv8 code in a
later patch

Change-Id: I64c728a72a24f9f4177726ccc07a02a8ca0d56ce
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:39 +01:00
Matthias Welwarsky 667c1d0d16 aarch64: clear breakpoint value register on removal
Not only null control but also value of the breakpoint when it is
removed.

Change-Id: Id99c7e3644729c64e563f1fa8b0577f350be6a98
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 42574b3a10 aarch64: correct breakpoint register offset
armv8 breakpoint register spacing is 16, not 4 as in armv7-a

Change-Id: I0d49d06878a0c9dab35cde478064e5366f01a8e0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 4314624669 aarch64: fix cache identification
Use correct instructions to access CLIDR, CSSELR and CCSIDR.

Change-Id: I319b96c03a44fdb59fcb18a00f816f6af0261f0a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 7eb95b1d72 aarch64: fix reading of translation table registers
Correctly access and parse aarch64 ttbcr.

Change-Id: I1b1652791a6b5200f58033925286292d838e8410
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky d8abda4bd8 aarch64: fix entry into debug state
- armv8 EDSCR has no ITR_EN bit, ITR is always enabled. Writes to this
  bit are ignored but we should not do them anyway
- use dpmv8 function to report the reason for debug entry
- WFAR is a 64bit register

Change-Id: I07b81ecf105ceb7c3ae2f764bb408eb973c1d1de
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 391109505f aarch64: use symbolic opcodes instead of hex values
Use opcode definitions from armv8_opcodes.h where appropriate

Change-Id: Iead33fb8e62eb2dd2419ef8932f7d46c087f51a8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 044e4b8108 aarch64: fix accesses to SCTLR_ELn register
The system control register has several instances, depending on the
exception level. Make sure to access always access the correct one.

Change-Id: I9e867f4dbd9625762042f20ed905064ea4e3270f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky f28d5ee71f aarch64: fix error recovery in aarch64_dpm_prepare
Flush DTRRX with a dummy read if it's full, clear sticky errors
by writing CSE bit to EDRCR register.

Change-Id: Ia42ae9d3859ba6cbe892d48584e21acdd4e25c84
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 21a5c40430 aarch64: formalize use of CTI in halt and resume
Use configured CTI base address instead of hardcoded value, if
available.
Use symbolic constants instead of raw hex offsets.
Trim halt and resume code to what is actually necessary.

Change-Id: I4997c2bcca7cebf5ad78859a6a12abe8639594ed
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 4ba8388f26 aarch64: fix context and hybrid hardware breakpoints
Fix 64bit address setting
Fix register spacing (16 instead of 4)
Set HMC bit for all but linked context match breakpoints,
where the bit is ignored anyway

Change-Id: I48428f39154a6fe5fadc075ca918d1500a0bb241
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky b085570de9 aarch64: deconflict debug register names
CPUDBG_ -> CPUV8_DBG_ for armv8 debug registers.

Change-Id: I3d24cc209309fa9bbeb5c3e6c88a572383c9360e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 53573f7860 aarch64: Implement MA mode for bulk memory reads and writes
- 64bit addresses are supported
- Aarch32 state is supported

Change-Id: I8c37fa166954d09195d08c6963b8017194e350f5
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky db97bb4a9d aarch64: make DCC read/write functions operate on struct armv8_common
Change the signature of aarch64_(read|write)_dcc[_64] to take a
"struct armv8_common *" as the context to operate on. No functional
change.

Change-Id: Ie501113f65ea22aff2eee173ec717f6908a63494
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky a3b9e12aec aarch64: introduce dpm extension for ARMv8
Add or move ARMv8 related dpm function to their own source module

Change-Id: Id93d50be0b8635bd40ddb2a74fe8746ff840d736
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky df32af234c target: add -ctibase config option in addition to -dbgbase
Some vendors don't fully populate the ROM table, e.g. BCM2357 (used in
Raspberry Pi 3) doesn't list CTI, however it is mandatory for halting
an ARMv8 core and therefore it's always present (and required),
regardless of the ROM table listing it or not.

Change-Id: Ia18a4f1b5b931ccd19805b188ebf737c837c6b54
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky f2a271e264 aarch64: fix reading of MPIDR
read MPIDR register through correct MSR instruction.

Change-Id: I7e2d00c2871191c4168b177a7a809443b0db4c82
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky ced4108d26 aarch64: add symbolic definitions for armv8 opcodes
To replace hexadecimal constants with descriptive names and increase
flexibility.

Change-Id: I6f7b6f045866ed8b9360f54b640ecdb307eebc51
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:26 +01:00
David Ung 6b554b3b0e aarch64: Correct target state for hardware step
When using hardware step for doing stepping, the existing DSCR records
the event as external debug request.  This will generate a SIGINT event
to GDB and causes it to stop the stepping process.
For aarch64, read DESR to check if the event is a hardware step and set
state to DBG_REASON_SINGLESTEP.
With this patch, GDB can now do source level stepping.

Change-Id: I1d06f819578c74b3ac17376c67f882adddea1f52
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:59:15 +01:00
David Ung a12c15e21f aarch64: Enable resuming with address
Enable resuming to an address.

Change-Id: I29c7d3b56f6cbf8b3cd02c93733fc96f45000af3
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:58:05 +01:00
pierre Kuo 13d13b2e2a aarch64: Add instruction stepping support using hardware step
Use AARCH64's hardware step event to do stepping.

Change-Id: I2d029ceeadd381913d0c3355c8787b11dacff7f7
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:57:29 +01:00
David Ung 5ee67ce024 aarch64: Enable halting debug mode on breakpoint set
Ensure that we allow halting debug mode after setting breakpoint

Change-Id: I6f0d7a4a4775a93c133fb1ec31dfe3324d9f7395
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:56:39 +01:00
pierre Kuo 236c9966dd aarch64: Add hardware breakpoint support
Enable the use of hardware breakpoint on AARCH64.

Change-Id: I59caaa6d92ac60278af8938625b1790a1787372f
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:55:55 +01:00
David Ung d376f7f518 aarch64: Add ARMv8 AARCH64 support files
Add new AARCH64 target and ARMv8 support files.
This is an instantiation from the cortex_a files but modified to support
64bit ARMv8. Not all features are complete, notably breakpts and single
stepping are not yet implemented.
Currently it lets you halt of the processors, resume, dump cpu
registers,
read/write memory and getting a stack trace with gdb.

> halt
invalid mode value encountered 5
target state: halted
unrecognized psr mode: 0x5
target halted in ARM state due to debug-request, current mode:
UNRECOGNIZED
cpsr: 0x600001c5 pc: 0x00093528
MMU: disabled, D-Cache: disabled, I-Cache: disabled

> targets
    TargetName         Type       Endian TapName            State
--  ------------------ ---------- ------ ------------------ ------------
 0* cpu0               aarch64    little cpu.dap            halted

> reg
===== arm v8 registers
(0) r0 (/64): 0x00000000FFFFFFED (dirty)
(1) r1 (/64): 0x00000000F76E4000
(2) r2 (/64): 0x0000000000000000
(3) r3 (/64): 0x0000000000010000
(4) r4 (/64): 0xFFFFFFC06E2939E1
(5) r5 (/64): 0x0000000000000018
(6) r6 (/64): 0x003A699CFB3C8480
(7) r7 (/64): 0x0000000053555555
(8) r8 (/64): 0x00FFFFFFFFFFFFFF
(9) r9 (/64): 0x000000001FFEF992
(10) r10 (/64): 0x0000000000000001
(11) r11 (/64): 0x0000000000000000
(12) r12 (/64): 0x00000000000000F0
(13) r13 (/64): 0x00000000EFDFEAC8
(14) r14 (/64): 0x00000000F6DDA659
(15) r15 (/64): 0x0000000000000000
(16) r16 (/64): 0xFFFFFFC0000F9094
(17) r17 (/64): 0x0000000000000000
(18) r18 (/64): 0x0000000000000000
(19) r19 (/64): 0xFFFFFFC00087C000
(20) r20 (/64): 0x0000000000000002
(21) r21 (/64): 0xFFFFFFC000867C28
(22) r22 (/64): 0xFFFFFFC000916A52
(23) r23 (/64): 0xFFFFFFC00116D8B0
(24) r24 (/64): 0xFFFFFFC000774A0C
(25) r25 (/64): 0x000000008007B000
(26) r26 (/64): 0x000000008007D000
(27) r27 (/64): 0xFFFFFFC000080450
(28) r28 (/64): 0x0000004080000000
(29) r29 (/64): 0xFFFFFFC00087FF20
(30) r30 (/64): 0xFFFFFFC000085114
(31) sp (/64): 0xFFFFFFC00087FF20
(32) pc (/64): 0xFFFFFFC000093528
(33) xPSR (/64): 0x00000000600001C5

And from gdb

(gdb) bt
 #0  cpu_do_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/mm/proc.S:87
 #1  0xffffffc000085114 in arch_cpu_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/kernel/process.c:107
 #2  0x0000000000000000 in ?? ()

Change-Id: Iccb1d15c7d8ace7b9e811dac3c9757ced4d0f618
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:54:49 +01:00
David Ung 84a0bb4a3c arm_dpm: Add 64bit register handling.
Add various function to read/write ARMv8 registers.

Change-Id: I16f2829bdd0e87b050a51e414ff675d5c21bcbae
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:54:01 +01:00
David Ung 9cbfc9feb3 arm_dpm: Add new state ARM_STATE_AARCH64
Add new enum ARM_STATE_AARCH64 to the list of possible states.

Change-Id: I3cb2df70f8d5803a63d8374bf3eb75de988e24f8
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:52:52 +01:00
David Ung ea45db5c8a server: Allow 64 address to be send over GBD server
Accept 64 bit addresses from GDB read memory packet.
Also allow breakpoint/stepping addresses to take 64bit values.

Change-Id: I9bf7b44affe24839cf30897c55ad17fdd29edf14
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:51:00 +01:00
Dongxue Zhang 47b8cf8420 target: Add 64-bit target address support
Define a target_addr_t type to support 32-bit and 64-bit addresses at
the same time. Also define matching TARGET_PRI*ADDR format macros as
well as a convenient TARGET_ADDR_FMT.

In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000)
be least invasive by leaving the formatting unchanged apart from the
type;
for generic code adopt TARGET_ADDR_FMT as unified address format.

Don't silently change gdb formatting here, leave that to later.

Add COMMAND_PARSE_ADDRESS() macro to abstract the address type.
Implement it using its own parse_target_addr() function, in the hopes
of catching pointer type mismatches better.

Add '--disable-target64' configure option to revert to previous 32-bit
target address behavior.

Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
[AF: Default to enabling (Paul Fertser), rename macros, simplify]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:50:17 +01:00
Paul Fertser 0ecee83266 Restore normal development cycle
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2017-01-23 00:46:51 +03:00
Paul Fertser 646566e006 The openocd-0.10.0 release
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2017-01-22 23:31:28 +03:00
Paul Fertser 0e7bcf850b NEWS: last pre-release changes
Change-Id: I93203717f9096880298c10efebf05d59f888f34b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3954
Tested-by: jenkins
2017-01-22 13:22:51 +00:00
Matthias Welwarsky 59820c18d0 arm_dpm: avoid duplicating the register cache
This bug was already attempted to fix in an earlier patch but
merging the "defer-examine" feature caused a regression, which this patch
tries to fix again.

Change-Id: Ie1ad1516f0d7f130d44e003d6c29dcc1a02a82ca
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3951
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-20 08:28:35 +00:00
Paul Fertser 1c4aa20b21 Restore -dev suffix
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 19:14:37 +03:00
Paul Fertser 9e74171775 The openocd-0.10.0-rc2 release candidate
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 19:12:48 +03:00
Paul Fertser f6279c00c3 NEWS: mention SWO capture facility of the new J-Link driver
Change-Id: I4fc150584f3f0c5df5c39ae512125b42893331f0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3948
Tested-by: jenkins
2017-01-15 15:20:16 +00:00
Paul Fertser af4a2f3518 jtag: core: report TRST and SRST as asserted only when they really are
When SRST is never enabled, the global jtag_srst variable is left at its
initial state, that is, -1, and it does _not_ mean SRST is currently
asserted. Same about TRST.

Fixes "reset halt" in cases when srst_pulls_trst but srst usage is not
enabled.

Change-Id: I8d2e9120479de4cfbf5561033926c9ef945eecc9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3943
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-01-15 11:02:14 +00:00
Tomas Vanek 93bc4ec40f flash/nor: fix doc/help and range test for flash protect
Commit 77a1c01ccb introduced infrastructure
for utilizing protection blocks of different size than erase sector.
Parts of doc/help kept reading 'sector' instead of 'protection block'.
flash_driver_protect() parameter range testing did not switched
to bank->num_prot_blocks.
This change fixes it.

Change-Id: Iec301761190a1a1bcc4cb005a519b9e5e4fede51
Reported-by: Mark Odell <mark@odell.ws>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3917
Tested-by: jenkins
Reviewed-by: Mark Odell <mrfirmware@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 11:01:36 +00:00
Tomas Vanek 390c9aca1f tcl at91samdXX.cfg: partially revert change 3722
Commit 25d7ba19c9 introduced a problem
with 'reset halt' due to setting srst_pulls_trst:

Error: cortex_m.c:595 cortex_m_halt(): can't request a halt while
  in reset if nSRST pulls nTRST

Sorry, I don't know why I overlooked it when I tested #3722.

Change-Id: I41e9473dd91a86d93cf3e78b1fbbdfe1dd188d83
Reported-by: Ladislav Laska <laska@kam.mff.cuni.cz>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3942
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-01-15 11:01:00 +00:00
Matthias Welwarsky 2934ac454e adi_v5_jtag: make sure SSTICKYERR is cleared after a POR
Don't terminate the transaction end-check early if debug power-loss
was detected, without clearing SSTICKYERR.

Change-Id: I83b6a4a20523eea42e48a15297f972a730aa21a8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3947
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 11:00:32 +00:00
Andreas Fritiofson 52a396656a doc: Improve ftdi driver section
Fix typo and a sentence that sounds strange since the ft2232 driver
was removed.

Add documentation for the SWD signal usage.

Remove the text mentioning a default VID:PID which doesn't exist.

Change-Id: I27eba571f2f7c46bdb6ae623ab285595018e99d9
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3935
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 10:38:51 +00:00
Andreas Fritiofson 7436f7c2c0 helper,rtos,server: Restore missing warning flags
These libraries override the used CFLAGS without adding the
defaults. This didn't have any effect until change
http://openocd.zylin.com/3870 (ef4c139). Restore by adding
AM_CLAGS to the per-target CFLAGS.

Interestingly, automake seems to clear the CFLAGS for the target
even if the override variable is only mentioned within a non-active
conditional branch, such as the IS_MINGW for the affected libraries.

Change-Id: I805206865e59e3fa33a7ea3c0d3472e51219351c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3927
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 10:16:16 +00:00
Paul Fertser 7851207cf0 jtag: drivers: build usb_blaster only if enabled
Fix build failure when libusb dev files are not available and
so usb_blaster is disabled.

Change-Id: I4cda7df689cdb4b62b733cbbab813241cf561e29
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3920
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-01-15 10:14:53 +00:00
Marc Schink 33db10a158 libjaylink: Update to 0.1.0 release
Change-Id: I5a905ccda346c09187f7f8e8229ae71d3353128f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3946
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 10:10:48 +00:00
Paul Fertser c404ff5d3a Restore -dev suffix
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2016-12-25 18:15:24 +03:00
Paul Fertser 1edc019f02 The openocd-0.10.0-rc1 release candidate
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2016-12-25 18:15:05 +03:00
Paul Fertser d6fad0c90d NEWS: prepare for new release
Change-Id: I141ff17f6dcab7e164a19c91b975ddd455d26dbc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3854
Tested-by: jenkins
2016-12-25 14:11:16 +00:00
Paul Fertser d611f5bcb8 doc: fix underfull and overfull boxes
This is needed to generate PDF user manual without typesetting
artifacts.

Change-Id: Ibcbd804dac2b9415459327f53f6fad0dc38fa5c6
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3919
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-12-25 13:29:38 +00:00