Trying to disable OTP write protection by running e.g. `flash protect
1 0 1 off` would already be rejected with an error code, but that would
result in a generic "failed setting protection for blocks 0 to 1"
message. Now a more specific error message is also printed, telling the
user why it failed.
Change-Id: I6d4974eb0bcd23a0a6cf68ff955d9e59b8b1b06a
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Reviewed-on: https://review.openocd.org/c/openocd/+/7615
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
this new STM32 series family introduces 2 devices:
STM32C011xx (0x443) and STM32C031xx (0x453)
both devices have 32 Kbytes single flash bank.
Change-Id: I4e890789e44e3b174c0e9c0e1068383ecdbb865f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6874
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The pointer nand_devices is used in two file.
Move the extern prototype in code.h
Detected through 'sparse' tool.
Change-Id: I7237359fd1a008770a624725cd0b3d8632b4166e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7674
Tested-by: jenkins
Don't use 'extern' in a C file, but declare the exported function
in a H file.
This helps validating the function prototype across declaration
and use.
Detected through 'sparse' tool.
Change-Id: I2c22b084fb513f4b3b1b1db96dfbc8fa4bfe7238
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7666
Tested-by: jenkins
The static analyser 'sparse' complains, while compiling a nor
driver, that the struct flash_driver is declared in the file as
non static, but it is not exposed through an include file.
The message is:
warning: symbol 'XXX' was not declared. Should it be static?
Move the list of flash_driver's declaration in driver.h
Fix some incorrect non-const declaration and remove redundant
forward declarations.
Change-Id: I5e41d094307aac4a57dfa9a70496ff3cf180bd92
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7662
Tested-by: jenkins
The static analyser 'sparse' complains, while compiling a nand
driver, that the struct nand_flash_controller is declared in the
file as non static, but it is not exposed through an include file.
The message is:
warning: symbol 'XXX' was not declared. Should it be static?
Move the list of nand_flash_controller's declaration in driver.h
While there, drop the unused/commented boundary scan controller.
Change-Id: I7dc32cef55be13ba537abe0f4c47b135d837126c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7661
Tested-by: jenkins
Add static type to symbols that are not used elsewhere.
Detected through 'sparse' tool.
Change-Id: I2bdac5d2b06a6dbed5c27bfdb1cf36eee90ad823
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7594
Tested-by: jenkins
On 32 bit hosts, gcc should consider constants without suffix as
32 bits values. Adding a cast to convert it to 64 bits should not
be enough.
Use the suffix 'ULL' to guarantee it is a 64 bit.
Detected through 'sparse' tool.
Change-Id: If6be35bd3cbbc7c3a83e0da1407e611f07ff6e06
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7593
Tested-by: jenkins
If the file read abnormally, need to close it which was opened before.
Signed-off-by: panciyan <panciyan@eswincomputing.com>
Change-Id: I6142f154741dcd38088b7add2793219ee4dd2ae9
Reviewed-on: https://review.openocd.org/c/openocd/+/7546
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The mixed use of jim commands and OpenOCD commands is error prone
due to handling of errors through JIM_xx and ERROR_yy.
Rewrite the jim command 'flash list' as OpenOCD command.
While there:
- format in a human readable way the output dictionary list, while
preserving the structure of its TCL data;
- add the mandatory 'usage' field.
Change-Id: I1ee69870d3ab3c1cfc46cd2b8ec03de6b2300bd6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7486
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
All DIDs are taken from "SAM R34/R35 Errata Sheet" (DS80000834A).
Signed-off-by: Andrew Lalaev <andrey.lalaev@gmail.com>
Change-Id: Ie35f58e61bb02919c0676c91938c90192481d995
Reviewed-on: https://review.openocd.org/c/openocd/+/7521
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
According to the datasheets these MCUs have 40Kb RAM.
Signed-off-by: Andrew Lalaev <andrey.lalaev@gmail.com>
Change-Id: I52b8a0c86035bccd6f3c1a478bb2e558bca4ae86
Reviewed-on: https://review.openocd.org/c/openocd/+/7520
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This probably crept in when merging in upstream in the past.
Change-Id: Iccce4515b6b5d4a90773f6d432754b065fb240bb
Signed-off-by: Tim Newsome <tim@sifive.com>
A bunch of new SPI flash (Adesto, Cypress, XTX Tech, mainly octal)
IDs and SPI FRAM (Infineon) IDs added. Backward compatible change
of ID interpretation: The previously unused 4th byte now acts
as continuation code (0x7F) count for manufacturer id, cf.
JEDEC JEP106BC. Currently this affects only some recent octal flash
and FRAM devices, which are only supported by stmqspi and cmspi
flash drivers.
Change-Id: Ibdcac81a84c636dc68439add4461b959df429bca
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6929
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Polling the target makes no harm during PSoC 4 flash write in the current
OpenOCD code. Don't mask it.
Change-Id: I6625ded0162ee3a96b92188844d0d2d6c30101c2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7162
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Simply move numicro M0 flash write assembly to contrib/loaders. Also,
modify corresponding Makefile and generated numicro_m0.inc.
To make the path more general, this patch rename the path
"contrib/loaders/flash/numicro_m4" to "contrib/loaders/flash/numicro" as
well.
Signed-off-by: Jian-Hong Pan <chienhung.pan@gmail.com>
Change-Id: I9adea24c2b3c97319a9b015cf50257f3d131dc26
Reviewed-on: https://review.openocd.org/c/openocd/+/7346
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch is picked from the flash part of OpenOCD-Nuvoton's commit
("flash: supported Nuvoton M4 series. jtag: Used HW reset instead of
auto reset. tcl: added a configuration file for Nuvoton M4 series.") [1]
to support flashing Nuvoton's Cortex-M4 chips: M541 & NUC442/472 series.
The code comes from the commit basically. Jian-Hong Pan tweaked for the
compatibility with current OpenOCD. So, leave the author as Zale Yu.
[1]: https://github.com/OpenNuvoton/OpenOCD-Nuvoton/commit/c2d5b8bfc705
Signed-off-by: Zale Yu <cyyu@nuvoton.com>
Signed-off-by: Jian-Hong Pan <chienhung.pan@gmail.com>
Change-Id: I9dc69eccb851df14c1b0ce2f619d7b3da0aa92aa
Reviewed-on: https://review.openocd.org/c/openocd/+/7329
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch is picked from the flash part of OpenOCD-Nuvoton's commit
("flash: supported Nuvoton M4 series. jtag: Used HW reset instead of
auto reset. tcl: added a configuration file for Nuvoton M4 series.") [1]
It reorders Nuvoton MCU part list and spreads out the way to define the
banks' base address & size of the parts.
The code comes from the commit basically. Jian-Hong Pan tweaked for the
compatibility with current OpenOCD. So, leave the author as Zale Yu.
[1]: https://github.com/OpenNuvoton/OpenOCD-Nuvoton/commit/c2d5b8bfc705
Signed-off-by: Zale Yu <cyyu@nuvoton.com>
Signed-off-by: Jian-Hong Pan <chienhung.pan@gmail.com>
Change-Id: I1f21f54dfdf53e5b8ea04d803347d1dbc8c321a0
Reviewed-on: https://review.openocd.org/c/openocd/+/7339
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Do not read ID from SPI flash and suppress autodetection
if non-zero flash bank size is configured.
Change-Id: Idcf9ee6ca17f9fa89964a60da7bf11e47b4af5e7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7241
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The HiFive Inventor uses this flash chip, so adding it will allow for
openocd to be used to program it. These values were taken from the
chip's documentation.
Signed-off-by: Fawaz Tirmizi <fawaz@rivosinc.com>
Change-Id: I15c9d35f99d4500f73134cdc2d1b9ab6279b491c
Reviewed-on: https://review.openocd.org/c/openocd/+/7135
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Flashing a SAMD21J17D was failing during NVM erase. The samd21
datasheet specifies that one cause of error conditions is executing an
NVM command while the previous command is still running. The solution
is to wait for INTFLAG.READY after a command is issued.
SAMD21J17A was not exhibiting this problem. Perhaps the later silicon
revision has slower NVM erase times.
Signed-off-by: Dan Stahlke <dan@stahlke.org>
Change-Id: I19745dae4d3fc6e3a7611dcac628e067cb41e0f0
Reviewed-on: https://review.openocd.org/c/openocd/+/7391
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The variable retval is assigned a value that is never used.
Scan-build reports:
Although the value stored to 'retval' is used in the
enclosing expression, the value is never actually read
from 'retval'.
Drop the dead assignment.
Change-Id: I11588dee748a55d52aa7f35bc1967b7df55af7fc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7379
Tested-by: jenkins
target_run_flash_async_algorithm expects the source_buffer to have
at least 2 words reserved for read and write pointers in addition to the
FIFO buffer. If the size of the data to be flashed is <= 8 bytes then
the flash function will fail with "corrupted fifo read pointer" error.
Ensure the allocated buffer is big enough to hold both FIFO buffer and
read/write pointers.
Change-Id: I09c22eaac517b8cfea8e0b463f5deb6b98afd267
Signed-off-by: Simon Smiganovski <simon.smiganovski@fruitcore.de>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7342
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The variable retval is assigned a value that is never used, as it
is reassigned few lines below.
Drop the dead assignment.
Change-Id: Id4e9134408fab3e04936d36e95724bf8d3ab55aa
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7304
Tested-by: jenkins
ST-Link v2 dongles can be used with many cortex-m parts, but they have
one limitation -- they can only perform 8-bit and 32-bit writes to the
target. 16-bit writes are done using a pair of 8-bit writes. While not
usually an issue, in the case of the at91samd flash driver, the 16-bit
'command' register must have both halves written in the same
operation.
Fortunately, this register has two pad bytes above it in the address
space, making it safe to always access with 32-bit operations.
Change-Id: I44b0db9406982a8db5818c0533d3101618741db2
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7234
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The num_reg_params parameter of target_run_algorithm() was not
updated when setting "sp" was introduced. Therefore "sp" as the last
register parameter was not passed to a target algo.
Introduce a new helper variable with correct count of register parameters
and use it everywhere needed.
Change-Id: I934a71380783d98917167f1569145808ef23540f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7225
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Change-Id: Idf3bce842b4507c1f12692b5fbcd6730637de9db
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7216
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Tested-by: jenkins
Flash read_id/erase/write operation on running target failed
in target_run_algorithm() anyway. It generated lot of error messages.
Check the target state and bail out early if target is running.
Change-Id: I903f5f38c8e61016e5002b235e5f07803bd2ec4e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7215
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
SPI flash erase often takes longer than the fixed timeout 3 seconds.
Introduce a configurable timeout_ms parameter to rp2040_call_rom_func().
Compute the erase timeout from the number of blocks to be erased.
While on it make the timeouts shorter for connect flash, flush cache and
enter/exit xip (1 second is enough).
Change-Id: I552bfa317ee17064de3a54ec2f0c63e84ba87222
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7214
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
The size of the flash write buffer should be rounded
down to the multiply of flash page size.
Using write chunks of unadjusted size results in write of chunks
unaligned to flash pages.
Change-Id: If7931362ee193dff4dc2df7ec78f13530658cf08
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7187
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
While on it restore memory-mapped mode also after flash erase
(originally was restored after flash write only).
Change-Id: I5e153b79ac27a8439f57239ce90ce8a79c0bb8a1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7186
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Prepend stack_grab_and_prep() function name by rp2040_ prefix.
Introduce target helper variable in rp2040_stack_grab_and_prep()
and use it instead of dereferencing bank->target several times.
Move flash ID reading code to the new rp2040_spi_read_flash_id()
function.
Change-Id: I9d6e51e17e36e6230155a586065499f2f260089a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7185
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
With the old checkpatch we cannot use the correct format for the
SPDX tags in the file .c, in fact the C99 comments are not allowed
and we had to use the block comment.
With the new checkpatch, let's switch to the correct SPDX format.
Change created automatically through the command:
sed -i \
's,^/\* *\(SPDX-License-Identifier: .*[^ ]\) *\*/$,// \1,' \
$(find src/ contrib/ -name \*.c)
Change-Id: I6da16506baa7af718947562505dd49606d124171
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7153
Tested-by: jenkins
Variables should not be declared in the include file, otherwise
multiple include will cause multiple instances.
Move the declaration in the C file and make it static.
Change-Id: I8b4884cba643a792a78df4e123aa324b19d92279
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7172
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Symbols that are not exported should be declared as static.
Change-Id: I6a059080bbba9b3559d26c641b217be8be3b199e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7169
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Without the help of checkpatch, some CamelCase symbol passed
through the filter of maintainer's review.
Drop them.
Change-Id: If5fb07b2ffb89e853dd2a61f20d4134aa6e20d24
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 48f267d4ad ("flash/stm32l4x: avoid using magic numbers for device ids")
Fixes: 5ab74bde06 ("semihosting: User defined operation, Tcl command exec on host")
Reviewed-on: https://review.openocd.org/c/openocd/+/7154
Tested-by: jenkins
kinetis.c:994:61: error: '%u' directive output may be truncated
writing between 1 and 10 bytes into a region of size 4
[-Werror=format-truncation=]
tested with scan-build-14
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I72d141a3f8e19ca3596beee2be8434fc8492946f
Reviewed-on: https://review.openocd.org/c/openocd/+/7140
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
While on it rename misleading write_algorithm_sp to write_algorithm_stack
and change messages referring 'stack pointer' instead of stack.
No functional change.
Change-Id: Ibb9897d3f01734812ed0f8bc8cd43b935a573f8a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7132
Tested-by: jenkins
Reviewed-by: Salvatore Giorgio Pecorino <salvatore-giorgio.pecorino@st.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
FLASH_MAX_ERROR_STR is not used since commit 815c3b3533
(merged in ~2008)
Change-Id: Ic117a2e3d22235c31dc14533b6564ebf5a13ae58
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7121
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The value of struct flash_driver::command can be NULL when the
flash driver does not need to add any new command.
Remove empty command definitions.
Change-Id: I5413967d4069030234469822d24e9825425ae012
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7120
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
When printing memory sizes standard ISO 80000-1 prefixes should be used.
Also a space should be added between any number and its unit according
to papers publication rules.
Change-Id: Id1d35e210766b55c201de4e80ac165d8d0414d0a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6416
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The same flag 'jtag_poll' is currently used as local data for the
command 'poll' and to temporarily mask the target polling.
This can cause unexpected behavior if the command 'poll' is
executed while polling is temporarily masked.
Add a new flag 'jtag_poll_en' to hold the temporarily mask
condition and keep 'jtag_poll' for the 'poll' command only.
While there, change the initial assignment of 'jtag_poll' using
the proper boolean value.
Change-Id: I18dcf7c65b07aefadf046caaa2fcd2d74fa6fbae
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7009
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
The flash/nor subsystem uses bus_width and chip_width for CFI
external flash only. Drop setting these values for internal flash.
Change-Id: I64e79ab38b6e39e845ff96fbf4f60145e3b9690a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7098
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Kinetis 100 MHz rev 1.x devices have no SMC and hence need different
checking of the run mode. Details about the differences between rev 1.x
and 2.x of the Kinetis 100 MHz series can be found here:
https://www.nxp.com.cn/docs/en/application-note/AN4445.pdf
Signed-off-by: Martin Hierholzer <martin.hierholzer@desy.de>
Change-Id: Ib705385a931275159bdae9b31caecc6ec9c0da1e
Reviewed-on: https://review.openocd.org/c/openocd/+/7015
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Replace the FSF boilerplate with the SPDX tag.
The SPDX tag on files *.c is incorrect, as it should use the C99
single line comment using '//'. But current checkpatch doesn't
allow C99 comments, so keep using standard C comments, by now.
Change-Id: Ic7db91fe37d1139d42c99e303b3243b6c8fe3ea2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7067
Tested-by: jenkins
The SPDX tag is aimed at machine handling and it's thus expected
to be placed in the first line in specific format.
Move the SPDX tag to the first line and fix it where needed.
The SPDX tag on files *.c is incorrect, as it should use the C99
single line comment using '//'. But current checkpatch doesn't
allow C99 comments, so keep using standard C comments, by now.
Change-Id: Ie9a05f530009d482a4116eebd147fd7e1ee3d41e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7066
Tested-by: jenkins
Use the standard SPDX tag, where it was incorrectly applied.
The SPDX tag on files *.c is incorrect, as it should use the C99
single line comment using '//'. But current checkpatch doesn't
allow C99 comments, so keep using standard C comments, by now.
Change-Id: Iaec63abc6e0a38e5b0ae0ea7f5ecee7ca007bbbd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7065
Tested-by: jenkins
Replace the FSF boilerplate with the SPDX tag.
Change-Id: I29f51caa5ae9854d05ce7e150d168a7002607cd1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7064
Tested-by: jenkins
Add the new license text in the license pool.
Replace the GPL and BSD boilerplates with the SPDX tag.
Add the copyright owner of Atmel, as it was explicitly listed in
the BSD boilerplate text.
The SPDX tag on files *.c is incorrect, as it should use the C99
single line comment using '//'. But current checkpatch doesn't
allow C99 comments, so keep using standard C comments, by now.
Change-Id: Ibb117dbf8402269be3e5ba4f4c472162494d813f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7062
Tested-by: jenkins
Add the license exception text in the license pool.
Add the exception chapter in license-rules.txt
Replace the boilerplate with the SPDX tag.
The SPDX tag on files *.c is incorrect, as it should use the C99
single line comment using '//'. But current checkpatch doesn't
allow C99 comments, so keep using standard C comments, by now.
Change-Id: Ied513b7c9c0722ed2a9c11dbdff3fbf59f1b41ce
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7061
Tested-by: jenkins
Replace the BSD boilerplate with the SPDX tag.
The SPDX tag on files *.c is incorrect, as it should use the C99
single line comment using '//'. But current checkpatch doesn't
allow C99 comments, so keep using standard C comments, by now.
Change-Id: I5a8cab2051eee7eb99adf67f9631b0827c1359de
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7059
Tested-by: jenkins
Some file miss completely the license tag.
Add the SPDX tag, using the same GPL-2.0-or-later license of the
OpenOCD project.
The SPDX tag on files *.c is incorrect, as it should use the C99
single line comment using '//'. But current checkpatch doesn't
allow C99 comments, so keep using standard C comments, by now.
Change-Id: I1fb51e722232d14f050458a820c3041de3dc9138
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7058
Tested-by: jenkins
Add the SPDX tag to makefiles, configuration scripts and tcl files
present in the folders under src/
Change-Id: I1e4552aafe46ef4893d510da9d732c5f181784a4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7051
Tested-by: jenkins
While an ADIv5 DAP can only have 256 AP, ADIv6 can provide till
2**40 (1,099,511,627,776) AP per DAP.
The actual trivial code implementation for ADIv5 (that uses an
array of 256 ap in the struct adiv5_dap) cannot be extended as-is
to handle ADIv6.
The simple array of 256 AP can be reused as a dynamic storage for
ADIv6 ap:
- the ADIv5 AP number is replaced by the ADIv6 base address;
- the index of the array (equal to ADIv5 AP number) has no link to
any ADIv6 property;
- the ADIv6 base_address has to be searched in the array of AP.
The 256 elements in the AP array should be enough for any device
available today. In future it can be easily increased, if needed.
To efficiently use the 256 elements in the AP array, the code
should associate one element of the array to an ADIv6 AP (through
the AP base address), then cancel the association when the AP is
not anymore needed. This is important to avoid saturating the AP
array while exploring the device through 'dap apreg' commands.
Add a reference counter in the struct adiv5_ap to track how many
times the struct has been associated with the same base address.
Introduce the function dap_get_ap() to associate and return the
struct, and dap_put_ap() to release the struct. For the moment the
code covers ADIv5 only, so the association is through the index.
Use the two functions above and dap_find_get_ap() throughout the
code.
Check the return value of dap_get_ap(). It is always not NULL in
the current ADIv5-only implementation, but can be NULL for ADIv6
when there are no more available AP in the array.
Instrument dap_queue_ap_read() and dap_queue_ap_write() to log an
error message if the AP has reference counter zero, meaning that
the AP has not been 'get' yet. This helps identifying AP used
without get/put, e.g. code missed by this patch, or merged later.
Instrument dap_cleanup_all() to log an error message if an AP has
reference counter not zero at openocd exit, meaning that the AP
has not been 'put' yet.
Change-Id: I98316eb42b9f3d9c9bbbb6c73b1091b53f629092
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6455
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Tested-by: jenkins
target_to_armv7m() just returns a type-cast of target->arch_info,
so the test has no value.
Following target_run_algorithm() checks magic number so
we need not worry about execution on mismatched architecture.
Change-Id: Ic9892a488a42af1d8e8731eddb39240deeb26020
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6755
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
fix "Declared variable-length array (VLA) has zero size" warnings
while at there instrument the probe function to ensure the flash bank
contains at least 1 sector
Change-Id: I3ba0e6345881557ad1aab2d1b41eee438b49fe04
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6470
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The command 'flash erase_check' showed the message
'Running slow fallback erase check - add working memory'
even in the case the target didn't implement blank_check_memory.
Change return code of target_blank_check_memory() in this case
and sense it in default_flash_blank_check() and show a message
without a request for working memory.
Change-Id: I7cf9bf77742964b4f377c9ce48ca689e57d0882f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6765
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Fixes "variable set but not used" errors.
Tested with Homebrew clang version 13.0.1
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ia90baf5b4857db2b5569ebe6adbbb832de772aad
Reviewed-on: https://review.openocd.org/c/openocd/+/6971
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Added bluenrg-lps support
Added file for the board steval-idb012v1
Fixed size_info information using a mask
Changed the if condition in bluenrg-x.cfg to be valid only for bluenrg-1 and bluenrg-2
Signed-off-by: Salvatore Giorgio PECORINO <salvatore-giorgio.pecorino@st.com>
Change-Id: Ic0777ec0811ee6fac7d5e1d065c4629e47d84a1f
Reviewed-on: https://review.openocd.org/c/openocd/+/6928
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Per mainline, use stm32f1x instead. Tested that this is working.
Change-Id: Icda4b2a39e06e2adf9bbfb984bd578347f43d7d1
Signed-off-by: Tim Newsome <tim@sifive.com>
Conflicts:
tcl/target/gd32vf103.cfg
I kept our version, except I changed the flash device as happened in
mainline. Once this file settles down in mainline, we can copy it
wholesale into this fork.
Change-Id: I4c5b21fec0734b5e08eba392883e006a46386b1c
According to GigaDevice user manuals the devices have OBRLD bit in FMC_CTL
register which is functionally compatible with OBL_LAUNCH @ FLASH_CR
of STM32 counterparts.
Change-Id: I84d231b38815fcb6452fd73b9153b269cce3b737
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6759
Tested-by: jenkins
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
The device has compatible flash macro with STM32F1 family, reuse
stm32f1x driver code.
Detect non-ARM target - for simplicy test target type name 'riscv'
and the address has 32 bits.
In case of RISC-V CPU use simple chunked write algo - async algo
cannot be used as the core implemented in this device doesn't
allow memory access while running.
Change-Id: Ie3886fbd8573652691f91a02335812a7300689f7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6704
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
The current code locks the flash controller in case of error during
flash write only. An error in other flash operations may cause the
flash is left unlocked.
Implement locking also after error in erase, mass erase, options
write and erase.
Change-Id: I26c2ed7914e7847122306f29b777b9eefd1dc580
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6710
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
stm32x_wait_status_busy() has two side effects in case of flash programming error:
- reports error
- clears error bit in status register
Use stm32x_wait_status_busy() to report also flash error during target
algo flash write.
While on it use more descriptive error codes in stm32x_wait_status_busy().
Change-Id: I6e1cffc2aa5411b918a23ed62d5194910888a9d1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6709
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Use target_get_working_area_avail() instead of try-fail iteration.
Call destroy_reg_param() in a for cycle.
Change-Id: I1891d1ffdea99010c6ab66b9578400b9d7922e20
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6708
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Mostly refactoring.
Rename original stm32x_write_block() to stm32x_write_block_async()
as it uses target async algo.
Introduce new stm32x_write_block() and move slow, host controlled
fallback flash write there.
The change allows stm32x_write_options() to use slow flash write fallback.
While on it rename variables where halfword count is stored.
Change-Id: I386ae15cf052b1490461ed8f7eea5b4403d466f7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6706
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Considering this use case: (using STM32 L5 or U5)
1- first probe : TZEN enabled, RDP level 0
flash_regs_base |= STM32L5_REGS_SEC_OFFSET => 0x50022000
2- the user promotes the RDP to level 0.5
3- the second probe, fails to read OPTR using secure flags_regs_base:
used OPTR address is 0x50022040
Step 3 fails because when RDP is level 0.5, we should use Non-Secure
flash registers.
To fix this, always use NS flash regs to read OPTR in probe functions.
Fixes: 80d323c6e8 (flash/stm32l4x: introduce auto-probe when OPTR is changed)
Change-Id: I296aa633972b0c410b927488c999584a07b912d3
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6864
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
STM32H7Ax/7Bx devices have a different WPSN mask (0xFFFFFFFF),
(0xFF for STM32H74x/75x and STM32H72x/73x devices).
And when supporting STM32H7Ax/7Bx devices, stm32x_protect() was
not updated accordingly.
Change-Id: I081217af3e5ed815b67bfdfec7f4ebaa3152a865
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Fixes: 0b7eca1769 (flash/stm32h7x: add support of STM32H7Ax/H7Bx devices)
Reviewed-on: https://review.openocd.org/c/openocd/+/6858
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
* flash/nor/atsame5: add LAN9255 devices
Support Microchip LAN9255 devices with embedded SAME53J MCU.
Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Change-Id: Ia811c593bf7cf73e588d32873c68eb67c6fafad7
Reviewed-on: https://review.openocd.org/c/openocd/+/6811
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
* tcl/board: Add EVB-LAN9255 config
Config for EVB-LAN9255, tested using Atmel-ICE debugger on J10
connector.
Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Change-Id: I8bcf779e9363499a98aa0b7d10819c53da6a19e7
Reviewed-on: https://review.openocd.org/c/openocd/+/6812
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* aarch64: support for aarch32 ARM_MODE_UND
Fix:
unrecognized psr mode: 0x1b
cannot read system control register in this mode: (UNRECOGNIZED : 0x1b)
Change-Id: I4dc3e72f90d57e52c0fe63cb59a7529a398757b3
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Change-Id: Ifa5d21ae97492fde9e8c79ee7d99d8a2a871b1b5
Reviewed-on: https://review.openocd.org/c/openocd/+/6808
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* Combine register lists of smp targets.
This is helpful when you want to pretend to gdb that your heterogeneous
multicore system is homogeneous, because gdb cannot handle heterogeneous
systems. This won't always works, but works fine if e.g. one of the
cores has an FPU while the other does not. (Specifically, HiFive
Unleashed has 1 core with no FPU, plus 4 cores with an FPU.)
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I05ff4c28646778fbc00327bc510be064bfe6c9f0
Reviewed-on: https://review.openocd.org/c/openocd/+/6362
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* semihosting: use open mode flags from GDB, not from sys/stat.h
Values defined in sys/stat.h are not guaranteed to match
the constants defined by the GDB remote protocol, which are defined in
https://sourceware.org/gdb/onlinedocs/gdb/Open-Flags.html#Open-Flags.
On my local system (Manjaro 21.2.1 x86_64), for example, O_TRUNC is
defined as 0x40, whereas GDB requires it to be 0x400,
causing all "w" file open modes to misbehave.
This patch has been tested with STM32F446.
Change-Id: Ifb2c740fd689e71d6f1a4bde1edaecd76fdca910
Signed-off-by: Pavel Kirienko <pavel.kirienko@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6804
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* semihosting: User defined operation, Tcl command exec on host
Enabling a portion (0x100 - 0x107) of the user defined semihosting
operation number range (0x100 - 0x1FF) to be processed with the help of
the existing target event mechanism, to implement a general-purpose Tcl
interface for the target available on the host, via semihosting
interface.
Example usage:
- The user configures a Tcl command as a callback for one of the newly
defined events (semihosting-user-cmd-0x10X) in the configuration
file.
- The target can make a semihosting call with <opnum>, passing optional
parameters for the call.
If there is no callback registered to the user defined operation number,
nothing happens.
Example usage: Configure RTT automatically with the exact, linked
control block location from target.
Signed-off-by: Zoltán Dudás <zedudi@gmail.com>
Change-Id: I10e1784b1fecd4e630d78df81cb44bf1aa2fc247
Reviewed-on: https://review.openocd.org/c/openocd/+/6748
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* target/smp: use a struct list_head to hold the smp targets
Instead of reinventing a simply linked list, reuse the list helper
for the list of targets in a smp cluster.
Using the existing helper, that implements a double linked list,
makes trivial going through the list in reverse order.
Change-Id: Ib36ad2955f15cd2a601b0b9e36ca6d948b12d00f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6783
Tested-by: jenkins
* helper/list: add list_for_each_entry_direction()
Use a bool flag to specify if the list should be forward or
backward iterated.
Change-Id: Ied19d049f46cdcb7f50137d459cc7c02014526bc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6784
Tested-by: jenkins
* target/riscv: revive 'riscv resume_order'
This functionality was lost in [1], which was merged as commit
615709d140 ("Upstream a whole host of RISC-V changes.").
Now it works as expected again.
Add convenience macro foreach_smp_target_direction().
Link: [1] https://github.com/riscv/riscv-openocd/pull/567
Change-Id: I1545fa6b45b8a07e27c8ff9dcdcfa2fc4f950cd1
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6785
Tested-by: jenkins
* doxygen: fix some function prototype description
Change-Id: I49311a643ea73143839d2f6bde976cfd76f8c67f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6830
Tested-by: jenkins
* Cadence virtual debug interface (vdebug) integration
Change-Id: I1bc105b3addc3f34161c2356c482ff3011e3f2cc
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6097
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* gdb_server: Include thread name as XML attribute
Explicitly providing a thread name in the "thread" element produces
better thread visualizations in downstream tools like IDEs.
Signed-off-by: Ben McMorran <bemcmorr@microsoft.com>
Change-Id: I102c14ddb8b87757fa474de8e3a3f6a1cfe10d98
Reviewed-on: https://review.openocd.org/c/openocd/+/6828
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* Fix small memory leak.
See https://github.com/riscv/riscv-openocd/pull/672
Change-Id: Ia11ab9bcf860f770ea64ad867102c74b898f6b66
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6831
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* server: remove remaining crust from dropped eCos code
Commit 39650e2273 ("ecosboard: delete bit-rotted eCos code") has
removed eCos code but has left some empty function that was used
during non-eCos build to replace eCos mutex.
Drop the functions and the file that contain them.
Change-Id: I31bc0237ea699c11bd70921660f960ee406ffa80
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6835
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
* rtos: threadx: Add hla_target support for ThreadX
Tested with an AZ3166 dev board (which uses the STM32F412ZGT6) running
the Azure RTOS ThreadX demonstration system.
Signed-off-by: Ben McMorran <bemcmorr@microsoft.com>
Change-Id: I44c8f7701d9f1aaa872274166321cd7d34fb1855
Reviewed-on: https://review.openocd.org/c/openocd/+/6829
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* .gitmodules: switch away from repo.or.cz
The host repo.or.cz is often offline, creating issues for cloning
and building OpenOCD from scratch.
Already 'jimtcl' developer has dropped repo.or.cz, triggering the
OpenOCD commit 861e75f54e ("jimtcl: switch to github").
Change also the link of the remaining submodules 'git2cl' and
'libjaylink' to their respective main repository.
Change-Id: Ib513237427635359ce36a480a8f2060e2fb12ba4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6834
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
* flash/nor/stm32f2x: Fix erase of bank 2 sectors
This commit corrects the erase function for stm32f2x when dealing with
sectors in bank 2, for STM32F42x/43x devices with 1MB flash.
On STM32F42x/43x with 1MB flash in dual bank configuration, the sector
numbering is not consecutive. The last sector in bank 1 is number 7, and
the first sector in bank 2 is number 12.
The sector indices used by openocd, however, _are_ consecutive (0 to 15
in this case). The arguments "first" and "last" to stm32x_erase() are of
this type, and so the logic surrounding sector numbers needed to be
corrected.
Since the two banks in dual bank mode have the same number of sectors, a
sector index in bank 2 is larger than or equal to half the total number
of sectors.
Change-Id: I15260f8a86d9002769a1ae1c40ebdf62142dae18
Signed-off-by: Simon Johansson <ampleyfly@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6810
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
* target/cortex_m: fix target_to_cm() helper
The third parameter of container_of() should point to the same member
as target->arch_info points to, struct arm.
It worked just because struct arm is the first member in
struct armv7m_common.
If you move arm member from the first place, OpenOCD fails heavily.
Change-Id: I0c0a5221490945563e17a0a34d99a603f1d6c2ff
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6749
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* target/armv7m,cortex_m: introduce checked arch_info cast routines
target_to_armv7m() and target_to_cm() do not match the magic number
so they are not suitable for use outside of target driver code.
Add checked versions of pointer getters. Match the magic number
to ensure the returned value points to struct of the correct type.
Change-Id: If90ef7e969ef04f0f2103e0da29dcbe8e1ac1c0d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6750
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* target/cortex_m: add Cortex-M part number getter
The getter checks the magic numbers in arch_info to detect eventual
type mismatch.
Change-Id: I61134b05310a97ae9831517d0516c7b4240d35a5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6751
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
* flash/nor/stm32xx: fix segfault accessing Cortex-M part number
Some of STM32 flash drivers read Cortex-M part number from
cortex_m->core_info.
In corner cases the core_info pointer was observed uninitialised
even if target_was_examined() returned true. See also [1]
Use the new and safe helper to get Cortex-M part number.
While on it switch also target_to_cm()/target_to_armv7m() to the safe
versions. This prevents a crash when the flash bank is misconfigured
with non-Cortex-M target.
Add missing checks for target_was_examined() to flash probes.
[1] 6545: fix crash in case cortex_m->core_info is not set
https://review.openocd.org/c/openocd/+/6545
Change-Id: If2471af74ebfe22f14442f48ae109b2e1bb5fa3b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Fixes: f5898bd93f (flash/stm32fxx.c: do not read CPUID as this info is stored in cortex_m_common)
Reviewed-on: https://review.openocd.org/c/openocd/+/6752
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
* cpld: altera-epm240: Add additional IDCODEs
This adds some additional IDCODEs from the datasheet. It also adds
support for customizing the tap name.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I7cda10b92c229b61836c12cd9ca410de358ede2e
Reviewed-on: https://review.openocd.org/c/openocd/+/6846
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* cpld: altera-epm240: Increase adapter speed
According to the datasheet, the minimum clock period with Vccio1 = 1.5V
(the lowest voltage supported) is 143ns, or around 6MHz. Set the default
adapter speed to 5 MHz.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I21cad33fa7f1e25e81f43b5d2214d1fa4ec924de
Reviewed-on: https://review.openocd.org/c/openocd/+/6847
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* target: Add support for ls1088a
The LS1088A is an octo-core aarch64 processor from NXP in the layerscape
family. The JTAG is undocumented, but I was able to figure things out
from the output of `dap info`. This is the first in-tree example of
using the hwthread rtos (as far as I know), so hopefully it can serve as
an example to other developers. There are some ETMs, but I was unable to
try them out because I got 'invalid command name "etm"' when trying to
test things out.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I9b0791d27d8c41170a413a8d86431107a85feba2
Reviewed-on: https://review.openocd.org/c/openocd/+/6848
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* target: ls1088a: Add service processor
Normally the service processor is not necessary for debugging. However,
if you are using the hard-coded RCW or your boot source is otherwise
corrupt, then the general purpose processors will never be released from
hold-off. This will cause GDB to become confused if it tries to attach,
since they will appear to be running arm32 processors. To deal with
this, we can release the CPUs manually with the BRRL register. This
register cannot be written to from the axi target, so we need to do it
from the service processor target. This involves halting the service
processor, modifying the register, and then resuming it again. We try
and determine what state the service processor was in to avoid resuming
it if it was already halted.
The reset vector for the general purpose processors is determined by the
boot logation pointer registers in the device configuration unit.
Normally these are set using pre-boot initialization commands, but if
they are not set then they default to 0. This will cause the CPU to
almost immediately hit an illegal instruction. This is fine because we
will almost certainly want to attach to the processor and load a program
anyway.
I considered adding this as an event handler for either gdb-attach or
reset-init. However, this command shouldn't be necessary most of the
time, and so I don't think we should run it automatically.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I1b725292d8a11274d03af5313dc83678e10e944c
Reviewed-on: https://review.openocd.org/c/openocd/+/6850
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* board: Add NXP LS1088ARDB
This adds a board file for the NXP LS1088ARDB. This only covers the
"primary" JTAG header J55, and not the PCIe header (J91). The only
oddity is that the LS1088A and CPLD are muxed by adding/removing a
jumper from J48. Unfortunately, it doesn't look like OpenOCD supports
this CPLD beyond determining the irlen, so it's not very useful. Those
who are interested in experimenting can define CWTAP to access the CPLD,
but the default is to access the CPU.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: Ia07436a534f86bd907aa5fe2a78a326a27855a24
Reviewed-on: https://review.openocd.org/c/openocd/+/6849
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* gdb_server: fix double free
Commit 6541233aa7 ("Combine register lists of smp targets.")
unconditionally assigns the output pointers of the function
smp_reg_list_noread(), even if the function fails and returns
error.
This causes a double free from the caller, that has assigned NULL
to the pointers to simplify the error handling.
Use local variables in smp_reg_list_noread() and assign the output
pointers only on success.
Change-Id: Ic0fd2f26520566cf322f0190780e15637c01cfae
Fixes: 6541233aa7 ("Combine register lists of smp targets.")
Reported-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6852
Tested-by: jenkins
Reviewed-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
* gdb_server: check target examined while combining reg list
Commit 6541233aa7 ("Combine register lists of smp targets.")
assumes that all the targets in the SMP cluster are already
examined and unconditionally call target_get_gdb_reg_list_noread()
that will in turn return error if the target is not examined yet.
Skip targets not examined yet.
Add an additional check in case the register list cannot be built,
e.g. because no target in the SMP cluster is examined. This should
never happen, but it's better to play safe.
Change-Id: I8609815c3d5144790fb05a870cb0c931540aef8a
Fixes: 6541233aa7 ("Combine register lists of smp targets.")
Reported-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6853
Tested-by: jenkins
Reviewed-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
* flash/stm32l4x: fix maybe-uninitialized compiler error
using gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0 we get:
error: ‘retval’ may be used uninitialized in this function
fixes: 13cd75b6ec (flash/nor/stm32xx: fix segfault accessing Cortex-M part number)
Change-Id: I897c40c5d2233f50a5385d251ebfa536023e5cf7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6861
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* Fix build.
Change-Id: Ia60246246dd859d75659a43d1c59588dbb274d46
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Co-authored-by: Julien Massot <julien.massot@iot.bzh>
Co-authored-by: Pavel Kirienko <pavel.kirienko@gmail.com>
Co-authored-by: Zoltán Dudás <zedudi@gmail.com>
Co-authored-by: Antonio Borneo <borneo.antonio@gmail.com>
Co-authored-by: Jacek Wuwer <jacekmw8@gmail.com>
Co-authored-by: Ben McMorran <bemcmorr@microsoft.com>
Co-authored-by: Simon Johansson <ampleyfly@gmail.com>
Co-authored-by: Tomas Vanek <vanekt@fbl.cz>
Co-authored-by: Sean Anderson <sean.anderson@seco.com>
Co-authored-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
using gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0 we get:
error: ‘retval’ may be used uninitialized in this function
fixes: 13cd75b6ec (flash/nor/stm32xx: fix segfault accessing Cortex-M part number)
Change-Id: I897c40c5d2233f50a5385d251ebfa536023e5cf7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6861
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Some of STM32 flash drivers read Cortex-M part number from
cortex_m->core_info.
In corner cases the core_info pointer was observed uninitialised
even if target_was_examined() returned true. See also [1]
Use the new and safe helper to get Cortex-M part number.
While on it switch also target_to_cm()/target_to_armv7m() to the safe
versions. This prevents a crash when the flash bank is misconfigured
with non-Cortex-M target.
Add missing checks for target_was_examined() to flash probes.
[1] 6545: fix crash in case cortex_m->core_info is not set
https://review.openocd.org/c/openocd/+/6545
Change-Id: If2471af74ebfe22f14442f48ae109b2e1bb5fa3b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Fixes: f5898bd93f (flash/stm32fxx.c: do not read CPUID as this info is stored in cortex_m_common)
Reviewed-on: https://review.openocd.org/c/openocd/+/6752
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
This commit corrects the erase function for stm32f2x when dealing with
sectors in bank 2, for STM32F42x/43x devices with 1MB flash.
On STM32F42x/43x with 1MB flash in dual bank configuration, the sector
numbering is not consecutive. The last sector in bank 1 is number 7, and
the first sector in bank 2 is number 12.
The sector indices used by openocd, however, _are_ consecutive (0 to 15
in this case). The arguments "first" and "last" to stm32x_erase() are of
this type, and so the logic surrounding sector numbers needed to be
corrected.
Since the two banks in dual bank mode have the same number of sectors, a
sector index in bank 2 is larger than or equal to half the total number
of sectors.
Change-Id: I15260f8a86d9002769a1ae1c40ebdf62142dae18
Signed-off-by: Simon Johansson <ampleyfly@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6810
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Changed flash driver to support writing to the user data page, as well as to any portion of the lockbits page above 512 bytes (the amount used for the actual page lock words). The top part of the lockbits page is used on at least the EFR32xG1 chips for the SiLabs bootloader encryption keys.
As presented to the user, the lockbits page is the same size as the other pages, but any attempt to write to its low 512 bytes is an error. To enforce this, efr32x_write is renamed to efm32x_priv_write and a wrapper function is provided in its place. If the user erases the lockbits page, the driver rewrites the cached lock words after the erase. When the driver erases the lockbits page in order to update the lock words, it first takes a copy of anything stored in the top part of the page, and re-programs it after the erase operation.
There are now multiple instances of flash_bank for each target, and the flash_bank instances must share their cached lock words to operate as intended. Therefore, when a bank is created, the global flash bank list is used to find any other banks that share the same target. Since some banks in the global list are invalid at the time free_driver_priv is called, reference counting is used to decide when to free driver_priv.
To avoid the need to find the lockbits flash_bank from another flash_bank, efm32x_priv_write and efm32x_erase_page now take an absolute address.
There didn't seem to be any reason to prohibit unprotecting individual flash pages, so that limitation is removed from efm32x_protect().
This addresses ticket #185.
Valgrind-clean, except for 2x 4kiB not freed/still reachable blocks that were allocated by libudev.
No new Clang analyzer warnings, no new sanitizer warnings.
Signed-off-by: Doug Brunner <doug.a.brunner@gmail.com>
Change-Id: Ifb22e6149939d893f386706e99b928691ec1d41b
Reviewed-on: https://review.openocd.org/c/openocd/+/6665
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
1Gbit SPI flash on VCU118 Rev. 2.0
Contributed to riscv-openocd in https://github.com/riscv/riscv-openocd/pull/487
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I93447dd970d9901a671567fe8ab9e407432f8db9
Reviewed-on: https://review.openocd.org/c/openocd/+/6764
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Standard C library free() allows NULL pointer as a parameter.
Change target_free_working_area() to conform this convention.
Remove NULL pointer tests before target_free_working_area() calls.
While on it add missing setting pointer to NULL after target_free_working_area().
Change-Id: I7c692ab04a9933398ba5bc614723ad0bdecb87b3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6712
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* Move more smarts into the target algorithm code, and rewrite that in C
so it's easier to understand/maintain.
* Support >24-bit addresses.
* Check for errors.
Change-Id: I3b1a143589fe6defafb8f95820aa682acc9646e7
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6679
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The command is a stub only, does nothing.
Change-Id: Ib3b8c2122a9f6f2e179bee34ac56d0adf367bfcc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6730
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The command might be a leftover from development of the driver.
There is no documentation what it does.
Change-Id: Iaa5aa1ac51638bd6acce172a5dd03846a165dc27
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6728
Tested-by: jenkins
Reviewed-by: Ivan-Artekit <ivan@artekit.eu>
Add help texts from similar driver kinetis.c
While on it fix one existing help: the flash is obviously not NAND
Change-Id: Ibd295105586b008aaabf2fb4e4a75bf551266e38
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6727
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The EFM32 flash driver misidentifies the EFR32BG1B on my board as EFR32MG1B.
Looks like this was caused by a copy-paste error, fixed.
Signed-off-by: Doug Brunner <doug.a.brunner@gmail.com>
Change-Id: I3067f7ba132c2562487da8c2371f63a4843230c1
Reviewed-on: https://review.openocd.org/c/openocd/+/6666
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The missing initialization triggers a run-time error message:
Error: BUG: command 'psoc6 reset_halt' does not have the '.usage'
field filled out
Change-Id: I975e4ba99bd939aa924a9d62b1ab76b2ab5bf193
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6720
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
When a struct is initialized, missing fields are already filled
with zero or NULL.
This change simplifies scripts to compare documentation and
registered commands.
Change-Id: I96fbdfa98bbb1f2b5e2a9532faf5a15cb5bc28dd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6719
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Just to avoid name clash when comparing documentation with
registered commands through scripts.
Change-Id: I8832545d8d9236ea5dabe6e73732f51e5246caff
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6717
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Do not split in multiple lines the calls to register_commands*().
No change in code behaviour, just make it easy to grep in the code
and identify the commands that can be registered.
This would help detecting undocumented commands.
Change-Id: Id654e107cdabf7ee31fc3d227c1d2a59acc5669e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6716
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Add support for the mcu SAMR35J18B
Signed-off-by: Janco <janco@factorylab.nl>
Change-Id: I45d801485ad1c16d1b3086516a2b6d71d13f3fc7
Reviewed-on: https://review.openocd.org/c/openocd/+/6664
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
GD32E23x from GigaDevice is cortex-M23 microcontroller and it can work with the stm32f1x driver.
Modifications are similar to this done for GD32F1x0 in #6164 (https://review.openocd.org/c/openocd/+/6164).
Configuration file is added because its cortex-M23 CPU ID is different.
I think that GigaDevice microcontrollers should be handled in an independent unit to separate them from STM32,
but nowadays quick solution is welcome.
Signed-off-by: asier70Andrzej Sierżęga <asier70@gmail.com>
Change-Id: I91f31f5f66808bc50a8f607ac2c107e6b7c5e2b8
Reviewed-on: https://review.openocd.org/c/openocd/+/6527
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Commit be57b0ab84 ("Update jtagspi driver for 1-, 2- and 4-byte
addresses") introduces two incorrect format string for uint32_t
data types.
This cause build failure on MacOS:
src/flash/nor/jtagspi.c:474:35: error: format specifies type 'unsigned char'
but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat]
LOG_DEBUG("status=0x%02" PRIx8, *status);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~
src/flash/nor/jtagspi.c:513:65: error: format specifies type 'unsigned char'
but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat]
LOG_ERROR("Cannot enable write to flash. Status=0x%02" PRIx8, status);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
Fix the format string.
Change-Id: I209053317c8b26c35c6f11be0553ccccc698c551
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: be57b0ab84 ("Update jtagspi driver for 1-, 2- and 4-byte addresses")
Reviewed-on: https://review.openocd.org/c/openocd/+/6701
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
jtagspi driver always used 3-byte addresses regardless of actual
device capcity. Now select 1- to 4-byte addresses depending on
device capacity.
Some devices need a special command to activate the 4-byte address
mode, a special command to accomplish this, and a further command
for setting device properties are added.
Additionally, restriction (start of range had to be page aligned)
removed.
Tested with XCS6SLX16 board and W25Q256FV in 3- and 4-byte address
modes.
Change-Id: I88b2877517a18dac460253ae6d97f3dded054e6c
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/4876
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
The busy flag must be polled after each half-page write.
At low clock speeds, no issue is observed when the poll
is omitted, because the writes complete before the next
write begins. But at high clock speeds the subsequent
writes would overlap and cause the operation to fail.
The status polls are done on the target for efficiency,
since the half-pages are very small.
Change-Id: Ia1e9b4a6a71930549b3d84a902744ce6e596301b
Signed-off-by: Jimmy <nhminus@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5598
Tested-by: jenkins
Reviewed-by: Jelle De Vleeschouwer
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
This primarily contains the large upstreaming of RISC-V changes, so lots
more RISC-V changes than usual.
Conflicts:
src/target/riscv/opcodes.h
src/target/riscv/riscv-011.c
src/target/riscv/riscv-013.c
src/target/riscv/riscv.c
src/target/riscv/riscv.h
Change-Id: I1145dad538a5470ad209848572e6b0f560b671e9
Signed-off-by: Tim Newsome <tim@sifive.com>
Commit 64c2e03b23 ("flash/nor: improved API of flash_driver.info
& fixed buffer overruns") changes the prototype of the function
psoc6_get_info() but didn't update the list of parameters in the
doxygen comment.
Fix the doxygen comment.
Change-Id: I1dce018b60d080973c5e351490d4d7baba422d74
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 64c2e03b23 ("flash/nor: improved API of flash_driver.info & fixed buffer overruns")
Reviewed-on: https://review.openocd.org/c/openocd/+/6620
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
The header files under src/helper/ can currently be included with
either
#include <bits.h>
or
#include <helper/bits.h>
This is because we specify both "src/" and "src/helper/" directories
as include directories. Some files name under "src/helper/", such as
types.h, log.h, and util.h are too generic and could be ambiguous
depending on the search path.
This commit remove "src/helper/" from our include dir and make C files
include explicitly.
Change-Id: I38fc9b96ba01a513d4a72757d40007e21b502f25
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6507
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The include file 'armv7m.h' includes 'arm_adi_v5.h' only to get
the definition of 'struct adiv5_ap', but doesn't need the struct
content.
Reducing the cross dependencies speeds-up the compile time during
code development by avoiding re-compiling file.
Relax the dependency by locally declaring 'struct adiv5_ap' in
'armv7m.h' and remove the include of 'arm_adi_v5.h'.
Fix the other files that have now lost the includes file that
'arm_adi_v5.h' depends from.
Change-Id: Ic0d40b17db6045fa43f348bda83eaf211a6b347d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6468
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
* WIP on register caching.
So we don't have to save/restore S0 all the time.
Change-Id: I9d83a24dbd92a325213f2b25eebc9ede9dca2868
* Seems to work for RV32.
Change-Id: Ide620faa5dfef4f39c3146e094787ea28d041327
* Use caching everywhere.
Change-Id: I0de249437589e1f49811f34c12726528c045c74f
* Getting closer...
Change-Id: I532455f1e416723b79eecc7d33ec6407ccb8e33c
* All spike tests pass again.
Running all tests now takes 2m54s compared to 3m0s. That's probably not
the thing to measure, since the goal is to improve interactive
performance, while the tests do all kinds of other stuff (like sleep,
and start spike, etc.).
Change-Id: Ic7d944454a64b2baf6e6028debb4a1ba896834d8
* Save s0/s1 during examine.
Change-Id: I4795180e3b04d01433a11d4a0ccb38c35074cc44
Signed-off-by: Tim Newsome <tim@sifive.com>
* Check flush registers result.
Change-Id: I8350c4198cb41881e1143816698aed677a312111
Signed-off-by: Tim Newsome <tim@sifive.com>
* Fix upstream style regression.
Change-Id: I4cc7034151ba62fa51aea77e44b0cad9b9b97876
Signed-off-by: Tim Newsome <tim@sifive.com>
This partially reverts commit 1247eee4e6.
There is no reasonable use cases where work-area should be enabled
and working, and it can't be used for the flash loader.
Instead of introducing driver specific property, users can disable
flash load by disabling work-area, for example by setting it to 0.
But still we keep the function stm32l4_write_block_without_loader
to be used when workarea is not available (no sufficient size or zero)
Change-Id: Ibb046c74df354c6067bac978e8ef7efb47d9fd2b
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6569
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
For STM32L552xC devices with 256K flash:
dual bank mode is activated if DB256 is set
page size is 2KB if DBANK is set
For parts with 512K (aka STM32L5x2xE):
DBANK controls both of dual/single bank mode and page size as well.
Change-Id: I8be668d5552fefe81acffaf2e3e35ef5e938162e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reported-by: Patrik Bachan <diggit@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/317/
Reviewed-on: https://review.openocd.org/c/openocd/+/6538
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
stm32l4_work_area struct is shared between the loader and stm32l4x flash driver
'*wp' and '*rp' pointers' size is 4 bytes each since stm32l4x devices have
32-bit processors.
however when used in openocd code, their size depends on the host
if the host is 32-bit, then the size is 4 bytes each.
if the host is 64-bit, then the size is 8 bytes each.
to avoid this size difference, change their types depending on the
usage (pointers for the loader, and 32-bit integers in openocd code).
Change-Id: I0a3df4bb4bf872b01cdb9357eb28307868d7d469
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6556
Tested-by: jenkins
Reviewed-by: Yestin Sun <sunyi0804@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1.
Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers
a segfault.
Change-Id: I501f5b69e629aa8d2836b5194063d74d5bfddb12
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Fixes: https://github.com/STMicroelectronics/OpenOCD/issues/6
Reviewed-on: https://review.openocd.org/c/openocd/+/6535
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
add the target assigned to the flash bank at creation
this is useful in daisy chains, to filter out the target banks.
Change-Id: Ic39e44914e34bb62991783762e5a65ef8871e82f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6426
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The 'flash list' command returns the driver name as flash name which seems
to be incorrect, the proposal is:
- to fix this by returning the flash name
- and add a new item 'driver' in the returned list
example:
before the change
> flash list
{name stm32l4x base 134217728 size 0 bus_width 0 chip_width 0}
{name stm32l4x base 201326592 size 0 bus_width 0 chip_width 0}
{name stm32l4x base 200933376 size 0 bus_width 0 chip_width 0}
after the change
> flash list
{name stm32l5x.flash_ns driver stm32l4x ...}
{name stm32l5x.flash_alias_s driver stm32l4x ...}
{name stm32l5x.otp driver stm32l4x ...}
Change-Id: I6d307b73c457549981a93c260be344378719af82
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6425
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
STM32WB1x devices has a single flash bank up to 320 KB (page 2KB)
note: STM32WB5x/WB3x are single banks as well but do have 4KB as page size.
note: remove the assert that checks if max_mages is power of two, because
STM32WB1x flash size is not a power of 2
Change-Id: Ib514cf989ecb819d25d1c4a65d641d0a1a3d9f18
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6129
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
this device has single bank flash architecture up to 64KB (page 2KB)
reference: RM0444 rev 5
Change-Id: Ia213c01accb950fcbb7519e08057dae11b4443dd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6128
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
switching to C loader instead of the assembly version will enhance readability
will reduce the maintenance effort.
besides the switch to C loader, we added a new parameters to the loader
like flash_word_size and flash_sr_bsy_mask in order to support properly
STM32U5x and STM32G0Bx/G0Cx in dual-bank mode.
Change-Id: I24cafc2ba637a065593a0506eae787b21080a0ba
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6109
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
If the remaining memory for the buffer is less than 256 bytes,
the memory allocated for the write algorithm in the target is not freed.
Fixes: ba131f30a0 (Flash driver for STM32G0xx and STM32G4xx)
Change-Id: Ic649f6c39799d76725b0c69ff3a009a3f510e17f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6486
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
this device flash registers are quite similar to STM32L5
with this changes :
- flash size is up to 2MB
- 2MB variants are always dual bank
- 1MB and 512KB variants could be dual bank (contiguous addressing)
depending on DUALBANK bit(21)
- flash data width is 16 bytes (quad-word)
Change-Id: Id13c552270ce1071479ad418526e8a39ebe83cb1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6108
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
according the RM0453, the second core have a different Flash CR and SR
registers for flash operations (called C2CR and C2SR).
so we need to a different flash_regs than older L4 devices.
@see stm32wl_cpu2_flash_regs
the C2CR register don't contain LOCK and OPTLOCK bits, and this explain
the addition of new register index called STM32_FLASH_CR_WLK_INDEX to
look-up the CR with lock, to be used in locking/unlocking the flash.
note: DBGMCU_IDCODE cannot be read using CPU1 (Cortex-M0+) at AP1,
to solve this read the UID64 (IEEE 64-bit unique device ID register)
Change-Id: Ifb6e291bf97f814f0b9987b2c40f3037959f7af4
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6050
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
When running OpenOCD with -fsanitize=undefined, a warning is emitted
for an bit-shifting operation whose result cannot be stored in a
signed integer.
This is because (1 << 31) overflows a signed integer, which is
undefined behavior. By making each of the bit masks act on an
unsigned number, the warning is avoided.
Whether this warning emitted by UBSan would ever manifest into a real
error is debatable, but fixing this does make UBSan happy.
Change-Id: I0455a26b234cb4f5e239a6ba90023d28380e9464
Signed-off-by: Sebastiaan de Schaetzen <sebastiaan.de.schaetzen@gmail.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6429
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
this device has a dual bank flash architecture up to 512 KB (page 2KB)
reference: RM0444 Rev 5
notes:
- 128k variant is always single bank
- 256k variant flash is contiguous (no gap) in dual bank mode
- BKER is bit 13 vs bit 11 for other devices
> added cr_bker_mask in stm32l4_flash_bank struct
- BSY2 for bank 2 operations
> added sr_bsy_mask in stm32l4_flash_bank struct
> proposed optimization: always wait for (BSY1 | BSY2) with
STM32G0Bx/G0Cx devices only (for L4+ devices BSY2=PEMPTY)
TODO: update flashloader to use the proper BSY bits
temporarily don't use the loader in dual bank mode
Change-Id: I54b0c93b494e7209da818791d15edd8cd42c2732
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6036
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Matthijs Kooijman
Tarek BOCHKATI
Daniel Anselmi
Antonio Borneo
Tim Newsome
panciyan
Andrew Lalaev
Andreas Bolsch
Marc Schink
Daniel Serpell
Tomas Vanek
Jian-Hong Pan
Zale Yu
Tarek BOCHKATI
Fawaz Tirmizi
Kyle Schwarz
Dan Stahlke
Simon Smiganovski
Keith Packard
Toms Stūrmanis
Erhan Kurubas
Paul Fertser
Martin Hierholzer
Huaqi Fang
Salvatore Giorgio PECORINO
Simon Johansson
Hans-Erik Floryd
Doug Brunner
Jaehoon Park
Janco Kock
asier70
Jimmy
Yasushi SHOJI
Oleksij Rempel
Wealian Liao
Sebastiaan de Schaetzen