flash/stm32h7x: don't read flash size using the H74/H75x CPU2
CPU2 (Cortex-M4) cannot read flash size register. assume the maximum flash size without triggering an error message Change-Id: I5c3328b7cc42e3aa57165075021227d7936f3d26 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6670 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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@ -21,7 +21,7 @@
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#include "imp.h"
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#include <helper/binarybuffer.h>
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#include <target/algorithm.h>
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#include <target/armv7m.h>
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#include <target/cortex_m.h>
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/* Erase time can be as high as 1000ms, 10x this and it's toast... */
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@ -759,6 +759,7 @@ static int stm32x_read_id_code(struct flash_bank *bank, uint32_t *id)
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static int stm32x_probe(struct flash_bank *bank)
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{
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struct target *target = bank->target;
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struct cortex_m_common *cortex_m = target_to_cm(target);
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struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv;
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uint16_t flash_size_in_kb;
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uint32_t device_id;
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@ -797,15 +798,19 @@ static int stm32x_probe(struct flash_bank *bank)
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LOG_DEBUG("flash_regs_base: 0x%" PRIx32, stm32x_info->flash_regs_base);
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/* get flash size from target */
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retval = target_read_u16(target, stm32x_info->part_info->fsize_addr, &flash_size_in_kb);
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/* STM32H74x/H75x, the second core (Cortex-M4) cannot read the flash size */
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retval = ERROR_FAIL;
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if (device_id == DEVID_STM32H74_H75XX && cortex_m->core_info->partno == CORTEX_M4_PARTNO)
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LOG_WARNING("%s cannot read the flash size register", target_name(target));
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else
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retval = target_read_u16(target, stm32x_info->part_info->fsize_addr, &flash_size_in_kb);
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if (retval != ERROR_OK) {
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/* read error when device has invalid value, set max flash size */
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flash_size_in_kb = stm32x_info->part_info->max_flash_size_kb;
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LOG_INFO("assuming %" PRIu16 "k flash", flash_size_in_kb);
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} else
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LOG_INFO("flash size probed value %" PRIu16, flash_size_in_kb);
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LOG_INFO("flash size probed value %" PRIu16 "k", flash_size_in_kb);
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/* setup bank size */
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const uint32_t bank1_base = FLASH_BANK0_ADDRESS;
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