interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge branch 'master' into from_upstream 

Conflicts:
	src/flash/nor/fespi.c
	src/jtag/drivers/ftdi.c
	src/rtos/FreeRTOS.c
	src/rtos/hwthread.c
	src/rtos/rtos.c
	src/rtos/rtos.h
	src/rtos/rtos_ecos_stackings.c
	src/rtos/rtos_embkernel_stackings.c
	src/rtos/rtos_standard_stackings.c
	src/rtos/rtos_standard_stackings.h
	src/rtos/rtos_ucos_iii_stackings.c
	src/server/gdb_server.c
	src/server/server.c
	src/target/riscv/riscv-013.c
	src/target/target.c
	src/target/target.h

Change-Id: If0924a3e799260c33fae5feb85975b1273b45a0f
This commit is contained in:
Tim Newsome 2021-08-30 15:03:59 -07:00
parent 13cfec45cc 9a9e9e2c66
commit a1146731a8
420 changed files with 9116 additions and 7237 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
.github/workflows/snapshot.yml vendored
View File

@ -22,7 +22,7 @@ jobs:
- run: ./bootstrap
- name: Prepare libusb1
env:
LIBUSB1_VER: 1.0.23
LIBUSB1_VER: 1.0.24
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget "https://github.com/libusb/libusb/releases/download/v${LIBUSB1_VER}/libusb-${LIBUSB1_VER}.tar.bz2"
@ -30,7 +30,7 @@ jobs:
echo "LIBUSB1_SRC=$PWD/libusb-${LIBUSB1_VER}" >> $GITHUB_ENV
- name: Prepare hidapi
env:
HIDAPI_VER: 0.9.0
HIDAPI_VER: 0.10.1
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget "https://github.com/libusb/hidapi/archive/hidapi-${HIDAPI_VER}.tar.gz"
@ -38,14 +38,6 @@ jobs:
cd hidapi-hidapi-${HIDAPI_VER}
./bootstrap
echo "HIDAPI_SRC=$PWD" >> $GITHUB_ENV
- name: Prepare libftdi
env:
LIBFTDI_VER: 1.4
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget "http://www.intra2net.com/en/developer/libftdi/download/libftdi1-${LIBFTDI_VER}.tar.bz2"
tar -xjf libftdi1-${LIBFTDI_VER}.tar.bz2
echo "LIBFTDI_SRC=$PWD/libftdi1-${LIBFTDI_VER}" >> $GITHUB_ENV
- name: Prepare capstone
env:
CAPSTONE_VER: 4.0.2
@ -60,9 +52,8 @@ jobs:
env:
MAKE_JOBS: 2
HOST: i686-w64-mingw32
LIBUSB1_CONFIG: --enable-shared --enable-static
LIBUSB1_CONFIG: --enable-shared --disable-static
HIDAPI_CONFIG: --enable-shared --disable-static --disable-testgui
LIBFTDI_CONFIG: "-DCMAKE_TOOLCHAIN_FILE='${{ env.LIBFTDI_SRC }}/cmake/Toolchain-i686-w64-mingw32.cmake' -DBUILD_TESTS:BOOL=off -DFTDIPP:BOOL=off -DPYTHON_BINDINGS:BOOL=off -DEXAMPLES:BOOL=off -DDOCUMENTATION:BOOL=off -DFTDI_EEPROM:BOOL=off"
CAPSTONE_CONFIG: "CAPSTONE_BUILD_CORE_ONLY=yes CAPSTONE_STATIC=yes CAPSTONE_SHARED=no"
run: |
# check if there is tag pointing at HEAD, otherwise take the HEAD SHA-1 as OPENOCD_TAG

3
configure.ac
View File

@ -571,9 +571,6 @@ AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
use_libusb1=yes
AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x])
PKG_CHECK_EXISTS([libusb-1.0 >= 1.0.9],
[AC_DEFINE([HAVE_LIBUSB_ERROR_NAME], [1], [Define if your libusb has libusb_error_name()])],
[AC_MSG_WARN([libusb-1.x older than 1.0.9 detected, consider updating])])
LIBUSB1_CFLAGS=`echo $LIBUSB1_CFLAGS | sed 's/-I/-isystem /'`
AC_MSG_NOTICE([libusb-1.0 header bug workaround: LIBUSB1_CFLAGS changed to "$LIBUSB1_CFLAGS"])
PKG_CHECK_EXISTS([libusb-1.0 >= 1.0.16],

5
contrib/60-openocd.rules
View File

@ -24,6 +24,8 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6011", MODE="660", GROUP="plugdev",
# Original FT232H VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT231XQ VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", MODE="660", GROUP="plugdev", TAG+="uaccess"
# DISTORTEC JTAG-lock-pick Tiny 2
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="660", GROUP="plugdev", TAG+="uaccess"
@ -125,6 +127,9 @@ ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6001", MODE="660", GROUP="plugdev",
ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6010", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6810", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Ashling Opella-LD
ATTRS{idVendor}=="0B6B", ATTRS{idProduct}=="0040", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Amontec JTAGkey-HiSpeed
ATTRS{idVendor}=="0fbb", ATTRS{idProduct}=="1000", MODE="660", GROUP="plugdev", TAG+="uaccess"

4
contrib/remote_bitbang/remote_bitbang_sysfsgpio.c
View File

@ -30,12 +30,12 @@
socat TCP6-LISTEN:7777,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10"
On host run:
openocd -c "interface remote_bitbang; remote_bitbang_host raspberrypi; remote_bitbang_port 7777" \
openocd -c "interface remote_bitbang; remote_bitbang host raspberrypi; remote_bitbang port 7777" \
-f target/stm32f1x.cfg
Or if you want to test UNIX sockets, run both on Raspberry Pi:
socat UNIX-LISTEN:/tmp/remotebitbang-socket,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10"
openocd -c "interface remote_bitbang; remote_bitbang_host /tmp/remotebitbang-socket" -f target/stm32f1x.cfg
openocd -c "interface remote_bitbang; remote_bitbang host /tmp/remotebitbang-socket" -f target/stm32f1x.cfg
*/
#include <sys/types.h>

226
doc/openocd.texi
View File

@ -202,7 +202,7 @@ communication between users:
@section OpenOCD IRC
Support can also be found on irc:
@uref{irc://irc.freenode.net/openocd}
@uref{irc://irc.libera.chat/openocd}
@node Developers
@chapter OpenOCD Developer Resources
@ -2378,7 +2378,7 @@ Amontec Chameleon in its JTAG Accelerator configuration,
connected to a PC's EPP mode parallel port.
This defines some driver-specific commands:
@deffn {Config Command} {parport_port} number
@deffn {Config Command} {parport port} number
Specifies either the address of the I/O port (default: 0x378 for LPT1) or
the number of the @file{/dev/parport} device.
@end deffn
@ -2466,10 +2466,10 @@ configuration files, without the need to patch and rebuild OpenOCD.
The driver uses a signal abstraction to enable Tcl configuration files to
define outputs for one or several FTDI GPIO. These outputs can then be
controlled using the @command{ftdi_set_signal} command. Special signal names
controlled using the @command{ftdi set_signal} command. Special signal names
are reserved for nTRST, nSRST and LED (for blink) so that they, if defined,
will be used for their customary purpose. Inputs can be read using the
@command{ftdi_get_signal} command.
@command{ftdi get_signal} command.
To support SWD, a signal named SWD_EN must be defined. It is set to 1 when the
SWD protocol is selected. When set, the adapter should route the SWDIO pin to
@ -2494,21 +2494,21 @@ signal. The following output buffer configurations are supported:
These interfaces have several commands, used to configure the driver
before initializing the JTAG scan chain:
@deffn {Config Command} {ftdi_vid_pid} [vid pid]+
@deffn {Config Command} {ftdi vid_pid} [vid pid]+
The vendor ID and product ID of the adapter. Up to eight
[@var{vid}, @var{pid}] pairs may be given, e.g.
@example
ftdi_vid_pid 0x0403 0xcff8 0x15ba 0x0003
ftdi vid_pid 0x0403 0xcff8 0x15ba 0x0003
@end example
@end deffn
@deffn {Config Command} {ftdi_device_desc} description
@deffn {Config Command} {ftdi device_desc} description
Provides the USB device description (the @emph{iProduct string})
of the adapter. If not specified, the device description is ignored
during device selection.
@end deffn
@deffn {Config Command} {ftdi_serial} serial-number
@deffn {Config Command} {ftdi serial} serial-number
Specifies the @var{serial-number} of the adapter to use,
in case the vendor provides unique IDs and more than one adapter
is connected to the host.
@ -2517,12 +2517,12 @@ If not specified, serial numbers are not considered.
and are not restricted to containing only decimal digits.)
@end deffn
@deffn {Config Command} {ftdi_channel} channel
@deffn {Config Command} {ftdi channel} channel
Selects the channel of the FTDI device to use for MPSSE operations. Most
adapters use the default, channel 0, but there are exceptions.
@end deffn
@deffn {Config Command} {ftdi_layout_init} data direction
@deffn {Config Command} {ftdi layout_init} data direction
Specifies the initial values of the FTDI GPIO data and direction registers.
Each value is a 16-bit number corresponding to the concatenation of the high
and low FTDI GPIO registers. The values should be selected based on the
@ -2531,7 +2531,7 @@ minimal impact on the target system. Avoid floating inputs, conflicting outputs
and initially asserted reset signals.
@end deffn
@deffn {Command} {ftdi_layout_signal} name [@option{-data}|@option{-ndata} data_mask] [@option{-input}|@option{-ninput} input_mask] [@option{-oe}|@option{-noe} oe_mask] [@option{-alias}|@option{-nalias} name]
@deffn {Command} {ftdi layout_signal} name [@option{-data}|@option{-ndata} data_mask] [@option{-input}|@option{-ninput} input_mask] [@option{-oe}|@option{-noe} oe_mask] [@option{-alias}|@option{-nalias} name]
Creates a signal with the specified @var{name}, controlled by one or more FTDI
GPIO pins via a range of possible buffer connections. The masks are FTDI GPIO
register bitmasks to tell the driver the connection and type of the output
@ -2541,7 +2541,7 @@ used with inverting data inputs and @option{-data} with non-inverting inputs.
The @option{-oe} (or @option{-noe}) option tells where the output-enable (or
not-output-enable) input to the output buffer is connected. The options
@option{-input} and @option{-ninput} specify the bitmask for pins to be read
with the method @command{ftdi_get_signal}.
with the method @command{ftdi get_signal}.
Both @var{data_mask} and @var{oe_mask} need not be specified. For example, a
simple open-collector transistor driver would be specified with @option{-oe}
@ -2562,7 +2562,7 @@ identical (or with data inverted) to an already specified signal
@var{name}.
@end deffn
@deffn {Command} {ftdi_set_signal} name @option{0}|@option{1}|@option{z}
@deffn {Command} {ftdi set_signal} name @option{0}|@option{1}|@option{z}
Set a previously defined signal to the specified level.
@itemize @minus
@item @option{0}, drive low
@ -2571,11 +2571,11 @@ Set a previously defined signal to the specified level.
@end itemize
@end deffn
@deffn {Command} {ftdi_get_signal} name
@deffn {Command} {ftdi get_signal} name
Get the value of a previously defined signal.
@end deffn
@deffn {Command} {ftdi_tdo_sample_edge} @option{rising}|@option{falling}
@deffn {Command} {ftdi tdo_sample_edge} @option{rising}|@option{falling}
Configure TCK edge at which the adapter samples the value of the TDO signal
Due to signal propagation delays, sampling TDO on rising TCK can become quite
@ -2632,47 +2632,47 @@ FT232R
These interfaces have several commands, used to configure the driver
before initializing the JTAG scan chain:
@deffn {Config Command} {ft232r_vid_pid} @var{vid} @var{pid}
@deffn {Config Command} {ft232r vid_pid} @var{vid} @var{pid}
The vendor ID and product ID of the adapter. If not specified, default
0x0403:0x6001 is used.
@end deffn
@deffn {Config Command} {ft232r_serial_desc} @var{serial}
@deffn {Config Command} {ft232r serial_desc} @var{serial}
Specifies the @var{serial} of the adapter to use, in case the
vendor provides unique IDs and more than one adapter is connected to
the host. If not specified, serial numbers are not considered.
@end deffn
@deffn {Config Command} {ft232r_jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo}
@deffn {Config Command} {ft232r jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo}
Set four JTAG GPIO numbers at once.
If not specified, default 0 3 1 2 or TXD CTS RXD RTS is used.
@end deffn
@deffn {Config Command} {ft232r_tck_num} @var{tck}
@deffn {Config Command} {ft232r tck_num} @var{tck}
Set TCK GPIO number. If not specified, default 0 or TXD is used.
@end deffn
@deffn {Config Command} {ft232r_tms_num} @var{tms}
@deffn {Config Command} {ft232r tms_num} @var{tms}
Set TMS GPIO number. If not specified, default 3 or CTS is used.
@end deffn
@deffn {Config Command} {ft232r_tdi_num} @var{tdi}
@deffn {Config Command} {ft232r tdi_num} @var{tdi}
Set TDI GPIO number. If not specified, default 1 or RXD is used.
@end deffn
@deffn {Config Command} {ft232r_tdo_num} @var{tdo}
@deffn {Config Command} {ft232r tdo_num} @var{tdo}
Set TDO GPIO number. If not specified, default 2 or RTS is used.
@end deffn
@deffn {Config Command} {ft232r_trst_num} @var{trst}
@deffn {Config Command} {ft232r trst_num} @var{trst}
Set TRST GPIO number. If not specified, default 4 or DTR is used.
@end deffn
@deffn {Config Command} {ft232r_srst_num} @var{srst}
@deffn {Config Command} {ft232r srst_num} @var{srst}
Set SRST GPIO number. If not specified, default 6 or DCD is used.
@end deffn
@deffn {Config Command} {ft232r_restore_serial} @var{word}
@deffn {Config Command} {ft232r restore_serial} @var{word}
Restore serial port after JTAG. This USB bitmode control word
(16-bit) will be sent before quit. Lower byte should
set GPIO direction register to a "sane" state:
@ -2694,14 +2694,14 @@ instead of directly driving JTAG.
The remote_bitbang driver is useful for debugging software running on
processors which are being simulated.
@deffn {Config Command} {remote_bitbang_port} number
@deffn {Config Command} {remote_bitbang port} number
Specifies the TCP port of the remote process to connect to or 0 to use UNIX
sockets instead of TCP.
@end deffn
@deffn {Config Command} {remote_bitbang_host} hostname
@deffn {Config Command} {remote_bitbang host} hostname
Specifies the hostname of the remote process to connect to using TCP, or the
name of the UNIX socket to use if remote_bitbang_port is 0.
name of the UNIX socket to use if remote_bitbang port is 0.
@end deffn
For example, to connect remotely via TCP to the host foobar you might have
@ -2709,8 +2709,8 @@ something like:
@example
adapter driver remote_bitbang
remote_bitbang_port 3335
remote_bitbang_host foobar
remote_bitbang port 3335
remote_bitbang host foobar
@end example
To connect to another process running locally via UNIX sockets with socket
@ -2718,8 +2718,8 @@ named mysocket:
@example
adapter driver remote_bitbang
remote_bitbang_port 0
remote_bitbang_host mysocket
remote_bitbang port 0
remote_bitbang host mysocket
@end example
@end deffn
@ -2728,28 +2728,28 @@ USB JTAG/USB-Blaster compatibles over one of the userspace libraries
for FTDI chips. These interfaces have several commands, used to
configure the driver before initializing the JTAG scan chain:
@deffn {Config Command} {usb_blaster_device_desc} description
@deffn {Config Command} {usb_blaster device_desc} description
Provides the USB device description (the @emph{iProduct string})
of the FTDI FT245 device. If not
specified, the FTDI default value is used. This setting is only valid
if compiled with FTD2XX support.
@end deffn
@deffn {Config Command} {usb_blaster_vid_pid} vid pid
@deffn {Config Command} {usb_blaster vid_pid} vid pid
The vendor ID and product ID of the FTDI FT245 device. If not specified,
default values are used.
Currently, only one @var{vid}, @var{pid} pair may be given, e.g. for
Altera USB-Blaster (default):
@example
usb_blaster_vid_pid 0x09FB 0x6001
usb_blaster vid_pid 0x09FB 0x6001
@end example
The following VID/PID is for Kolja Waschk's USB JTAG:
@example
usb_blaster_vid_pid 0x16C0 0x06AD
usb_blaster vid_pid 0x16C0 0x06AD
@end example
@end deffn
@deffn {Command} {usb_blaster_pin} (@option{pin6}|@option{pin8}) (@option{0}|@option{1}|@option{s}|@option{t})
@deffn {Command} {usb_blaster pin} (@option{pin6}|@option{pin8}) (@option{0}|@option{1}|@option{s}|@option{t})
Sets the state or function of the unused GPIO pins on USB-Blasters
(pins 6 and 8 on the female JTAG header). These pins can be used as
SRST and/or TRST provided the appropriate connections are made on the
@ -2757,18 +2757,18 @@ target board.
For example, to use pin 6 as SRST:
@example
usb_blaster_pin pin6 s
usb_blaster pin pin6 s
reset_config srst_only
@end example
@end deffn
@deffn {Config Command} {usb_blaster_lowlevel_driver} (@option{ftdi}|@option{ublast2})
@deffn {Config Command} {usb_blaster lowlevel_driver} (@option{ftdi}|@option{ublast2})
Chooses the low level access method for the adapter. If not specified,
@option{ftdi} is selected unless it wasn't enabled during the
configure stage. USB-Blaster II needs @option{ublast2}.
@end deffn
@deffn {Config Command} {usb_blaster_firmware} @var{path}
@deffn {Config Command} {usb_blaster firmware} @var{path}
This command specifies @var{path} to access USB-Blaster II firmware
image. To be used with USB-Blaster II only.
@end deffn
@ -2779,7 +2779,7 @@ image. To be used with USB-Blaster II only.
Gateworks GW16012 JTAG programmer.
This has one driver-specific command:
@deffn {Config Command} {parport_port} [port_number]
@deffn {Config Command} {parport port} [port_number]
Display either the address of the I/O port
(default: 0x378 for LPT1) or the number of the @file{/dev/parport} device.
If a parameter is provided, first switch to use that port.
@ -2938,7 +2938,7 @@ Wigglers, PLD download cable, and more.
These interfaces have several commands, used to configure the driver
before initializing the JTAG scan chain:
@deffn {Config Command} {parport_cable} name
@deffn {Config Command} {parport cable} name
Set the layout of the parallel port cable used to connect to the target.
This is a write-once setting.
Currently valid cable @var{name} values include:
@ -2968,18 +2968,18 @@ several clones, such as the Olimex ARM-JTAG
@end itemize
@end deffn
@deffn {Config Command} {parport_port} [port_number]
@deffn {Config Command} {parport port} [port_number]
Display either the address of the I/O port
(default: 0x378 for LPT1) or the number of the @file{/dev/parport} device.
If a parameter is provided, first switch to use that port.
This is a write-once setting.
When using PPDEV to access the parallel port, use the number of the parallel port:
@option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
@option{parport port 0} (the default). If @option{parport port 0x378} is specified
you may encounter a problem.
@end deffn
@deffn {Config Command} {parport_toggling_time} [nanoseconds]
@deffn {Config Command} {parport toggling_time} [nanoseconds]
Displays how many nanoseconds the hardware needs to toggle TCK;
the parport driver uses this value to obey the
@command{adapter speed} configuration.
@ -2992,7 +2992,7 @@ However, you may want to calibrate for your specific hardware.
To measure the toggling time with a logic analyzer or a digital storage
oscilloscope, follow the procedure below:
@example
> parport_toggling_time 1000
> parport toggling_time 1000
> adapter speed 500
@end example
This sets the maximum JTAG clock speed of the hardware, but
@ -3002,7 +3002,7 @@ You can use @command{runtest 1000} or something similar to generate a
large set of samples.
Update the setting to match your measurement:
@example
> parport_toggling_time <measured nanoseconds>
> parport toggling_time <measured nanoseconds>
@end example
Now the clock speed will be a better match for @command{adapter speed}
command given in OpenOCD scripts and event handlers.
@ -3016,7 +3016,7 @@ be conservative.
@end quotation
@end deffn
@deffn {Config Command} {parport_write_on_exit} (@option{on}|@option{off})
@deffn {Config Command} {parport write_on_exit} (@option{on}|@option{off})
This will configure the parallel driver to write a known
cable-specific value to the parallel interface on exiting OpenOCD.
@end deffn
@ -3026,14 +3026,14 @@ classic ``Wiggler'' cable on LPT2 might look something like this:
@example
adapter driver parport
parport_port 0x278
parport_cable wiggler
parport port 0x278
parport cable wiggler
@end example
@end deffn
@deffn {Interface Driver} {presto}
ASIX PRESTO USB JTAG programmer.
@deffn {Config Command} {presto_serial} serial_string
@deffn {Config Command} {presto serial} serial_string
Configures the USB serial number of the Presto device to use.
@end deffn
@end deffn
@ -3172,7 +3172,7 @@ exposed via extended capability registers in the PCI Express configuration space
For more information see Xilinx PG245 (Section on From_PCIE_to_JTAG mode).
@deffn {Config Command} {xlnx_pcie_xvc_config} device
@deffn {Config Command} {xlnx_pcie_xvc config} device
Specifies the PCI Express device via parameter @var{device} to use.
The correct value for @var{device} can be obtained by looking at the output
@ -3197,6 +3197,73 @@ configuration on exit.
See @file{interface/raspberrypi-native.cfg} for a sample config and
pinout.
@deffn {Config Command} {bcm2835gpio jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo}
Set JTAG transport GPIO numbers for TCK, TMS, TDI, and TDO (in that order).
Must be specified to enable JTAG transport. These pins can also be specified
individually.
@end deffn
@deffn {Config Command} {bcm2835gpio tck_num} @var{tck}
Set TCK GPIO number. Must be specified to enable JTAG transport. Can also be
specified using the configuration command @command{bcm2835gpio jtag_nums}.
@end deffn
@deffn {Config Command} {bcm2835gpio tms_num} @var{tms}
Set TMS GPIO number. Must be specified to enable JTAG transport. Can also be
specified using the configuration command @command{bcm2835gpio jtag_nums}.
@end deffn
@deffn {Config Command} {bcm2835gpio tdo_num} @var{tdo}
Set TDO GPIO number. Must be specified to enable JTAG transport. Can also be
specified using the configuration command @command{bcm2835gpio jtag_nums}.
@end deffn
@deffn {Config Command} {bcm2835gpio tdi_num} @var{tdi}
Set TDI GPIO number. Must be specified to enable JTAG transport. Can also be
specified using the configuration command @command{bcm2835gpio jtag_nums}.
@end deffn
@deffn {Config Command} {bcm2835gpio swd_nums} @var{swclk} @var{swdio}
Set SWD transport GPIO numbers for SWCLK and SWDIO (in that order). Must be
specified to enable SWD transport. These pins can also be specified individually.
@end deffn
@deffn {Config Command} {bcm2835gpio swclk_num} @var{swclk}
Set SWCLK GPIO number. Must be specified to enable SWD transport. Can also be
specified using the configuration command @command{bcm2835gpio swd_nums}.
@end deffn
@deffn {Config Command} {bcm2835gpio swdio_num} @var{swdio}
Set SWDIO GPIO number. Must be specified to enable SWD transport. Can also be
specified using the configuration command @command{bcm2835gpio swd_nums}.
@end deffn
@deffn {Config Command} {bcm2835gpio swdio_dir_num} @var{swdio} @var{dir}
Set SWDIO direction control pin GPIO number. If specified, this pin can be used
to control the direction of an external buffer on the SWDIO pin (set=output
mode, clear=input mode). If not specified, this feature is disabled.
@end deffn
@deffn {Config Command} {bcm2835gpio srst_num} @var{srst}
Set SRST GPIO number. Must be specified to enable SRST.
@end deffn
@deffn {Config Command} {bcm2835gpio trst_num} @var{trst}
Set TRST GPIO number. Must be specified to enable TRST.
@end deffn
@deffn {Config Command} {bcm2835gpio speed_coeffs} @var{speed_coeff} @var{speed_offset}
Set SPEED_COEFF and SPEED_OFFSET for delay calculations. If unspecified,
speed_coeff defaults to 113714, and speed_offset defaults to 28.
@end deffn
@deffn {Config Command} {bcm2835gpio peripheral_base} @var{base}
Set the peripheral base register address to access GPIOs. For the RPi1, use
0x20000000. For RPi2 and RPi3, use 0x3F000000. For RPi4, use 0xFE000000. A full
list can be found in the
@uref{https://www.raspberrypi.org/documentation/hardware/raspberrypi/peripheral_addresses.md, official guide}.
@end deffn
@end deffn
@deffn {Interface Driver} {imx_gpio}
@ -3231,7 +3298,7 @@ See @file{interface/sysfsgpio-raspberrypi.cfg} for a sample config.
OpenJTAG compatible USB adapter.
This defines some driver-specific commands:
@deffn {Config Command} {openjtag_variant} variant
@deffn {Config Command} {openjtag variant} variant
Specifies the variant of the OpenJTAG adapter (see @uref{http://www.openjtag.org/}).
Currently valid @var{variant} values include:
@ -3242,7 +3309,7 @@ Currently valid @var{variant} values include:
@end itemize
@end deffn
@deffn {Config Command} {openjtag_device_desc} string
@deffn {Config Command} {openjtag device_desc} string
The USB device description string of the adapter.
This value is only used with the standard variant.
@end deffn
@ -3254,11 +3321,11 @@ SystemVerilog Direct Programming Interface (DPI) compatible driver for
JTAG devices in emulation. The driver acts as a client for the SystemVerilog
DPI server interface.
@deffn {Config Command} {jtag_dpi_set_port} port
@deffn {Config Command} {jtag_dpi set_port} port
Specifies the TCP/IP port number of the SystemVerilog DPI server interface.
@end deffn
@deffn {Config Command} {jtag_dpi_set_address} address
@deffn {Config Command} {jtag_dpi set_address} address
Specifies the TCP/IP address of the SystemVerilog DPI server interface.
@end deffn
@end deffn
@ -3272,21 +3339,21 @@ It uses a simple data protocol over a serial port connection.
Most hardware development boards have a UART, a real serial port, or a virtual USB serial device, so this driver
allows you to start building your own JTAG adapter without the complexity of a custom USB connection.
@deffn {Config Command} {buspirate_port} serial_port
@deffn {Config Command} {buspirate port} serial_port
Specify the serial port's filename. For example:
@example
buspirate_port /dev/ttyUSB0
buspirate port /dev/ttyUSB0
@end example
@end deffn
@deffn {Config Command} {buspirate_speed} (normal|fast)
@deffn {Config Command} {buspirate speed} (normal|fast)
Set the communication speed to 115k (normal) or 1M (fast). For example:
@example
buspirate_mode normal
buspirate speed normal
@end example
@end deffn
@deffn {Config Command} {buspirate_mode} (normal|open-drain)
@deffn {Config Command} {buspirate mode} (normal|open-drain)
Set the Bus Pirate output mode.
@itemize @minus
@item In normal mode (push/pull), do not enable the pull-ups, and do not connect I/O header pin VPU to JTAG VREF.
@ -3294,33 +3361,33 @@ Set the Bus Pirate output mode.
@end itemize
For example:
@example
buspirate_mode normal
buspirate mode normal
@end example
@end deffn
@deffn {Config Command} {buspirate_pullup} (0|1)
@deffn {Config Command} {buspirate pullup} (0|1)
Whether to connect (1) or not (0) the I/O header pin VPU (JTAG VREF)
to the pull-up/pull-down resistors on MOSI (JTAG TDI), CLK (JTAG TCK), MISO (JTAG TDO) and CS (JTAG TMS).
For example:
@example
buspirate_pullup 0
buspirate pullup 0
@end example
@end deffn
@deffn {Config Command} {buspirate_vreg} (0|1)
@deffn {Config Command} {buspirate vreg} (0|1)
Whether to enable (1) or disable (0) the built-in voltage regulator,
which can be used to supply power to a test circuit through
I/O header pins +3V3 and +5V. For example:
@example
buspirate_vreg 0
buspirate vreg 0
@end example
@end deffn
@deffn {Command} {buspirate_led} (0|1)
@deffn {Command} {buspirate led} (0|1)
Turns the Bus Pirate's LED on (1) or off (0). For example:
@end deffn
@example
buspirate_led 1
buspirate led 1
@end example
@end deffn
@ -4821,8 +4888,8 @@ They are not otherwise documented here.
@deffn {Command} {$target_name array2mem} arrayname width address count
@deffnx {Command} {$target_name mem2array} arrayname width address count
These provide an efficient script-oriented interface to memory.
The @code{array2mem} primitive writes bytes, halfwords, or words;
while @code{mem2array} reads them.
The @code{array2mem} primitive writes bytes, halfwords, words
or double-words; while @code{mem2array} reads them.
In both cases, the TCL side uses an array, and
the target side uses raw memory.
@ -4835,7 +4902,7 @@ and neither store nor return those values.
@itemize
@item @var{arrayname} ... is the name of an array variable
@item @var{width} ... is 8/16/32 - indicating the memory access size
@item @var{width} ... is 8/16/32/64 - indicating the memory access size
@item @var{address} ... is the target memory address
@item @var{count} ... is the number of elements to process
@end itemize
@ -7235,7 +7302,7 @@ The @var{num} parameter is a value shown by @command{flash banks}.
@end deffn
@deffn {Flash Driver} {stm32l4x}
All members of the STM32 G0, G4, L4, L4+, L5, WB and WL
All members of the STM32 G0, G4, L4, L4+, L5, U5, WB and WL
microcontroller families from STMicroelectronics include internal flash
and use ARM Cortex-M0+, M4 and M33 cores.
The driver automatically recognizes a number of these chips using
@ -7277,6 +7344,13 @@ Unlocks the entire stm32 device.
The @var{num} parameter is a value shown by @command{flash banks}.
@end deffn
@deffn Command {stm32l4x flashloader} num [@option{enable} | @option{disable}]
Enables or disables the flashloader usage (enabled by default),
when disabled it will fall back to direct memory access to program the Flash or OTP memories.
if neither @option{enabled} nor @option{disable} are specified, the command will display
the current configuration.
@end deffn
@deffn {Command} {stm32l4x mass_erase} num
Mass erases the entire stm32l4x device.
The @var{num} parameter is a value shown by @command{flash banks}.
@ -7333,6 +7407,14 @@ write protected areas in a specific @var{device_bank}
Forces a re-load of the option byte registers. Will cause a system reset of the device.
The @var{num} parameter is a value shown by @command{flash banks}.
@end deffn
@deffn Command {stm32l4x trustzone} num [@option{enable} | @option{disable}]
Enables or disables Global TrustZone Security, using the TZEN option bit.
If neither @option{enabled} nor @option{disable} are specified, the command will display
the TrustZone status.
@emph{Note:} This command works only with devices with TrustZone, eg. STM32L5.
@emph{Note:} This command will perform an OBL_Launch after modifying the TZEN.
@end deffn
@end deffn
@deffn {Flash Driver} {str7x}

4
src/flash/common.c
View File

@ -25,14 +25,14 @@
unsigned get_flash_name_index(const char *name)
{
const char *name_index = strrchr(name, '.');
if (NULL == name_index)
if (!name_index)
return 0;
if (name_index[1] < '0' || name_index[1] > '9')
return ~0U;
unsigned requested;
int retval = parse_uint(name_index + 1, &requested);
/* detect parsing error by forcing past end of bank list */
return (ERROR_OK == retval) ? requested : ~0U;
return (retval == ERROR_OK) ? requested : ~0U;
}
bool flash_driver_name_matches(const char *name, const char *expected)

2
src/flash/nand/arm_io.c
View File

@ -55,7 +55,7 @@ static int arm_code_to_working_area(struct target *target,
*/
/* make sure we have a working area */
if (NULL == *area) {
if (!*area) {
retval = target_alloc_working_area(target, size, area);
if (retval != ERROR_OK) {
LOG_DEBUG("%s: no %d byte buffer", __func__, (int) size);

46
src/flash/nand/at91sam9.c
View File

@ -25,13 +25,13 @@
#include "imp.h"
#include "arm_io.h"
#define AT91C_PIOx_SODR (0x30) /**< Offset to PIO SODR. */
#define AT91C_PIOx_CODR (0x34) /**< Offset to PIO CODR. */
#define AT91C_PIOx_PDSR (0x3C) /**< Offset to PIO PDSR. */
#define AT91C_ECCx_CR (0x00) /**< Offset to ECC CR. */
#define AT91C_ECCx_SR (0x08) /**< Offset to ECC SR. */
#define AT91C_ECCx_PR (0x0C) /**< Offset to ECC PR. */
#define AT91C_ECCx_NPR (0x10) /**< Offset to ECC NPR. */
#define AT91C_PIOX_SODR (0x30) /**< Offset to PIO SODR. */
#define AT91C_PIOX_CODR (0x34) /**< Offset to PIO CODR. */
#define AT91C_PIOX_PDSR (0x3C) /**< Offset to PIO PDSR. */
#define AT91C_ECCX_CR (0x00) /**< Offset to ECC CR. */
#define AT91C_ECCX_SR (0x08) /**< Offset to ECC SR. */
#define AT91C_ECCX_PR (0x0C) /**< Offset to ECC PR. */
#define AT91C_ECCX_NPR (0x10) /**< Offset to ECC NPR. */
/**
* Representation of a pin on an AT91SAM9 chip.
@ -113,7 +113,7 @@ static int at91sam9_enable(struct nand_device *nand)
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
return target_write_u32(target, info->ce.pioc + AT91C_PIOx_CODR, 1 << info->ce.num);
return target_write_u32(target, info->ce.pioc + AT91C_PIOX_CODR, 1 << info->ce.num);
}
/**
@ -127,7 +127,7 @@ static int at91sam9_disable(struct nand_device *nand)
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
return target_write_u32(target, info->ce.pioc + AT91C_PIOx_SODR, 1 << info->ce.num);
return target_write_u32(target, info->ce.pioc + AT91C_PIOX_SODR, 1 << info->ce.num);
}
/**
@ -237,7 +237,7 @@ static int at91sam9_nand_ready(struct nand_device *nand, int timeout)
return 0;
do {
target_read_u32(target, info->busy.pioc + AT91C_PIOx_PDSR, &status);
target_read_u32(target, info->busy.pioc + AT91C_PIOX_PDSR, &status);
if (status & (1 << info->busy.num))
return 1;
@ -311,7 +311,7 @@ static int at91sam9_ecc_init(struct target *target, struct at91sam9_nand *info)
}
/* reset ECC parity registers */
return target_write_u32(target, info->ecc + AT91C_ECCx_CR, 1);
return target_write_u32(target, info->ecc + AT91C_ECCX_CR, 1);
}
/**
@ -368,23 +368,23 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
uint32_t status;
retval = at91sam9_ecc_init(target, info);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (data) {
retval = nand_read_data_page(nand, data, data_size);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
}
oob_data = at91sam9_oob_init(nand, oob, &oob_size);
retval = nand_read_data_page(nand, oob_data, oob_size);
if (ERROR_OK == retval && data) {
target_read_u32(target, info->ecc + AT91C_ECCx_SR, &status);
if (retval == ERROR_OK && data) {
target_read_u32(target, info->ecc + AT91C_ECCX_SR, &status);
if (status & 1) {
LOG_ERROR("Error detected!");
if (status & 4)
@ -394,7 +394,7 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
uint32_t parity;
target_read_u32(target,
info->ecc + AT91C_ECCx_PR,
info->ecc + AT91C_ECCX_PR,
&parity);
uint32_t word = (parity & 0x0000FFF0) >> 4;
uint32_t bit = parity & 0x0F;
@ -443,16 +443,16 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
uint32_t parity, nparity;
retval = at91sam9_ecc_init(target, info);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (data) {
retval = nand_write_data_page(nand, data, data_size);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Unable to write data to NAND device");
return retval;
}
@ -462,8 +462,8 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
if (!oob) {
/* no OOB given, so read in the ECC parity from the ECC controller */
target_read_u32(target, info->ecc + AT91C_ECCx_PR, &parity);
target_read_u32(target, info->ecc + AT91C_ECCx_NPR, &nparity);
target_read_u32(target, info->ecc + AT91C_ECCX_PR, &parity);
target_read_u32(target, info->ecc + AT91C_ECCX_NPR, &nparity);
oob_data[0] = (uint8_t) parity;
oob_data[1] = (uint8_t) (parity >> 8);
@ -476,7 +476,7 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
if (!oob)
free(oob_data);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Unable to write OOB data to NAND");
return retval;
}

28
src/flash/nand/core.c
View File

@ -180,7 +180,7 @@ static struct nand_device *get_nand_device_by_name(const char *name)
unsigned found = 0;
struct nand_device *nand;
for (nand = nand_devices; NULL != nand; nand = nand->next) {
for (nand = nand_devices; nand; nand = nand->next) {
if (strcmp(nand->name, name) == 0)
return nand;
if (!flash_driver_name_matches(nand->controller->name, name))
@ -682,7 +682,7 @@ int nand_write_page(struct nand_device *nand, uint32_t page,
if (nand->blocks[block].is_erased == 1)
nand->blocks[block].is_erased = 0;
if (nand->use_raw || nand->controller->write_page == NULL)
if (nand->use_raw || !nand->controller->write_page)
return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
else
return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
@ -695,7 +695,7 @@ int nand_read_page(struct nand_device *nand, uint32_t page,
if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
if (nand->use_raw || nand->controller->read_page == NULL)
if (nand->use_raw || !nand->controller->read_page)
return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
else
return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
@ -750,7 +750,7 @@ int nand_page_command(struct nand_device *nand, uint32_t page,
nand->controller->address(nand, (page >> 16) & 0xff);
/* large page devices need a start command if reading */
if (NAND_CMD_READ0 == cmd)
if (cmd == NAND_CMD_READ0)
nand->controller->command(nand, NAND_CMD_READSTART);
}
@ -769,10 +769,10 @@ int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
{
int retval = ERROR_NAND_NO_BUFFER;
if (nand->controller->read_block_data != NULL)
if (nand->controller->read_block_data)
retval = (nand->controller->read_block_data)(nand, data, size);
if (ERROR_NAND_NO_BUFFER == retval) {
if (retval == ERROR_NAND_NO_BUFFER) {
uint32_t i;
int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
@ -793,7 +793,7 @@ int nand_read_page_raw(struct nand_device *nand, uint32_t page,
int retval;
retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (data)
@ -809,10 +809,10 @@ int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
{
int retval = ERROR_NAND_NO_BUFFER;
if (nand->controller->write_block_data != NULL)
if (nand->controller->write_block_data)
retval = (nand->controller->write_block_data)(nand, data, size);
if (ERROR_NAND_NO_BUFFER == retval) {
if (retval == ERROR_NAND_NO_BUFFER) {
bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
uint32_t incr = is16bit ? 2 : 1;
uint16_t write_data;
@ -825,7 +825,7 @@ int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
write_data = *data;
retval = nand->controller->write_data(nand, write_data);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
break;
data += incr;
@ -849,7 +849,7 @@ int nand_write_finish(struct nand_device *nand)
return ERROR_NAND_OPERATION_TIMEOUT;
retval = nand_read_status(nand, &status);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
@ -870,12 +870,12 @@ int nand_write_page_raw(struct nand_device *nand, uint32_t page,
int retval;
retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (data) {
retval = nand_write_data_page(nand, data, data_size);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Unable to write data to NAND device");
return retval;
}
@ -883,7 +883,7 @@ int nand_write_page_raw(struct nand_device *nand, uint32_t page,
if (oob) {
retval = nand_write_data_page(nand, oob, oob_size);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Unable to write OOB data to NAND device");
return retval;
}

2
src/flash/nand/davinci.c
View File

@ -731,7 +731,7 @@ NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command)
}
info = calloc(1, sizeof(*info));
if (info == NULL)
if (!info)
goto fail;
info->eccmode = eccmode;

2
src/flash/nand/driver.c
View File

@ -75,7 +75,7 @@ int nand_driver_walk(nand_driver_walker_t f, void *x)
{
for (unsigned i = 0; nand_flash_controllers[i]; i++) {
int retval = (*f)(nand_flash_controllers[i], x);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
}
return ERROR_OK;

20
src/flash/nand/fileio.c
View File

@ -65,10 +65,10 @@ int nand_fileio_start(struct command_invocation *cmd,
duration_start(&state->bench);
if (NULL != filename) {
if (filename) {
int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY);
if (ERROR_OK != retval) {
const char *msg = (FILEIO_READ == filemode) ? "read" : "write";
if (retval != ERROR_OK) {
const char *msg = (filemode == FILEIO_READ) ? "read" : "write";
command_print(cmd, "failed to open '%s' for %s access",
filename, msg);
return retval;
@ -119,15 +119,15 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
nand_fileio_init(state);
unsigned minargs = need_size ? 4 : 3;
if (CMD_ARGC < minargs)
if (minargs > CMD_ARGC)
return ERROR_COMMAND_SYNTAX_ERROR;
struct nand_device *nand;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (NULL == nand->device) {
if (!nand->device) {
command_print(CMD, "#%s: not probed", CMD_ARGV[0]);
return ERROR_NAND_DEVICE_NOT_PROBED;
}
@ -141,7 +141,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
}
}
if (CMD_ARGC > minargs) {
if (minargs < CMD_ARGC) {
for (unsigned i = minargs; i < CMD_ARGC; i++) {
if (!strcmp(CMD_ARGV[i], "oob_raw"))
state->oob_format |= NAND_OOB_RAW;
@ -159,7 +159,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
}
retval = nand_fileio_start(CMD, nand, CMD_ARGV[1], filemode, state);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (!need_size) {
@ -184,7 +184,7 @@ int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s)
size_t total_read = 0;
size_t one_read;
if (NULL != s->page) {
if (s->page) {
fileio_read(s->fileio, s->page_size, s->page, &one_read);
if (one_read < s->page_size)
memset(s->page + one_read, 0xff, s->page_size - one_read);
@ -213,7 +213,7 @@ int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s)
nand_calculate_ecc_kw(nand, s->page + i, ecc);
ecc += 10;
}
} else if (NULL != s->oob) {
} else if (s->oob) {
fileio_read(s->fileio, s->oob_size, s->oob, &one_read);
if (one_read < s->oob_size)
memset(s->oob + one_read, 0xff, s->oob_size - one_read);

4
src/flash/nand/lpc3180.c
View File

@ -589,7 +589,7 @@ static int lpc3180_write_page(struct nand_device *nand,
oob_size);
}
retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* allocate a working area */
@ -970,7 +970,7 @@ static int lpc3180_read_page(struct nand_device *nand,
/* read always the data and also oob areas*/
retval = nand_page_command(nand, page, NAND_CMD_READ0, 0);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* allocate a working area */

246
src/flash/nand/lpc32xx.c
View File

@ -90,7 +90,7 @@ NAND_DEVICE_COMMAND_HANDLER(lpc32xx_nand_device_command)
"1000 and 20000 kHz, was %i",
lpc32xx_info->osc_freq);
lpc32xx_info->selected_controller = LPC32xx_NO_CONTROLLER;
lpc32xx_info->selected_controller = LPC32XX_NO_CONTROLLER;
lpc32xx_info->sw_write_protection = 0;
lpc32xx_info->sw_wp_lower_bound = 0x0;
lpc32xx_info->sw_wp_upper_bound = 0x0;
@ -141,7 +141,7 @@ static float lpc32xx_cycle_time(struct nand_device *nand)
/* determine current SYSCLK (13'MHz or main oscillator) */
retval = target_read_u32(target, 0x40004050, &sysclk_ctrl);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read SYSCLK_CTRL");
return ERROR_NAND_OPERATION_FAILED;
}
@ -153,7 +153,7 @@ static float lpc32xx_cycle_time(struct nand_device *nand)
/* determine selected HCLK source */
retval = target_read_u32(target, 0x40004044, &pwr_ctrl);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read HCLK_CTRL");
return ERROR_NAND_OPERATION_FAILED;
}
@ -162,14 +162,14 @@ static float lpc32xx_cycle_time(struct nand_device *nand)
hclk = sysclk;
else {
retval = target_read_u32(target, 0x40004058, &hclkpll_ctrl);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read HCLKPLL_CTRL");
return ERROR_NAND_OPERATION_FAILED;
}
hclk_pll = lpc32xx_pll(sysclk, hclkpll_ctrl);
retval = target_read_u32(target, 0x40004040, &hclkdiv_ctrl);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read CLKDIV_CTRL");
return ERROR_NAND_OPERATION_FAILED;
}
@ -222,34 +222,34 @@ static int lpc32xx_init(struct nand_device *nand)
}
/* select MLC controller if none is currently selected */
if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) {
LOG_DEBUG("no LPC32xx NAND flash controller selected, "
"using default 'slc'");
lpc32xx_info->selected_controller = LPC32xx_SLC_CONTROLLER;
lpc32xx_info->selected_controller = LPC32XX_SLC_CONTROLLER;
}
if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
uint32_t mlc_icr_value = 0x0;
float cycle;
int twp, twh, trp, treh, trhz, trbwb, tcea;
/* FLASHCLK_CTRL = 0x22 (enable clk for MLC) */
retval = target_write_u32(target, 0x400040c8, 0x22);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set FLASHCLK_CTRL");
return ERROR_NAND_OPERATION_FAILED;
}
/* MLC_CEH = 0x0 (Force nCE assert) */
retval = target_write_u32(target, 0x200b804c, 0x0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_CEH");
return ERROR_NAND_OPERATION_FAILED;
}
/* MLC_LOCK = 0xa25e (unlock protected registers) */
retval = target_write_u32(target, 0x200b8044, 0xa25e);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_LOCK");
return ERROR_NAND_OPERATION_FAILED;
}
@ -264,7 +264,7 @@ static int lpc32xx_init(struct nand_device *nand)
if (bus_width == 16)
mlc_icr_value |= 0x1;
retval = target_write_u32(target, 0x200b8030, mlc_icr_value);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ICR");
return ERROR_NAND_OPERATION_FAILED;
}
@ -282,7 +282,7 @@ static int lpc32xx_init(struct nand_device *nand)
/* MLC_LOCK = 0xa25e (unlock protected registers) */
retval = target_write_u32(target, 0x200b8044, 0xa25e);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_LOCK");
return ERROR_NAND_OPERATION_FAILED;
}
@ -296,22 +296,22 @@ static int lpc32xx_init(struct nand_device *nand)
| ((trhz & 0x7) << 16)
| ((trbwb & 0x1f) << 19)
| ((tcea & 0x3) << 24));
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_TIME_REG");
return ERROR_NAND_OPERATION_FAILED;
}
retval = lpc32xx_reset(nand);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return ERROR_NAND_OPERATION_FAILED;
} else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
float cycle;
int r_setup, r_hold, r_width, r_rdy;
int w_setup, w_hold, w_width, w_rdy;
/* FLASHCLK_CTRL = 0x05 (enable clk for SLC) */
retval = target_write_u32(target, 0x400040c8, 0x05);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set FLASHCLK_CTRL");
return ERROR_NAND_OPERATION_FAILED;
}
@ -320,7 +320,7 @@ static int lpc32xx_init(struct nand_device *nand)
* so reset calling is here at the beginning
*/
retval = lpc32xx_reset(nand);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return ERROR_NAND_OPERATION_FAILED;
/* SLC_CFG =
@ -333,14 +333,14 @@ static int lpc32xx_init(struct nand_device *nand)
*/
retval = target_write_u32(target, 0x20020014,
0x3e | ((bus_width == 16) ? 1 : 0));
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set SLC_CFG");
return ERROR_NAND_OPERATION_FAILED;
}
/* SLC_IEN = 3 (INT_RDY_EN = 1) ,(INT_TC_STAT = 1) */
retval = target_write_u32(target, 0x20020020, 0x03);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set SLC_IEN");
return ERROR_NAND_OPERATION_FAILED;
}
@ -349,14 +349,14 @@ static int lpc32xx_init(struct nand_device *nand)
/* DMACLK_CTRL = 0x01 (enable clock for DMA controller) */
retval = target_write_u32(target, 0x400040e8, 0x01);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set DMACLK_CTRL");
return ERROR_NAND_OPERATION_FAILED;
}
/* DMACConfig = DMA enabled*/
retval = target_write_u32(target, 0x31000030, 0x01);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set DMACConfig");
return ERROR_NAND_OPERATION_FAILED;
}
@ -380,7 +380,7 @@ static int lpc32xx_init(struct nand_device *nand)
| ((w_hold & 0xf) << 20)
| ((w_width & 0xf) << 24)
| ((w_rdy & 0xf) << 28));
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set SLC_TAC");
return ERROR_NAND_OPERATION_FAILED;
}
@ -401,13 +401,13 @@ static int lpc32xx_reset(struct nand_device *nand)
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) {
LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
} else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
/* MLC_CMD = 0xff (reset controller and NAND device) */
retval = target_write_u32(target, 0x200b8000, 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_CMD");
return ERROR_NAND_OPERATION_FAILED;
}
@ -417,10 +417,10 @@ static int lpc32xx_reset(struct nand_device *nand)
"after reset");
return ERROR_NAND_OPERATION_TIMEOUT;
}
} else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
/* SLC_CTRL = 0x6 (ECC_CLEAR, SW_RESET) */
retval = target_write_u32(target, 0x20020010, 0x6);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set SLC_CTRL");
return ERROR_NAND_OPERATION_FAILED;
}
@ -447,20 +447,20 @@ static int lpc32xx_command(struct nand_device *nand, uint8_t command)
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) {
LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
} else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
/* MLC_CMD = command */
retval = target_write_u32(target, 0x200b8000, command);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_CMD");
return ERROR_NAND_OPERATION_FAILED;
}
} else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
/* SLC_CMD = command */
retval = target_write_u32(target, 0x20020008, command);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set SLC_CMD");
return ERROR_NAND_OPERATION_FAILED;
}
@ -481,20 +481,20 @@ static int lpc32xx_address(struct nand_device *nand, uint8_t address)
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) {
LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
} else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
/* MLC_ADDR = address */
retval = target_write_u32(target, 0x200b8004, address);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
} else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
/* SLC_ADDR = address */
retval = target_write_u32(target, 0x20020004, address);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set SLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
@ -515,20 +515,20 @@ static int lpc32xx_write_data(struct nand_device *nand, uint16_t data)
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) {
LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
} else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
/* MLC_DATA = data */
retval = target_write_u32(target, 0x200b0000, data);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_DATA");
return ERROR_NAND_OPERATION_FAILED;
}
} else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
/* SLC_DATA = data */
retval = target_write_u32(target, 0x20020000, data);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set SLC_DATA");
return ERROR_NAND_OPERATION_FAILED;
}
@ -549,10 +549,10 @@ static int lpc32xx_read_data(struct nand_device *nand, void *data)
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) {
LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
} else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
/* data = MLC_DATA, use sized access */
if (nand->bus_width == 8) {
uint8_t *data8 = data;
@ -561,16 +561,16 @@ static int lpc32xx_read_data(struct nand_device *nand, void *data)
LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
return ERROR_NAND_OPERATION_FAILED;
}
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read MLC_DATA");
return ERROR_NAND_OPERATION_FAILED;
}
} else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
uint32_t data32;
/* data = SLC_DATA, must use 32-bit access */
retval = target_read_u32(target, 0x20020000, &data32);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read SLC_DATA");
return ERROR_NAND_OPERATION_FAILED;
}
@ -600,7 +600,7 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
/* MLC_CMD = sequential input */
retval = target_write_u32(target, 0x200b8000, NAND_CMD_SEQIN);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_CMD");
return ERROR_NAND_OPERATION_FAILED;
}
@ -608,20 +608,20 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
if (nand->page_size == 512) {
/* MLC_ADDR = 0x0 (one column cycle) */
retval = target_write_u32(target, 0x200b8004, 0x0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
/* MLC_ADDR = row */
retval = target_write_u32(target, 0x200b8004, page & 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
retval = target_write_u32(target, 0x200b8004,
(page >> 8) & 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
@ -629,7 +629,7 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
if (nand->address_cycles == 4) {
retval = target_write_u32(target, 0x200b8004,
(page >> 16) & 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
@ -637,25 +637,25 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
} else {
/* MLC_ADDR = 0x0 (two column cycles) */
retval = target_write_u32(target, 0x200b8004, 0x0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
retval = target_write_u32(target, 0x200b8004, 0x0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
/* MLC_ADDR = row */
retval = target_write_u32(target, 0x200b8004, page & 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
retval = target_write_u32(target, 0x200b8004,
(page >> 8) & 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
@ -687,27 +687,27 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
/* write MLC_ECC_ENC_REG to start encode cycle */
retval = target_write_u32(target, 0x200b8008, 0x0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ECC_ENC_REG");
return ERROR_NAND_OPERATION_FAILED;
}
retval = target_write_memory(target, 0x200a8000,
4, 128, page_buffer);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_BUF (data)");
return ERROR_NAND_OPERATION_FAILED;
}
retval = target_write_memory(target, 0x200a8000,
1, 6, oob_buffer);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_BUF (oob)");
return ERROR_NAND_OPERATION_FAILED;
}
/* write MLC_ECC_AUTO_ENC_REG to start auto encode */
retval = target_write_u32(target, 0x200b8010, 0x0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ECC_AUTO_ENC_REG");
return ERROR_NAND_OPERATION_FAILED;
}
@ -721,7 +721,7 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
/* MLC_CMD = auto program command */
retval = target_write_u32(target, 0x200b8000, NAND_CMD_PAGEPROG);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_CMD");
return ERROR_NAND_OPERATION_FAILED;
}
@ -901,14 +901,14 @@ static int lpc32xx_start_slc_dma(struct nand_device *nand, uint32_t count,
/* DMACIntTCClear = ch0 */
retval = target_write_u32(target, 0x31000008, 1);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not set DMACIntTCClear");
return retval;
}
/* DMACIntErrClear = ch0 */
retval = target_write_u32(target, 0x31000010, 1);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not set DMACIntErrClear");
return retval;
}
@ -926,28 +926,28 @@ static int lpc32xx_start_slc_dma(struct nand_device *nand, uint32_t count,
retval = target_write_u32(target, 0x31000110,
1 | 1<<1 | 1<<6 | 2<<11 | 0<<14
| 0<<15 | 0<<16 | 0<<18);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not set DMACC0Config");
return retval;
}
/* SLC_CTRL = 3 (START DMA), ECC_CLEAR */
retval = target_write_u32(target, 0x20020010, 0x3);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not set SLC_CTRL");
return retval;
}
/* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/
retval = target_write_u32(target, 0x20020028, 2);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not set SLC_ICR");
return retval;
}
/* SLC_TC */
retval = target_write_u32(target, 0x20020030, count);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("lpc32xx_start_slc_dma: Could not set SLC_TC");
return retval;
}
@ -974,13 +974,13 @@ static int lpc32xx_dma_ready(struct nand_device *nand, int timeout)
/* Read DMACRawIntTCStat */
retval = target_read_u32(target, 0x31000014, &tc_stat);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not read DMACRawIntTCStat");
return 0;
}
/* Read DMACRawIntErrStat */
retval = target_read_u32(target, 0x31000018, &err_stat);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not read DMACRawIntErrStat");
return 0;
}
@ -1065,13 +1065,13 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
retval = target_write_memory(target, target_mem_base, 4,
nll * sizeof(struct dmac_ll) / 4,
(uint8_t *)dmalist);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not write DMA descriptors to IRAM");
return retval;
}
retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("NAND_CMD_SEQIN failed");
return retval;
}
@ -1085,7 +1085,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
WIDTH = bus_width
*/
retval = target_write_u32(target, 0x20020014, 0x3c);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not set SLC_CFG");
return retval;
}
@ -1097,7 +1097,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
retval = target_write_memory(target,
target_mem_base + DATA_OFFS,
4, nand->page_size/4, fdata);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not write data to IRAM");
return retval;
}
@ -1106,7 +1106,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
retval = target_write_memory(target, 0x31000100, 4,
sizeof(struct dmac_ll) / 4,
(uint8_t *)dmalist);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not write DMA descriptor to DMAC");
return retval;
}
@ -1115,7 +1115,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
int tot_size = nand->page_size;
tot_size += tot_size == 2048 ? 64 : 16;
retval = lpc32xx_start_slc_dma(nand, tot_size, 0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("DMA failed");
return retval;
}
@ -1139,7 +1139,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
static uint32_t hw_ecc[8];
retval = target_read_memory(target, target_mem_base + ECC_OFFS,
4, ecc_count, (uint8_t *)hw_ecc);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Reading hw generated ECC from IRAM failed");
return retval;
}
@ -1154,7 +1154,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
}
retval = target_write_memory(target, target_mem_base + SPARE_OFFS, 4,
foob_size / 4, foob);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Writing OOB to IRAM failed");
return retval;
}
@ -1163,7 +1163,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
retval = target_write_memory(target, 0x31000100, 4,
sizeof(struct dmac_ll) / 4,
(uint8_t *)(&dmalist[nll-1]));
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not write OOB DMA descriptor to DMAC");
return retval;
}
@ -1173,7 +1173,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
/* DMACIntTCClear = ch0 */
retval = target_write_u32(target, 0x31000008, 1);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not set DMACIntTCClear");
return retval;
}
@ -1190,7 +1190,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
retval = target_write_u32(target, 0x31000110,
1 | 1<<1 | 1<<6 | 2<<11 | 0<<14
| 0<<15 | 0<<16 | 0<<18);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not set DMACC0Config");
return retval;
}
@ -1203,7 +1203,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
} else {
/* Start xfer of data from iram to flash using DMA */
retval = lpc32xx_start_slc_dma(nand, foob_size, 1);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("DMA OOB failed");
return retval;
}
@ -1211,7 +1211,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
/* Let NAND start actual writing */
retval = nand_write_finish(nand);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("nand_write_finish failed");
return retval;
}
@ -1233,10 +1233,10 @@ static int lpc32xx_write_page(struct nand_device *nand, uint32_t page,
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) {
LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
} else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
if (!data && oob) {
LOG_ERROR("LPC32xx MLC controller can't write "
"OOB data only");
@ -1256,7 +1256,7 @@ static int lpc32xx_write_page(struct nand_device *nand, uint32_t page,
retval = lpc32xx_write_page_mlc(nand, page, data, data_size,
oob, oob_size);
} else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
struct working_area *pworking_area;
if (!data && oob) {
/*
@ -1307,7 +1307,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
/* MLC_CMD = Read0 */
retval = target_write_u32(target, 0x200b8000, NAND_CMD_READ0);
}
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_CMD");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1315,20 +1315,20 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
/* small page device
* MLC_ADDR = 0x0 (one column cycle) */
retval = target_write_u32(target, 0x200b8004, 0x0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
/* MLC_ADDR = row */
retval = target_write_u32(target, 0x200b8004, page & 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
retval = target_write_u32(target, 0x200b8004,
(page >> 8) & 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1336,7 +1336,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
if (nand->address_cycles == 4) {
retval = target_write_u32(target, 0x200b8004,
(page >> 16) & 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1345,25 +1345,25 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
/* large page device
* MLC_ADDR = 0x0 (two column cycles) */
retval = target_write_u32(target, 0x200b8004, 0x0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
retval = target_write_u32(target, 0x200b8004, 0x0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
/* MLC_ADDR = row */
retval = target_write_u32(target, 0x200b8004, page & 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
retval = target_write_u32(target, 0x200b8004,
(page >> 8) & 0xff);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ADDR");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1371,7 +1371,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
/* MLC_CMD = Read Start */
retval = target_write_u32(target, 0x200b8000,
NAND_CMD_READSTART);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_CMD");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1380,7 +1380,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
while (page_bytes_done < (uint32_t)nand->page_size) {
/* MLC_ECC_AUTO_DEC_REG = dummy */
retval = target_write_u32(target, 0x200b8014, 0xaa55aa55);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_ECC_AUTO_DEC_REG");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1392,7 +1392,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
}
retval = target_read_u32(target, 0x200b8048, &mlc_isr);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read MLC_ISR");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1411,7 +1411,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
if (data) {
retval = target_read_memory(target, 0x200a8000, 4, 128,
page_buffer + page_bytes_done);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read MLC_BUF (data)");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1420,7 +1420,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
if (oob) {
retval = target_read_memory(target, 0x200a8000, 4, 4,
oob_buffer + oob_bytes_done);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read MLC_BUF (oob)");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1462,13 +1462,13 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
retval = target_write_memory(target, target_mem_base, 4,
nll * sizeof(struct dmac_ll) / 4,
(uint8_t *)dmalist);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not write DMA descriptors to IRAM");
return retval;
}
retval = nand_page_command(nand, page, NAND_CMD_READ0, 0);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("lpc32xx_read_page_slc: NAND_CMD_READ0 failed");
return retval;
}
@ -1482,7 +1482,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
WIDTH = bus_width
*/
retval = target_write_u32(target, 0x20020014, 0x3e);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("lpc32xx_read_page_slc: Could not set SLC_CFG");
return retval;
}
@ -1490,7 +1490,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
/* Write first descriptor to DMA controller */
retval = target_write_memory(target, 0x31000100, 4,
sizeof(struct dmac_ll) / 4, (uint8_t *)dmalist);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not write DMA descriptor to DMAC");
return retval;
}
@ -1499,7 +1499,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
int tot_size = nand->page_size;
tot_size += nand->page_size == 2048 ? 64 : 16;
retval = lpc32xx_start_slc_dma(nand, tot_size, 1);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("lpc32xx_read_page_slc: DMA read failed");
return retval;
}
@ -1508,7 +1508,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
if (data) {
retval = target_read_memory(target, target_mem_base + DATA_OFFS,
4, data_size/4, data);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not read data from IRAM");
return retval;
}
@ -1518,7 +1518,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
retval = target_read_memory(target,
target_mem_base + SPARE_OFFS, 4,
oob_size/4, oob);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not read OOB from IRAM");
return retval;
}
@ -1530,7 +1530,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
retval = target_read_memory(target, target_mem_base + SPARE_OFFS,
4, nand->page_size == 2048 ? 16 : 4, foob);
lpc32xx_dump_oob(foob, nand->page_size == 2048 ? 64 : 16);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not read OOB from IRAM");
return retval;
}
@ -1539,7 +1539,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
static uint32_t hw_ecc[8]; /* max size */
retval = target_read_memory(target, target_mem_base + ECC_OFFS, 4,
ecc_count, (uint8_t *)hw_ecc);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not read hw generated ECC from IRAM");
return retval;
}
@ -1584,17 +1584,17 @@ static int lpc32xx_read_page(struct nand_device *nand, uint32_t page,
return ERROR_NAND_OPERATION_FAILED;
}
if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) {
LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
return ERROR_NAND_OPERATION_FAILED;
} else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
if (data_size > (uint32_t)nand->page_size) {
LOG_ERROR("data size exceeds page size");
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
retval = lpc32xx_read_page_mlc(nand, page, data, data_size,
oob, oob_size);
} else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
struct working_area *pworking_area;
retval = target_alloc_working_area(target,
@ -1628,12 +1628,12 @@ static int lpc32xx_controller_ready(struct nand_device *nand, int timeout)
LOG_DEBUG("lpc32xx_controller_ready count start=%d", timeout);
do {
if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
uint8_t status;
/* Read MLC_ISR, wait for controller to become ready */
retval = target_read_u8(target, 0x200b8048, &status);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set MLC_STAT");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1643,12 +1643,12 @@ static int lpc32xx_controller_ready(struct nand_device *nand, int timeout)
timeout);
return 1;
}
} else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
uint32_t status;
/* Read SLC_STAT and check READY bit */
retval = target_read_u32(target, 0x20020018, &status);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not set SLC_STAT");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1681,13 +1681,13 @@ static int lpc32xx_nand_ready(struct nand_device *nand, int timeout)
LOG_DEBUG("lpc32xx_nand_ready count start=%d", timeout);
do {
if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
uint8_t status = 0x0;
/* Read MLC_ISR, wait for NAND flash device to
* become ready */
retval = target_read_u8(target, 0x200b8048, &status);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read MLC_ISR");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1697,12 +1697,12 @@ static int lpc32xx_nand_ready(struct nand_device *nand, int timeout)
timeout);
return 1;
}
} else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
uint32_t status = 0x0;
/* Read SLC_STAT and check READY bit */
retval = target_read_u32(target, 0x20020018, &status);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("could not read SLC_STAT");
return ERROR_NAND_OPERATION_FAILED;
}
@ -1731,7 +1731,7 @@ static int lpc32xx_tc_ready(struct nand_device *nand, int timeout)
int retval;
/* Read SLC_INT_STAT and check INT_TC_STAT bit */
retval = target_read_u32(target, 0x2002001c, &status);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Could not read SLC_INT_STAT");
return 0;
}
@ -1770,10 +1770,10 @@ COMMAND_HANDLER(handle_lpc32xx_select_command)
if (CMD_ARGC >= 2) {
if (strcmp(CMD_ARGV[1], "mlc") == 0) {
lpc32xx_info->selected_controller =
LPC32xx_MLC_CONTROLLER;
LPC32XX_MLC_CONTROLLER;
} else if (strcmp(CMD_ARGV[1], "slc") == 0) {
lpc32xx_info->selected_controller =
LPC32xx_SLC_CONTROLLER;
LPC32XX_SLC_CONTROLLER;
} else
return ERROR_COMMAND_SYNTAX_ERROR;
}

6
src/flash/nand/lpc32xx.h
View File

@ -20,9 +20,9 @@
#define OPENOCD_FLASH_NAND_LPC32XX_H
enum lpc32xx_selected_controller {
LPC32xx_NO_CONTROLLER,
LPC32xx_MLC_CONTROLLER,
LPC32xx_SLC_CONTROLLER,
LPC32XX_NO_CONTROLLER,
LPC32XX_MLC_CONTROLLER,
LPC32XX_SLC_CONTROLLER,
};
struct lpc32xx_nand_controller {

2
src/flash/nand/mx3.c
View File

@ -64,7 +64,7 @@ NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command)
{
struct mx3_nf_controller *mx3_nf_info;
mx3_nf_info = malloc(sizeof(struct mx3_nf_controller));
if (mx3_nf_info == NULL) {
if (!mx3_nf_info) {
LOG_ERROR("no memory for nand controller");
return ERROR_FAIL;
}

50
src/flash/nand/mxc.c
View File

@ -89,7 +89,7 @@ NAND_DEVICE_COMMAND_HANDLER(mxc_nand_device_command)
int hwecc_needed;
mxc_nf_info = malloc(sizeof(struct mxc_nf_controller));
if (mxc_nf_info == NULL) {
if (!mxc_nf_info) {
LOG_ERROR("no memory for nand controller");
return ERROR_FAIL;
}
@ -207,9 +207,9 @@ static int mxc_init(struct nand_device *nand)
int validate_target_result;
uint16_t buffsize_register_content;
uint32_t sreg_content;
uint32_t SREG = MX2_FMCR;
uint32_t SEL_16BIT = MX2_FMCR_NF_16BIT_SEL;
uint32_t SEL_FMS = MX2_FMCR_NF_FMS;
uint32_t sreg = MX2_FMCR;
uint32_t sel_16bit = MX2_FMCR_NF_16BIT_SEL;
uint32_t sel_fms = MX2_FMCR_NF_FMS;
int retval;
uint16_t nand_status_content;
/*
@ -226,27 +226,27 @@ static int mxc_init(struct nand_device *nand)
mxc_nf_info->flags.one_kb_sram = 0;
if (mxc_nf_info->mxc_version == MXC_VERSION_MX31) {
SREG = MX3_PCSR;
SEL_16BIT = MX3_PCSR_NF_16BIT_SEL;
SEL_FMS = MX3_PCSR_NF_FMS;
sreg = MX3_PCSR;
sel_16bit = MX3_PCSR_NF_16BIT_SEL;
sel_fms = MX3_PCSR_NF_FMS;
} else if (mxc_nf_info->mxc_version == MXC_VERSION_MX25) {
SREG = MX25_RCSR;
SEL_16BIT = MX25_RCSR_NF_16BIT_SEL;
SEL_FMS = MX25_RCSR_NF_FMS;
sreg = MX25_RCSR;
sel_16bit = MX25_RCSR_NF_16BIT_SEL;
sel_fms = MX25_RCSR_NF_FMS;
} else if (mxc_nf_info->mxc_version == MXC_VERSION_MX35) {
SREG = MX35_RCSR;
SEL_16BIT = MX35_RCSR_NF_16BIT_SEL;
SEL_FMS = MX35_RCSR_NF_FMS;
sreg = MX35_RCSR;
sel_16bit = MX35_RCSR_NF_16BIT_SEL;
sel_fms = MX35_RCSR_NF_FMS;
}
target_read_u32(target, SREG, &sreg_content);
target_read_u32(target, sreg, &sreg_content);
if (!nand->bus_width) {
/* bus_width not yet defined. Read it from MXC_FMCR */
nand->bus_width = (sreg_content & SEL_16BIT) ? 16 : 8;
nand->bus_width = (sreg_content & sel_16bit) ? 16 : 8;
} else {
/* bus_width forced in soft. Sync it to MXC_FMCR */
sreg_content |= ((nand->bus_width == 16) ? SEL_16BIT : 0x00000000);
target_write_u32(target, SREG, sreg_content);
sreg_content |= ((nand->bus_width == 16) ? sel_16bit : 0x00000000);
target_write_u32(target, sreg, sreg_content);
}
if (nand->bus_width == 16)
LOG_DEBUG("MXC_NF : bus is 16-bit width");
@ -254,10 +254,10 @@ static int mxc_init(struct nand_device *nand)
LOG_DEBUG("MXC_NF : bus is 8-bit width");
if (!nand->page_size)
nand->page_size = (sreg_content & SEL_FMS) ? 2048 : 512;
nand->page_size = (sreg_content & sel_fms) ? 2048 : 512;
else {
sreg_content |= ((nand->page_size == 2048) ? SEL_FMS : 0x00000000);
target_write_u32(target, SREG, sreg_content);
sreg_content |= ((nand->page_size == 2048) ? sel_fms : 0x00000000);
target_write_u32(target, sreg, sreg_content);
}
if (mxc_nf_info->flags.one_kb_sram && (nand->page_size == 2048)) {
LOG_ERROR("NAND controller have only 1 kb SRAM, so "
@ -649,18 +649,18 @@ static int mxc_read_page(struct nand_device *nand, uint32_t page,
}
if (nand->page_size > 512 && mxc_nf_info->flags.biswap_enabled) {
uint32_t SPARE_BUFFER3;
uint32_t spare_buffer3;
/* BI-swap - work-around of mxc NFC for NAND device with page == 2k */
target_read_u16(target, MXC_NF_MAIN_BUFFER3 + 464, &swap1);
if (nfc_is_v1())
SPARE_BUFFER3 = MXC_NF_V1_SPARE_BUFFER3 + 4;
spare_buffer3 = MXC_NF_V1_SPARE_BUFFER3 + 4;
else
SPARE_BUFFER3 = MXC_NF_V2_SPARE_BUFFER3;
target_read_u16(target, SPARE_BUFFER3, &swap2);
spare_buffer3 = MXC_NF_V2_SPARE_BUFFER3;
target_read_u16(target, spare_buffer3, &swap2);
new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8);
swap2 = (swap1 << 8) | (swap2 & 0xFF);
target_write_u16(target, MXC_NF_MAIN_BUFFER3 + 464, new_swap1);
target_write_u16(target, SPARE_BUFFER3, swap2);
target_write_u16(target, spare_buffer3, swap2);
}
if (data)

2
src/flash/nand/s3c24xx.c
View File

@ -34,7 +34,7 @@ S3C24XX_DEVICE_COMMAND()
struct s3c24xx_nand_controller *s3c24xx_info;
s3c24xx_info = malloc(sizeof(struct s3c24xx_nand_controller));
if (s3c24xx_info == NULL) {
if (!s3c24xx_info) {
LOG_ERROR("no memory for nand controller");
return -ENOMEM;
}

2
src/flash/nand/s3c24xx.h
View File

@ -51,7 +51,7 @@ S3C24XX_DEVICE_COMMAND();
#define CALL_S3C24XX_DEVICE_COMMAND(d, i) \
do { \
int retval = CALL_COMMAND_HANDLER(s3c24xx_nand_device_command, d, i); \
if (ERROR_OK != retval) \
if (retval != ERROR_OK) \
return retval; \
} while (0)

20
src/flash/nand/s3c24xx_regs.h
View File

@ -61,7 +61,7 @@
#define S3C2410_NFCONF_512BYTE (1 << 14)
#define S3C2410_NFCONF_4STEP (1 << 13)
#define S3C2410_NFCONF_INITECC (1 << 12)
#define S3C2410_NFCONF_nFCE (1 << 11)
#define S3C2410_NFCONF_NFCE (1 << 11)
#define S3C2410_NFCONF_TACLS(x) ((x) << 8)
#define S3C2410_NFCONF_TWRPH0(x) ((x) << 4)
#define S3C2410_NFCONF_TWRPH1(x) ((x) << 0)
@ -83,12 +83,12 @@
#define S3C2440_NFCONT_SPARE_ECCLOCK (1 << 6)
#define S3C2440_NFCONT_MAIN_ECCLOCK (1 << 5)
#define S3C2440_NFCONT_INITECC (1 << 4)
#define S3C2440_NFCONT_nFCE (1 << 1)
#define S3C2440_NFCONT_NFCE (1 << 1)
#define S3C2440_NFCONT_ENABLE (1 << 0)
#define S3C2440_NFSTAT_READY (1 << 0)
#define S3C2440_NFSTAT_nCE (1 << 1)
#define S3C2440_NFSTAT_RnB_CHANGE (1 << 2)
#define S3C2440_NFSTAT_NCE (1 << 1)
#define S3C2440_NFSTAT_RNB_CHANGE (1 << 2)
#define S3C2440_NFSTAT_ILLEGAL_ACCESS (1 << 3)
#define S3C2412_NFCONF_NANDBOOT (1 << 31)
@ -103,16 +103,16 @@
#define S3C2412_NFCONT_ECC4_DECINT (1 << 12)
#define S3C2412_NFCONT_MAIN_ECC_LOCK (1 << 7)
#define S3C2412_NFCONT_INIT_MAIN_ECC (1 << 5)
#define S3C2412_NFCONT_nFCE1 (1 << 2)
#define S3C2412_NFCONT_nFCE0 (1 << 1)
#define S3C2412_NFCONT_NFCE1 (1 << 2)
#define S3C2412_NFCONT_NFCE0 (1 << 1)
#define S3C2412_NFSTAT_ECC_ENCDONE (1 << 7)
#define S3C2412_NFSTAT_ECC_DECDONE (1 << 6)
#define S3C2412_NFSTAT_ILLEGAL_ACCESS (1 << 5)
#define S3C2412_NFSTAT_RnB_CHANGE (1 << 4)
#define S3C2412_NFSTAT_nFCE1 (1 << 3)
#define S3C2412_NFSTAT_nFCE0 (1 << 2)
#define S3C2412_NFSTAT_Res1 (1 << 1)
#define S3C2412_NFSTAT_RNB_CHANGE (1 << 4)
#define S3C2412_NFSTAT_NFCE1 (1 << 3)
#define S3C2412_NFSTAT_NFCE0 (1 << 2)
#define S3C2412_NFSTAT_RES1 (1 << 1)
#define S3C2412_NFSTAT_READY (1 << 0)
#define S3C2412_NFECCERR_SERRDATA(x) (((x) >> 21) & 0xf)

44
src/flash/nand/tcl.c
View File

@ -83,10 +83,10 @@ COMMAND_HANDLER(handle_nand_info_command)
struct nand_device *p;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (NULL == p->device) {
if (!p->device) {
command_print(CMD, "#%s: not probed", CMD_ARGV[0]);
return ERROR_OK;
}
@ -142,7 +142,7 @@ COMMAND_HANDLER(handle_nand_probe_command)
struct nand_device *p;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = nand_probe(p);
@ -161,7 +161,7 @@ COMMAND_HANDLER(handle_nand_erase_command)
struct nand_device *p;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
unsigned long offset;
@ -208,7 +208,7 @@ COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
struct nand_device *p;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (CMD_ARGC == 3) {
@ -246,7 +246,7 @@ COMMAND_HANDLER(handle_nand_write_command)
struct nand_fileio_state s;
int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
&s, &nand, FILEIO_READ, false, true);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
uint32_t total_bytes = s.size;
@ -261,7 +261,7 @@ COMMAND_HANDLER(handle_nand_write_command)
retval = nand_write_page(nand, s.address / nand->page_size,
s.page, s.page_size, s.oob, s.oob_size);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
command_print(CMD, "failed writing file %s "
"to NAND flash %s at offset 0x%8.8" PRIx32,
CMD_ARGV[1], CMD_ARGV[0], s.address);
@ -286,7 +286,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
struct nand_fileio_state file;
int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
&file, &nand, FILEIO_READ, false, true);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
struct nand_fileio_state dev;
@ -295,13 +295,13 @@ COMMAND_HANDLER(handle_nand_verify_command)
dev.size = file.size;
dev.oob_format = file.oob_format;
retval = nand_fileio_start(CMD, nand, NULL, FILEIO_NONE, &dev);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
while (file.size > 0) {
retval = nand_read_page(nand, dev.address / dev.page_size,
dev.page, dev.page_size, dev.oob, dev.oob_size);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
command_print(CMD, "reading NAND flash page failed");
nand_fileio_cleanup(&dev);
nand_fileio_cleanup(&file);
@ -346,23 +346,23 @@ COMMAND_HANDLER(handle_nand_dump_command)
struct nand_fileio_state s;
int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
&s, &nand, FILEIO_WRITE, true, false);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
while (s.size > 0) {
size_t size_written;
retval = nand_read_page(nand, s.address / nand->page_size,
s.page, s.page_size, s.oob, s.oob_size);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
command_print(CMD, "reading NAND flash page failed");
nand_fileio_cleanup(&s);
return retval;
}
if (NULL != s.page)
if (s.page)
fileio_write(s.fileio, s.page_size, s.page, &size_written);
if (NULL != s.oob)
if (s.oob)
fileio_write(s.fileio, s.oob_size, s.oob, &size_written);
s.size -= nand->page_size;
@ -388,10 +388,10 @@ COMMAND_HANDLER(handle_nand_raw_access_command)
struct nand_device *p;
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (NULL == p->device) {
if (!p->device) {
command_print(CMD, "#%s: not probed", CMD_ARGV[0]);
return ERROR_OK;
}
@ -527,14 +527,14 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name,
return ERROR_COMMAND_ARGUMENT_INVALID;
}
if (NULL != controller->commands) {
if (controller->commands) {
retval = register_commands(CMD_CTX, NULL,
controller->commands);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
}
c = malloc(sizeof(struct nand_device));
if (c == NULL) {
if (!c) {
LOG_ERROR("End of memory");
return ERROR_FAIL;
}
@ -552,7 +552,7 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name,
c->next = NULL;
retval = CALL_COMMAND_HANDLER(controller->nand_device_command, c);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("'%s' driver rejected nand flash. Usage: %s",
controller->name,
controller->usage);
@ -560,7 +560,7 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name,
return retval;
}
if (controller->usage == NULL)
if (!controller->usage)
LOG_DEBUG("'%s' driver usage field missing", controller->name);
nand_device_add(c);
@ -580,7 +580,7 @@ COMMAND_HANDLER(handle_nand_device_command)
const char *driver_name = CMD_ARGV[0];
struct nand_flash_controller *controller;
controller = nand_driver_find_by_name(CMD_ARGV[0]);
if (NULL == controller) {
if (!controller) {
LOG_ERROR("No valid NAND flash driver found (%s)", driver_name);
return CALL_COMMAND_HANDLER(handle_nand_list_drivers);
}

38
src/flash/nor/aduc702x.c
View File

@ -31,15 +31,15 @@ static int aduc702x_build_sector_list(struct flash_bank *bank);
static int aduc702x_check_flash_completion(struct target *target, unsigned int timeout_ms);
static int aduc702x_set_write_enable(struct target *target, int enable);
#define ADUC702x_FLASH 0xfffff800
#define ADUC702x_FLASH_FEESTA (0*4)
#define ADUC702x_FLASH_FEEMOD (1*4)
#define ADUC702x_FLASH_FEECON (2*4)
#define ADUC702x_FLASH_FEEDAT (3*4)
#define ADUC702x_FLASH_FEEADR (4*4)
#define ADUC702x_FLASH_FEESIGN (5*4)
#define ADUC702x_FLASH_FEEPRO (6*4)
#define ADUC702x_FLASH_FEEHIDE (7*4)
#define ADUC702X_FLASH 0xfffff800
#define ADUC702X_FLASH_FEESTA (0*4)
#define ADUC702X_FLASH_FEEMOD (1*4)
#define ADUC702X_FLASH_FEECON (2*4)
#define ADUC702X_FLASH_FEEDAT (3*4)
#define ADUC702X_FLASH_FEEADR (4*4)
#define ADUC702X_FLASH_FEESIGN (5*4)
#define ADUC702X_FLASH_FEEPRO (6*4)
#define ADUC702X_FLASH_FEEHIDE (7*4)
/* flash bank aduc702x 0 0 0 0 <target#>
* The ADC7019-28 devices all have the same flash layout */
@ -87,9 +87,9 @@ static int aduc702x_erase(struct flash_bank *bank, unsigned int first,
/* mass erase */
if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
LOG_DEBUG("performing mass erase.");
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEDAT, 0x3cff);
target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEADR, 0xffc3);
target_write_u8(target, ADUC702X_FLASH + ADUC702X_FLASH_FEECON, 0x06);
if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK) {
LOG_ERROR("mass erase failed");
@ -106,8 +106,8 @@ static int aduc702x_erase(struct flash_bank *bank, unsigned int first,
for (x = 0; x < count; ++x) {
adr = bank->base + ((first + x) * 512);
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr);
target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05);
target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEADR, adr);
target_write_u8(target, ADUC702X_FLASH + ADUC702X_FLASH_FEECON, 0x05);
if (aduc702x_check_flash_completion(target, 50) != ERROR_OK) {
LOG_ERROR("failed to erase sector at address 0x%08lX", adr);
@ -283,7 +283,7 @@ static int aduc702x_write_single(struct flash_bank *bank,
for (x = 0; x < count; x += 2) {
/* FEEADR = address */
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x);
target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEADR, offset + x);
/* set up data */
if ((x + 1) == count) {
@ -292,10 +292,10 @@ static int aduc702x_write_single(struct flash_bank *bank,
} else
b = buffer[x + 1];
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8));
target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEDAT, buffer[x] | (b << 8));
/* do single-write command */
target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02);
target_write_u8(target, ADUC702X_FLASH + ADUC702X_FLASH_FEECON, 0x02);
if (aduc702x_check_flash_completion(target, 1) != ERROR_OK) {
LOG_ERROR("single write failed for address 0x%08lX",
@ -345,7 +345,7 @@ static int aduc702x_probe(struct flash_bank *bank)
static int aduc702x_set_write_enable(struct target *target, int enable)
{
/* don't bother to preserve int enable bit here */
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEMOD, enable ? 8 : 0);
return ERROR_OK;
}
@ -361,7 +361,7 @@ static int aduc702x_check_flash_completion(struct target *target, unsigned int t
int64_t endtime = timeval_ms() + timeout_ms;
while (1) {
target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v);
target_read_u8(target, ADUC702X_FLASH + ADUC702X_FLASH_FEESTA, &v);
if ((v & 4) == 0)
break;
alive_sleep(1);

46
src/flash/nor/ambiqmicro.c
View File

@ -123,7 +123,7 @@ static struct {
uint8_t class;
uint8_t partno;
const char *partname;
} ambiqmicroParts[6] = {
} ambiqmicro_parts[6] = {
{0xFF, 0x00, "Unknown"},
{0x01, 0x00, "Apollo"},
{0x02, 0x00, "Apollo2"},
@ -132,7 +132,7 @@ static struct {
{0x05, 0x00, "Apollo"},
};
static char *ambiqmicroClassname[6] = {
static char *ambiqmicro_classname[6] = {
"Unknown", "Apollo", "Apollo2", "Unknown", "Unknown", "Apollo"
};
@ -172,10 +172,10 @@ static int get_ambiqmicro_info(struct flash_bank *bank, struct command_invocatio
}
/* Check class name in range. */
if (ambiqmicro_info->target_class < sizeof(ambiqmicroClassname))
classname = ambiqmicroClassname[ambiqmicro_info->target_class];
if (ambiqmicro_info->target_class < sizeof(ambiqmicro_classname))
classname = ambiqmicro_classname[ambiqmicro_info->target_class];
else
classname = ambiqmicroClassname[0];
classname = ambiqmicro_classname[0];
command_print_sameline(cmd, "\nAmbiq Micro information: Chip is "
"class %d (%s) %s\n",
@ -195,24 +195,24 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank)
{
struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
struct target *target = bank->target;
uint32_t PartNum = 0;
uint32_t part_num = 0;
int retval;
/*
* Read Part Number.
*/
retval = target_read_u32(target, 0x40020000, &PartNum);
retval = target_read_u32(target, 0x40020000, &part_num);
if (retval != ERROR_OK) {
LOG_ERROR("status(0x%x):Could not read PartNum.\n", retval);
/* Set PartNum to default device */
PartNum = 0;
LOG_ERROR("status(0x%x):Could not read part_num.\n", retval);
/* Set part_num to default device */
part_num = 0;
}
LOG_DEBUG("Part number: 0x%" PRIx32, PartNum);
LOG_DEBUG("Part number: 0x%" PRIx32, part_num);
/*
* Determine device class.
*/
ambiqmicro_info->target_class = (PartNum & 0xFF000000) >> 24;
ambiqmicro_info->target_class = (part_num & 0xFF000000) >> 24;
switch (ambiqmicro_info->target_class) {
case 1: /* 1 - Apollo */
@ -220,9 +220,9 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank)
bank->base = bank->bank_number * 0x40000;
ambiqmicro_info->pagesize = 2048;
ambiqmicro_info->flshsiz =
apollo_flash_size[(PartNum & 0x00F00000) >> 20];
apollo_flash_size[(part_num & 0x00F00000) >> 20];
ambiqmicro_info->sramsiz =
apollo_sram_size[(PartNum & 0x000F0000) >> 16];
apollo_sram_size[(part_num & 0x000F0000) >> 16];
ambiqmicro_info->num_pages = ambiqmicro_info->flshsiz /
ambiqmicro_info->pagesize;
if (ambiqmicro_info->num_pages > 128) {
@ -248,12 +248,12 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank)
}
if (ambiqmicro_info->target_class < ARRAY_SIZE(ambiqmicroParts))
if (ambiqmicro_info->target_class < ARRAY_SIZE(ambiqmicro_parts))
ambiqmicro_info->target_name =
ambiqmicroParts[ambiqmicro_info->target_class].partname;
ambiqmicro_parts[ambiqmicro_info->target_class].partname;
else
ambiqmicro_info->target_name =
ambiqmicroParts[0].partname;
ambiqmicro_parts[0].partname;
LOG_DEBUG("num_pages: %" PRIu32 ", pagesize: %" PRIu32 ", flash: %" PRIu32 ", sram: %" PRIu32,
ambiqmicro_info->num_pages,
@ -774,16 +774,12 @@ COMMAND_HANDLER(ambiqmicro_handle_mass_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (ambiqmicro_mass_erase(bank) == ERROR_OK) {
/* set all sectors as erased */
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
if (ambiqmicro_mass_erase(bank) == ERROR_OK)
command_print(CMD, "ambiqmicro mass erase complete");
} else
else
command_print(CMD, "ambiqmicro mass erase failed");
return ERROR_OK;
@ -802,7 +798,7 @@ COMMAND_HANDLER(ambiqmicro_handle_page_erase_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], last);
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (ambiqmicro_erase(bank, first, last) == ERROR_OK)

894
src/flash/nor/at91sam3.c
View File

File diff suppressed because it is too large Load Diff

892
src/flash/nor/at91sam4.c
View File

File diff suppressed because it is too large Load Diff

3
src/flash/nor/at91sam4l.c
View File

@ -480,9 +480,6 @@ static int sam4l_erase(struct flash_bank *bank, unsigned int first,
return ERROR_FAIL;
}
}
/* This sector is definitely erased. */
bank->sectors[i].is_erased = 1;
}
}

18
src/flash/nor/at91sam7.c
View File

@ -104,11 +104,11 @@ static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode);
static uint32_t at91sam7_wait_status_busy(struct flash_bank *bank, uint32_t waitbits, int timeout);
static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t pagen);
static const uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
static const uint32_t MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
static const uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
static const uint32_t mc_fmr[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
static const uint32_t mc_fcr[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
static const uint32_t mc_fsr[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
static const char *EPROC[8] = {
static const char *eproc[8] = {
"Unknown", "ARM946-E", "ARM7TDMI", "Unknown", "ARM920T", "ARM926EJ-S", "Unknown", "Unknown"
};
@ -179,7 +179,7 @@ static long SRAMSIZ[16] = {
static uint32_t at91sam7_get_flash_status(struct target *target, int bank_number)
{
uint32_t fsr;
target_read_u32(target, MC_FSR[bank_number], &fsr);
target_read_u32(target, mc_fsr[bank_number], &fsr);
return fsr;
}
@ -290,7 +290,7 @@ static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode)
LOG_DEBUG("fmcn[%i]: %i", bank->bank_number, (int)(fmcn));
fmr = fmcn << 16 | fws << 8;
target_write_u32(target, MC_FMR[bank->bank_number], fmr);
target_write_u32(target, mc_fmr[bank->bank_number], fmr);
}
at91sam7_info->flashmode = mode;
@ -329,7 +329,7 @@ static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t
struct target *target = bank->target;
fcr = (0x5A << 24) | ((pagen&0x3FF) << 8) | cmd;
target_write_u32(target, MC_FCR[bank->bank_number], fcr);
target_write_u32(target, mc_fcr[bank->bank_number], fcr);
LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u",
fcr,
bank->bank_number + 1,
@ -993,7 +993,7 @@ static int get_at91sam7_info(struct flash_bank *bank, struct command_invocation
"Flashsize: 0x%8.8" PRIx32 "\n",
at91sam7_info->cidr,
at91sam7_info->cidr_arch,
EPROC[at91sam7_info->cidr_eproc],
eproc[at91sam7_info->cidr_eproc],
at91sam7_info->cidr_version,
bank->size);
@ -1040,7 +1040,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command)
return ERROR_COMMAND_SYNTAX_ERROR;
bank = get_flash_bank_by_num_noprobe(0);
if (bank == NULL)
if (!bank)
return ERROR_FLASH_BANK_INVALID;
if (strcmp(bank->driver->name, "at91sam7")) {
command_print(CMD, "not an at91sam7 flash bank '%s'", CMD_ARGV[0]);

41
src/flash/nor/at91samd.c
View File

@ -385,7 +385,7 @@ static const struct samd_part *samd_find_part(uint32_t id)
{
uint8_t devsel = SAMD_GET_DEVSEL(id);
const struct samd_family *family = samd_find_family(id);
if (family == NULL)
if (!family)
return NULL;
for (unsigned i = 0; i < family->num_parts; i++) {
@ -452,7 +452,7 @@ static int samd_probe(struct flash_bank *bank)
}
part = samd_find_part(id);
if (part == NULL) {
if (!part) {
LOG_ERROR("Couldn't find part corresponding to DID %08" PRIx32, id);
return ERROR_FAIL;
}
@ -606,7 +606,7 @@ static int samd_get_reservedmask(struct target *target, uint64_t *mask)
}
const struct samd_family *family;
family = samd_find_family(id);
if (family == NULL) {
if (!family) {
LOG_ERROR("Couldn't determine device family");
return ERROR_FAIL;
}
@ -1051,31 +1051,6 @@ COMMAND_HANDLER(samd_handle_eeprom_command)
return res;
}
static COMMAND_HELPER(get_u64_from_hexarg, unsigned int num, uint64_t *value)
{
if (num >= CMD_ARGC) {
command_print(CMD, "Too few Arguments.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (strlen(CMD_ARGV[num]) >= 3 &&
CMD_ARGV[num][0] == '0' &&
CMD_ARGV[num][1] == 'x') {
char *check = NULL;
*value = strtoull(&(CMD_ARGV[num][2]), &check, 16);
if ((value == 0 && errno == ERANGE) ||
check == NULL || *check != 0) {
command_print(CMD, "Invalid 64-bit hex value in argument %d.",
num + 1);
return ERROR_COMMAND_SYNTAX_ERROR;
}
} else {
command_print(CMD, "Argument %d needs to be a hex value.", num + 1);
return ERROR_COMMAND_SYNTAX_ERROR;
}
return ERROR_OK;
}
COMMAND_HANDLER(samd_handle_nvmuserrow_command)
{
int res = ERROR_OK;
@ -1102,14 +1077,12 @@ COMMAND_HANDLER(samd_handle_nvmuserrow_command)
mask &= NVMUSERROW_LOCKBIT_MASK;
uint64_t value;
res = CALL_COMMAND_HANDLER(get_u64_from_hexarg, 0, &value);
if (res != ERROR_OK)
return res;
COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], value);
if (CMD_ARGC == 2) {
uint64_t mask_temp;
res = CALL_COMMAND_HANDLER(get_u64_from_hexarg, 1, &mask_temp);
if (res != ERROR_OK)
return res;
COMMAND_PARSE_NUMBER(u64, CMD_ARGV[1], mask_temp);
mask &= mask_temp;
}
res = samd_modify_user_row_masked(target, value, mask);

15
src/flash/nor/atsame5.c
View File

@ -220,7 +220,7 @@ static const struct samd_part *samd_find_part(uint32_t id)
{
uint8_t devsel = SAMD_GET_DEVSEL(id);
const struct samd_family *family = samd_find_family(id);
if (family == NULL)
if (!family)
return NULL;
for (unsigned i = 0; i < family->num_parts; i++) {
@ -287,7 +287,7 @@ static int same5_probe(struct flash_bank *bank)
}
part = samd_find_part(id);
if (part == NULL) {
if (!part) {
LOG_ERROR("Couldn't find part corresponding to DID %08" PRIx32, id);
return ERROR_FAIL;
}
@ -797,11 +797,12 @@ COMMAND_HANDLER(same5_handle_userpage_command)
}
if (CMD_ARGC >= 1) {
uint64_t mask = NVMUSERROW_SAM_E5_D5_MASK;
uint64_t value = strtoull(CMD_ARGV[0], NULL, 0);
uint64_t value, mask = NVMUSERROW_SAM_E5_D5_MASK;
COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], value);
if (CMD_ARGC == 2) {
uint64_t mask_temp = strtoull(CMD_ARGV[1], NULL, 0);
uint64_t mask_temp;
COMMAND_PARSE_NUMBER(u64, CMD_ARGV[1], mask_temp);
mask &= mask_temp;
}
@ -837,7 +838,9 @@ COMMAND_HANDLER(same5_handle_bootloader_command)
return ERROR_FAIL;
if (CMD_ARGC >= 1) {
unsigned long size = strtoul(CMD_ARGV[0], NULL, 0);
unsigned long size;
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[0], size);
uint32_t code = (size + 8191) / 8192;
if (code > 15) {
command_print(CMD, "Invalid bootloader size. Please "

4
src/flash/nor/atsamv.c
View File

@ -612,7 +612,7 @@ static int samv_get_info(struct flash_bank *bank, struct command_invocation *cmd
struct samv_flash_bank *samv_info = bank->driver_priv;
if (!samv_info->probed) {
int r = samv_probe(bank);
if (ERROR_OK != r)
if (r != ERROR_OK)
return r;
}
command_print_sameline(cmd, "Cortex-M7 detected with %" PRIu32 " kB flash\n",
@ -661,7 +661,7 @@ COMMAND_HANDLER(samv_handle_gpnvm_command)
return ERROR_COMMAND_SYNTAX_ERROR;
}
unsigned v;
unsigned v = 0;
if (!strcmp("show", CMD_ARGV[0])) {
if (who == -1) {
showall:

84
src/flash/nor/avrf.c
View File

@ -38,14 +38,14 @@
#define AVR_JTAG_INS_PROG_PAGEREAD 0x07
/* Data Registers: */
#define AVR_JTAG_REG_Bypass_Len 1
#define AVR_JTAG_REG_DeviceID_Len 32
#define AVR_JTAG_REG_BYPASS_LEN 1
#define AVR_JTAG_REG_DEVICEID_LEN 32
#define AVR_JTAG_REG_Reset_Len 1
#define AVR_JTAG_REG_JTAGID_Len 32
#define AVR_JTAG_REG_ProgrammingEnable_Len 16
#define AVR_JTAG_REG_ProgrammingCommand_Len 15
#define AVR_JTAG_REG_FlashDataByte_Len 16
#define AVR_JTAG_REG_RESET_LEN 1
#define AVR_JTAG_REG_JTAGID_LEN 32
#define AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN 16
#define AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN 15
#define AVR_JTAG_REG_FLASH_DATA_BYTE_LEN 16
struct avrf_type {
char name[15];
@ -81,7 +81,7 @@ static const struct avrf_type avft_chips_info[] = {
static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
{
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_RESET_LEN);
return ERROR_OK;
}
@ -89,7 +89,7 @@ static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
{
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_LEN);
return ERROR_OK;
}
@ -99,7 +99,7 @@ static int avr_jtagprg_enterprogmode(struct avr_common *avr)
avr_jtag_reset(avr, 1);
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN);
return ERROR_OK;
}
@ -107,11 +107,11 @@ static int avr_jtagprg_enterprogmode(struct avr_common *avr)
static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
{
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN);
avr_jtag_reset(avr, 0);
@ -123,18 +123,18 @@ static int avr_jtagprg_chiperase(struct avr_common *avr)
uint32_t poll_value;
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
do {
poll_value = 0;
avr_jtag_senddat(avr->jtag_info.tap,
&poll_value,
0x3380,
AVR_JTAG_REG_ProgrammingCommand_Len);
if (ERROR_OK != mcu_execute_queue())
AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
if (mcu_execute_queue() != ERROR_OK)
return ERROR_FAIL;
LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
} while (!(poll_value & 0x0200));
@ -152,26 +152,26 @@ static int avr_jtagprg_writeflashpage(struct avr_common *avr,
uint32_t poll_value;
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
/* load extended high byte */
if (ext_addressing)
avr_jtag_senddat(avr->jtag_info.tap,
NULL,
0x0b00 | ((addr >> 17) & 0xFF),
AVR_JTAG_REG_ProgrammingCommand_Len);
AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
/* load addr high byte */
avr_jtag_senddat(avr->jtag_info.tap,
NULL,
0x0700 | ((addr >> 9) & 0xFF),
AVR_JTAG_REG_ProgrammingCommand_Len);
AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
/* load addr low byte */
avr_jtag_senddat(avr->jtag_info.tap,
NULL,
0x0300 | ((addr >> 1) & 0xFF),
AVR_JTAG_REG_ProgrammingCommand_Len);
AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
@ -184,18 +184,18 @@ static int avr_jtagprg_writeflashpage(struct avr_common *avr,
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
do {
poll_value = 0;
avr_jtag_senddat(avr->jtag_info.tap,
&poll_value,
0x3700,
AVR_JTAG_REG_ProgrammingCommand_Len);
if (ERROR_OK != mcu_execute_queue())
AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
if (mcu_execute_queue() != ERROR_OK)
return ERROR_FAIL;
LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
} while (!(poll_value & 0x0200));
@ -266,7 +266,7 @@ static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t o
LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
LOG_DEBUG("count is %" PRIu32 "", count);
if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
if (avr_jtagprg_enterprogmode(avr) != ERROR_OK)
return ERROR_FAIL;
if (bank->size > 0x20000)
@ -315,7 +315,7 @@ static int avrf_probe(struct flash_bank *bank)
avrf_info->probed = false;
avr_jtag_read_jtagid(avr, &device_id);
if (ERROR_OK != mcu_execute_queue())
if (mcu_execute_queue() != ERROR_OK)
return ERROR_FAIL;
LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
@ -332,7 +332,7 @@ static int avrf_probe(struct flash_bank *bank)
}
}
if (avr_info != NULL) {
if (avr_info) {
free(bank->sectors);
/* chip found */
@ -380,7 +380,7 @@ static int avrf_info(struct flash_bank *bank, struct command_invocation *cmd)
}
avr_jtag_read_jtagid(avr, &device_id);
if (ERROR_OK != mcu_execute_queue())
if (mcu_execute_queue() != ERROR_OK)
return ERROR_FAIL;
LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
@ -398,7 +398,7 @@ static int avrf_info(struct flash_bank *bank, struct command_invocation *cmd)
}
}
if (avr_info != NULL) {
if (avr_info) {
/* chip found */
command_print_sameline(cmd, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
EXTRACT_VER(device_id));
@ -420,9 +420,9 @@ static int avrf_mass_erase(struct flash_bank *bank)
return ERROR_TARGET_NOT_HALTED;
}
if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
|| (ERROR_OK != avr_jtagprg_chiperase(avr))
|| (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
if ((avr_jtagprg_enterprogmode(avr) != ERROR_OK)
|| (avr_jtagprg_chiperase(avr) != ERROR_OK)
|| (avr_jtagprg_leaveprogmode(avr) != ERROR_OK))
return ERROR_FAIL;
return ERROR_OK;
@ -435,16 +435,12 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (avrf_mass_erase(bank) == ERROR_OK) {
/* set all sectors as erased */
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
if (avrf_mass_erase(bank) == ERROR_OK)
command_print(CMD, "avr mass erase complete");
} else
else
command_print(CMD, "avr mass erase failed");
LOG_DEBUG("%s", __func__);

2
src/flash/nor/bluenrg-x.c
View File

@ -94,7 +94,7 @@ FLASH_BANK_COMMAND_HANDLER(bluenrgx_flash_bank_command)
bluenrgx_info = calloc(1, sizeof(*bluenrgx_info));
/* Check allocation */
if (bluenrgx_info == NULL) {
if (!bluenrgx_info) {
LOG_ERROR("failed to allocate bank structure");
return ERROR_FAIL;
}

52
src/flash/nor/cc26xx.c
View File

@ -107,9 +107,9 @@ static int cc26xx_wait_algo_done(struct flash_bank *bank, uint32_t params_addr)
int retval = ERROR_OK;
start_ms = timeval_ms();
while (CC26XX_BUFFER_FULL == status) {
while (status == CC26XX_BUFFER_FULL) {
retval = target_read_u32(target, status_addr, &status);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
elapsed_ms = timeval_ms() - start_ms;
@ -119,7 +119,7 @@ static int cc26xx_wait_algo_done(struct flash_bank *bank, uint32_t params_addr)
break;
};
if (CC26XX_BUFFER_EMPTY != status) {
if (status != CC26XX_BUFFER_EMPTY) {
LOG_ERROR("%s: Flash operation failed", cc26xx_bank->family_name);
return ERROR_FAIL;
}
@ -136,25 +136,25 @@ static int cc26xx_init(struct flash_bank *bank)
/* Make sure we've probed the flash to get the device and size */
retval = cc26xx_auto_probe(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Check for working area to use for flash helper algorithm */
if (NULL != cc26xx_bank->working_area)
if (cc26xx_bank->working_area)
target_free_working_area(target, cc26xx_bank->working_area);
retval = target_alloc_working_area(target, cc26xx_bank->algo_working_size,
&cc26xx_bank->working_area);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Confirm the defined working address is the area we need to use */
if (CC26XX_ALGO_BASE_ADDRESS != cc26xx_bank->working_area->address)
if (cc26xx_bank->working_area->address != CC26XX_ALGO_BASE_ADDRESS)
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
/* Write flash helper algorithm into target memory */
retval = target_write_buffer(target, CC26XX_ALGO_BASE_ADDRESS,
cc26xx_bank->algo_size, cc26xx_bank->algo_code);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("%s: Failed to load flash helper algorithm",
cc26xx_bank->family_name);
target_free_working_area(target, cc26xx_bank->working_area);
@ -168,7 +168,7 @@ static int cc26xx_init(struct flash_bank *bank)
/* Begin executing the flash helper algorithm */
retval = target_start_algorithm(target, 0, NULL, 0, NULL,
CC26XX_ALGO_BASE_ADDRESS, 0, &cc26xx_bank->armv7m_info);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("%s: Failed to start flash helper algorithm",
cc26xx_bank->family_name);
target_free_working_area(target, cc26xx_bank->working_area);
@ -211,13 +211,13 @@ static int cc26xx_mass_erase(struct flash_bank *bank)
int retval;
if (TARGET_HALTED != target->state) {
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
retval = cc26xx_init(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Initialize algorithm parameters */
@ -231,7 +231,7 @@ static int cc26xx_mass_erase(struct flash_bank *bank)
sizeof(algo_params), (uint8_t *)&algo_params);
/* Wait for command to complete */
if (ERROR_OK == retval)
if (retval == ERROR_OK)
retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[0]);
/* Regardless of errors, try to close down algo */
@ -248,7 +248,7 @@ FLASH_BANK_COMMAND_HANDLER(cc26xx_flash_bank_command)
return ERROR_COMMAND_SYNTAX_ERROR;
cc26xx_bank = malloc(sizeof(struct cc26xx_bank));
if (NULL == cc26xx_bank)
if (!cc26xx_bank)
return ERROR_FAIL;
/* Initialize private flash information */
@ -275,7 +275,7 @@ static int cc26xx_erase(struct flash_bank *bank, unsigned int first,
uint32_t length;
int retval;
if (TARGET_HALTED != target->state) {
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -290,7 +290,7 @@ static int cc26xx_erase(struct flash_bank *bank, unsigned int first,
length = (last - first + 1) * cc26xx_bank->sector_length;
retval = cc26xx_init(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Set up algorithm parameters for erase command */
@ -304,7 +304,7 @@ static int cc26xx_erase(struct flash_bank *bank, unsigned int first,
sizeof(algo_params), (uint8_t *)&algo_params);
/* If no error, wait for erase to finish */
if (ERROR_OK == retval)
if (retval == ERROR_OK)
retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[0]);
/* Regardless of errors, try to close down algo */
@ -327,13 +327,13 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t index;
int retval;
if (TARGET_HALTED != target->state) {
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
retval = cc26xx_init(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Initialize algorithm parameters to default values */
@ -354,7 +354,7 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer,
/* Put next block of data to flash into buffer */
retval = target_write_buffer(target, cc26xx_bank->buffer_addr[index],
size, buffer);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Unable to write data to target memory");
break;
}
@ -367,13 +367,13 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer,
/* Issue flash helper algorithm parameters for block write */
retval = target_write_buffer(target, cc26xx_bank->params_addr[index],
sizeof(algo_params[index]), (uint8_t *)&algo_params[index]);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
break;
/* Wait for next ping pong buffer to be ready */
index ^= 1;
retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[index]);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
break;
count -= size;
@ -386,7 +386,7 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer,
}
/* If no error yet, wait for last buffer to finish */
if (ERROR_OK == retval) {
if (retval == ERROR_OK) {
index ^= 1;
retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[index]);
}
@ -410,12 +410,12 @@ static int cc26xx_probe(struct flash_bank *bank)
int retval;
retval = target_read_u32(target, FCFG1_ICEPICK_ID, &value);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
cc26xx_bank->icepick_id = value;
retval = target_read_u32(target, FCFG1_USER_ID, &value);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
cc26xx_bank->user_id = value;
@ -454,14 +454,14 @@ static int cc26xx_probe(struct flash_bank *bank)
}
retval = target_read_u32(target, CC26XX_FLASH_SIZE_INFO, &value);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
num_sectors = value & 0xff;
if (num_sectors > max_sectors)
num_sectors = max_sectors;
bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
if (NULL == bank->sectors)
if (!bank->sectors)
return ERROR_FAIL;
bank->base = CC26XX_FLASH_BASE_ADDR;

60
src/flash/nor/cc3220sf.c
View File

@ -42,19 +42,19 @@ static int cc3220sf_mass_erase(struct flash_bank *bank)
int retval = ERROR_OK;
if (TARGET_HALTED != target->state) {
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
/* Set starting address to erase to zero */
retval = target_write_u32(target, FMA_REGISTER_ADDR, 0);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Write the MERASE bit of the FMC register */
retval = target_write_u32(target, FMC_REGISTER_ADDR, FMC_MERASE_VALUE);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Poll the MERASE bit until the mass erase is complete */
@ -62,7 +62,7 @@ static int cc3220sf_mass_erase(struct flash_bank *bank)
start_ms = timeval_ms();
while (!done) {
retval = target_read_u32(target, FMC_REGISTER_ADDR, &value);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if ((value & FMC_MERASE_BIT) == 0) {
@ -93,7 +93,7 @@ FLASH_BANK_COMMAND_HANDLER(cc3220sf_flash_bank_command)
return ERROR_COMMAND_SYNTAX_ERROR;
cc3220sf_bank = malloc(sizeof(struct cc3220sf_bank));
if (NULL == cc3220sf_bank)
if (!cc3220sf_bank)
return ERROR_FAIL;
/* Initialize private flash information */
@ -118,7 +118,7 @@ static int cc3220sf_erase(struct flash_bank *bank, unsigned int first,
int retval = ERROR_OK;
if (TARGET_HALTED != target->state) {
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -137,12 +137,12 @@ static int cc3220sf_erase(struct flash_bank *bank, unsigned int first,
/* Set starting address to erase */
retval = target_write_u32(target, FMA_REGISTER_ADDR, address);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Write the ERASE bit of the FMC register */
retval = target_write_u32(target, FMC_REGISTER_ADDR, FMC_ERASE_VALUE);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Poll the ERASE bit until the erase is complete */
@ -150,7 +150,7 @@ static int cc3220sf_erase(struct flash_bank *bank, unsigned int first,
start_ms = timeval_ms();
while (!done) {
retval = target_read_u32(target, FMC_REGISTER_ADDR, &value);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if ((value & FMC_ERASE_BIT) == 0) {
@ -192,7 +192,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
int retval = ERROR_OK;
if (TARGET_HALTED != target->state) {
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -200,13 +200,13 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
/* Obtain working area to use for flash helper algorithm */
retval = target_alloc_working_area(target, sizeof(cc3220sf_algo),
&algo_working_area);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Obtain working area to use for flash buffer */
retval = target_alloc_working_area(target,
target_get_working_area_avail(target), &buffer_working_area);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
target_free_working_area(target, algo_working_area);
return retval;
}
@ -223,7 +223,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
/* Write flash helper algorithm into target memory */
retval = target_write_buffer(target, algo_base_address,
sizeof(cc3220sf_algo), cc3220sf_algo);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
target_free_working_area(target, algo_working_area);
target_free_working_area(target, buffer_working_area);
return retval;
@ -262,7 +262,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
/* Retrieve what is already in flash at the head address */
retval = target_read_buffer(target, head_address, sizeof(head), head);
if (ERROR_OK == retval) {
if (retval == ERROR_OK) {
/* Substitute in the new data to write */
while ((remaining > 0) && (head_offset < 4)) {
head[head_offset] = *buffer;
@ -273,7 +273,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
}
}
if (ERROR_OK == retval) {
if (retval == ERROR_OK) {
/* Helper parameters are passed in registers R0-R2 */
/* Set start of data buffer, address to write to, and word count */
buf_set_u32(reg_params[0].value, 0, 32, algo_buffer_address);
@ -285,17 +285,17 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
sizeof(head), head);
}
if (ERROR_OK == retval) {
if (retval == ERROR_OK) {
/* Execute the flash helper algorithm */
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
algo_base_address, 0, FLASH_TIMEOUT,
&cc3220sf_bank->armv7m_info);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
LOG_ERROR("cc3220sf: Flash algorithm failed to run");
/* Check that the head value was written to flash */
result = buf_get_u32(reg_params[2].value, 0, 32);
if (0 != result) {
if (result != 0) {
retval = ERROR_FAIL;
LOG_ERROR("cc3220sf: Flash operation failed");
}
@ -307,7 +307,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
/* Adjust remaining so it is a multiple of whole words */
remaining -= tail_count;
while ((ERROR_OK == retval) && (remaining > 0)) {
while ((retval == ERROR_OK) && (remaining > 0)) {
/* Set start of data buffer and address to write to */
buf_set_u32(reg_params[0].value, 0, 32, algo_buffer_address);
buf_set_u32(reg_params[1].value, 0, 32, address);
@ -317,7 +317,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
/* Fill up buffer with data to flash */
retval = target_write_buffer(target, algo_buffer_address,
algo_buffer_size, buffer);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
break;
/* Count to write is in 32-bit words */
@ -331,7 +331,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
/* Fill buffer with what's left of the data */
retval = target_write_buffer(target, algo_buffer_address,
remaining, buffer);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
break;
/* Calculate the final word count to write */
@ -352,14 +352,14 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
algo_base_address, 0, FLASH_TIMEOUT,
&cc3220sf_bank->armv7m_info);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("cc3220sf: Flash algorithm failed to run");
break;
}
/* Check that all words were written to flash */
result = buf_get_u32(reg_params[2].value, 0, 32);
if (0 != result) {
if (result != 0) {
retval = ERROR_FAIL;
LOG_ERROR("cc3220sf: Flash operation failed");
break;
@ -369,7 +369,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
}
/* Do one word write for any final bytes less than a full word */
if ((ERROR_OK == retval) && (0 != tail_count)) {
if ((retval == ERROR_OK) && (tail_count != 0)) {
uint8_t tail[4];
/* Set starting byte offset for data to write */
@ -378,7 +378,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
/* Retrieve what is already in flash at the tail address */
retval = target_read_buffer(target, address, sizeof(tail), tail);
if (ERROR_OK == retval) {
if (retval == ERROR_OK) {
/* Substitute in the new data to write */
while (tail_count > 0) {
tail[tail_offset] = *buffer;
@ -388,7 +388,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
}
}
if (ERROR_OK == retval) {
if (retval == ERROR_OK) {
/* Set start of data buffer, address to write to, and word count */
buf_set_u32(reg_params[0].value, 0, 32, algo_buffer_address);
buf_set_u32(reg_params[1].value, 0, 32, address);
@ -399,17 +399,17 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
sizeof(tail), tail);
}
if (ERROR_OK == retval) {
if (retval == ERROR_OK) {
/* Execute the flash helper algorithm */
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
algo_base_address, 0, FLASH_TIMEOUT,
&cc3220sf_bank->armv7m_info);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
LOG_ERROR("cc3220sf: Flash algorithm failed to run");
/* Check that the tail was written to flash */
result = buf_get_u32(reg_params[2].value, 0, 32);
if (0 != result) {
if (result != 0) {
retval = ERROR_FAIL;
LOG_ERROR("cc3220sf: Flash operation failed");
}
@ -441,7 +441,7 @@ static int cc3220sf_probe(struct flash_bank *bank)
free(bank->sectors);
bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
if (NULL == bank->sectors)
if (!bank->sectors)
return ERROR_FAIL;
bank->base = base;

80
src/flash/nor/cfi.c
View File

@ -426,7 +426,7 @@ static int cfi_read_intel_pri_ext(struct flash_bank *bank)
free(cfi_info->pri_ext);
pri_ext = malloc(sizeof(struct cfi_intel_pri_ext));
if (pri_ext == NULL) {
if (!pri_ext) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
}
@ -522,7 +522,7 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank)
free(cfi_info->pri_ext);
pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext));
if (pri_ext == NULL) {
if (!pri_ext) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
}
@ -561,55 +561,55 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank)
LOG_DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1],
pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 5, &pri_ext->SiliconRevision);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 5, &pri_ext->silicon_revision);
if (retval != ERROR_OK)
return retval;
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 6, &pri_ext->EraseSuspend);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 6, &pri_ext->erase_suspend);
if (retval != ERROR_OK)
return retval;
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 7, &pri_ext->BlkProt);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 7, &pri_ext->blk_prot);
if (retval != ERROR_OK)
return retval;
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 8, &pri_ext->TmpBlkUnprotect);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 8, &pri_ext->tmp_blk_unprotected);
if (retval != ERROR_OK)
return retval;
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9, &pri_ext->BlkProtUnprot);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9, &pri_ext->blk_prot_unprot);
if (retval != ERROR_OK)
return retval;
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 10, &pri_ext->SimultaneousOps);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 10, &pri_ext->simultaneous_ops);
if (retval != ERROR_OK)
return retval;
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 11, &pri_ext->BurstMode);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 11, &pri_ext->burst_mode);
if (retval != ERROR_OK)
return retval;
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 12, &pri_ext->PageMode);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 12, &pri_ext->page_mode);
if (retval != ERROR_OK)
return retval;
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 13, &pri_ext->VppMin);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 13, &pri_ext->vpp_min);
if (retval != ERROR_OK)
return retval;
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 14, &pri_ext->VppMax);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 14, &pri_ext->vpp_max);
if (retval != ERROR_OK)
return retval;
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 15, &pri_ext->TopBottom);
retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 15, &pri_ext->top_bottom);
if (retval != ERROR_OK)
return retval;
LOG_DEBUG("Silicon Revision: 0x%x, Erase Suspend: 0x%x, Block protect: 0x%x",
pri_ext->SiliconRevision, pri_ext->EraseSuspend, pri_ext->BlkProt);
pri_ext->silicon_revision, pri_ext->erase_suspend, pri_ext->blk_prot);
LOG_DEBUG("Temporary Unprotect: 0x%x, Block Protect Scheme: 0x%x, "
"Simultaneous Ops: 0x%x", pri_ext->TmpBlkUnprotect,
pri_ext->BlkProtUnprot, pri_ext->SimultaneousOps);
"Simultaneous Ops: 0x%x", pri_ext->tmp_blk_unprotected,
pri_ext->blk_prot_unprot, pri_ext->simultaneous_ops);
LOG_DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->BurstMode, pri_ext->PageMode);
LOG_DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->burst_mode, pri_ext->page_mode);
LOG_DEBUG("Vpp min: %u.%x, Vpp max: %u.%x",
(pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f,
(pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f);
(pri_ext->vpp_min & 0xf0) >> 4, pri_ext->vpp_min & 0x0f,
(pri_ext->vpp_max & 0xf0) >> 4, pri_ext->vpp_max & 0x0f);
LOG_DEBUG("WP# protection 0x%x", pri_ext->TopBottom);
LOG_DEBUG("WP# protection 0x%x", pri_ext->top_bottom);
return ERROR_OK;
}
@ -624,7 +624,7 @@ static int cfi_read_atmel_pri_ext(struct flash_bank *bank)
free(cfi_info->pri_ext);
pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext));
if (pri_ext == NULL) {
if (!pri_ext) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
}
@ -696,20 +696,20 @@ static int cfi_read_atmel_pri_ext(struct flash_bank *bank)
atmel_pri_ext.page_mode);
if (atmel_pri_ext.features & 0x02)
pri_ext->EraseSuspend = 2;
pri_ext->erase_suspend = 2;
/* some chips got it backwards... */
if (cfi_info->device_id == AT49BV6416 ||
cfi_info->device_id == AT49BV6416T) {
if (atmel_pri_ext.bottom_boot)
pri_ext->TopBottom = 3;
pri_ext->top_bottom = 3;
else
pri_ext->TopBottom = 2;
pri_ext->top_bottom = 2;
} else {
if (atmel_pri_ext.bottom_boot)
pri_ext->TopBottom = 2;
pri_ext->top_bottom = 2;
else
pri_ext->TopBottom = 3;
pri_ext->top_bottom = 3;
}
pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1;
@ -740,16 +740,16 @@ static int cfi_spansion_info(struct flash_bank *bank, struct command_invocation
pri_ext->major_version, pri_ext->minor_version);
command_print_sameline(cmd, "Silicon Rev.: 0x%x, Address Sensitive unlock: 0x%x\n",
(pri_ext->SiliconRevision) >> 2,
(pri_ext->SiliconRevision) & 0x03);
(pri_ext->silicon_revision) >> 2,
(pri_ext->silicon_revision) & 0x03);
command_print_sameline(cmd, "Erase Suspend: 0x%x, Sector Protect: 0x%x\n",
pri_ext->EraseSuspend,
pri_ext->BlkProt);
pri_ext->erase_suspend,
pri_ext->blk_prot);
command_print_sameline(cmd, "VppMin: %u.%x, VppMax: %u.%x\n",
(pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f,
(pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f);
(pri_ext->vpp_min & 0xf0) >> 4, pri_ext->vpp_min & 0x0f,
(pri_ext->vpp_max & 0xf0) >> 4, pri_ext->vpp_max & 0x0f);
return ERROR_OK;
}
@ -811,7 +811,7 @@ int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char **
}
cfi_info = calloc(1, sizeof(struct cfi_flash_bank));
if (cfi_info == NULL) {
if (!cfi_info) {
LOG_ERROR("No memory for flash bank info");
return ERROR_FAIL;
}
@ -870,9 +870,7 @@ static int cfi_intel_erase(struct flash_bank *bank, unsigned int first,
if (retval != ERROR_OK)
return retval;
if (status == 0x80)
bank->sectors[i].is_erased = 1;
else {
if (status != 0x80) {
retval = cfi_send_command(bank, 0xff, cfi_flash_address(bank, 0, 0x0));
if (retval != ERROR_OK)
return retval;
@ -927,9 +925,7 @@ static int cfi_spansion_erase(struct flash_bank *bank, unsigned int first,
if (retval != ERROR_OK)
return retval;
if (cfi_spansion_wait_status_busy(bank, cfi_info->block_erase_timeout) == ERROR_OK)
bank->sectors[i].is_erased = 1;
else {
if (cfi_spansion_wait_status_busy(bank, cfi_info->block_erase_timeout) != ERROR_OK) {
retval = cfi_send_command(bank, 0xf0, cfi_flash_address(bank, 0, 0x0));
if (retval != ERROR_OK)
return retval;
@ -1488,7 +1484,7 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, const uint8_t
/* convert bus-width dependent algorithm code to correct endianness */
target_code = malloc(target_code_size);
if (target_code == NULL) {
if (!target_code) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
}
@ -1867,7 +1863,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff
/* convert bus-width dependent algorithm code to correct endianness */
target_code = malloc(target_code_size);
if (target_code == NULL) {
if (!target_code) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
}
@ -2480,7 +2476,7 @@ static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *pa
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
(void) param;
if ((pri_ext->_reversed_geometry) || (pri_ext->TopBottom == 3)) {
if ((pri_ext->_reversed_geometry) || (pri_ext->top_bottom == 3)) {
LOG_DEBUG("swapping reversed erase region information on cmdset 0002 device");
for (unsigned int i = 0; i < cfi_info->num_erase_regions / 2; i++) {

22
src/flash/nor/cfi.h
View File

@ -108,17 +108,17 @@ struct cfi_spansion_pri_ext {
uint8_t pri[3];
uint8_t major_version;
uint8_t minor_version;
uint8_t SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
uint8_t EraseSuspend;
uint8_t BlkProt;
uint8_t TmpBlkUnprotect;
uint8_t BlkProtUnprot;
uint8_t SimultaneousOps;
uint8_t BurstMode;
uint8_t PageMode;
uint8_t VppMin;
uint8_t VppMax;
uint8_t TopBottom;
uint8_t silicon_revision; /* bits 1-0: Address Sensitive Unlock */
uint8_t erase_suspend;
uint8_t blk_prot;
uint8_t tmp_blk_unprotected;
uint8_t blk_prot_unprot;
uint8_t simultaneous_ops;
uint8_t burst_mode;
uint8_t page_mode;
uint8_t vpp_min;
uint8_t vpp_max;
uint8_t top_bottom;
int _reversed_geometry;
uint32_t _unlock1;
uint32_t _unlock2;

28
src/flash/nor/core.c
View File

@ -70,7 +70,7 @@ int flash_driver_protect(struct flash_bank *bank, int set, unsigned int first,
/* force "set" to 0/1 */
set = !!set;
if (bank->driver->protect == NULL) {
if (!bank->driver->protect) {
LOG_ERROR("Flash protection is not supported.");
return ERROR_FLASH_OPER_UNSUPPORTED;
}
@ -179,7 +179,7 @@ void flash_bank_add(struct flash_bank *bank)
if (flash_banks) {
/* find last flash bank */
struct flash_bank *p = flash_banks;
while (NULL != p->next) {
while (p->next) {
bank_num += 1;
p = p->next;
}
@ -257,7 +257,7 @@ struct flash_bank *get_flash_bank_by_name_noprobe(const char *name)
unsigned found = 0;
struct flash_bank *bank;
for (bank = flash_banks; NULL != bank; bank = bank->next) {
for (bank = flash_banks; bank; bank = bank->next) {
if (strcmp(bank->name, name) == 0)
return bank;
if (!flash_driver_name_matches(bank->driver->name, name))
@ -275,7 +275,7 @@ int get_flash_bank_by_name(const char *name, struct flash_bank **bank_result)
int retval;
bank = get_flash_bank_by_name_noprobe(name);
if (bank != NULL) {
if (bank) {
retval = bank->driver->auto_probe(bank);
if (retval != ERROR_OK) {
@ -293,7 +293,7 @@ int get_flash_bank_by_num(unsigned int num, struct flash_bank **bank)
struct flash_bank *p = get_flash_bank_by_num_noprobe(num);
int retval;
if (p == NULL)
if (!p)
return ERROR_FAIL;
retval = p->driver->auto_probe(p);
@ -345,7 +345,7 @@ static int default_flash_mem_blank_check(struct flash_bank *bank)
{
struct target *target = bank->target;
const int buffer_size = 1024;
uint32_t nBytes;
uint32_t n_bytes;
int retval = ERROR_OK;
if (bank->target->state != TARGET_HALTED) {
@ -373,8 +373,8 @@ static int default_flash_mem_blank_check(struct flash_bank *bank)
if (retval != ERROR_OK)
goto done;
for (nBytes = 0; nBytes < chunk; nBytes++) {
if (buffer[nBytes] != bank->erased_value) {
for (n_bytes = 0; n_bytes < chunk; n_bytes++) {
if (buffer[n_bytes] != bank->erased_value) {
bank->sectors[i].is_erased = 0;
break;
}
@ -400,7 +400,7 @@ int default_flash_blank_check(struct flash_bank *bank)
struct target_memory_check_block *block_array;
block_array = malloc(bank->num_sectors * sizeof(struct target_memory_check_block));
if (block_array == NULL)
if (!block_array)
return default_flash_mem_blank_check(bank);
for (unsigned int i = 0; i < bank->num_sectors; i++) {
@ -491,7 +491,7 @@ static int flash_iterate_address_range_inner(struct target *target,
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
if (c->prot_blocks == NULL || c->num_prot_blocks == 0) {
if (!c->prot_blocks || c->num_prot_blocks == 0) {
/* flash driver does not define protect blocks, use sectors instead */
iterate_protect_blocks = false;
}
@ -791,7 +791,7 @@ int flash_write_unlock_verify(struct target *target, struct image *image,
retval = get_flash_bank_by_addr(target, run_address, false, &c);
if (retval != ERROR_OK)
goto done;
if (c == NULL) {
if (!c) {
LOG_WARNING("no flash bank found for address " TARGET_ADDR_FMT, run_address);
section++; /* and skip it */
section_offset = 0;
@ -903,7 +903,7 @@ int flash_write_unlock_verify(struct target *target, struct image *image,
/* allocate buffer */
buffer = malloc(run_size);
if (buffer == NULL) {
if (!buffer) {
LOG_ERROR("Out of memory for flash bank buffer");
retval = ERROR_FAIL;
goto done;
@ -989,7 +989,7 @@ int flash_write_unlock_verify(struct target *target, struct image *image,
goto done;
}
if (written != NULL)
if (written)
*written += run_size; /* add run size to total written counter */
}
@ -1010,7 +1010,7 @@ struct flash_sector *alloc_block_array(uint32_t offset, uint32_t size,
unsigned int num_blocks)
{
struct flash_sector *array = calloc(num_blocks, sizeof(struct flash_sector));
if (array == NULL)
if (!array)
return NULL;
for (unsigned int i = 0; i < num_blocks; i++) {

59
src/flash/nor/dsp5680xx_flash.c
View File

@ -130,15 +130,9 @@ static int dsp5680xx_flash_protect(struct flash_bank *bank, int set,
if (set)
retval = dsp5680xx_f_lock(bank->target);
else {
else
retval = dsp5680xx_f_unlock(bank->target);
if (retval == ERROR_OK) {
/* mark all as erased */
for (int i = 0; i <= (HFM_SECTOR_COUNT - 1); i++)
/* FM does not recognize it as erased if erased via JTAG. */
bank->sectors[i].is_erased = 1;
}
}
return retval;
}
@ -156,8 +150,6 @@ static int dsp5680xx_flash_protect(struct flash_bank *bank, int set,
static int dsp5680xx_flash_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
int retval;
if ((offset + count / 2) > bank->size) {
LOG_ERROR("%s: Flash bank cannot fit data.", __func__);
return ERROR_FAIL;
@ -171,17 +163,7 @@ static int dsp5680xx_flash_write(struct flash_bank *bank, const uint8_t *buffer,
LOG_ERROR("%s: Writing to odd addresses not supported for this target", __func__);
return ERROR_FAIL;
}
retval = dsp5680xx_f_wr(bank->target, buffer, bank->base + offset / 2, count, 0);
uint32_t addr_word;
for (addr_word = bank->base + offset / 2; addr_word < count / 2;
addr_word += (HFM_SECTOR_SIZE / 2)) {
if (retval == ERROR_OK)
bank->sectors[addr_word / (HFM_SECTOR_SIZE / 2)].is_erased = 0;
else
bank->sectors[addr_word / (HFM_SECTOR_SIZE / 2)].is_erased = -1;
}
return retval;
return dsp5680xx_f_wr(bank->target, buffer, bank->base + offset / 2, count, 0);
}
static int dsp5680xx_probe(struct flash_bank *bank)
@ -206,22 +188,7 @@ static int dsp5680xx_probe(struct flash_bank *bank)
static int dsp5680xx_flash_erase(struct flash_bank *bank, unsigned int first,
unsigned int last)
{
int retval;
retval = dsp5680xx_f_erase(bank->target, (uint32_t) first, (uint32_t) last);
if ((!(first | last)) || ((first == 0) && (last == (HFM_SECTOR_COUNT - 1))))
last = HFM_SECTOR_COUNT - 1;
if (retval == ERROR_OK)
for (unsigned int i = first; i <= last; i++)
bank->sectors[i].is_erased = 1;
else
/**
* If an error occurred unknown status
*is set even though some sector could have been correctly erased.
*/
for (unsigned int i = first; i <= last; i++)
bank->sectors[i].is_erased = -1;
return retval;
return dsp5680xx_f_erase(bank->target, (uint32_t) first, (uint32_t) last);
}
/**
@ -241,16 +208,14 @@ static int dsp5680xx_flash_erase_check(struct flash_bank *bank)
uint32_t i;
for (i = 0; i < HFM_SECTOR_COUNT; i++) {
if (bank->sectors[i].is_erased == -1) {
retval = dsp5680xx_f_erase_check(bank->target, &erased, i);
if (retval != ERROR_OK) {
bank->sectors[i].is_erased = -1;
} else {
if (erased)
bank->sectors[i].is_erased = 1;
else
bank->sectors[i].is_erased = 0;
}
retval = dsp5680xx_f_erase_check(bank->target, &erased, i);
if (retval != ERROR_OK) {
bank->sectors[i].is_erased = -1;
} else {
if (erased)
bank->sectors[i].is_erased = 1;
else
bank->sectors[i].is_erased = 0;
}
}
return retval;

88
src/flash/nor/efm32.c
View File

@ -232,7 +232,7 @@ static int efm32x_read_info(struct flash_bank *bank,
memset(efm32_info, 0, sizeof(struct efm32_info));
ret = target_read_u32(bank->target, CPUID, &cpuid);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
if (((cpuid >> 4) & 0xfff) == 0xc23) {
@ -247,23 +247,23 @@ static int efm32x_read_info(struct flash_bank *bank,
}
ret = efm32x_get_flash_size(bank, &(efm32_info->flash_sz_kib));
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
ret = efm32x_get_ram_size(bank, &(efm32_info->ram_sz_kib));
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
ret = efm32x_get_part_num(bank, &(efm32_info->part_num));
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
ret = efm32x_get_part_family(bank, &(efm32_info->part_family));
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
ret = efm32x_get_prod_rev(bank, &(efm32_info->prod_rev));
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
for (size_t i = 0; i < ARRAY_SIZE(efm32_families); i++) {
@ -271,7 +271,7 @@ static int efm32x_read_info(struct flash_bank *bank,
efm32_info->family_data = &efm32_families[i];
}
if (efm32_info->family_data == NULL) {
if (!efm32_info->family_data) {
LOG_ERROR("Unknown MCU family %d", efm32_info->part_family);
return ERROR_FAIL;
}
@ -296,7 +296,7 @@ static int efm32x_read_info(struct flash_bank *bank,
uint8_t pg_size = 0;
ret = target_read_u8(bank->target, EFM32_MSC_DI_PAGE_SIZE,
&pg_size);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
efm32_info->page_size = (1 << ((pg_size+10) & 0xff));
@ -349,7 +349,7 @@ static int efm32x_set_reg_bits(struct flash_bank *bank, uint32_t reg,
uint32_t reg_val = 0;
ret = efm32x_read_reg_u32(bank, reg, &reg_val);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
if (set)
@ -381,12 +381,12 @@ static int efm32x_wait_status(struct flash_bank *bank, int timeout,
while (1) {
ret = efm32x_read_reg_u32(bank, EFM32_MSC_REG_STATUS, &status);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
break;
LOG_DEBUG("status: 0x%" PRIx32 "", status);
if (((status & wait_mask) == 0) && (0 == wait_for_set))
if (((status & wait_mask) == 0) && (wait_for_set == 0))
break;
else if (((status & wait_mask) != 0) && wait_for_set)
break;
@ -420,16 +420,16 @@ static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr)
LOG_DEBUG("erasing flash page at 0x%08" PRIx32, addr);
ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_ADDRB, addr);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
ret = efm32x_set_reg_bits(bank, EFM32_MSC_REG_WRITECMD,
EFM32_MSC_WRITECMD_LADDRIM_MASK, 1);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
ret = efm32x_read_reg_u32(bank, EFM32_MSC_REG_STATUS, &status);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
LOG_DEBUG("status 0x%" PRIx32, status);
@ -444,7 +444,7 @@ static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr)
ret = efm32x_set_reg_bits(bank, EFM32_MSC_REG_WRITECMD,
EFM32_MSC_WRITECMD_ERASEPAGE_MASK, 1);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
return efm32x_wait_status(bank, EFM32_FLASH_ERASE_TMO,
@ -457,21 +457,21 @@ static int efm32x_erase(struct flash_bank *bank, unsigned int first,
struct target *target = bank->target;
int ret = 0;
if (TARGET_HALTED != target->state) {
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
efm32x_msc_lock(bank, 0);
ret = efm32x_set_wren(bank, 1);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to enable MSC write");
return ret;
}
for (unsigned int i = first; i <= last; i++) {
ret = efm32x_erase_page(bank, bank->sectors[i].offset);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
LOG_ERROR("Failed to erase page %d", i);
}
@ -498,7 +498,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
for (int i = 0; i < data_size; i++, ptr++) {
ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+i*4, ptr);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to read PLW %d", i);
return ret;
}
@ -509,7 +509,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
/* ULW, word 126 */
ptr = efm32x_info->lb_page + 126;
ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+126*4, ptr);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to read ULW");
return ret;
}
@ -517,7 +517,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
/* DLW, word 127 */
ptr = efm32x_info->lb_page + 127;
ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+127*4, ptr);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to read DLW");
return ret;
}
@ -525,7 +525,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
/* MLW, word 125, present in GG, LG, PG, JG, EFR32 */
ptr = efm32x_info->lb_page + 125;
ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+125*4, ptr);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to read MLW");
return ret;
}
@ -533,7 +533,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
/* ALW, word 124, present in GG, LG, PG, JG, EFR32 */
ptr = efm32x_info->lb_page + 124;
ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+124*4, ptr);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to read ALW");
return ret;
}
@ -541,7 +541,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
/* CLW1, word 123, present in EFR32 */
ptr = efm32x_info->lb_page + 123;
ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+123*4, ptr);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to read CLW1");
return ret;
}
@ -549,7 +549,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
/* CLW0, word 122, present in GG, LG, PG, JG, EFR32 */
ptr = efm32x_info->lb_page + 122;
ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+122*4, ptr);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to read CLW0");
return ret;
}
@ -563,7 +563,7 @@ static int efm32x_write_lock_data(struct flash_bank *bank)
int ret = 0;
ret = efm32x_erase_page(bank, EFM32_MSC_LOCK_BITS);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to erase LB page");
return ret;
}
@ -617,14 +617,14 @@ static int efm32x_protect(struct flash_bank *bank, int set, unsigned int first,
for (unsigned int i = first; i <= last; i++) {
ret = efm32x_set_page_lock(bank, i, set);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to set lock on page %d", i);
return ret;
}
}
ret = efm32x_write_lock_data(bank);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to write LB page");
return ret;
}
@ -812,16 +812,16 @@ static int efm32x_write_word(struct flash_bank *bank, uint32_t addr,
keep_alive();
ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_ADDRB, addr);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
ret = efm32x_set_reg_bits(bank, EFM32_MSC_REG_WRITECMD,
EFM32_MSC_WRITECMD_LADDRIM_MASK, 1);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
ret = efm32x_read_reg_u32(bank, EFM32_MSC_REG_STATUS, &status);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
LOG_DEBUG("status 0x%" PRIx32, status);
@ -836,27 +836,27 @@ static int efm32x_write_word(struct flash_bank *bank, uint32_t addr,
ret = efm32x_wait_status(bank, EFM32_FLASH_WDATAREADY_TMO,
EFM32_MSC_STATUS_WDATAREADY_MASK, 1);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Wait for WDATAREADY failed");
return ret;
}
ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_WDATA, val);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("WDATA write failed");
return ret;
}
ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_WRITECMD,
EFM32_MSC_WRITECMD_WRITEONCE_MASK);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("WRITECMD write failed");
return ret;
}
ret = efm32x_wait_status(bank, EFM32_FLASH_WRITE_TMO,
EFM32_MSC_STATUS_BUSY_MASK, 0);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Wait for BUSY failed");
return ret;
}
@ -885,7 +885,7 @@ static int efm32x_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t old_count = count;
count = (old_count | 3) + 1;
new_buffer = malloc(count);
if (new_buffer == NULL) {
if (!new_buffer) {
LOG_ERROR("odd number of bytes to write and no memory "
"for padding buffer");
return ERROR_FAIL;
@ -950,7 +950,7 @@ static int efm32x_probe(struct flash_bank *bank)
memset(efm32x_info->lb_page, 0xff, LOCKBITS_PAGE_SZ);
ret = efm32x_read_info(bank, &efm32_mcu_info);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
LOG_INFO("detected part: %s Gecko, rev %d",
@ -958,7 +958,7 @@ static int efm32x_probe(struct flash_bank *bank)
LOG_INFO("flash size = %dkbytes", efm32_mcu_info.flash_sz_kib);
LOG_INFO("flash page size = %dbytes", efm32_mcu_info.page_size);
assert(0 != efm32_mcu_info.page_size);
assert(efm32_mcu_info.page_size != 0);
int num_pages = efm32_mcu_info.flash_sz_kib * 1024 /
efm32_mcu_info.page_size;
@ -973,7 +973,7 @@ static int efm32x_probe(struct flash_bank *bank)
bank->num_sectors = num_pages;
ret = efm32x_read_lock_data(bank);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to read LB data");
return ret;
}
@ -1011,12 +1011,12 @@ static int efm32x_protect_check(struct flash_bank *bank)
}
ret = efm32x_read_lock_data(bank);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to read LB data");
return ret;
}
assert(NULL != bank->sectors);
assert(bank->sectors);
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_protected = efm32x_get_page_lock(bank, i);
@ -1030,7 +1030,7 @@ static int get_efm32x_info(struct flash_bank *bank, struct command_invocation *c
int ret;
ret = efm32x_read_info(bank, &info);
if (ERROR_OK != ret) {
if (ret != ERROR_OK) {
LOG_ERROR("Failed to read EFM32 info");
return ret;
}
@ -1048,7 +1048,7 @@ COMMAND_HANDLER(efm32x_handle_debuglock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
struct efm32x_flash_bank *efm32x_info = bank->driver_priv;
@ -1065,7 +1065,7 @@ COMMAND_HANDLER(efm32x_handle_debuglock_command)
*ptr = 0;
retval = efm32x_write_lock_data(bank);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Failed to write LB page");
return retval;
}

16
src/flash/nor/em357.c
View File

@ -382,8 +382,6 @@ static int em357_erase(struct flash_bank *bank, unsigned int first,
retval = em357_wait_status_busy(bank, 100);
if (retval != ERROR_OK)
return retval;
bank->sectors[i].is_erased = 1;
}
retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
@ -761,7 +759,7 @@ COMMAND_HANDLER(em357_handle_lock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
em357_info = bank->driver_priv;
@ -800,7 +798,7 @@ COMMAND_HANDLER(em357_handle_unlock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
target = bank->target;
@ -873,17 +871,13 @@ COMMAND_HANDLER(em357_handle_mass_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = em357_mass_erase(bank);
if (retval == ERROR_OK) {
/* set all sectors as erased */
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
if (retval == ERROR_OK)
command_print(CMD, "em357 mass erase complete");
} else
else
command_print(CMD, "em357 mass erase failed");
return retval;

14
src/flash/nor/faux.c
View File

@ -30,7 +30,7 @@ struct faux_flash_bank {
uint32_t start_address;
};
static const int sectorSize = 0x10000;
static const int sector_size = 0x10000;
/* flash bank faux <base> <size> <chip_width> <bus_width> <target#> <driverPath>
@ -43,12 +43,12 @@ FLASH_BANK_COMMAND_HANDLER(faux_flash_bank_command)
return ERROR_COMMAND_SYNTAX_ERROR;
info = malloc(sizeof(struct faux_flash_bank));
if (info == NULL) {
if (!info) {
LOG_ERROR("no memory for flash bank info");
return ERROR_FAIL;
}
info->memory = malloc(bank->size);
if (info->memory == NULL) {
if (!info->memory) {
free(info);
LOG_ERROR("no memory for flash bank info");
return ERROR_FAIL;
@ -57,18 +57,18 @@ FLASH_BANK_COMMAND_HANDLER(faux_flash_bank_command)
/* Use 0x10000 as a fixed sector size. */
uint32_t offset = 0;
bank->num_sectors = bank->size/sectorSize;
bank->num_sectors = bank->size/sector_size;
bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
for (unsigned int i = 0; i < bank->num_sectors; i++) {
bank->sectors[i].offset = offset;
bank->sectors[i].size = sectorSize;
bank->sectors[i].size = sector_size;
offset += bank->sectors[i].size;
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 0;
}
info->target = get_target(CMD_ARGV[5]);
if (info->target == NULL) {
if (!info->target) {
LOG_ERROR("target '%s' not defined", CMD_ARGV[5]);
free(info->memory);
free(info);
@ -81,7 +81,7 @@ static int faux_erase(struct flash_bank *bank, unsigned int first,
unsigned int last)
{
struct faux_flash_bank *info = bank->driver_priv;
memset(info->memory + first*sectorSize, 0xff, sectorSize*(last-first + 1));
memset(info->memory + first*sector_size, 0xff, sector_size*(last-first + 1));
return ERROR_OK;
}

4
src/flash/nor/fespi.c
View File

@ -151,7 +151,7 @@ FLASH_BANK_COMMAND_HANDLER(fespi_flash_bank_command)
return ERROR_COMMAND_SYNTAX_ERROR;
fespi_info = malloc(sizeof(struct fespi_flash_bank));
if (fespi_info == NULL) {
if (!fespi_info) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}
@ -812,7 +812,7 @@ static int fespi_probe(struct flash_bank *bank)
/* create and fill sectors array */
bank->num_sectors = fespi_info->dev->size_in_bytes / sectorsize;
sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
if (sectors == NULL) {
if (!sectors) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}

303
src/flash/nor/fm3.c
View File

@ -33,29 +33,29 @@
#define FLASH_DQ5 0x20 /* Time limit exceeding flag bit (TLOV) position */
enum fm3_variant {
mb9bfxx1, /* Flash Type '1' */
mb9bfxx2,
mb9bfxx3,
mb9bfxx4,
mb9bfxx5,
mb9bfxx6,
mb9bfxx7,
mb9bfxx8,
MB9BFXX1, /* Flash Type '1' */
MB9BFXX2,
MB9BFXX3,
MB9BFXX4,
MB9BFXX5,
MB9BFXX6,
MB9BFXX7,
MB9BFXX8,
mb9afxx1, /* Flash Type '2' */
mb9afxx2,
mb9afxx3,
mb9afxx4,
mb9afxx5,
mb9afxx6,
mb9afxx7,
mb9afxx8,
MB9AFXX1, /* Flash Type '2' */
MB9AFXX2,
MB9AFXX3,
MB9AFXX4,
MB9AFXX5,
MB9AFXX6,
MB9AFXX7,
MB9AFXX8,
};
enum fm3_flash_type {
fm3_no_flash_type = 0,
fm3_flash_type1 = 1,
fm3_flash_type2 = 2
FM3_NO_FLASH_TYPE = 0,
FM3_FLASH_TYPE1 = 1,
FM3_FLASH_TYPE2 = 2
};
struct fm3_flash_bank {
@ -76,53 +76,53 @@ FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command)
/* Flash type '1' */
if (strcmp(CMD_ARGV[5], "mb9bfxx1.cpu") == 0) {
fm3_info->variant = mb9bfxx1;
fm3_info->flashtype = fm3_flash_type1;
fm3_info->variant = MB9BFXX1;
fm3_info->flashtype = FM3_FLASH_TYPE1;
} else if (strcmp(CMD_ARGV[5], "mb9bfxx2.cpu") == 0) {
fm3_info->variant = mb9bfxx2;
fm3_info->flashtype = fm3_flash_type1;
fm3_info->variant = MB9BFXX2;
fm3_info->flashtype = FM3_FLASH_TYPE1;
} else if (strcmp(CMD_ARGV[5], "mb9bfxx3.cpu") == 0) {
fm3_info->variant = mb9bfxx3;
fm3_info->flashtype = fm3_flash_type1;
fm3_info->variant = MB9BFXX3;
fm3_info->flashtype = FM3_FLASH_TYPE1;
} else if (strcmp(CMD_ARGV[5], "mb9bfxx4.cpu") == 0) {
fm3_info->variant = mb9bfxx4;
fm3_info->flashtype = fm3_flash_type1;
fm3_info->variant = MB9BFXX4;
fm3_info->flashtype = FM3_FLASH_TYPE1;
} else if (strcmp(CMD_ARGV[5], "mb9bfxx5.cpu") == 0) {
fm3_info->variant = mb9bfxx5;
fm3_info->flashtype = fm3_flash_type1;
fm3_info->variant = MB9BFXX5;
fm3_info->flashtype = FM3_FLASH_TYPE1;
} else if (strcmp(CMD_ARGV[5], "mb9bfxx6.cpu") == 0) {
fm3_info->variant = mb9bfxx6;
fm3_info->flashtype = fm3_flash_type1;
fm3_info->variant = MB9BFXX6;
fm3_info->flashtype = FM3_FLASH_TYPE1;
} else if (strcmp(CMD_ARGV[5], "mb9bfxx7.cpu") == 0) {
fm3_info->variant = mb9bfxx7;
fm3_info->flashtype = fm3_flash_type1;
fm3_info->variant = MB9BFXX7;
fm3_info->flashtype = FM3_FLASH_TYPE1;
} else if (strcmp(CMD_ARGV[5], "mb9bfxx8.cpu") == 0) {
fm3_info->variant = mb9bfxx8;
fm3_info->flashtype = fm3_flash_type1;
fm3_info->variant = MB9BFXX8;
fm3_info->flashtype = FM3_FLASH_TYPE1;
} else if (strcmp(CMD_ARGV[5], "mb9afxx1.cpu") == 0) { /* Flash type '2' */
fm3_info->variant = mb9afxx1;
fm3_info->flashtype = fm3_flash_type2;
fm3_info->variant = MB9AFXX1;
fm3_info->flashtype = FM3_FLASH_TYPE2;
} else if (strcmp(CMD_ARGV[5], "mb9afxx2.cpu") == 0) {
fm3_info->variant = mb9afxx2;
fm3_info->flashtype = fm3_flash_type2;
fm3_info->variant = MB9AFXX2;
fm3_info->flashtype = FM3_FLASH_TYPE2;
} else if (strcmp(CMD_ARGV[5], "mb9afxx3.cpu") == 0) {
fm3_info->variant = mb9afxx3;
fm3_info->flashtype = fm3_flash_type2;
fm3_info->variant = MB9AFXX3;
fm3_info->flashtype = FM3_FLASH_TYPE2;
} else if (strcmp(CMD_ARGV[5], "mb9afxx4.cpu") == 0) {
fm3_info->variant = mb9afxx4;
fm3_info->flashtype = fm3_flash_type2;
fm3_info->variant = MB9AFXX4;
fm3_info->flashtype = FM3_FLASH_TYPE2;
} else if (strcmp(CMD_ARGV[5], "mb9afxx5.cpu") == 0) {
fm3_info->variant = mb9afxx5;
fm3_info->flashtype = fm3_flash_type2;
fm3_info->variant = MB9AFXX5;
fm3_info->flashtype = FM3_FLASH_TYPE2;
} else if (strcmp(CMD_ARGV[5], "mb9afxx6.cpu") == 0) {
fm3_info->variant = mb9afxx6;
fm3_info->flashtype = fm3_flash_type2;
fm3_info->variant = MB9AFXX6;
fm3_info->flashtype = FM3_FLASH_TYPE2;
} else if (strcmp(CMD_ARGV[5], "mb9afxx7.cpu") == 0) {
fm3_info->variant = mb9afxx7;
fm3_info->flashtype = fm3_flash_type2;
fm3_info->variant = MB9AFXX7;
fm3_info->flashtype = FM3_FLASH_TYPE2;
} else if (strcmp(CMD_ARGV[5], "mb9afxx8.cpu") == 0) {
fm3_info->variant = mb9afxx8;
fm3_info->flashtype = fm3_flash_type2;
fm3_info->variant = MB9AFXX8;
fm3_info->flashtype = FM3_FLASH_TYPE2;
}
/* unknown Flash type */
@ -207,24 +207,24 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first,
struct fm3_flash_bank *fm3_info = bank->driver_priv;
struct target *target = bank->target;
int retval = ERROR_OK;
uint32_t u32DummyRead;
uint32_t u32_dummy_read;
int odd;
uint32_t u32FlashType;
uint32_t u32FlashSeqAddress1;
uint32_t u32FlashSeqAddress2;
uint32_t u32_flash_type;
uint32_t u32_flash_seq_address1;
uint32_t u32_flash_seq_address2;
struct working_area *write_algorithm;
struct reg_param reg_params[3];
struct armv7m_algorithm armv7m_info;
u32FlashType = (uint32_t) fm3_info->flashtype;
u32_flash_type = (uint32_t) fm3_info->flashtype;
if (u32FlashType == fm3_flash_type1) {
u32FlashSeqAddress1 = 0x00001550;
u32FlashSeqAddress2 = 0x00000AA8;
} else if (u32FlashType == fm3_flash_type2) {
u32FlashSeqAddress1 = 0x00000AA8;
u32FlashSeqAddress2 = 0x00000554;
if (u32_flash_type == FM3_FLASH_TYPE1) {
u32_flash_seq_address1 = 0x00001550;
u32_flash_seq_address2 = 0x00000AA8;
} else if (u32_flash_type == FM3_FLASH_TYPE2) {
u32_flash_seq_address1 = 0x00000AA8;
u32_flash_seq_address2 = 0x00000554;
} else {
LOG_ERROR("Flash/Device type unknown!");
return ERROR_FLASH_OPERATION_FAILED;
@ -282,7 +282,7 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first,
return retval;
/* dummy read of FASZR */
retval = target_read_u32(target, 0x40000000, &u32DummyRead);
retval = target_read_u32(target, 0x40000000, &u32_dummy_read);
if (retval != ERROR_OK)
return retval;
@ -300,8 +300,8 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first,
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_THREAD;
init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */
init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT); /* u32_flash_seq_address1 */
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* u32_flash_seq_address2 */
init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT); /* offset */
/* write code buffer and use Flash sector erase code within fm3 */
@ -312,8 +312,8 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first,
if (odd)
offset += 4;
buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1);
buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2);
buf_set_u32(reg_params[0].value, 0, 32, u32_flash_seq_address1);
buf_set_u32(reg_params[1].value, 0, 32, u32_flash_seq_address2);
buf_set_u32(reg_params[2].value, 0, 32, offset);
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
@ -328,7 +328,6 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first,
if (retval != ERROR_OK)
return retval;
}
bank->sectors[sector].is_erased = 1;
}
target_free_working_area(target, write_algorithm);
@ -341,7 +340,7 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first,
if (retval != ERROR_OK)
return retval;
retval = target_read_u32(target, 0x40000000, &u32DummyRead); /* dummy read of FASZR */
retval = target_read_u32(target, 0x40000000, &u32_dummy_read); /* dummy read of FASZR */
return retval;
}
@ -358,22 +357,22 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer,
struct reg_param reg_params[6];
struct armv7m_algorithm armv7m_info;
int retval = ERROR_OK;
uint32_t u32FlashType;
uint32_t u32FlashSeqAddress1;
uint32_t u32FlashSeqAddress2;
uint32_t u32_flash_type;
uint32_t u32_flash_seq_address1;
uint32_t u32_flash_seq_address2;
/* Increase buffer_size if needed */
if (buffer_size < (target->working_area_size / 2))
buffer_size = (target->working_area_size / 2);
u32FlashType = (uint32_t) fm3_info->flashtype;
u32_flash_type = (uint32_t) fm3_info->flashtype;
if (u32FlashType == fm3_flash_type1) {
u32FlashSeqAddress1 = 0x00001550;
u32FlashSeqAddress2 = 0x00000AA8;
} else if (u32FlashType == fm3_flash_type2) {
u32FlashSeqAddress1 = 0x00000AA8;
u32FlashSeqAddress2 = 0x00000554;
if (u32_flash_type == FM3_FLASH_TYPE1) {
u32_flash_seq_address1 = 0x00001550;
u32_flash_seq_address2 = 0x00000AA8;
} else if (u32_flash_type == FM3_FLASH_TYPE2) {
u32_flash_seq_address1 = 0x00000AA8;
u32_flash_seq_address2 = 0x00000554;
} else {
LOG_ERROR("Flash/Device type unknown!");
return ERROR_FLASH_OPERATION_FAILED;
@ -401,8 +400,8 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer,
0x55, 0xF0, 0x01, 0x05, /* ORRS.W R5, R5, #1 */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x35, 0x60, /* STR R5, [R6] */
/* u32DummyRead = fm3_FLASH_IF->FASZ; */
0x28, 0x4D, /* LDR.N R5, ??u32DummyRead */
/* u32_dummy_read = fm3_FLASH_IF->FASZ; */
0x28, 0x4D, /* LDR.N R5, ??u32_dummy_read */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x36, 0x68, /* LDR R6, [R6] */
0x2E, 0x60, /* STR R6, [R5] */
@ -492,8 +491,8 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer,
0x55, 0xF0, 0x02, 0x05, /* ORRS.W R5, R5, #2 */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x35, 0x60, /* STR R5, [R6] */
/* u32DummyRead = fm3_FLASH_IF->FASZ; */
0x04, 0x4D, /* LDR.N R5, ??u32DummyRead */
/* u32_dummy_read = fm3_FLASH_IF->FASZ; */
0x04, 0x4D, /* LDR.N R5, ??u32_dummy_read */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x36, 0x68, /* LDR R6, [R6] */
0x2E, 0x60, /* STR R6, [R5] */
@ -508,7 +507,7 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer,
/* SRAM basic-address + 8.These address pointers will be patched, if a */
/* different start address in RAM is used (e.g. for Flash type 2)! */
/* Default SRAM basic-address is 0x20000000. */
0x00, 0x00, 0x00, 0x20, /* u32DummyRead address in RAM (0x20000000) */
0x00, 0x00, 0x00, 0x20, /* u32_dummy_read address in RAM (0x20000000) */
0x04, 0x00, 0x00, 0x20 /* u32FlashResult address in RAM (0x20000004) */
};
@ -548,7 +547,7 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer,
return retval;
/* Patching 'local variable address' */
/* Algorithm: u32DummyRead: */
/* Algorithm: u32_dummy_read: */
retval = target_write_u32(target, (write_algorithm->address + 8)
+ sizeof(fm3_flash_write_code) - 8, (write_algorithm->address));
if (retval != ERROR_OK)
@ -595,8 +594,8 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer,
buf_set_u32(reg_params[0].value, 0, 32, source->address);
buf_set_u32(reg_params[1].value, 0, 32, address);
buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
buf_set_u32(reg_params[3].value, 0, 32, u32FlashSeqAddress1);
buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2);
buf_set_u32(reg_params[3].value, 0, 32, u32_flash_seq_address1);
buf_set_u32(reg_params[4].value, 0, 32, u32_flash_seq_address2);
retval = target_run_algorithm(target, 0, NULL, 6, reg_params,
(write_algorithm->address + 8), 0, 1000, &armv7m_info);
@ -673,8 +672,8 @@ static int fm3_probe(struct flash_bank *bank)
bank->sectors[1].is_erased = -1;
bank->sectors[1].is_protected = -1;
if ((fm3_info->variant == mb9bfxx1)
|| (fm3_info->variant == mb9afxx1)) {
if ((fm3_info->variant == MB9BFXX1)
|| (fm3_info->variant == MB9AFXX1)) {
num_pages = 3;
bank->size = 64 * 1024; /* bytes */
bank->num_sectors = num_pages;
@ -685,18 +684,18 @@ static int fm3_probe(struct flash_bank *bank)
bank->sectors[2].is_protected = -1;
}
if ((fm3_info->variant == mb9bfxx2)
|| (fm3_info->variant == mb9bfxx4)
|| (fm3_info->variant == mb9bfxx5)
|| (fm3_info->variant == mb9bfxx6)
|| (fm3_info->variant == mb9bfxx7)
|| (fm3_info->variant == mb9bfxx8)
|| (fm3_info->variant == mb9afxx2)
|| (fm3_info->variant == mb9afxx4)
|| (fm3_info->variant == mb9afxx5)
|| (fm3_info->variant == mb9afxx6)
|| (fm3_info->variant == mb9afxx7)
|| (fm3_info->variant == mb9afxx8)) {
if ((fm3_info->variant == MB9BFXX2)
|| (fm3_info->variant == MB9BFXX4)
|| (fm3_info->variant == MB9BFXX5)
|| (fm3_info->variant == MB9BFXX6)
|| (fm3_info->variant == MB9BFXX7)
|| (fm3_info->variant == MB9BFXX8)
|| (fm3_info->variant == MB9AFXX2)
|| (fm3_info->variant == MB9AFXX4)
|| (fm3_info->variant == MB9AFXX5)
|| (fm3_info->variant == MB9AFXX6)
|| (fm3_info->variant == MB9AFXX7)
|| (fm3_info->variant == MB9AFXX8)) {
num_pages = 3;
bank->size = 128 * 1024; /* bytes */
bank->num_sectors = num_pages;
@ -707,16 +706,16 @@ static int fm3_probe(struct flash_bank *bank)
bank->sectors[2].is_protected = -1;
}
if ((fm3_info->variant == mb9bfxx4)
|| (fm3_info->variant == mb9bfxx5)
|| (fm3_info->variant == mb9bfxx6)
|| (fm3_info->variant == mb9bfxx7)
|| (fm3_info->variant == mb9bfxx8)
|| (fm3_info->variant == mb9afxx4)
|| (fm3_info->variant == mb9afxx5)
|| (fm3_info->variant == mb9afxx6)
|| (fm3_info->variant == mb9afxx7)
|| (fm3_info->variant == mb9afxx8)) {
if ((fm3_info->variant == MB9BFXX4)
|| (fm3_info->variant == MB9BFXX5)
|| (fm3_info->variant == MB9BFXX6)
|| (fm3_info->variant == MB9BFXX7)
|| (fm3_info->variant == MB9BFXX8)
|| (fm3_info->variant == MB9AFXX4)
|| (fm3_info->variant == MB9AFXX5)
|| (fm3_info->variant == MB9AFXX6)
|| (fm3_info->variant == MB9AFXX7)
|| (fm3_info->variant == MB9AFXX8)) {
num_pages = 4;
bank->size = 256 * 1024; /* bytes */
bank->num_sectors = num_pages;
@ -727,14 +726,14 @@ static int fm3_probe(struct flash_bank *bank)
bank->sectors[3].is_protected = -1;
}
if ((fm3_info->variant == mb9bfxx5)
|| (fm3_info->variant == mb9bfxx6)
|| (fm3_info->variant == mb9bfxx7)
|| (fm3_info->variant == mb9bfxx8)
|| (fm3_info->variant == mb9afxx5)
|| (fm3_info->variant == mb9afxx6)
|| (fm3_info->variant == mb9afxx7)
|| (fm3_info->variant == mb9afxx8)) {
if ((fm3_info->variant == MB9BFXX5)
|| (fm3_info->variant == MB9BFXX6)
|| (fm3_info->variant == MB9BFXX7)
|| (fm3_info->variant == MB9BFXX8)
|| (fm3_info->variant == MB9AFXX5)
|| (fm3_info->variant == MB9AFXX6)
|| (fm3_info->variant == MB9AFXX7)
|| (fm3_info->variant == MB9AFXX8)) {
num_pages = 5;
bank->size = 384 * 1024; /* bytes */
bank->num_sectors = num_pages;
@ -745,12 +744,12 @@ static int fm3_probe(struct flash_bank *bank)
bank->sectors[4].is_protected = -1;
}
if ((fm3_info->variant == mb9bfxx6)
|| (fm3_info->variant == mb9bfxx7)
|| (fm3_info->variant == mb9bfxx8)
|| (fm3_info->variant == mb9afxx6)
|| (fm3_info->variant == mb9afxx7)
|| (fm3_info->variant == mb9afxx8)) {
if ((fm3_info->variant == MB9BFXX6)
|| (fm3_info->variant == MB9BFXX7)
|| (fm3_info->variant == MB9BFXX8)
|| (fm3_info->variant == MB9AFXX6)
|| (fm3_info->variant == MB9AFXX7)
|| (fm3_info->variant == MB9AFXX8)) {
num_pages = 6;
bank->size = 512 * 1024; /* bytes */
bank->num_sectors = num_pages;
@ -761,10 +760,10 @@ static int fm3_probe(struct flash_bank *bank)
bank->sectors[5].is_protected = -1;
}
if ((fm3_info->variant == mb9bfxx7)
|| (fm3_info->variant == mb9bfxx8)
|| (fm3_info->variant == mb9afxx7)
|| (fm3_info->variant == mb9afxx8)) {
if ((fm3_info->variant == MB9BFXX7)
|| (fm3_info->variant == MB9BFXX8)
|| (fm3_info->variant == MB9AFXX7)
|| (fm3_info->variant == MB9AFXX8)) {
num_pages = 8;
bank->size = 768 * 1024; /* bytes */
bank->num_sectors = num_pages;
@ -780,8 +779,8 @@ static int fm3_probe(struct flash_bank *bank)
bank->sectors[7].is_protected = -1;
}
if ((fm3_info->variant == mb9bfxx8)
|| (fm3_info->variant == mb9afxx8)) {
if ((fm3_info->variant == MB9BFXX8)
|| (fm3_info->variant == MB9AFXX8)) {
num_pages = 10;
bank->size = 1024 * 1024; /* bytes */
bank->num_sectors = num_pages;
@ -816,25 +815,25 @@ static int fm3_chip_erase(struct flash_bank *bank)
struct target *target = bank->target;
struct fm3_flash_bank *fm3_info2 = bank->driver_priv;
int retval = ERROR_OK;
uint32_t u32DummyRead;
uint32_t u32FlashType;
uint32_t u32FlashSeqAddress1;
uint32_t u32FlashSeqAddress2;
uint32_t u32_dummy_read;
uint32_t u32_flash_type;
uint32_t u32_flash_seq_address1;
uint32_t u32_flash_seq_address2;
struct working_area *write_algorithm;
struct reg_param reg_params[3];
struct armv7m_algorithm armv7m_info;
u32FlashType = (uint32_t) fm3_info2->flashtype;
u32_flash_type = (uint32_t) fm3_info2->flashtype;
if (u32FlashType == fm3_flash_type1) {
if (u32_flash_type == FM3_FLASH_TYPE1) {
LOG_INFO("*** Erasing mb9bfxxx type");
u32FlashSeqAddress1 = 0x00001550;
u32FlashSeqAddress2 = 0x00000AA8;
} else if (u32FlashType == fm3_flash_type2) {
u32_flash_seq_address1 = 0x00001550;
u32_flash_seq_address2 = 0x00000AA8;
} else if (u32_flash_type == FM3_FLASH_TYPE2) {
LOG_INFO("*** Erasing mb9afxxx type");
u32FlashSeqAddress1 = 0x00000AA8;
u32FlashSeqAddress2 = 0x00000554;
u32_flash_seq_address1 = 0x00000AA8;
u32_flash_seq_address2 = 0x00000554;
} else {
LOG_ERROR("Flash/Device type unknown!");
return ERROR_FLASH_OPERATION_FAILED;
@ -891,7 +890,7 @@ static int fm3_chip_erase(struct flash_bank *bank)
return retval;
/* dummy read of FASZR */
retval = target_read_u32(target, 0x40000000, &u32DummyRead);
retval = target_read_u32(target, 0x40000000, &u32_dummy_read);
if (retval != ERROR_OK)
return retval;
@ -909,11 +908,11 @@ static int fm3_chip_erase(struct flash_bank *bank)
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_THREAD;
init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */
init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT); /* u32_flash_seq_address1 */
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* u32_flash_seq_address2 */
buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1);
buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2);
buf_set_u32(reg_params[0].value, 0, 32, u32_flash_seq_address1);
buf_set_u32(reg_params[1].value, 0, 32, u32_flash_seq_address2);
retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
write_algorithm->address, 0, 100000, &armv7m_info);
@ -928,7 +927,7 @@ static int fm3_chip_erase(struct flash_bank *bank)
destroy_reg_param(&reg_params[0]);
destroy_reg_param(&reg_params[1]);
retval = fm3_busy_wait(target, u32FlashSeqAddress2, 20000); /* 20s timeout */
retval = fm3_busy_wait(target, u32_flash_seq_address2, 20000); /* 20s timeout */
if (retval != ERROR_OK)
return retval;
@ -937,7 +936,7 @@ static int fm3_chip_erase(struct flash_bank *bank)
if (retval != ERROR_OK)
return retval;
retval = target_read_u32(target, 0x40000000, &u32DummyRead); /* dummy read of FASZR */
retval = target_read_u32(target, 0x40000000, &u32_dummy_read); /* dummy read of FASZR */
return retval;
}
@ -949,14 +948,10 @@ COMMAND_HANDLER(fm3_handle_chip_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (fm3_chip_erase(bank) == ERROR_OK) {
/* set all sectors as erased */
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD, "fm3 chip erase complete");
} else {
command_print(CMD, "fm3 chip erase failed");

96
src/flash/nor/fm4.c
View File

@ -28,17 +28,17 @@
#define WDG_LCK (WDG_BASE + 0xC00)
enum fm4_variant {
mb9bfx64,
mb9bfx65,
mb9bfx66,
mb9bfx67,
mb9bfx68,
MB9BFX64,
MB9BFX65,
MB9BFX66,
MB9BFX67,
MB9BFX68,
s6e2cx8,
s6e2cx9,
s6e2cxa,
S6E2CX8,
S6E2CX9,
S6E2CXA,
s6e2dx,
S6E2DX,
};
struct fm4_flash_bank {
@ -177,8 +177,6 @@ static int fm4_flash_erase(struct flash_bank *bank, unsigned int first,
goto err_run_ret;
} else
retval = ERROR_OK;
bank->sectors[sector].is_erased = 1;
}
err_run_ret:
@ -350,19 +348,19 @@ static int mb9bf_probe(struct flash_bank *bank)
uint32_t flash_addr = bank->base;
switch (fm4_bank->variant) {
case mb9bfx64:
case MB9BFX64:
bank->num_sectors = 8;
break;
case mb9bfx65:
case MB9BFX65:
bank->num_sectors = 10;
break;
case mb9bfx66:
case MB9BFX66:
bank->num_sectors = 12;
break;
case mb9bfx67:
case MB9BFX67:
bank->num_sectors = 16;
break;
case mb9bfx68:
case MB9BFX68:
bank->num_sectors = 20;
break;
default:
@ -421,13 +419,13 @@ static int s6e2cc_probe(struct flash_bank *bank)
}
switch (fm4_bank->variant) {
case s6e2cx8:
case S6E2CX8:
num_sectors = (fm4_bank->macro_nr == 0) ? 20 : 0;
break;
case s6e2cx9:
case S6E2CX9:
num_sectors = (fm4_bank->macro_nr == 0) ? 20 : 12;
break;
case s6e2cxa:
case S6E2CXA:
num_sectors = 20;
break;
default:
@ -503,19 +501,19 @@ static int fm4_probe(struct flash_bank *bank)
}
switch (fm4_bank->variant) {
case mb9bfx64:
case mb9bfx65:
case mb9bfx66:
case mb9bfx67:
case mb9bfx68:
case MB9BFX64:
case MB9BFX65:
case MB9BFX66:
case MB9BFX67:
case MB9BFX68:
retval = mb9bf_probe(bank);
break;
case s6e2cx8:
case s6e2cx9:
case s6e2cxa:
case S6E2CX8:
case S6E2CX9:
case S6E2CXA:
retval = s6e2cc_probe(bank);
break;
case s6e2dx:
case S6E2DX:
retval = s6e2dh_probe(bank);
break;
default:
@ -550,31 +548,31 @@ static int fm4_get_info_command(struct flash_bank *bank, struct command_invocati
}
switch (fm4_bank->variant) {
case mb9bfx64:
case MB9BFX64:
name = "MB9BFx64";
break;
case mb9bfx65:
case MB9BFX65:
name = "MB9BFx65";
break;
case mb9bfx66:
case MB9BFX66:
name = "MB9BFx66";
break;
case mb9bfx67:
case MB9BFX67:
name = "MB9BFx67";
break;
case mb9bfx68:
case MB9BFX68:
name = "MB9BFx68";
break;
case s6e2cx8:
case S6E2CX8:
name = "S6E2Cx8";
break;
case s6e2cx9:
case S6E2CX9:
name = "S6E2Cx9";
break;
case s6e2cxa:
case S6E2CXA:
name = "S6E2CxA";
break;
case s6e2dx:
case S6E2DX:
name = "S6E2Dx";
break;
default:
@ -583,9 +581,9 @@ static int fm4_get_info_command(struct flash_bank *bank, struct command_invocati
}
switch (fm4_bank->variant) {
case s6e2cx8:
case s6e2cx9:
case s6e2cxa:
case S6E2CX8:
case S6E2CX9:
case S6E2CXA:
command_print_sameline(cmd, "%s MainFlash Macro #%i", name, fm4_bank->macro_nr);
break;
default:
@ -617,15 +615,15 @@ static int mb9bf_bank_setup(struct flash_bank *bank, const char *variant)
struct fm4_flash_bank *fm4_bank = bank->driver_priv;
if (fm4_name_match(variant, "MB9BFx64")) {
fm4_bank->variant = mb9bfx64;
fm4_bank->variant = MB9BFX64;
} else if (fm4_name_match(variant, "MB9BFx65")) {
fm4_bank->variant = mb9bfx65;
fm4_bank->variant = MB9BFX65;
} else if (fm4_name_match(variant, "MB9BFx66")) {
fm4_bank->variant = mb9bfx66;
fm4_bank->variant = MB9BFX66;
} else if (fm4_name_match(variant, "MB9BFx67")) {
fm4_bank->variant = mb9bfx67;
fm4_bank->variant = MB9BFX67;
} else if (fm4_name_match(variant, "MB9BFx68")) {
fm4_bank->variant = mb9bfx68;
fm4_bank->variant = MB9BFX68;
} else {
LOG_WARNING("MB9BF variant %s not recognized.", variant);
return ERROR_FLASH_OPER_UNSUPPORTED;
@ -639,11 +637,11 @@ static int s6e2cc_bank_setup(struct flash_bank *bank, const char *variant)
struct fm4_flash_bank *fm4_bank = bank->driver_priv;
if (fm4_name_match(variant, "S6E2Cx8")) {
fm4_bank->variant = s6e2cx8;
fm4_bank->variant = S6E2CX8;
} else if (fm4_name_match(variant, "S6E2Cx9")) {
fm4_bank->variant = s6e2cx9;
fm4_bank->variant = S6E2CX9;
} else if (fm4_name_match(variant, "S6E2CxA")) {
fm4_bank->variant = s6e2cxa;
fm4_bank->variant = S6E2CXA;
} else {
LOG_WARNING("S6E2CC variant %s not recognized.", variant);
return ERROR_FLASH_OPER_UNSUPPORTED;
@ -677,7 +675,7 @@ FLASH_BANK_COMMAND_HANDLER(fm4_flash_bank_command)
else if (fm4_name_match(variant, "S6E2Cx"))
ret = s6e2cc_bank_setup(bank, variant);
else if (fm4_name_match(variant, "S6E2Dx")) {
fm4_bank->variant = s6e2dx;
fm4_bank->variant = S6E2DX;
ret = ERROR_OK;
} else {
LOG_WARNING("Family %s not recognized.", variant);

8
src/flash/nor/jtagspi.c
View File

@ -42,7 +42,7 @@ FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command)
return ERROR_COMMAND_SYNTAX_ERROR;
info = malloc(sizeof(struct jtagspi_flash_bank));
if (info == NULL) {
if (!info) {
LOG_ERROR("no memory for flash bank info");
return ERROR_FAIL;
}
@ -129,7 +129,7 @@ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd,
lenb = DIV_ROUND_UP(len, 8);
data_buf = malloc(lenb);
if (lenb > 0) {
if (data_buf == NULL) {
if (!data_buf) {
LOG_ERROR("no memory for spi buffer");
return ERROR_FAIL;
}
@ -172,7 +172,7 @@ static int jtagspi_probe(struct flash_bank *bank)
free(bank->sectors);
info->probed = false;
if (bank->target->tap == NULL) {
if (!bank->target->tap) {
LOG_ERROR("Target has no JTAG tap");
return ERROR_FAIL;
}
@ -211,7 +211,7 @@ static int jtagspi_probe(struct flash_bank *bank)
/* create and fill sectors array */
bank->num_sectors = info->dev->size_in_bytes / sectorsize;
sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
if (sectors == NULL) {
if (!sectors) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}

114
src/flash/nor/kinetis.c
View File

@ -91,11 +91,11 @@
#define MSCM_OCMDR0 0x40001400
#define FMC_PFB01CR 0x4001f004
#define FTFx_FSTAT 0x40020000
#define FTFx_FCNFG 0x40020001
#define FTFx_FCCOB3 0x40020004
#define FTFx_FPROT3 0x40020010
#define FTFx_FDPROT 0x40020017
#define FTFX_FSTAT 0x40020000
#define FTFX_FCNFG 0x40020001
#define FTFX_FCCOB3 0x40020004
#define FTFX_FPROT3 0x40020010
#define FTFX_FDPROT 0x40020017
#define SIM_BASE 0x40047000
#define SIM_BASE_KL28 0x40074000
#define SIM_COPC 0x40048100
@ -124,14 +124,14 @@
#define PM_CTRL_RUNM_RUN 0x00
/* Commands */
#define FTFx_CMD_BLOCKSTAT 0x00
#define FTFx_CMD_SECTSTAT 0x01
#define FTFx_CMD_LWORDPROG 0x06
#define FTFx_CMD_SECTERASE 0x09
#define FTFx_CMD_SECTWRITE 0x0b
#define FTFx_CMD_MASSERASE 0x44
#define FTFx_CMD_PGMPART 0x80
#define FTFx_CMD_SETFLEXRAM 0x81
#define FTFX_CMD_BLOCKSTAT 0x00
#define FTFX_CMD_SECTSTAT 0x01
#define FTFX_CMD_LWORDPROG 0x06
#define FTFX_CMD_SECTERASE 0x09
#define FTFX_CMD_SECTWRITE 0x0b
#define FTFX_CMD_MASSERASE 0x44
#define FTFX_CMD_PGMPART 0x80
#define FTFX_CMD_SETFLEXRAM 0x81
/* The older Kinetis K series uses the following SDID layout :
* Bit 31-16 : 0
@ -232,8 +232,8 @@
/* The field originally named DIEID has new name/meaning on KE1x */
#define KINETIS_SDID_PROJECTID_MASK KINETIS_SDID_DIEID_MASK
#define KINETIS_SDID_PROJECTID_KE1xF 0x00000080
#define KINETIS_SDID_PROJECTID_KE1xZ 0x00000100
#define KINETIS_SDID_PROJECTID_KE1XF 0x00000080
#define KINETIS_SDID_PROJECTID_KE1XZ 0x00000100
struct kinetis_flash_bank {
struct kinetis_chip *k_chip;
@ -882,9 +882,9 @@ FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
k_chip = kinetis_get_chip(target);
if (k_chip == NULL) {
if (!k_chip) {
k_chip = calloc(sizeof(struct kinetis_chip), 1);
if (k_chip == NULL) {
if (!k_chip) {
LOG_ERROR("No memory");
return ERROR_FAIL;
}
@ -915,11 +915,11 @@ FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
static void kinetis_free_driver_priv(struct flash_bank *bank)
{
struct kinetis_flash_bank *k_bank = bank->driver_priv;
if (k_bank == NULL)
if (!k_bank)
return;
struct kinetis_chip *k_chip = k_bank->k_chip;
if (k_chip == NULL)
if (!k_chip)
return;
k_chip->num_banks--;
@ -985,7 +985,7 @@ static int kinetis_create_missing_banks(struct kinetis_chip *k_chip)
}
bank = calloc(sizeof(struct flash_bank), 1);
if (bank == NULL)
if (!bank)
return ERROR_FAIL;
bank->target = k_chip->target;
@ -1174,7 +1174,7 @@ COMMAND_HANDLER(kinetis_disable_wdog_handler)
struct target *target = get_current_target(CMD_CTX);
struct kinetis_chip *k_chip = kinetis_get_chip(target);
if (k_chip == NULL)
if (!k_chip)
return ERROR_FAIL;
if (CMD_ARGC > 0)
@ -1209,7 +1209,7 @@ static int kinetis_ftfx_decode_error(uint8_t fstat)
static int kinetis_ftfx_clear_error(struct target *target)
{
/* reset error flags */
return target_write_u8(target, FTFx_FSTAT, 0x70);
return target_write_u8(target, FTFX_FSTAT, 0x70);
}
@ -1220,7 +1220,7 @@ static int kinetis_ftfx_prepare(struct target *target)
/* wait until busy */
for (unsigned int i = 0; i < 50; i++) {
result = target_read_u8(target, FTFx_FSTAT, &fstat);
result = target_read_u8(target, FTFX_FSTAT, &fstat);
if (result != ERROR_OK)
return result;
@ -1300,7 +1300,7 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer,
buf_set_u32(reg_params[1].value, 0, 32, wcount);
buf_set_u32(reg_params[2].value, 0, 32, source->address);
buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size);
buf_set_u32(reg_params[4].value, 0, 32, FTFx_FSTAT);
buf_set_u32(reg_params[4].value, 0, 32, FTFX_FSTAT);
retval = target_run_flash_async_algorithm(target, buffer, wcount, 4,
0, NULL,
@ -1314,12 +1314,12 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer,
LOG_ERROR("Error writing flash at %08" PRIx32, end_address);
retval = target_read_u8(target, FTFx_FSTAT, &fstat);
retval = target_read_u8(target, FTFX_FSTAT, &fstat);
if (retval == ERROR_OK) {
retval = kinetis_ftfx_decode_error(fstat);
/* reset error flags */
target_write_u8(target, FTFx_FSTAT, 0x70);
target_write_u8(target, FTFX_FSTAT, 0x70);
}
} else if (retval != ERROR_OK)
LOG_ERROR("Error executing kinetis Flash programming algorithm");
@ -1369,7 +1369,7 @@ static int kinetis_protect_check(struct flash_bank *bank)
if (k_bank->flash_class == FC_PFLASH) {
/* read protection register */
result = target_read_u32(bank->target, FTFx_FPROT3, &fprot);
result = target_read_u32(bank->target, FTFX_FPROT3, &fprot);
if (result != ERROR_OK)
return result;
@ -1379,7 +1379,7 @@ static int kinetis_protect_check(struct flash_bank *bank)
uint8_t fdprot;
/* read protection register */
result = target_read_u8(bank->target, FTFx_FDPROT, &fdprot);
result = target_read_u8(bank->target, FTFX_FDPROT, &fdprot);
if (result != ERROR_OK)
return result;
@ -1428,7 +1428,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf)
k_bank = &(k_chip->banks[bank_idx]);
bank_iter = k_bank->bank;
if (bank_iter == NULL) {
if (!bank_iter) {
LOG_WARNING("Missing bank %u configuration, FCF protection flags may be incomplete", bank_idx);
continue;
}
@ -1475,18 +1475,18 @@ static int kinetis_ftfx_command(struct target *target, uint8_t fcmd, uint32_t fa
uint8_t fstat;
int64_t ms_timeout = timeval_ms() + 250;
result = target_write_memory(target, FTFx_FCCOB3, 4, 3, command);
result = target_write_memory(target, FTFX_FCCOB3, 4, 3, command);
if (result != ERROR_OK)
return result;
/* start command */
result = target_write_u8(target, FTFx_FSTAT, 0x80);
result = target_write_u8(target, FTFX_FSTAT, 0x80);
if (result != ERROR_OK)
return result;
/* wait for done */
do {
result = target_read_u8(target, FTFx_FSTAT, &fstat);
result = target_read_u8(target, FTFX_FSTAT, &fstat);
if (result != ERROR_OK)
return result;
@ -1538,7 +1538,7 @@ static int kinetis_check_run_mode(struct kinetis_chip *k_chip)
uint8_t pmstat;
struct target *target;
if (k_chip == NULL) {
if (!k_chip) {
LOG_ERROR("Chip not probed.");
return ERROR_FAIL;
}
@ -1641,7 +1641,7 @@ static int kinetis_erase(struct flash_bank *bank, unsigned int first,
*/
for (unsigned int i = first; i <= last; i++) {
/* set command and sector address */
result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTERASE, k_bank->prog_base + bank->sectors[i].offset,
result = kinetis_ftfx_command(bank->target, FTFX_CMD_SECTERASE, k_bank->prog_base + bank->sectors[i].offset,
0, 0, 0, 0, 0, 0, 0, 0, NULL);
if (result != ERROR_OK) {
@ -1679,7 +1679,7 @@ static int kinetis_make_ram_ready(struct target *target)
uint8_t ftfx_fcnfg;
/* check if ram ready */
result = target_read_u8(target, FTFx_FCNFG, &ftfx_fcnfg);
result = target_read_u8(target, FTFX_FCNFG, &ftfx_fcnfg);
if (result != ERROR_OK)
return result;
@ -1687,13 +1687,13 @@ static int kinetis_make_ram_ready(struct target *target)
return ERROR_OK; /* ram ready */
/* make flex ram available */
result = kinetis_ftfx_command(target, FTFx_CMD_SETFLEXRAM, 0x00ff0000,
result = kinetis_ftfx_command(target, FTFX_CMD_SETFLEXRAM, 0x00ff0000,
0, 0, 0, 0, 0, 0, 0, 0, NULL);
if (result != ERROR_OK)
return ERROR_FLASH_OPERATION_FAILED;
/* check again */
result = target_read_u8(target, FTFx_FCNFG, &ftfx_fcnfg);
result = target_read_u8(target, FTFX_FCNFG, &ftfx_fcnfg);
if (result != ERROR_OK)
return result;
@ -1766,7 +1766,7 @@ static int kinetis_write_sections(struct flash_bank *bank, const uint8_t *buffer
}
/* execute section-write command */
result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTWRITE,
result = kinetis_ftfx_command(bank->target, FTFX_CMD_SECTWRITE,
k_bank->prog_base + offset - align_begin,
chunk_count>>8, chunk_count, 0, 0,
0, 0, 0, 0, &ftfx_fstat);
@ -1840,7 +1840,7 @@ static int kinetis_write_inner(struct flash_bank *bank, const uint8_t *buffer,
uint32_t old_count = count;
count = (old_count | 3) + 1;
new_buffer = malloc(count);
if (new_buffer == NULL) {
if (!new_buffer) {
LOG_ERROR("odd number of bytes to write and no memory "
"for padding buffer");
return ERROR_FAIL;
@ -1869,7 +1869,7 @@ static int kinetis_write_inner(struct flash_bank *bank, const uint8_t *buffer,
LOG_DEBUG("write longword @ %08" PRIx32, (uint32_t)(bank->base + offset));
result = kinetis_ftfx_command(bank->target, FTFx_CMD_LWORDPROG, k_bank->prog_base + offset,
result = kinetis_ftfx_command(bank->target, FTFX_CMD_LWORDPROG, k_bank->prog_base + offset,
buffer[3], buffer[2], buffer[1], buffer[0],
0, 0, 0, 0, &ftfx_fstat);
@ -2405,8 +2405,8 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip)
k_chip->watchdog_type = KINETIS_WDOG32_KE1X;
switch (k_chip->sim_sdid &
(KINETIS_SDID_FAMILYID_MASK | KINETIS_SDID_SUBFAMID_MASK | KINETIS_SDID_PROJECTID_MASK)) {
case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX4 | KINETIS_SDID_PROJECTID_KE1xZ:
case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX5 | KINETIS_SDID_PROJECTID_KE1xZ:
case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX4 | KINETIS_SDID_PROJECTID_KE1XZ:
case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX5 | KINETIS_SDID_PROJECTID_KE1XZ:
/* KE1xZ: FTFE, 2kB sectors */
k_chip->pflash_sector_size = 2<<10;
k_chip->nvm_sector_size = 2<<10;
@ -2420,9 +2420,9 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip)
familyid, subfamid, cpu_mhz / 10);
break;
case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX4 | KINETIS_SDID_PROJECTID_KE1xF:
case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX6 | KINETIS_SDID_PROJECTID_KE1xF:
case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX8 | KINETIS_SDID_PROJECTID_KE1xF:
case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX4 | KINETIS_SDID_PROJECTID_KE1XF:
case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX6 | KINETIS_SDID_PROJECTID_KE1XF:
case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX8 | KINETIS_SDID_PROJECTID_KE1XF:
/* KE1xF: FTFE, 4kB sectors */
k_chip->pflash_sector_size = 4<<10;
k_chip->nvm_sector_size = 2<<10;
@ -2827,7 +2827,7 @@ static int kinetis_blank_check(struct flash_bank *bank)
if (use_block_cmd) {
/* check if whole bank is blank */
result = kinetis_ftfx_command(bank->target, FTFx_CMD_BLOCKSTAT, k_bank->prog_base,
result = kinetis_ftfx_command(bank->target, FTFX_CMD_BLOCKSTAT, k_bank->prog_base,
0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
if (result != ERROR_OK)
@ -2840,7 +2840,7 @@ static int kinetis_blank_check(struct flash_bank *bank)
/* the whole bank is not erased, check sector-by-sector */
for (unsigned int i = 0; i < bank->num_sectors; i++) {
/* normal margin */
result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTSTAT,
result = kinetis_ftfx_command(bank->target, FTFX_CMD_SECTSTAT,
k_bank->prog_base + bank->sectors[i].offset,
1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
@ -2890,13 +2890,13 @@ COMMAND_HANDLER(kinetis_nvm_partition)
else if (strcmp(CMD_ARGV[0], "eebkp") == 0)
sz_type = EEBKP_SIZE;
par = strtoul(CMD_ARGV[1], NULL, 10);
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], par);
while (par >> (log2 + 3))
log2++;
}
switch (sz_type) {
case SHOW_INFO:
if (k_chip == NULL) {
if (!k_chip) {
LOG_ERROR("Chip not probed.");
return ERROR_FAIL;
}
@ -2945,11 +2945,13 @@ COMMAND_HANDLER(kinetis_nvm_partition)
break;
}
if (CMD_ARGC == 3)
ee1 = ee2 = strtoul(CMD_ARGV[2], NULL, 10) / 2;
else if (CMD_ARGC >= 4) {
ee1 = strtoul(CMD_ARGV[2], NULL, 10);
ee2 = strtoul(CMD_ARGV[3], NULL, 10);
if (CMD_ARGC == 3) {
unsigned long eex;
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], eex);
ee1 = ee2 = eex / 2;
} else if (CMD_ARGC >= 4) {
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], ee1);
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[3], ee2);
}
enable = ee1 + ee2 > 0;
@ -2992,7 +2994,7 @@ COMMAND_HANDLER(kinetis_nvm_partition)
if (result != ERROR_OK)
return result;
result = kinetis_ftfx_command(target, FTFx_CMD_PGMPART, load_flex_ram,
result = kinetis_ftfx_command(target, FTFX_CMD_PGMPART, load_flex_ram,
ee_size_code, flex_nvm_partition_code, 0, 0,
0, 0, 0, 0, NULL);
if (result != ERROR_OK)
@ -3044,7 +3046,7 @@ COMMAND_HANDLER(kinetis_fopt_handler)
return ERROR_COMMAND_SYNTAX_ERROR;
if (CMD_ARGC == 1) {
fcf_fopt = (uint8_t)strtoul(CMD_ARGV[0], NULL, 0);
COMMAND_PARSE_NUMBER(u8, CMD_ARGV[0], fcf_fopt);
} else {
command_print(CMD, "FCF_FOPT 0x%02" PRIx8, fcf_fopt);
}

6
src/flash/nor/kinetis_ke.c
View File

@ -945,7 +945,7 @@ COMMAND_HANDLER(kinetis_ke_securing_test)
if (result != ERROR_OK)
return result;
assert(bank != NULL);
assert(bank);
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
@ -1000,8 +1000,6 @@ static int kinetis_ke_erase(struct flash_bank *bank, unsigned int first,
return ERROR_FLASH_OPERATION_FAILED;
}
bank->sectors[i].is_erased = 1;
if (i == 2)
fcf_erased = true;
}
@ -1046,7 +1044,7 @@ static int kinetis_ke_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t old_count = count;
count = (old_count | 3) + 1;
new_buffer = malloc(count);
if (new_buffer == NULL) {
if (!new_buffer) {
LOG_ERROR("odd number of bytes to write and no memory "
"for padding buffer");
return ERROR_FAIL;

180
src/flash/nor/lpc2000.c
View File

@ -281,18 +281,18 @@
#define IAP_CODE_LEN 0x34
#define LPC11xx_REG_SECTORS 24
#define LPC11XX_REG_SECTORS 24
typedef enum {
lpc2000_v1,
lpc2000_v2,
lpc1700,
lpc4300,
lpc800,
lpc1100,
lpc1500,
lpc54100,
lpc_auto,
LPC2000_V1,
LPC2000_V2,
LPC1700,
LPC4300,
LPC800,
LPC1100,
LPC1500,
LPC54100,
LPC_AUTO,
} lpc2000_variant;
struct lpc2000_flash_bank {
@ -342,7 +342,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank)
/* default to a 4096 write buffer */
lpc2000_info->cmd51_max_buffer = 4096;
if (lpc2000_info->variant == lpc2000_v1) {
if (lpc2000_info->variant == LPC2000_V1) {
lpc2000_info->cmd51_dst_boundary = 512;
lpc2000_info->checksum_vector = 5;
lpc2000_info->iap_max_stack = 128;
@ -387,7 +387,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank)
LOG_ERROR("BUG: unknown bank->size encountered");
exit(-1);
}
} else if (lpc2000_info->variant == lpc2000_v2) {
} else if (lpc2000_info->variant == LPC2000_V2) {
lpc2000_info->cmd51_dst_boundary = 256;
lpc2000_info->checksum_vector = 5;
lpc2000_info->iap_max_stack = 128;
@ -453,7 +453,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank)
bank->sectors[i].is_protected = 1;
}
}
} else if (lpc2000_info->variant == lpc1700) {
} else if (lpc2000_info->variant == LPC1700) {
lpc2000_info->cmd51_dst_boundary = 256;
lpc2000_info->checksum_vector = 7;
lpc2000_info->iap_max_stack = 128;
@ -502,7 +502,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank)
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 1;
}
} else if (lpc2000_info->variant == lpc4300) {
} else if (lpc2000_info->variant == LPC4300) {
lpc2000_info->cmd51_dst_boundary = 512;
lpc2000_info->checksum_vector = 7;
lpc2000_info->iap_max_stack = 208;
@ -533,7 +533,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank)
bank->sectors[i].is_protected = 1;
}
} else if (lpc2000_info->variant == lpc800) {
} else if (lpc2000_info->variant == LPC800) {
lpc2000_info->cmd51_dst_boundary = 64;
lpc2000_info->checksum_vector = 7;
lpc2000_info->iap_max_stack = 208; /* 148byte for LPC81x,208byte for LPC82x. */
@ -577,7 +577,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank)
bank->sectors[i].is_protected = 1;
}
} else if (lpc2000_info->variant == lpc1100) {
} else if (lpc2000_info->variant == LPC1100) {
lpc2000_info->cmd51_dst_boundary = 256;
lpc2000_info->checksum_vector = 7;
lpc2000_info->iap_max_stack = 128;
@ -590,9 +590,9 @@ static int lpc2000_build_sector_list(struct flash_bank *bank)
unsigned int large_sectors = 0;
unsigned int normal_sectors = bank->size / 4096;
if (normal_sectors > LPC11xx_REG_SECTORS) {
large_sectors = (normal_sectors - LPC11xx_REG_SECTORS) / 8;
normal_sectors = LPC11xx_REG_SECTORS;
if (normal_sectors > LPC11XX_REG_SECTORS) {
large_sectors = (normal_sectors - LPC11XX_REG_SECTORS) / 8;
normal_sectors = LPC11XX_REG_SECTORS;
}
bank->num_sectors = normal_sectors + large_sectors;
@ -601,13 +601,13 @@ static int lpc2000_build_sector_list(struct flash_bank *bank)
for (unsigned int i = 0; i < bank->num_sectors; i++) {
bank->sectors[i].offset = offset;
bank->sectors[i].size = (i < LPC11xx_REG_SECTORS ? 4 : 32) * 1024;
bank->sectors[i].size = (i < LPC11XX_REG_SECTORS ? 4 : 32) * 1024;
offset += bank->sectors[i].size;
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 1;
}
} else if (lpc2000_info->variant == lpc1500) {
} else if (lpc2000_info->variant == LPC1500) {
lpc2000_info->cmd51_dst_boundary = 256;
lpc2000_info->checksum_vector = 7;
lpc2000_info->iap_max_stack = 128;
@ -638,7 +638,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank)
bank->sectors[i].is_protected = 1;
}
} else if (lpc2000_info->variant == lpc54100) {
} else if (lpc2000_info->variant == LPC54100) {
lpc2000_info->cmd51_dst_boundary = 256;
lpc2000_info->checksum_vector = 7;
lpc2000_info->iap_max_stack = 128;
@ -697,18 +697,18 @@ static int lpc2000_iap_working_area_init(struct flash_bank *bank, struct working
/* write IAP code to working area */
switch (lpc2000_info->variant) {
case lpc800:
case lpc1100:
case lpc1500:
case lpc1700:
case lpc4300:
case lpc54100:
case lpc_auto:
case LPC800:
case LPC1100:
case LPC1500:
case LPC1700:
case LPC4300:
case LPC54100:
case LPC_AUTO:
target_buffer_set_u32(target, jump_gate, ARMV4_5_T_BX(12));
target_buffer_set_u32(target, jump_gate + 4, ARMV5_T_BKPT(0));
break;
case lpc2000_v1:
case lpc2000_v2:
case LPC2000_V1:
case LPC2000_V2:
target_buffer_set_u32(target, jump_gate, ARMV4_5_BX(12));
target_buffer_set_u32(target, jump_gate + 4, ARMV4_5_B(0xfffffe, 0));
break;
@ -740,28 +740,28 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo
uint32_t iap_entry_point = 0; /* to make compiler happier */
switch (lpc2000_info->variant) {
case lpc800:
case lpc1100:
case lpc1700:
case lpc_auto:
case LPC800:
case LPC1100:
case LPC1700:
case LPC_AUTO:
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_THREAD;
iap_entry_point = 0x1fff1ff1;
break;
case lpc1500:
case lpc54100:
case LPC1500:
case LPC54100:
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_THREAD;
iap_entry_point = 0x03000205;
break;
case lpc2000_v1:
case lpc2000_v2:
case LPC2000_V1:
case LPC2000_V2:
arm_algo.common_magic = ARM_COMMON_MAGIC;
arm_algo.core_mode = ARM_MODE_SVC;
arm_algo.core_state = ARM_STATE_ARM;
iap_entry_point = 0x7ffffff1;
break;
case lpc4300:
case LPC4300:
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_THREAD;
/* read out IAP entry point from ROM driver table at 0x10400100 */
@ -802,13 +802,13 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo
buf_set_u32(reg_params[2].value, 0, 32, iap_entry_point);
switch (lpc2000_info->variant) {
case lpc800:
case lpc1100:
case lpc1500:
case lpc1700:
case lpc4300:
case lpc54100:
case lpc_auto:
case LPC800:
case LPC1100:
case LPC1500:
case LPC1700:
case LPC4300:
case LPC54100:
case LPC_AUTO:
/* IAP stack */
init_reg_param(&reg_params[3], "sp", 32, PARAM_OUT);
buf_set_u32(reg_params[3].value, 0, 32,
@ -822,8 +822,8 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo
target_run_algorithm(target, 2, mem_params, 5, reg_params, iap_working_area->address, 0, 10000,
&armv7m_info);
break;
case lpc2000_v1:
case lpc2000_v2:
case LPC2000_V1:
case LPC2000_V2:
/* IAP stack */
init_reg_param(&reg_params[3], "sp_svc", 32, PARAM_OUT);
buf_set_u32(reg_params[3].value, 0, 32,
@ -879,7 +879,7 @@ static int lpc2000_iap_blank_check(struct flash_bank *bank, unsigned int first,
return retval;
struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
if (lpc2000_info->variant == lpc4300)
if (lpc2000_info->variant == LPC4300)
param_table[2] = lpc2000_info->lpc4300_bank;
for (unsigned int i = first; i <= last && retval == ERROR_OK; i++) {
@ -929,23 +929,23 @@ FLASH_BANK_COMMAND_HANDLER(lpc2000_flash_bank_command)
bank->driver_priv = lpc2000_info;
if (strcmp(CMD_ARGV[6], "lpc2000_v1") == 0) {
lpc2000_info->variant = lpc2000_v1;
lpc2000_info->variant = LPC2000_V1;
} else if (strcmp(CMD_ARGV[6], "lpc2000_v2") == 0) {
lpc2000_info->variant = lpc2000_v2;
lpc2000_info->variant = LPC2000_V2;
} else if (strcmp(CMD_ARGV[6], "lpc1700") == 0 || strcmp(CMD_ARGV[6], "lpc4000") == 0) {
lpc2000_info->variant = lpc1700;
lpc2000_info->variant = LPC1700;
} else if (strcmp(CMD_ARGV[6], "lpc1800") == 0 || strcmp(CMD_ARGV[6], "lpc4300") == 0) {
lpc2000_info->variant = lpc4300;
lpc2000_info->variant = LPC4300;
} else if (strcmp(CMD_ARGV[6], "lpc800") == 0) {
lpc2000_info->variant = lpc800;
lpc2000_info->variant = LPC800;
} else if (strcmp(CMD_ARGV[6], "lpc1100") == 0) {
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
} else if (strcmp(CMD_ARGV[6], "lpc1500") == 0) {
lpc2000_info->variant = lpc1500;
lpc2000_info->variant = LPC1500;
} else if (strcmp(CMD_ARGV[6], "lpc54100") == 0) {
lpc2000_info->variant = lpc54100;
lpc2000_info->variant = LPC54100;
} else if (strcmp(CMD_ARGV[6], "auto") == 0) {
lpc2000_info->variant = lpc_auto;
lpc2000_info->variant = LPC_AUTO;
} else {
LOG_ERROR("unknown LPC2000 variant: %s", CMD_ARGV[6]);
free(lpc2000_info);
@ -993,7 +993,7 @@ static int lpc2000_erase(struct flash_bank *bank, unsigned int first,
param_table[0] = first;
param_table[1] = last;
if (lpc2000_info->variant == lpc4300)
if (lpc2000_info->variant == LPC4300)
param_table[2] = lpc2000_info->lpc4300_bank;
else
param_table[2] = lpc2000_info->cclk;
@ -1006,7 +1006,7 @@ static int lpc2000_erase(struct flash_bank *bank, unsigned int first,
if (retval != ERROR_OK)
return retval;
if (lpc2000_info->variant == lpc4300)
if (lpc2000_info->variant == LPC4300)
/* Init IAP Anyway */
lpc2000_iap_call(bank, iap_working_area, 49, param_table, result_table);
@ -1030,7 +1030,7 @@ static int lpc2000_erase(struct flash_bank *bank, unsigned int first,
if (retval == ERROR_OK) {
/* Erase sectors */
param_table[2] = lpc2000_info->cclk;
if (lpc2000_info->variant == lpc4300)
if (lpc2000_info->variant == LPC4300)
param_table[3] = lpc2000_info->lpc4300_bank;
status_code = lpc2000_iap_call(bank, iap_working_area, 52, param_table, result_table);
@ -1134,7 +1134,7 @@ static int lpc2000_write(struct flash_bank *bank, const uint8_t *buffer, uint32_
uint32_t param_table[5] = {0};
uint32_t result_table[4];
if (lpc2000_info->variant == lpc4300)
if (lpc2000_info->variant == LPC4300)
/* Init IAP Anyway */
lpc2000_iap_call(bank, iap_working_area, 49, param_table, result_table);
@ -1149,7 +1149,7 @@ static int lpc2000_write(struct flash_bank *bank, const uint8_t *buffer, uint32_
param_table[0] = first_sector;
param_table[1] = last_sector;
if (lpc2000_info->variant == lpc4300)
if (lpc2000_info->variant == LPC4300)
param_table[2] = lpc2000_info->lpc4300_bank;
else
param_table[2] = lpc2000_info->cclk;
@ -1280,7 +1280,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
switch (part_id) {
case LPC1110_1:
case LPC1110_2:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 4 * 1024;
break;
@ -1296,7 +1296,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC11E11_101:
case LPC1311:
case LPC1311_1:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 8 * 1024;
break;
@ -1316,7 +1316,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC11U12_201_1:
case LPC11U12_201_2:
case LPC1342:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 16 * 1024;
break;
@ -1331,7 +1331,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC11U13_201_1:
case LPC11U13_201_2:
case LPC11U23_301:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 24 * 1024;
break;
@ -1359,18 +1359,18 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC1343:
case LPC1343_1:
case LPC1345:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 32 * 1024;
break;
case LPC1751_1:
case LPC1751_2:
lpc2000_info->variant = lpc1700;
lpc2000_info->variant = LPC1700;
bank->size = 32 * 1024;
break;
case LPC11U34_311:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 40 * 1024;
break;
@ -1378,12 +1378,12 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC11U34_421:
case LPC1316:
case LPC1346:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 48 * 1024;
break;
case LPC1114_333_1:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 56 * 1024;
break;
@ -1394,19 +1394,19 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC11U66:
case LPC1317:
case LPC1347:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 64 * 1024;
break;
case LPC1752:
case LPC4072:
lpc2000_info->variant = lpc1700;
lpc2000_info->variant = LPC1700;
bank->size = 64 * 1024;
break;
case LPC11E36_501:
case LPC11U36_401:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 96 * 1024;
break;
@ -1419,7 +1419,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC11E68:
case LPC11U67_1:
case LPC11U67_2:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 128 * 1024;
break;
@ -1427,13 +1427,13 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC1764:
case LPC1774:
case LPC4074:
lpc2000_info->variant = lpc1700;
lpc2000_info->variant = LPC1700;
bank->size = 128 * 1024;
break;
case LPC11U68_1:
case LPC11U68_2:
lpc2000_info->variant = lpc1100;
lpc2000_info->variant = LPC1100;
bank->size = 256 * 1024;
break;
@ -1445,7 +1445,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC1785:
case LPC1786:
case LPC4076:
lpc2000_info->variant = lpc1700;
lpc2000_info->variant = LPC1700;
bank->size = 256 * 1024;
break;
@ -1460,17 +1460,17 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC1788:
case LPC4078:
case LPC4088:
lpc2000_info->variant = lpc1700;
lpc2000_info->variant = LPC1700;
bank->size = 512 * 1024;
break;
case LPC810_021:
lpc2000_info->variant = lpc800;
lpc2000_info->variant = LPC800;
bank->size = 4 * 1024;
break;
case LPC811_001:
lpc2000_info->variant = lpc800;
lpc2000_info->variant = LPC800;
bank->size = 8 * 1024;
break;
@ -1480,13 +1480,13 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC812_101_3:
case LPC822_101:
case LPC822_101_1:
lpc2000_info->variant = lpc800;
lpc2000_info->variant = LPC800;
bank->size = 16 * 1024;
break;
case LPC824_201:
case LPC824_201_1:
lpc2000_info->variant = lpc800;
lpc2000_info->variant = LPC800;
bank->size = 32 * 1024;
break;
@ -1494,7 +1494,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case NHS3100:
case NHS3152:
case NHS3153:
lpc2000_info->variant = lpc800;
lpc2000_info->variant = LPC800;
bank->size = 30 * 1024;
break;
@ -1505,7 +1505,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
case LPC845_301_1:
case LPC845_301_2:
case LPC845_301_3:
lpc2000_info->variant = lpc800;
lpc2000_info->variant = LPC800;
bank->size = 64 * 1024;
break;
@ -1524,11 +1524,11 @@ static int lpc2000_probe(struct flash_bank *bank)
struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
if (!lpc2000_info->probed) {
if (lpc2000_info->variant == lpc_auto) {
if (lpc2000_info->variant == LPC_AUTO) {
status = lpc2000_auto_probe_flash(bank);
if (status != ERROR_OK)
return status;
} else if (lpc2000_info->variant == lpc1100 || lpc2000_info->variant == lpc1700) {
} else if (lpc2000_info->variant == LPC1100 || lpc2000_info->variant == LPC1700) {
status = get_lpc2000_part_id(bank, &part_id);
if (status == LPC2000_CMD_SUCCESS)
LOG_INFO("If auto-detection fails for this part, please email "
@ -1569,7 +1569,7 @@ COMMAND_HANDLER(lpc2000_handle_part_id_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (bank->target->state != TARGET_HALTED) {

12
src/flash/nor/lpc2900.c
View File

@ -487,7 +487,7 @@ COMMAND_HANDLER(lpc2900_handle_signature_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (bank->target->state != TARGET_HALTED) {
@ -522,7 +522,7 @@ COMMAND_HANDLER(lpc2900_handle_read_custom_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
@ -584,7 +584,7 @@ COMMAND_HANDLER(lpc2900_handle_password_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
@ -614,7 +614,7 @@ COMMAND_HANDLER(lpc2900_handle_write_custom_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
@ -713,7 +713,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
/* Get the bank descriptor */
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
@ -794,7 +794,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_jtag_command)
/* Get the bank descriptor */
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;

4
src/flash/nor/lpcspifi.c
View File

@ -66,7 +66,7 @@ FLASH_BANK_COMMAND_HANDLER(lpcspifi_flash_bank_command)
return ERROR_COMMAND_SYNTAX_ERROR;
lpcspifi_info = malloc(sizeof(struct lpcspifi_flash_bank));
if (lpcspifi_info == NULL) {
if (!lpcspifi_info) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}
@ -894,7 +894,7 @@ static int lpcspifi_probe(struct flash_bank *bank)
/* create and fill sectors array */
bank->num_sectors = lpcspifi_info->dev->size_in_bytes / sectorsize;
sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
if (sectors == NULL) {
if (!sectors) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}

28
src/flash/nor/max32xxx.c
View File

@ -302,8 +302,6 @@ static int max32xxx_erase(struct flash_bank *bank, unsigned int first,
max32xxx_flash_op_post(bank);
return ERROR_FLASH_OPERATION_FAILED;
}
bank->sectors[banknr].is_erased = 1;
}
if (!erased) {
@ -768,16 +766,12 @@ COMMAND_HANDLER(max32xxx_handle_mass_erase_command)
return ERROR_OK;
}
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (max32xxx_mass_erase(bank) == ERROR_OK) {
/* set all sectors as erased */
for (unsigned i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
if (max32xxx_mass_erase(bank) == ERROR_OK)
command_print(CMD, "max32xxx mass erase complete");
} else
else
command_print(CMD, "max32xxx mass erase failed");
return ERROR_OK;
@ -796,12 +790,12 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
}
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
info = bank->driver_priv;
/* Convert the range to the page numbers */
if (1 != sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr)) {
if (sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr) != 1) {
LOG_WARNING("Error parsing address");
command_print(CMD, "max32xxx protection_set <bank> <addr> <size>");
return ERROR_FAIL;
@ -809,7 +803,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
/* Mask off the top portion on the address */
addr = (addr & 0x0FFFFFFF);
if (1 != sscanf(CMD_ARGV[2], "0x%"SCNx32, &len)) {
if (sscanf(CMD_ARGV[2], "0x%"SCNx32, &len) != 1) {
LOG_WARNING("Error parsing length");
command_print(CMD, "max32xxx protection_set <bank> <addr> <size>");
return ERROR_FAIL;
@ -852,12 +846,12 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
}
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
info = bank->driver_priv;
/* Convert the range to the page numbers */
if (1 != sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr)) {
if (sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr) != 1) {
LOG_WARNING("Error parsing address");
command_print(CMD, "max32xxx protection_clr <bank> <addr> <size>");
return ERROR_FAIL;
@ -865,7 +859,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
/* Mask off the top portion on the address */
addr = (addr & 0x0FFFFFFF);
if (1 != sscanf(CMD_ARGV[2], "0x%"SCNx32, &len)) {
if (sscanf(CMD_ARGV[2], "0x%"SCNx32, &len) != 1) {
LOG_WARNING("Error parsing length");
command_print(CMD, "max32xxx protection_clr <bank> <addr> <size>");
return ERROR_FAIL;
@ -907,13 +901,13 @@ COMMAND_HANDLER(max32xxx_handle_protection_check_command)
}
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
info = bank->driver_priv;
/* Update the protection array */
retval = max32xxx_protect_check(bank);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_WARNING("Error updating the protection array");
return retval;
}

3
src/flash/nor/mdr.c
View File

@ -197,7 +197,6 @@ static int mdr_erase(struct flash_bank *bank, unsigned int first,
if (retval != ERROR_OK)
goto reset_pg_and_lock;
}
bank->sectors[i].is_erased = 1;
}
reset_pg_and_lock:
@ -328,7 +327,7 @@ static int mdr_write(struct flash_bank *bank, const uint8_t *buffer,
int rem = count % 4;
if (rem) {
new_buffer = malloc(count + rem);
if (new_buffer == NULL) {
if (!new_buffer) {
LOG_ERROR("odd number of bytes to write and no memory for padding buffer");
return ERROR_FAIL;
}

4
src/flash/nor/mrvlqspi.c
View File

@ -882,7 +882,7 @@ static int mrvlqspi_probe(struct flash_bank *bank)
/* create and fill sectors array */
bank->num_sectors = mrvlqspi_info->dev->size_in_bytes / sectorsize;
sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
if (sectors == NULL) {
if (!sectors) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}
@ -938,7 +938,7 @@ FLASH_BANK_COMMAND_HANDLER(mrvlqspi_flash_bank_command)
return ERROR_COMMAND_SYNTAX_ERROR;
mrvlqspi_info = malloc(sizeof(struct mrvlqspi_flash_bank));
if (mrvlqspi_info == NULL) {
if (!mrvlqspi_info) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}

138
src/flash/nor/msp432.c
View File

@ -63,7 +63,7 @@ static int msp432_device_type(uint32_t family_type, uint32_t device_id,
{
int device_type = MSP432_NO_TYPE;
if (MSP432E4 == family_type) {
if (family_type == MSP432E4) {
/* MSP432E4 device family */
if (device_id == 0x180C0002) {
@ -191,7 +191,7 @@ static int msp432_exec_cmd(struct target *target, struct msp432_algo_params
/* Write out parameters to target memory */
retval = target_write_buffer(target, ALGO_PARAMS_BASE_ADDR,
sizeof(struct msp432_algo_params), (uint8_t *)algo_params);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Write out command to target memory */
@ -209,9 +209,9 @@ static int msp432_wait_return_code(struct target *target)
int retval = ERROR_OK;
start_ms = timeval_ms();
while ((0 == return_code) || (FLASH_BUSY == return_code)) {
while ((return_code == 0) || (return_code == FLASH_BUSY)) {
retval = target_read_u32(target, ALGO_RETURN_CODE_ADDR, &return_code);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
elapsed_ms = timeval_ms() - start_ms;
@ -221,7 +221,7 @@ static int msp432_wait_return_code(struct target *target)
break;
};
if (FLASH_SUCCESS != return_code) {
if (return_code != FLASH_SUCCESS) {
LOG_ERROR("msp432: Flash operation failed: %s",
msp432_return_text(return_code));
return ERROR_FAIL;
@ -251,9 +251,9 @@ static int msp432_wait_inactive(struct target *target, uint32_t buffer)
}
start_ms = timeval_ms();
while (BUFFER_INACTIVE != status_code) {
while (status_code != BUFFER_INACTIVE) {
retval = target_read_u32(target, status_addr, &status_code);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
elapsed_ms = timeval_ms() - start_ms;
@ -263,7 +263,7 @@ static int msp432_wait_inactive(struct target *target, uint32_t buffer)
break;
};
if (BUFFER_INACTIVE != status_code) {
if (status_code != BUFFER_INACTIVE) {
LOG_ERROR(
"msp432: Flash operation failed: buffer not written to flash");
return ERROR_FAIL;
@ -286,7 +286,7 @@ static int msp432_init(struct flash_bank *bank)
/* Make sure we've probed the flash to get the device and size */
retval = msp432_auto_probe(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Choose appropriate flash helper algorithm */
@ -315,18 +315,18 @@ static int msp432_init(struct flash_bank *bank)
}
/* Issue warnings if this is a device we may not be able to flash */
if (MSP432P401X_GUESS == msp432_bank->device_type ||
MSP432P411X_GUESS == msp432_bank->device_type) {
if (msp432_bank->device_type == MSP432P401X_GUESS ||
msp432_bank->device_type == MSP432P411X_GUESS) {
/* Explicit device type check failed. Report this. */
LOG_WARNING(
"msp432: Unrecognized MSP432P4 Device ID and Hardware "
"Rev (%04" PRIX32 ", %02" PRIX32 ")", msp432_bank->device_id,
msp432_bank->hardware_rev);
} else if (MSP432P401X_DEPR == msp432_bank->device_type) {
} else if (msp432_bank->device_type == MSP432P401X_DEPR) {
LOG_WARNING(
"msp432: MSP432P401x pre-production device (deprecated "
"silicon)\n" SUPPORT_MESSAGE);
} else if (MSP432E4X_GUESS == msp432_bank->device_type) {
} else if (msp432_bank->device_type == MSP432E4X_GUESS) {
/* Explicit device type check failed. Report this. */
LOG_WARNING(
"msp432: Unrecognized MSP432E4 DID0 and DID1 values "
@ -335,21 +335,21 @@ static int msp432_init(struct flash_bank *bank)
}
/* Check for working area to use for flash helper algorithm */
if (NULL != msp432_bank->working_area)
if (msp432_bank->working_area)
target_free_working_area(target, msp432_bank->working_area);
retval = target_alloc_working_area(target, ALGO_WORKING_SIZE,
&msp432_bank->working_area);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Confirm the defined working address is the area we need to use */
if (ALGO_BASE_ADDR != msp432_bank->working_area->address)
if (msp432_bank->working_area->address != ALGO_BASE_ADDR)
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
/* Write flash helper algorithm into target memory */
retval = target_write_buffer(target, ALGO_BASE_ADDR, loader_size,
loader_code);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Initialize the ARMv7 specific info to run the algorithm */
@ -362,7 +362,7 @@ static int msp432_init(struct flash_bank *bank)
/* Write out parameters to target memory */
retval = target_write_buffer(target, ALGO_PARAMS_BASE_ADDR,
sizeof(algo_params), (uint8_t *)&algo_params);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Initialize stack pointer for flash helper algorithm */
@ -373,7 +373,7 @@ static int msp432_init(struct flash_bank *bank)
retval = target_start_algorithm(target, 0, 0, 1, reg_params,
algo_entry_addr, 0, &msp432_bank->armv7m_info);
destroy_reg_param(&reg_params[0]);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("msp432: Failed to start flash helper algorithm");
return retval;
}
@ -385,7 +385,7 @@ static int msp432_init(struct flash_bank *bank)
/* Issue the init command to the flash helper algorithm */
retval = msp432_exec_cmd(target, &algo_params, FLASH_INIT);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = msp432_wait_return_code(target);
@ -406,7 +406,7 @@ static int msp432_quit(struct flash_bank *bank)
/* Issue the exit command to the flash helper algorithm */
retval = msp432_exec_cmd(target, &algo_params, FLASH_EXIT);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
(void)msp432_wait_return_code(target);
@ -432,13 +432,13 @@ static int msp432_mass_erase(struct flash_bank *bank, bool all)
int retval;
if (TARGET_HALTED != target->state) {
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
retval = msp432_init(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Initialize algorithm parameters to default values */
@ -452,19 +452,19 @@ static int msp432_mass_erase(struct flash_bank *bank, bool all)
/* Issue the mass erase command to the flash helper algorithm */
retval = msp432_exec_cmd(target, &algo_params, FLASH_MASS_ERASE);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
(void)msp432_quit(bank);
return retval;
}
retval = msp432_wait_return_code(target);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
(void)msp432_quit(bank);
return retval;
}
retval = msp432_quit(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
return retval;
@ -489,9 +489,9 @@ COMMAND_HANDLER(msp432_mass_erase_command)
all = false;
} else if (2 == CMD_ARGC) {
/* Check argument for how much to erase */
if (0 == strcmp(CMD_ARGV[1], "main"))
if (strcmp(CMD_ARGV[1], "main") == 0)
all = false;
else if (0 == strcmp(CMD_ARGV[1], "all"))
else if (strcmp(CMD_ARGV[1], "all") == 0)
all = true;
else
return ERROR_COMMAND_SYNTAX_ERROR;
@ -501,16 +501,16 @@ COMMAND_HANDLER(msp432_mass_erase_command)
msp432_bank = bank->driver_priv;
if (MSP432E4 == msp432_bank->family_type) {
if (msp432_bank->family_type == MSP432E4) {
/* MSP432E4 does not have main vs info regions, ignore "all" */
all = false;
}
retval = msp432_mass_erase(bank, all);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (MSP432E4 == msp432_bank->family_type) {
if (msp432_bank->family_type == MSP432E4) {
/* MSP432E4 does not have main vs info regions */
LOG_INFO("msp432: Mass erase of flash is complete");
} else {
@ -537,15 +537,15 @@ COMMAND_HANDLER(msp432_bsl_command)
msp432_bank = bank->driver_priv;
if (MSP432E4 == msp432_bank->family_type) {
if (msp432_bank->family_type == MSP432E4) {
LOG_WARNING("msp432: MSP432E4 does not have a BSL region");
return ERROR_OK;
}
if (2 == CMD_ARGC) {
if (0 == strcmp(CMD_ARGV[1], "lock"))
if (strcmp(CMD_ARGV[1], "lock") == 0)
msp432_bank->unlock_bsl = false;
else if (0 == strcmp(CMD_ARGV[1], "unlock"))
else if (strcmp(CMD_ARGV[1], "unlock") == 0)
msp432_bank->unlock_bsl = true;
else
return ERROR_COMMAND_SYNTAX_ERROR;
@ -569,7 +569,7 @@ FLASH_BANK_COMMAND_HANDLER(msp432_flash_bank_command)
/* Create shared private struct for flash banks */
msp432_bank = malloc(sizeof(struct msp432_bank));
if (NULL == msp432_bank)
if (!msp432_bank)
return ERROR_FAIL;
/* Initialize private flash information */
@ -597,12 +597,12 @@ static int msp432_erase(struct flash_bank *bank, unsigned int first,
struct msp432_bank *msp432_bank = bank->driver_priv;
struct msp432_algo_params algo_params;
bool is_main = FLASH_BASE == bank->base;
bool is_info = P4_FLASH_INFO_BASE == bank->base;
bool is_main = bank->base == FLASH_BASE;
bool is_info = bank->base == P4_FLASH_INFO_BASE;
int retval;
if (TARGET_HALTED != target->state) {
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -614,7 +614,7 @@ static int msp432_erase(struct flash_bank *bank, unsigned int first,
}
retval = msp432_init(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Initialize algorithm parameters to default values */
@ -646,20 +646,20 @@ static int msp432_erase(struct flash_bank *bank, unsigned int first,
/* Issue the sector erase command to the flash helper algorithm */
retval = msp432_exec_cmd(target, &algo_params, FLASH_SECTOR_ERASE);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
(void)msp432_quit(bank);
return retval;
}
retval = msp432_wait_return_code(target);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
(void)msp432_quit(bank);
return retval;
}
}
retval = msp432_quit(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
return retval;
@ -676,11 +676,11 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
long long start_ms;
long long elapsed_ms;
bool is_info = P4_FLASH_INFO_BASE == bank->base;
bool is_info = bank->base == P4_FLASH_INFO_BASE;
int retval;
if (TARGET_HALTED != target->state) {
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@ -705,7 +705,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
if (offset < start) {
uint32_t start_count = MIN(start - offset, count);
retval = msp432_write(bank, buffer, offset, start_count);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
}
/* Send a request for anything after read-only sectors */
@ -723,7 +723,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
}
retval = msp432_init(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* Initialize algorithm parameters to default values */
@ -742,7 +742,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
/* Set up flash helper algorithm to continuous flash mode */
retval = msp432_exec_cmd(target, &algo_params, FLASH_CONTINUOUS);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
(void)msp432_quit(bank);
return retval;
}
@ -758,7 +758,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
/* Put next block of data to flash into buffer */
retval = target_write_buffer(target, ALGO_BUFFER1_ADDR, size, buffer);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("Unable to write data to target memory");
(void)msp432_quit(bank);
return ERROR_FLASH_OPERATION_FAILED;
@ -767,13 +767,13 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
/* Signal the flash helper algorithm that data is ready to flash */
retval = target_write_u32(target, ALGO_BUFFER1_STATUS_ADDR,
data_ready);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
(void)msp432_quit(bank);
return ERROR_FLASH_OPERATION_FAILED;
}
retval = msp432_wait_inactive(target, 1);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
(void)msp432_quit(bank);
return retval;
}
@ -788,13 +788,13 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
/* Confirm that the flash helper algorithm is finished */
retval = msp432_wait_return_code(target);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
(void)msp432_quit(bank);
return retval;
}
retval = msp432_quit(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
return retval;
@ -812,8 +812,8 @@ static int msp432_probe(struct flash_bank *bank)
uint32_t size;
unsigned int num_sectors;
bool is_main = FLASH_BASE == bank->base;
bool is_info = P4_FLASH_INFO_BASE == bank->base;
bool is_main = bank->base == FLASH_BASE;
bool is_info = bank->base == P4_FLASH_INFO_BASE;
int retval;
@ -826,21 +826,21 @@ static int msp432_probe(struct flash_bank *bank)
/* Read the flash size register to determine this is a P4 or not */
/* MSP432P4s will return the size of flash. MSP432E4s will return zero */
retval = target_read_u32(target, P4_FLASH_MAIN_SIZE_REG, &size);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (0 == size) {
if (size == 0) {
/* This is likely an MSP432E4 */
msp432_bank->family_type = MSP432E4;
retval = target_read_u32(target, E4_DID0_REG, &device_id);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
msp432_bank->device_id = device_id;
retval = target_read_u32(target, E4_DID1_REG, &hardware_rev);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
msp432_bank->hardware_rev = hardware_rev;
@ -849,13 +849,13 @@ static int msp432_probe(struct flash_bank *bank)
msp432_bank->family_type = MSP432P4;
retval = target_read_u32(target, P4_DEVICE_ID_REG, &device_id);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
msp432_bank->device_id = device_id & 0xFFFF;
retval = target_read_u32(target, P4_HARDWARE_REV_REG, &hardware_rev);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
msp432_bank->hardware_rev = hardware_rev & 0xFF;
@ -864,11 +864,11 @@ static int msp432_probe(struct flash_bank *bank)
msp432_bank->device_type = msp432_device_type(msp432_bank->family_type,
msp432_bank->device_id, msp432_bank->hardware_rev);
if (MSP432P4 == msp432_bank->family_type) {
if (msp432_bank->family_type == MSP432P4) {
/* Set up MSP432P4 specific flash parameters */
if (is_main) {
retval = target_read_u32(target, P4_FLASH_MAIN_SIZE_REG, &size);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
sector_length = P4_SECTOR_LENGTH;
@ -878,7 +878,7 @@ static int msp432_probe(struct flash_bank *bank)
msp432_bank->device_type == MSP432P411X_GUESS) {
/* MSP432P411x has an info size register, use that for size */
retval = target_read_u32(target, P4_FLASH_INFO_SIZE_REG, &size);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
} else {
/* All other MSP432P401x devices have fixed info region size */
@ -907,7 +907,7 @@ static int msp432_probe(struct flash_bank *bank)
if (num_sectors > 0) {
bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
if (NULL == bank->sectors)
if (!bank->sectors)
return ERROR_FAIL;
}
@ -933,7 +933,7 @@ static int msp432_probe(struct flash_bank *bank)
if (is_main && MSP432P4 == msp432_bank->family_type) {
/* Create the info flash bank needed by MSP432P4 variants */
struct flash_bank *info = calloc(sizeof(struct flash_bank), 1);
if (NULL == info)
if (!info)
return ERROR_FAIL;
/* Create a name for the info bank, append "_1" to main name */
@ -960,8 +960,8 @@ static int msp432_auto_probe(struct flash_bank *bank)
{
struct msp432_bank *msp432_bank = bank->driver_priv;
bool is_main = FLASH_BASE == bank->base;
bool is_info = P4_FLASH_INFO_BASE == bank->base;
bool is_main = bank->base == FLASH_BASE;
bool is_info = bank->base == P4_FLASH_INFO_BASE;
int retval = ERROR_OK;
@ -981,7 +981,7 @@ static int msp432_info(struct flash_bank *bank, struct command_invocation *cmd)
switch (msp432_bank->device_type) {
case MSP432P401X_DEPR:
if (0xFFFF == msp432_bank->device_id) {
if (msp432_bank->device_id == 0xFFFF) {
/* Very early pre-production silicon currently deprecated */
command_print_sameline(cmd, "MSP432P401x pre-production device (deprecated silicon)\n"
SUPPORT_MESSAGE);
@ -1030,7 +1030,7 @@ static int msp432_protect_check(struct flash_bank *bank)
static void msp432_flash_free_driver_priv(struct flash_bank *bank)
{
bool is_main = FLASH_BASE == bank->base;
bool is_main = bank->base == FLASH_BASE;
/* A single private struct is shared between main and info banks */
/* Only free it on the call for main bank */

4
src/flash/nor/niietcm4.c
View File

@ -1206,8 +1206,6 @@ static int niietcm4_erase(struct flash_bank *bank, unsigned int first,
retval = niietcm4_opstatus_check(bank);
if (retval != ERROR_OK)
return retval;
bank->sectors[i].is_erased = 1;
}
return retval;
@ -1394,7 +1392,7 @@ static int niietcm4_write(struct flash_bank *bank, const uint8_t *buffer,
int rem = count % 16;
if (rem) {
new_buffer = malloc(count + 16 - rem);
if (new_buffer == NULL) {
if (!new_buffer) {
LOG_ERROR("Odd number of words to write and no memory for padding buffer");
return ERROR_FAIL;
}

22
src/flash/nor/non_cfi.c
View File

@ -536,17 +536,17 @@ void cfi_fixup_non_cfi(struct flash_bank *bank)
pri_ext->major_version = '1';
pri_ext->minor_version = '0';
pri_ext->SiliconRevision = 0x0;
pri_ext->EraseSuspend = 0x0;
pri_ext->BlkProt = 0x0;
pri_ext->TmpBlkUnprotect = 0x0;
pri_ext->BlkProtUnprot = 0x0;
pri_ext->SimultaneousOps = 0x0;
pri_ext->BurstMode = 0x0;
pri_ext->PageMode = 0x0;
pri_ext->VppMin = 0x0;
pri_ext->VppMax = 0x0;
pri_ext->TopBottom = 0x0;
pri_ext->silicon_revision = 0x0;
pri_ext->erase_suspend = 0x0;
pri_ext->blk_prot = 0x0;
pri_ext->tmp_blk_unprotected = 0x0;
pri_ext->blk_prot_unprot = 0x0;
pri_ext->simultaneous_ops = 0x0;
pri_ext->burst_mode = 0x0;
pri_ext->page_mode = 0x0;
pri_ext->vpp_min = 0x0;
pri_ext->vpp_max = 0x0;
pri_ext->top_bottom = 0x0;
pri_ext->_unlock1 = 0x5555;
pri_ext->_unlock2 = 0x2AAA;

16
src/flash/nor/nrf5.c
View File

@ -293,7 +293,7 @@ static bool nrf5_bank_is_probed(const struct flash_bank *bank)
{
struct nrf5_bank *nbank = bank->driver_priv;
assert(nbank != NULL);
assert(nbank);
return nbank->probed;
}
@ -444,7 +444,7 @@ static int nrf5_protect_check_clenr0(struct flash_bank *bank)
struct nrf5_bank *nbank = bank->driver_priv;
struct nrf5_info *chip = nbank->chip;
assert(chip != NULL);
assert(chip);
res = target_read_u32(chip->target, NRF51_FICR_CLENR0,
&clenr0);
@ -474,7 +474,7 @@ static int nrf5_protect_check_bprot(struct flash_bank *bank)
struct nrf5_bank *nbank = bank->driver_priv;
struct nrf5_info *chip = nbank->chip;
assert(chip != NULL);
assert(chip);
static uint32_t nrf5_bprot_offsets[4] = { 0x600, 0x604, 0x610, 0x614 };
uint32_t bprot_reg = 0;
@ -505,7 +505,7 @@ static int nrf5_protect_check(struct flash_bank *bank)
struct nrf5_bank *nbank = bank->driver_priv;
struct nrf5_info *chip = nbank->chip;
assert(chip != NULL);
assert(chip);
if (chip->features & NRF5_FEATURE_BPROT)
return nrf5_protect_check_bprot(bank);
@ -1133,7 +1133,7 @@ static void nrf5_free_driver_priv(struct flash_bank *bank)
{
struct nrf5_bank *nbank = bank->driver_priv;
struct nrf5_info *chip = nbank->chip;
if (chip == NULL)
if (!chip)
return;
chip->refcount--;
@ -1197,7 +1197,7 @@ FLASH_BANK_COMMAND_HANDLER(nrf5_flash_bank_command)
nbank = &chip->bank[1];
break;
}
assert(nbank != NULL);
assert(nbank);
chip->refcount++;
nbank->chip = chip;
@ -1218,7 +1218,7 @@ COMMAND_HANDLER(nrf5_handle_mass_erase_command)
if (res != ERROR_OK)
return res;
assert(bank != NULL);
assert(bank);
struct nrf5_info *chip;
@ -1265,7 +1265,7 @@ COMMAND_HANDLER(nrf5_handle_info_command)
if (res != ERROR_OK)
return res;
assert(bank != NULL);
assert(bank);
struct nrf5_info *chip;

12
src/flash/nor/numicro.c
View File

@ -151,7 +151,7 @@ struct numicro_cpu_type {
{NUMICRO_CONFIG_BASE, 1024} }
static const struct numicro_cpu_type NuMicroParts[] = {
static const struct numicro_cpu_type numicro_parts[] = {
/*PART NO*/ /*PART ID*/ /*Banks*/
/* NUC100 Version B */
{"NUC100LD2BN", 0x10010004, NUMICRO_BANKS_NUC100(64*1024)},
@ -1386,7 +1386,7 @@ static int numicro_writeblock(struct flash_bank *bank, const uint8_t *buffer,
init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT); /* number of words to program */
struct armv7m_common *armv7m = target_to_armv7m(target);
if (armv7m == NULL) {
if (!armv7m) {
/* something is very wrong if armv7m is NULL */
LOG_ERROR("unable to get armv7m target");
return retval;
@ -1532,8 +1532,6 @@ static int numicro_erase(struct flash_bank *bank, unsigned int first,
retval = target_write_u32(target, NUMICRO_FLASH_ISPCON, (status | ISPCON_ISPFF));
if (retval != ERROR_OK)
return retval;
} else {
bank->sectors[i].is_erased = 1;
}
}
@ -1648,9 +1646,9 @@ static int numicro_get_cpu_type(struct target *target, const struct numicro_cpu_
LOG_INFO("Device ID: 0x%08" PRIx32 "", part_id);
/* search part numbers */
for (size_t i = 0; i < ARRAY_SIZE(NuMicroParts); i++) {
if (part_id == NuMicroParts[i].partid) {
*cpu = &NuMicroParts[i];
for (size_t i = 0; i < ARRAY_SIZE(numicro_parts); i++) {
if (part_id == numicro_parts[i].partid) {
*cpu = &numicro_parts[i];
LOG_INFO("Device Name: %s", (*cpu)->partname);
return ERROR_OK;
}

63
src/flash/nor/pic32mx.c
View File

@ -46,11 +46,11 @@
* Note: These macros only work for KSEG0/KSEG1 addresses.
*/
#define Virt2Phys(v) ((v) & 0x1FFFFFFF)
#define virt2phys(v) ((v) & 0x1FFFFFFF)
/* pic32mx configuration register locations */
#define PIC32MX_DEVCFG0_1xx_2xx 0xBFC00BFC
#define PIC32MX_DEVCFG0_1XX_2XX 0xBFC00BFC
#define PIC32MX_DEVCFG0 0xBFC02FFC
#define PIC32MX_DEVCFG1 0xBFC02FF8
#define PIC32MX_DEVCFG2 0xBFC02FF4
@ -91,8 +91,8 @@
#define NVMKEY1 0xAA996655
#define NVMKEY2 0x556699AA
#define MX_1xx_2xx 1 /* PIC32mx1xx/2xx */
#define MX_17x_27x 2 /* PIC32mx17x/27x */
#define MX_1XX_2XX 1 /* PIC32mx1xx/2xx */
#define MX_17X_27X 2 /* PIC32mx17x/27x */
struct pic32mx_flash_bank {
bool probed;
@ -279,9 +279,9 @@ static int pic32mx_protect_check(struct flash_bank *bank)
}
switch (pic32mx_info->dev_type) {
case MX_1xx_2xx:
case MX_17x_27x:
config0_address = PIC32MX_DEVCFG0_1xx_2xx;
case MX_1XX_2XX:
case MX_17X_27X:
config0_address = PIC32MX_DEVCFG0_1XX_2XX;
break;
default:
config0_address = PIC32MX_DEVCFG0;
@ -292,7 +292,7 @@ static int pic32mx_protect_check(struct flash_bank *bank)
if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */
num_pages = 0xffff; /* All pages protected */
else if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
else if (virt2phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
if (devcfg0 & (1 << 24))
num_pages = 0; /* All pages unprotected */
else
@ -300,10 +300,10 @@ static int pic32mx_protect_check(struct flash_bank *bank)
} else {
/* pgm flash */
switch (pic32mx_info->dev_type) {
case MX_1xx_2xx:
case MX_1XX_2XX:
num_pages = (~devcfg0 >> 10) & 0x7f;
break;
case MX_17x_27x:
case MX_17X_27X:
num_pages = (~devcfg0 >> 10) & 0x1ff;
break;
default:
@ -332,7 +332,7 @@ static int pic32mx_erase(struct flash_bank *bank, unsigned int first,
}
if ((first == 0) && (last == (bank->num_sectors - 1))
&& (Virt2Phys(bank->base) == PIC32MX_PHYS_PGM_FLASH)) {
&& (virt2phys(bank->base) == PIC32MX_PHYS_PGM_FLASH)) {
/* this will only erase the Program Flash (PFM), not the Boot Flash (BFM)
* we need to use the MTAP to perform a full erase */
LOG_DEBUG("Erasing entire program flash");
@ -345,7 +345,7 @@ static int pic32mx_erase(struct flash_bank *bank, unsigned int first,
}
for (unsigned int i = first; i <= last; i++) {
target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(bank->base + bank->sectors[i].offset));
target_write_u32(target, PIC32MX_NVMADDR, virt2phys(bank->base + bank->sectors[i].offset));
status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);
@ -353,7 +353,6 @@ static int pic32mx_erase(struct flash_bank *bank, unsigned int first,
return ERROR_FLASH_OPERATION_FAILED;
if (status & NVMCON_LVDERR)
return ERROR_FLASH_OPERATION_FAILED;
bank->sectors[i].is_erased = 1;
}
return ERROR_OK;
@ -465,8 +464,8 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer,
/* Change values for counters and row size, depending on variant */
switch (pic32mx_info->dev_type) {
case MX_1xx_2xx:
case MX_17x_27x:
case MX_1XX_2XX:
case MX_17X_27X:
/* 128 byte row */
pic32mx_flash_write_code[8] = 0x2CD30020;
pic32mx_flash_write_code[14] = 0x24840080;
@ -515,7 +514,7 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer,
uint8_t *new_buffer = NULL;
if (row_offset && (count >= (row_size / 4))) {
new_buffer = malloc(buffer_size);
if (new_buffer == NULL) {
if (!new_buffer) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
}
@ -548,8 +547,8 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer,
break;
}
buf_set_u32(reg_params[0].value, 0, 32, Virt2Phys(source->address));
buf_set_u32(reg_params[1].value, 0, 32, Virt2Phys(address));
buf_set_u32(reg_params[0].value, 0, 32, virt2phys(source->address));
buf_set_u32(reg_params[1].value, 0, 32, virt2phys(address));
buf_set_u32(reg_params[2].value, 0, 32, thisrun_count + row_offset / 4);
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
@ -599,7 +598,7 @@ static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_
{
struct target *target = bank->target;
target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(address));
target_write_u32(target, PIC32MX_NVMADDR, virt2phys(address));
target_write_u32(target, PIC32MX_NVMDATA, word);
return pic32mx_nvm_exec(bank, NVMCON_OP_WORD_PROG, 5);
@ -714,17 +713,17 @@ static int pic32mx_probe(struct flash_bank *bank)
}
/* Check for PIC32mx1xx/2xx */
for (i = 0; pic32mx_devs[i].name != NULL; i++) {
for (i = 0; pic32mx_devs[i].name; i++) {
if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
if ((pic32mx_devs[i].name[0] == '1') || (pic32mx_devs[i].name[0] == '2'))
pic32mx_info->dev_type = (pic32mx_devs[i].name[1] == '7') ? MX_17x_27x : MX_1xx_2xx;
pic32mx_info->dev_type = (pic32mx_devs[i].name[1] == '7') ? MX_17X_27X : MX_1XX_2XX;
break;
}
}
switch (pic32mx_info->dev_type) {
case MX_1xx_2xx:
case MX_17x_27x:
case MX_1XX_2XX:
case MX_17X_27X:
page_size = 1024;
break;
default:
@ -732,7 +731,7 @@ static int pic32mx_probe(struct flash_bank *bank)
break;
}
if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
if (virt2phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
/* 0x1FC00000: Boot flash size */
#if 0
/* for some reason this register returns 8k for the boot bank size
@ -745,8 +744,8 @@ static int pic32mx_probe(struct flash_bank *bank)
#else
/* fixed 12k boot bank - see comments above */
switch (pic32mx_info->dev_type) {
case MX_1xx_2xx:
case MX_17x_27x:
case MX_1XX_2XX:
case MX_17X_27X:
num_pages = (3 * 1024);
break;
default:
@ -758,8 +757,8 @@ static int pic32mx_probe(struct flash_bank *bank)
/* read the flash size from the device */
if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) {
switch (pic32mx_info->dev_type) {
case MX_1xx_2xx:
case MX_17x_27x:
case MX_1XX_2XX:
case MX_17X_27X:
LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 32k flash");
num_pages = (32 * 1024);
break;
@ -819,14 +818,14 @@ static int pic32mx_info(struct flash_bank *bank, struct command_invocation *cmd)
}
int i;
for (i = 0; pic32mx_devs[i].name != NULL; i++) {
for (i = 0; pic32mx_devs[i].name; i++) {
if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
command_print_sameline(cmd, "PIC32MX%s", pic32mx_devs[i].name);
break;
}
}
if (pic32mx_devs[i].name == NULL)
if (!pic32mx_devs[i].name)
command_print_sameline(cmd, "Unknown");
command_print_sameline(cmd, " Ver: 0x%02x",
@ -848,7 +847,7 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 2, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (address < bank->base || address >= (bank->base + bank->size)) {
@ -885,7 +884,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
target = bank->target;

21
src/flash/nor/psoc4.c
View File

@ -320,7 +320,7 @@ static int psoc4_sysreq(struct flash_bank *bank, uint8_t cmd,
sysreq_wait_algorithm->address + sysreq_wait_algorithm->size);
struct armv7m_common *armv7m = target_to_armv7m(target);
if (armv7m == NULL) {
if (!armv7m) {
/* something is very wrong if armv7m is NULL */
LOG_ERROR("unable to get armv7m target");
retval = ERROR_FAIL;
@ -520,16 +520,9 @@ static int psoc4_mass_erase(struct flash_bank *bank)
/* Call "Erase All" system ROM API */
uint32_t param = 0;
retval = psoc4_sysreq(bank, PSOC4_CMD_ERASE_ALL,
return psoc4_sysreq(bank, PSOC4_CMD_ERASE_ALL,
0,
&param, sizeof(param), NULL);
if (retval == ERROR_OK)
/* set all sectors as erased */
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
return retval;
}
@ -576,7 +569,7 @@ static int psoc4_protect(struct flash_bank *bank, int set, unsigned int first,
int prot_sz = num_bits / 8;
sysrq_buffer = malloc(param_sz + prot_sz);
if (sysrq_buffer == NULL) {
if (!sysrq_buffer) {
LOG_ERROR("no memory for row buffer");
return ERROR_FAIL;
}
@ -624,7 +617,7 @@ COMMAND_HANDLER(psoc4_handle_flash_autoerase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
@ -658,7 +651,7 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer,
return retval;
sysrq_buffer = malloc(param_sz + psoc4_info->row_size);
if (sysrq_buffer == NULL) {
if (!sysrq_buffer) {
LOG_ERROR("no memory for row buffer");
return ERROR_FAIL;
}
@ -833,7 +826,7 @@ static int psoc4_probe(struct flash_bank *bank)
bank->size = num_rows * row_size;
bank->num_sectors = num_rows;
bank->sectors = alloc_block_array(0, row_size, num_rows);
if (bank->sectors == NULL)
if (!bank->sectors)
return ERROR_FAIL;
LOG_DEBUG("flash bank set %" PRIu32 " rows", num_rows);
@ -898,7 +891,7 @@ COMMAND_HANDLER(psoc4_handle_mass_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = psoc4_mass_erase(bank);

24
src/flash/nor/psoc5lp.c
View File

@ -86,15 +86,15 @@
#define PM_ACT_CFG0_EN_CLK_SPC (1 << 3)
#define PHUB_CHx_BASIC_CFG_EN (1 << 0)
#define PHUB_CHx_BASIC_CFG_WORK_SEP (1 << 5)
#define PHUB_CHX_BASIC_CFG_EN (1 << 0)
#define PHUB_CHX_BASIC_CFG_WORK_SEP (1 << 5)
#define PHUB_CHx_ACTION_CPU_REQ (1 << 0)
#define PHUB_CHX_ACTION_CPU_REQ (1 << 0)
#define PHUB_CFGMEMx_CFG0 (1 << 7)
#define PHUB_CFGMEMX_CFG0 (1 << 7)
#define PHUB_TDMEMx_ORIG_TD0_NEXT_TD_PTR_LAST (0xff << 16)
#define PHUB_TDMEMx_ORIG_TD0_INC_SRC_ADDR (1 << 24)
#define PHUB_TDMEMX_ORIG_TD0_NEXT_TD_PTR_LAST (0xff << 16)
#define PHUB_TDMEMX_ORIG_TD0_INC_SRC_ADDR (1 << 24)
#define NVL_3_ECCEN (1 << 3)
@ -1113,7 +1113,7 @@ static int psoc5lp_erase_check(struct flash_bank *bank)
struct target_memory_check_block *block_array;
block_array = malloc(num_sectors * sizeof(struct target_memory_check_block));
if (block_array == NULL)
if (!block_array)
return ERROR_FAIL;
for (unsigned int i = 0; i < num_sectors; i++) {
@ -1289,13 +1289,13 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer,
retval = target_write_u32(target,
even_row ? PHUB_CH0_BASIC_CFG : PHUB_CH1_BASIC_CFG,
PHUB_CHx_BASIC_CFG_WORK_SEP | PHUB_CHx_BASIC_CFG_EN);
PHUB_CHX_BASIC_CFG_WORK_SEP | PHUB_CHX_BASIC_CFG_EN);
if (retval != ERROR_OK)
goto err_dma;
retval = target_write_u32(target,
even_row ? PHUB_CFGMEM0_CFG0 : PHUB_CFGMEM1_CFG0,
PHUB_CFGMEMx_CFG0);
PHUB_CFGMEMX_CFG0);
if (retval != ERROR_OK)
goto err_dma;
@ -1307,8 +1307,8 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer,
retval = target_write_u32(target,
even_row ? PHUB_TDMEM0_ORIG_TD0 : PHUB_TDMEM1_ORIG_TD0,
PHUB_TDMEMx_ORIG_TD0_INC_SRC_ADDR |
PHUB_TDMEMx_ORIG_TD0_NEXT_TD_PTR_LAST |
PHUB_TDMEMX_ORIG_TD0_INC_SRC_ADDR |
PHUB_TDMEMX_ORIG_TD0_NEXT_TD_PTR_LAST |
((SPC_OPCODE_LEN + 1 + row_size + 3 + SPC_OPCODE_LEN + 5) & 0xfff));
if (retval != ERROR_OK)
goto err_dma;
@ -1325,7 +1325,7 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer,
retval = target_write_u32(target,
even_row ? PHUB_CH0_ACTION : PHUB_CH1_ACTION,
PHUB_CHx_ACTION_CPU_REQ);
PHUB_CHX_ACTION_CPU_REQ);
if (retval != ERROR_OK)
goto err_dma_action;
}

4
src/flash/nor/psoc6.c
View File

@ -744,9 +744,6 @@ static int psoc6_erase(struct flash_bank *bank, unsigned int first,
if (hr != ERROR_OK)
goto exit_free_wa;
for (unsigned int i = first; i < first + rows_in_sector; i++)
bank->sectors[i].is_erased = 1;
first += rows_in_sector;
} else {
/* Perform Row Erase otherwise */
@ -754,7 +751,6 @@ static int psoc6_erase(struct flash_bank *bank, unsigned int first,
if (hr != ERROR_OK)
goto exit_free_wa;
bank->sectors[first].is_erased = 1;
first += 1;
}
}

4
src/flash/nor/sfdp.c
View File

@ -99,7 +99,7 @@ int spi_sfdp(struct flash_bank *bank, struct flash_device *dev,
nph = ((header.revision >> 16) & 0xFF) + 1;
LOG_DEBUG("parameter headers: %d", nph);
pheaders = malloc(sizeof(struct sfdp_phdr) * nph);
if (pheaders == NULL) {
if (!pheaders) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}
@ -119,7 +119,7 @@ int spi_sfdp(struct flash_bank *bank, struct flash_device *dev,
/* retrieve parameter table */
ptable = malloc(words << 2);
if (ptable == NULL) {
if (!ptable) {
LOG_ERROR("not enough memory");
retval = ERROR_FAIL;
goto err;

10
src/flash/nor/sim3x.c
View File

@ -511,7 +511,7 @@ static int sim3x_flash_write(struct flash_bank *bank, const uint8_t *buffer, uin
count++;
new_buffer = malloc(count);
if (new_buffer == NULL) {
if (!new_buffer) {
LOG_ERROR("odd number of bytes to write and no memory "
"for padding buffer");
return ERROR_FAIL;
@ -935,7 +935,7 @@ COMMAND_HANDLER(sim3x_mass_erase)
struct cortex_m_common *cortex_m = target_to_cm(target);
struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
if (dap == NULL) {
if (!dap) {
/* Used debug interface doesn't support direct DAP access */
LOG_ERROR("mass_erase can't be used by this debug interface");
return ERROR_FAIL;
@ -980,7 +980,7 @@ COMMAND_HANDLER(sim3x_lock)
struct cortex_m_common *cortex_m = target_to_cm(target);
struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
if (dap == NULL) {
if (!dap) {
/* Used debug interface doesn't support direct DAP access */
LOG_INFO("Target can't by unlocked by this debug interface");
@ -1039,7 +1039,7 @@ COMMAND_HANDLER(sim3x_lock)
return retval;
ret = sim3x_flash_write(bank, lock_word, LOCK_WORD_ADDRESS, 4);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
return ret;
LOG_INFO("Target is successfully locked");
@ -1052,7 +1052,7 @@ COMMAND_HANDLER(sim3x_lock)
LOG_ERROR("Unexpected lock word value");
/* SIM3X_AP_ID_VALUE is not checked */
if (dap == NULL)
if (!dap)
LOG_INFO("Maybe this isn't a SiM3x MCU");
return ERROR_FAIL;

26
src/flash/nor/stellaris.c
View File

@ -126,7 +126,7 @@ static const struct {
uint8_t class;
uint8_t partno;
const char *partname;
} StellarisParts[] = {
} stellaris_parts[] = {
{0x00, 0x01, "LM3S101"},
{0x00, 0x02, "LM3S102"},
{0x01, 0xBF, "LM3S1110"},
@ -436,7 +436,7 @@ static const struct {
{0xFF, 0x00, "Unknown Part"}
};
static const char * const StellarisClassname[] = {
static const char * const stellaris_classname[] = {
"Sandstorm",
"Fury",
"Unknown",
@ -493,7 +493,7 @@ static int get_stellaris_info(struct flash_bank *bank, struct command_invocation
"\nTI/LMI Stellaris information: Chip is "
"class %i (%s) %s rev %c%i\n",
stellaris_info->target_class,
StellarisClassname[stellaris_info->target_class],
stellaris_classname[stellaris_info->target_class],
stellaris_info->target_name,
(int)('A' + ((stellaris_info->did0 >> 8) & 0xFF)),
(int)((stellaris_info->did0) & 0xFF));
@ -743,13 +743,13 @@ static int stellaris_read_part_info(struct flash_bank *bank)
LOG_WARNING("Unknown did0 class");
}
for (i = 0; StellarisParts[i].partno; i++) {
if ((StellarisParts[i].partno == ((did1 >> 16) & 0xFF)) &&
(StellarisParts[i].class == stellaris_info->target_class))
for (i = 0; stellaris_parts[i].partno; i++) {
if ((stellaris_parts[i].partno == ((did1 >> 16) & 0xFF)) &&
(stellaris_parts[i].class == stellaris_info->target_class))
break;
}
stellaris_info->target_name = StellarisParts[i].partname;
stellaris_info->target_name = stellaris_parts[i].partname;
stellaris_info->did0 = did0;
stellaris_info->did1 = did1;
@ -886,8 +886,6 @@ static int stellaris_erase(struct flash_bank *bank, unsigned int first,
target_write_u32(target, FLASH_CRIS, 0);
return ERROR_FLASH_OPERATION_FAILED;
}
bank->sectors[banknr].is_erased = 1;
}
return ERROR_OK;
@ -1315,16 +1313,12 @@ COMMAND_HANDLER(stellaris_handle_mass_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (stellaris_mass_erase(bank) == ERROR_OK) {
/* set all sectors as erased */
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
if (stellaris_mass_erase(bank) == ERROR_OK)
command_print(CMD, "stellaris mass erase complete");
} else
else
command_print(CMD, "stellaris mass erase failed");
return ERROR_OK;

40
src/flash/nor/stm32f1x.c
View File

@ -349,7 +349,7 @@ static int stm32x_protect_check(struct flash_bank *bank)
uint32_t protection;
int retval = stm32x_check_operation_supported(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* medium density - each bit refers to a 4 sector protection block
@ -402,8 +402,6 @@ static int stm32x_erase(struct flash_bank *bank, unsigned int first,
retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
if (retval != ERROR_OK)
return retval;
bank->sectors[i].is_erased = 1;
}
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
@ -561,7 +559,7 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
* discrete accesses. */
if (count & 1) {
new_buffer = malloc(count + 1);
if (new_buffer == NULL) {
if (!new_buffer) {
LOG_ERROR("odd number of bytes to write and no memory for padding buffer");
return ERROR_FAIL;
}
@ -1179,7 +1177,7 @@ static int get_stm32x_info(struct flash_bank *bank, struct command_invocation *c
return ERROR_FAIL;
}
if (rev_str != NULL)
if (rev_str)
command_print_sameline(cmd, "%s - Rev: %s", device_str, rev_str);
else
command_print_sameline(cmd, "%s - Rev: unknown (0x%04x)", device_str, rev_id);
@ -1197,7 +1195,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
stm32x_info = bank->driver_priv;
@ -1210,7 +1208,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
}
retval = stm32x_check_operation_supported(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (stm32x_erase_options(bank) != ERROR_OK) {
@ -1240,7 +1238,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
target = bank->target;
@ -1251,7 +1249,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
}
retval = stm32x_check_operation_supported(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (stm32x_erase_options(bank) != ERROR_OK) {
@ -1282,7 +1280,7 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
stm32x_info = bank->driver_priv;
@ -1295,7 +1293,7 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
}
retval = stm32x_check_operation_supported(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = target_read_u32(target, STM32_FLASH_OBR_B0, &optionbyte);
@ -1349,7 +1347,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
stm32x_info = bank->driver_priv;
@ -1362,11 +1360,11 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
}
retval = stm32x_check_operation_supported(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32x_read_options(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* start with current options */
@ -1438,7 +1436,7 @@ COMMAND_HANDLER(stm32x_handle_options_load_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
@ -1457,7 +1455,7 @@ COMMAND_HANDLER(stm32x_handle_options_load_command)
}
retval = stm32x_check_operation_supported(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
/* unlock option flash registers */
@ -1520,17 +1518,13 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32x_mass_erase(bank);
if (retval == ERROR_OK) {
/* set all sectors as erased */
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
if (retval == ERROR_OK)
command_print(CMD, "stm32x mass erase complete");
} else
else
command_print(CMD, "stm32x mass erase failed");
return retval;

28
src/flash/nor/stm32f2x.c
View File

@ -649,8 +649,6 @@ static int stm32x_erase(struct flash_bank *bank, unsigned int first,
retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
if (retval != ERROR_OK)
return retval;
bank->sectors[i].is_erased = 1;
}
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
@ -1412,7 +1410,7 @@ static int get_stm32x_info(struct flash_bank *bank, struct command_invocation *c
return ERROR_FAIL;
}
if (rev_str != NULL)
if (rev_str)
command_print_sameline(cmd, "%s - Rev: %s", device_str, rev_str);
else
command_print_sameline(cmd, "%s - Rev: unknown (0x%04" PRIx16 ")", device_str, rev_id);
@ -1430,7 +1428,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
stm32x_info = bank->driver_priv;
@ -1469,7 +1467,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
stm32x_info = bank->driver_priv;
@ -1556,15 +1554,11 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32x_mass_erase(bank);
if (retval == ERROR_OK) {
/* set all sectors as erased */
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD, "stm32x mass erase complete");
} else {
command_print(CMD, "stm32x mass erase failed");
@ -1585,11 +1579,11 @@ COMMAND_HANDLER(stm32f2x_handle_options_read_command)
}
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32x_read_options(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
stm32x_info = bank->driver_priv;
@ -1631,11 +1625,11 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
}
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32x_read_options(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
stm32x_info = bank->driver_priv;
@ -1693,7 +1687,7 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
}
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
stm32x_info = bank->driver_priv;
@ -1707,7 +1701,7 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
" finally unlock it. Clears PCROP and mass erases flash.");
retval = stm32x_read_options(bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], optcr2_pcrop);
@ -1731,7 +1725,7 @@ COMMAND_HANDLER(stm32x_handle_otp_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (stm32x_is_otp(bank)) {
if (strcmp(CMD_ARGV[1], "enable") == 0) {

28
src/flash/nor/stm32h7x.c
View File

@ -512,7 +512,6 @@ static int stm32x_erase(struct flash_bank *bank, unsigned int first,
LOG_ERROR("erase time-out or operation error sector %u", i);
goto flash_lock;
}
bank->sectors[i].is_erased = 1;
}
flash_lock:
@ -879,7 +878,7 @@ static int stm32x_probe(struct flash_bank *bank)
bank->sectors = alloc_block_array(0, stm32x_info->part_info->page_size_kb * 1024,
bank->num_sectors);
if (bank->sectors == NULL) {
if (!bank->sectors) {
LOG_ERROR("failed to allocate bank sectors");
return ERROR_FAIL;
}
@ -896,7 +895,7 @@ static int stm32x_probe(struct flash_bank *bank)
bank->prot_blocks = alloc_block_array(0, stm32x_info->part_info->page_size_kb * wpsn * 1024,
bank->num_prot_blocks);
if (bank->prot_blocks == NULL) {
if (!bank->prot_blocks) {
LOG_ERROR("failed to allocate bank prot_block");
return ERROR_FAIL;
}
@ -937,7 +936,7 @@ static int stm32x_get_info(struct flash_bank *bank, struct command_invocation *c
if (rev_id == info->revs[i].rev)
rev_str = info->revs[i].str;
if (rev_str != NULL) {
if (rev_str) {
command_print_sameline(cmd, "%s - Rev: %s",
stm32x_info->part_info->device_str, rev_str);
} else {
@ -1003,7 +1002,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32x_set_rdp(bank, OPT_RDP_L1);
@ -1023,7 +1022,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32x_set_rdp(bank, OPT_RDP_L0);
@ -1083,19 +1082,14 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32x_mass_erase(bank);
if (retval == ERROR_OK) {
/* set all sectors as erased */
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
if (retval == ERROR_OK)
command_print(CMD, "stm32h7x mass erase complete");
} else {
else
command_print(CMD, "stm32h7x mass erase failed");
}
return retval;
}
@ -1109,14 +1103,14 @@ COMMAND_HANDLER(stm32x_handle_option_read_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
uint32_t reg_offset, value;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], reg_offset);
retval = stm32x_read_flash_reg(bank, reg_offset, &value);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32,
@ -1134,7 +1128,7 @@ COMMAND_HANDLER(stm32x_handle_option_write_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
uint32_t reg_offset, value, mask = 0xffffffff;

680
src/flash/nor/stm32l4x.c
View File

File diff suppressed because it is too large Load Diff

67
src/flash/nor/stm32l4x.h
View File

@ -19,32 +19,44 @@
#ifndef OPENOCD_FLASH_NOR_STM32L4X
#define OPENOCD_FLASH_NOR_STM32L4X
/* IMPORTANT: this file is included by stm32l4x driver and flashloader,
* so please when changing this file, do not forget to check the flashloader */
/* FIXME: #include "helper/bits.h" cause build errors when compiling
* the flashloader, for now just redefine the needed 'BIT 'macro */
#ifndef BIT
#define BIT(nr) (1UL << (nr))
#endif
/* FLASH_CR register bits */
#define FLASH_PG (1 << 0)
#define FLASH_PER (1 << 1)
#define FLASH_MER1 (1 << 2)
#define FLASH_PG BIT(0)
#define FLASH_PER BIT(1)
#define FLASH_MER1 BIT(2)
#define FLASH_PAGE_SHIFT 3
#define FLASH_CR_BKER (1 << 11)
#define FLASH_MER2 (1 << 15)
#define FLASH_STRT (1 << 16)
#define FLASH_OPTSTRT (1 << 17)
#define FLASH_EOPIE (1 << 24)
#define FLASH_ERRIE (1 << 25)
#define FLASH_OBL_LAUNCH (1 << 27)
#define FLASH_OPTLOCK (1 << 30)
#define FLASH_LOCK (1 << 31)
#define FLASH_BKER BIT(11)
#define FLASH_BKER_G0 BIT(13)
#define FLASH_MER2 BIT(15)
#define FLASH_STRT BIT(16)
#define FLASH_OPTSTRT BIT(17)
#define FLASH_EOPIE BIT(24)
#define FLASH_ERRIE BIT(25)
#define FLASH_OBL_LAUNCH BIT(27)
#define FLASH_OPTLOCK BIT(30)
#define FLASH_LOCK BIT(31)
/* FLASH_SR register bits */
#define FLASH_BSY (1 << 16)
#define FLASH_BSY BIT(16)
#define FLASH_BSY2 BIT(17)
/* Fast programming not used => related errors not used*/
#define FLASH_PGSERR (1 << 7) /* Programming sequence error */
#define FLASH_SIZERR (1 << 6) /* Size error */
#define FLASH_PGAERR (1 << 5) /* Programming alignment error */
#define FLASH_WRPERR (1 << 4) /* Write protection error */
#define FLASH_PROGERR (1 << 3) /* Programming error */
#define FLASH_OPERR (1 << 1) /* Operation error */
#define FLASH_EOP (1 << 0) /* End of operation */
#define FLASH_PGSERR BIT(7) /* Programming sequence error */
#define FLASH_SIZERR BIT(6) /* Size error */
#define FLASH_PGAERR BIT(5) /* Programming alignment error */
#define FLASH_WRPERR BIT(4) /* Write protection error */
#define FLASH_PROGERR BIT(3) /* Programming error */
#define FLASH_OPERR BIT(1) /* Operation error */
#define FLASH_EOP BIT(0) /* End of operation */
#define FLASH_ERROR (FLASH_PGSERR | FLASH_SIZERR | FLASH_PGAERR | \
FLASH_WRPERR | FLASH_PROGERR | FLASH_OPERR)
@ -58,13 +70,26 @@
/* FLASH_OPTR register bits */
#define FLASH_RDP_MASK 0xFF
#define FLASH_TZEN (1 << 31)
#define FLASH_TZEN BIT(31)
/* FLASH secure block based bank 1/2 register offsets */
#define FLASH_SECBB1(X) (0x80 + 4 * (X - 1))
#define FLASH_SECBB2(X) (0xA0 + 4 * (X - 1))
#define FLASH_SECBB_SECURE 0xFFFFFFFF
#define FLASH_SECBB_NON_SECURE 0
/* other registers */
#define DBGMCU_IDCODE_G0 0x40015800
#define DBGMCU_IDCODE_L4_G4 0xE0042000
#define DBGMCU_IDCODE_L5 0xE0044000
#define UID64_DEVNUM 0x1FFF7580
#define UID64_IDS 0x1FFF7584
#define UID64_IDS_STM32WL 0x0080E115
#define STM32_FLASH_BANK_BASE 0x08000000
#define STM32_FLASH_S_BANK_BASE 0x0C000000
#define STM32L5_REGS_SEC_OFFSET 0x10000000
#endif

23
src/flash/nor/stm32lx.c
View File

@ -290,7 +290,7 @@ FLASH_BANK_COMMAND_HANDLER(stm32lx_flash_bank_command)
stm32lx_info = calloc(1, sizeof(*stm32lx_info));
/* Check allocation */
if (stm32lx_info == NULL) {
if (!stm32lx_info) {
LOG_ERROR("failed to allocate bank structure");
return ERROR_FAIL;
}
@ -313,19 +313,14 @@ COMMAND_HANDLER(stm32lx_handle_mass_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32lx_mass_erase(bank);
if (retval == ERROR_OK) {
/* set all sectors as erased */
for (unsigned int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
if (retval == ERROR_OK)
command_print(CMD, "stm32lx mass erase complete");
} else {
else
command_print(CMD, "stm32lx mass erase failed");
}
return retval;
}
@ -337,7 +332,7 @@ COMMAND_HANDLER(stm32lx_handle_lock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32lx_lock(bank);
@ -357,7 +352,7 @@ COMMAND_HANDLER(stm32lx_handle_unlock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = stm32lx_unlock(bank);
@ -503,7 +498,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff
}
struct armv7m_common *armv7m = target_to_armv7m(target);
if (armv7m == NULL) {
if (!armv7m) {
/* something is very wrong if armv7m is NULL */
LOG_ERROR("unable to get armv7m target");
@ -842,7 +837,7 @@ static int stm32lx_probe(struct flash_bank *bank)
bank->base = base_address;
bank->num_sectors = num_sectors;
bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
if (bank->sectors == NULL) {
if (!bank->sectors) {
LOG_ERROR("failed to allocate bank sectors");
return ERROR_FAIL;
}
@ -889,7 +884,7 @@ static int stm32lx_get_info(struct flash_bank *bank, struct command_invocation *
if (rev_id == info->revs[i].rev)
rev_str = info->revs[i].str;
if (rev_str != NULL) {
if (rev_str) {
command_print_sameline(cmd, "%s - Rev: %s", info->device_str, rev_str);
} else {
command_print_sameline(cmd, "%s - Rev: unknown (0x%04x)", info->device_str, rev_id);

21
src/flash/nor/stmqspi.c
View File

@ -225,7 +225,7 @@ FLASH_BANK_COMMAND_HANDLER(stmqspi_flash_bank_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], io_base);
stmqspi_info = malloc(sizeof(struct stmqspi_flash_bank));
if (stmqspi_info == NULL) {
if (!stmqspi_info) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}
@ -509,7 +509,7 @@ COMMAND_HANDLER(stmqspi_handle_mass_erase_command)
return ERROR_COMMAND_SYNTAX_ERROR;
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
stmqspi_info = bank->driver_priv;
@ -588,18 +588,13 @@ COMMAND_HANDLER(stmqspi_handle_mass_erase_command)
retval = wait_till_ready(bank, SPI_MASS_ERASE_TIMEOUT);
duration_measure(&bench);
if (retval == ERROR_OK) {
/* set all sectors as erased */
for (sector = 0; sector < bank->num_sectors; sector++)
bank->sectors[sector].is_erased = 1;
if (retval == ERROR_OK)
command_print(CMD, "stmqspi mass erase completed in %fs (%0.3f KiB/s)",
duration_elapsed(&bench),
duration_kbps(&bench, bank->size));
} else {
else
command_print(CMD, "stmqspi mass erase not completed even after %fs",
duration_elapsed(&bench));
}
err:
/* Switch to memory mapped mode before return to prompt */
@ -638,7 +633,7 @@ COMMAND_HANDLER(stmqspi_handle_set)
return ERROR_COMMAND_SYNTAX_ERROR;
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, index++, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
target = bank->target;
@ -754,7 +749,7 @@ COMMAND_HANDLER(stmqspi_handle_set)
bank->num_sectors =
stmqspi_info->dev.size_in_bytes / stmqspi_info->dev.sectorsize;
sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
if (sectors == NULL) {
if (!sectors) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}
@ -808,7 +803,7 @@ COMMAND_HANDLER(stmqspi_handle_cmd)
}
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
target = bank->target;
@ -2358,7 +2353,7 @@ static int stmqspi_probe(struct flash_bank *bank)
/* create and fill sectors array */
bank->num_sectors = stmqspi_info->dev.size_in_bytes / stmqspi_info->dev.sectorsize;
sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
if (sectors == NULL) {
if (!sectors) {
LOG_ERROR("not enough memory");
retval = ERROR_FAIL;
goto err;

4
src/flash/nor/stmsmi.c
View File

@ -144,7 +144,7 @@ FLASH_BANK_COMMAND_HANDLER(stmsmi_flash_bank_command)
return ERROR_COMMAND_SYNTAX_ERROR;
stmsmi_info = malloc(sizeof(struct stmsmi_flash_bank));
if (stmsmi_info == NULL) {
if (!stmsmi_info) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}
@ -600,7 +600,7 @@ static int stmsmi_probe(struct flash_bank *bank)
bank->num_sectors =
stmsmi_info->dev->size_in_bytes / sectorsize;
sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
if (sectors == NULL) {
if (!sectors) {
LOG_ERROR("not enough memory");
return ERROR_FAIL;
}

23
src/flash/nor/str7x.c
View File

@ -376,9 +376,6 @@ static int str7x_erase(struct flash_bank *bank, unsigned int first,
if (err != ERROR_OK)
return err;
for (unsigned int i = first; i <= last; i++)
bank->sectors[i].is_erased = 1;
return ERROR_OK;
}
@ -720,15 +717,15 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command)
struct str7x_flash_bank *str7x_info = NULL;
uint32_t flash_cmd;
uint16_t ProtectionLevel = 0;
uint16_t ProtectionRegs;
uint16_t protection_level = 0;
uint16_t protection_regs;
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
str7x_info = bank->driver_priv;
@ -745,17 +742,17 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command)
target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR0), &reg);
if (!(reg & str7x_info->disable_bit))
ProtectionLevel = 1;
protection_level = 1;
target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR1), &reg);
ProtectionRegs = ~(reg >> 16);
protection_regs = ~(reg >> 16);
while (((ProtectionRegs) != 0) && (ProtectionLevel < 16)) {
ProtectionRegs >>= 1;
ProtectionLevel++;
while (((protection_regs) != 0) && (protection_level < 16)) {
protection_regs >>= 1;
protection_level++;
}
if (ProtectionLevel == 0) {
if (protection_level == 0) {
flash_cmd = FLASH_SPR;
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFB8);
@ -767,7 +764,7 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command)
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFBC);
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0),
~(1 << (15 + ProtectionLevel)));
~(1 << (15 + protection_level)));
flash_cmd = FLASH_SPR | FLASH_WMS;
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
}

5
src/flash/nor/str9x.c
View File

@ -300,9 +300,6 @@ static int str9x_erase(struct flash_bank *bank, unsigned int first,
break;
}
for (unsigned int i = first; i <= last; i++)
bank->sectors[i].is_erased = 1;
return ERROR_OK;
}
@ -611,7 +608,7 @@ COMMAND_HANDLER(str9x_handle_flash_config_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
uint32_t bbsr, nbbsr, bbadr, nbbadr;

32
src/flash/nor/str9xpec.c
View File

@ -81,7 +81,7 @@ static int str9xpec_write_options(struct flash_bank *bank);
static int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end_state)
{
if (tap == NULL)
if (!tap)
return ERROR_TARGET_INVALID;
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) {
@ -727,7 +727,7 @@ COMMAND_HANDLER(str9xpec_handle_part_id_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
str9xpec_info = bank->driver_priv;
@ -768,7 +768,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_read_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
str9xpec_info = bank->driver_priv;
@ -877,7 +877,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_write_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
status = str9xpec_write_options(bank);
@ -901,7 +901,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_cmap_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
str9xpec_info = bank->driver_priv;
@ -923,7 +923,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdthd_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
str9xpec_info = bank->driver_priv;
@ -945,7 +945,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdsel_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
str9xpec_info = bank->driver_priv;
@ -967,7 +967,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdwarn_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
str9xpec_info = bank->driver_priv;
@ -989,7 +989,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_lock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
status = str9xpec_lock_device(bank);
@ -1009,7 +1009,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_unlock_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
status = str9xpec_unlock_device(bank);
@ -1036,26 +1036,26 @@ COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
str9xpec_info = bank->driver_priv;
/* remove arm core from chain - enter turbo mode */
tap0 = str9xpec_info->tap;
if (tap0 == NULL) {
if (!tap0) {
/* things are *WRONG* */
command_print(CMD, "**STR9FLASH** (tap0) invalid chain?");
return ERROR_FAIL;
}
tap1 = tap0->next_tap;
if (tap1 == NULL) {
if (!tap1) {
/* things are *WRONG* */
command_print(CMD, "**STR9FLASH** (tap1) invalid chain?");
return ERROR_FAIL;
}
tap2 = tap1->next_tap;
if (tap2 == NULL) {
if (!tap2) {
/* things are *WRONG* */
command_print(CMD, "**STR9FLASH** (tap2) invalid chain?");
return ERROR_FAIL;
@ -1083,13 +1083,13 @@ COMMAND_HANDLER(str9xpec_handle_flash_disable_turbo_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
str9xpec_info = bank->driver_priv;
tap = str9xpec_info->tap;
if (tap == NULL)
if (!tap)
return ERROR_FAIL;
/* exit turbo mode via RESET */

2
src/flash/nor/swm050.c
View File

@ -142,7 +142,7 @@ COMMAND_HANDLER(swm050_handle_mass_erase_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = swm050_mass_erase(bank);

52
src/flash/nor/tcl.c
View File

@ -88,7 +88,7 @@ COMMAND_HANDLER(handle_flash_info_command)
if (retval != ERROR_OK)
return retval;
if (p != NULL) {
if (p) {
int num_blocks;
struct flash_sector *block_array;
@ -99,7 +99,7 @@ COMMAND_HANDLER(handle_flash_info_command)
/* If the driver does not implement protection, we show the default
* state of is_protected array - usually protection state unknown */
if (p->driver->protect_check == NULL) {
if (!p->driver->protect_check) {
retval = ERROR_FLASH_OPER_UNSUPPORTED;
} else {
/* We must query the hardware to avoid printing stale information! */
@ -148,7 +148,7 @@ COMMAND_HANDLER(handle_flash_info_command)
protect_state);
}
if (p->driver->info != NULL) {
if (p->driver->info) {
/* Let the flash driver print extra custom info */
retval = p->driver->info(p, CMD);
command_print_sameline(CMD, "\n");
@ -195,7 +195,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command)
struct flash_bank *p;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
retval = p->driver->erase_check(p);
@ -286,7 +286,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command)
if (retval == ERROR_OK)
retval = flash_erase_address_range(target, do_pad, address, length);
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD, "erased address " TARGET_ADDR_FMT " (length %" PRIu32 ")"
" in %fs (%0.3f KiB/s)", address, length,
duration_elapsed(&bench), duration_kbps(&bench, length));
@ -334,7 +334,7 @@ COMMAND_HANDLER(handle_flash_erase_command)
retval = flash_driver_erase(p, first, last);
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD, "erased sectors %" PRIu32 " "
"through %" PRIu32 " on flash bank %u "
"in %fs", first, last, p->bank_number, duration_elapsed(&bench));
@ -460,7 +460,7 @@ COMMAND_HANDLER(handle_flash_write_image_command)
return retval;
}
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD, "wrote %" PRIu32 " bytes from file %s "
"in %fs (%0.3f KiB/s)", written, CMD_ARGV[0],
duration_elapsed(&bench), duration_kbps(&bench, written));
@ -512,7 +512,7 @@ COMMAND_HANDLER(handle_flash_verify_image_command)
return retval;
}
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD, "verified %" PRIu32 " bytes from file %s "
"in %fs (%0.3f KiB/s)", verified, CMD_ARGV[0],
duration_elapsed(&bench), duration_kbps(&bench, verified));
@ -584,7 +584,7 @@ COMMAND_HANDLER(handle_flash_fill_command)
uint32_t padding_at_end = aligned_end - end_addr;
uint8_t *buffer = malloc(aligned_size);
if (buffer == NULL)
if (!buffer)
return ERROR_FAIL;
if (padding_at_start) {
@ -724,7 +724,7 @@ COMMAND_HANDLER(handle_flash_md_command)
}
uint8_t *buffer = calloc(count, wordsize);
if (buffer == NULL) {
if (!buffer) {
command_print(CMD, "No memory for flash read buffer");
return ERROR_FAIL;
}
@ -755,7 +755,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command)
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
offset = 0;
@ -800,7 +800,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command)
uint32_t padding_at_end = aligned_end - end_addr;
buffer = malloc(aligned_size);
if (buffer == NULL) {
if (!buffer) {
fileio_close(fileio);
LOG_ERROR("Out of memory");
return ERROR_FAIL;
@ -842,7 +842,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command)
free(buffer);
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD, "wrote %zu bytes from file %s to flash bank %u"
" at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
length, CMD_ARGV[1], bank->bank_number, offset,
@ -871,7 +871,7 @@ COMMAND_HANDLER(handle_flash_read_bank_command)
struct flash_bank *p;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
offset = 0;
@ -897,7 +897,7 @@ COMMAND_HANDLER(handle_flash_read_bank_command)
}
buffer = malloc(length);
if (buffer == NULL) {
if (!buffer) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
}
@ -952,7 +952,7 @@ COMMAND_HANDLER(handle_flash_verify_bank_command)
struct flash_bank *p;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
offset = 0;
@ -991,7 +991,7 @@ COMMAND_HANDLER(handle_flash_verify_bank_command)
"first %zu bytes of the file", length);
buffer_file = malloc(length);
if (buffer_file == NULL) {
if (!buffer_file) {
LOG_ERROR("Out of memory");
fileio_close(fileio);
return ERROR_FAIL;
@ -1012,7 +1012,7 @@ COMMAND_HANDLER(handle_flash_verify_bank_command)
}
buffer_flash = malloc(length);
if (buffer_flash == NULL) {
if (!buffer_flash) {
LOG_ERROR("Out of memory");
free(buffer_file);
return ERROR_FAIL;
@ -1073,7 +1073,7 @@ COMMAND_HANDLER(handle_flash_padded_value_command)
struct flash_bank *p;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
COMMAND_PARSE_NUMBER(u8, CMD_ARGV[1], p->default_padded_value);
@ -1263,31 +1263,31 @@ COMMAND_HANDLER(handle_flash_bank_command)
CMD_ARGC--;
struct target *target = get_target(CMD_ARGV[5]);
if (target == NULL) {
if (!target) {
LOG_ERROR("target '%s' not defined", CMD_ARGV[5]);
return ERROR_FAIL;
}
const char *driver_name = CMD_ARGV[0];
const struct flash_driver *driver = flash_driver_find_by_name(driver_name);
if (NULL == driver) {
if (!driver) {
/* no matching flash driver found */
LOG_ERROR("flash driver '%s' not found", driver_name);
return ERROR_FAIL;
}
/* check the flash bank name is unique */
if (get_flash_bank_by_name_noprobe(bank_name) != NULL) {
if (get_flash_bank_by_name_noprobe(bank_name)) {
/* flash bank name already exists */
LOG_ERROR("flash bank name '%s' already exists", bank_name);
return ERROR_FAIL;
}
/* register flash specific commands */
if (NULL != driver->commands) {
if (driver->commands) {
int retval = register_commands(CMD_CTX, NULL,
driver->commands);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("couldn't register '%s' commands",
driver_name);
return ERROR_FAIL;
@ -1307,14 +1307,14 @@ COMMAND_HANDLER(handle_flash_bank_command)
int retval;
retval = CALL_COMMAND_HANDLER(driver->flash_bank_command, c);
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
LOG_ERROR("'%s' driver rejected flash bank at " TARGET_ADDR_FMT
"; usage: %s", driver_name, c->base, driver->usage);
free(c);
return retval;
}
if (driver->usage == NULL)
if (!driver->usage)
LOG_DEBUG("'%s' driver usage field missing", driver_name);
flash_bank_add(c);

134
src/flash/nor/tms470.c
View File

@ -39,7 +39,7 @@ struct tms470_flash_bank {
};
static const struct flash_sector TMS470R1A256_SECTORS[] = {
static const struct flash_sector tms470r1a256_sectors[] = {
{0x00000000, 0x00002000, -1, -1},
{0x00002000, 0x00002000, -1, -1},
{0x00004000, 0x00002000, -1, -1},
@ -57,9 +57,9 @@ static const struct flash_sector TMS470R1A256_SECTORS[] = {
};
#define TMS470R1A256_NUM_SECTORS \
ARRAY_SIZE(TMS470R1A256_SECTORS)
ARRAY_SIZE(tms470r1a256_sectors)
static const struct flash_sector TMS470R1A288_BANK0_SECTORS[] = {
static const struct flash_sector tms470r1a288_bank0_sectors[] = {
{0x00000000, 0x00002000, -1, -1},
{0x00002000, 0x00002000, -1, -1},
{0x00004000, 0x00002000, -1, -1},
@ -67,9 +67,9 @@ static const struct flash_sector TMS470R1A288_BANK0_SECTORS[] = {
};
#define TMS470R1A288_BANK0_NUM_SECTORS \
ARRAY_SIZE(TMS470R1A288_BANK0_SECTORS)
ARRAY_SIZE(tms470r1a288_bank0_sectors)
static const struct flash_sector TMS470R1A288_BANK1_SECTORS[] = {
static const struct flash_sector tms470r1a288_bank1_sectors[] = {
{0x00040000, 0x00010000, -1, -1},
{0x00050000, 0x00010000, -1, -1},
{0x00060000, 0x00010000, -1, -1},
@ -77,9 +77,9 @@ static const struct flash_sector TMS470R1A288_BANK1_SECTORS[] = {
};
#define TMS470R1A288_BANK1_NUM_SECTORS \
ARRAY_SIZE(TMS470R1A288_BANK1_SECTORS)
ARRAY_SIZE(tms470r1a288_bank1_sectors)
static const struct flash_sector TMS470R1A384_BANK0_SECTORS[] = {
static const struct flash_sector tms470r1a384_bank0_sectors[] = {
{0x00000000, 0x00002000, -1, -1},
{0x00002000, 0x00002000, -1, -1},
{0x00004000, 0x00004000, -1, -1},
@ -93,9 +93,9 @@ static const struct flash_sector TMS470R1A384_BANK0_SECTORS[] = {
};
#define TMS470R1A384_BANK0_NUM_SECTORS \
ARRAY_SIZE(TMS470R1A384_BANK0_SECTORS)
ARRAY_SIZE(tms470r1a384_bank0_sectors)
static const struct flash_sector TMS470R1A384_BANK1_SECTORS[] = {
static const struct flash_sector tms470r1a384_bank1_sectors[] = {
{0x00020000, 0x00008000, -1, -1},
{0x00028000, 0x00008000, -1, -1},
{0x00030000, 0x00008000, -1, -1},
@ -103,9 +103,9 @@ static const struct flash_sector TMS470R1A384_BANK1_SECTORS[] = {
};
#define TMS470R1A384_BANK1_NUM_SECTORS \
ARRAY_SIZE(TMS470R1A384_BANK1_SECTORS)
ARRAY_SIZE(tms470r1a384_bank1_sectors)
static const struct flash_sector TMS470R1A384_BANK2_SECTORS[] = {
static const struct flash_sector tms470r1a384_bank2_sectors[] = {
{0x00040000, 0x00008000, -1, -1},
{0x00048000, 0x00008000, -1, -1},
{0x00050000, 0x00008000, -1, -1},
@ -113,7 +113,7 @@ static const struct flash_sector TMS470R1A384_BANK2_SECTORS[] = {
};
#define TMS470R1A384_BANK2_NUM_SECTORS \
ARRAY_SIZE(TMS470R1A384_BANK2_SECTORS)
ARRAY_SIZE(tms470r1a384_bank2_sectors)
/* ---------------------------------------------------------------------- */
@ -173,10 +173,10 @@ static int tms470_read_part_info(struct flash_bank *bank)
bank->base = 0x00000000;
bank->size = 256 * 1024;
bank->num_sectors = TMS470R1A256_NUM_SECTORS;
bank->sectors = malloc(sizeof(TMS470R1A256_SECTORS));
bank->sectors = malloc(sizeof(tms470r1a256_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
(void)memcpy(bank->sectors, TMS470R1A256_SECTORS, sizeof(TMS470R1A256_SECTORS));
(void)memcpy(bank->sectors, tms470r1a256_sectors, sizeof(tms470r1a256_sectors));
break;
case 0x2b:
@ -187,21 +187,21 @@ static int tms470_read_part_info(struct flash_bank *bank)
bank->base = 0x00000000;
bank->size = 32 * 1024;
bank->num_sectors = TMS470R1A288_BANK0_NUM_SECTORS;
bank->sectors = malloc(sizeof(TMS470R1A288_BANK0_SECTORS));
bank->sectors = malloc(sizeof(tms470r1a288_bank0_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
(void)memcpy(bank->sectors, TMS470R1A288_BANK0_SECTORS,
sizeof(TMS470R1A288_BANK0_SECTORS));
(void)memcpy(bank->sectors, tms470r1a288_bank0_sectors,
sizeof(tms470r1a288_bank0_sectors));
} else if ((bank->base >= 0x00040000) && (bank->base < 0x00080000)) {
tms470_info->ordinal = 1;
bank->base = 0x00040000;
bank->size = 256 * 1024;
bank->num_sectors = TMS470R1A288_BANK1_NUM_SECTORS;
bank->sectors = malloc(sizeof(TMS470R1A288_BANK1_SECTORS));
bank->sectors = malloc(sizeof(tms470r1a288_bank1_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
(void)memcpy(bank->sectors, TMS470R1A288_BANK1_SECTORS,
sizeof(TMS470R1A288_BANK1_SECTORS));
(void)memcpy(bank->sectors, tms470r1a288_bank1_sectors,
sizeof(tms470r1a288_bank1_sectors));
} else {
LOG_ERROR("No %s flash bank contains base address " TARGET_ADDR_FMT ".",
part_name, bank->base);
@ -217,31 +217,31 @@ static int tms470_read_part_info(struct flash_bank *bank)
bank->base = 0x00000000;
bank->size = 128 * 1024;
bank->num_sectors = TMS470R1A384_BANK0_NUM_SECTORS;
bank->sectors = malloc(sizeof(TMS470R1A384_BANK0_SECTORS));
bank->sectors = malloc(sizeof(tms470r1a384_bank0_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
(void)memcpy(bank->sectors, TMS470R1A384_BANK0_SECTORS,
sizeof(TMS470R1A384_BANK0_SECTORS));
(void)memcpy(bank->sectors, tms470r1a384_bank0_sectors,
sizeof(tms470r1a384_bank0_sectors));
} else if ((bank->base >= 0x00020000) && (bank->base < 0x00040000)) {
tms470_info->ordinal = 1;
bank->base = 0x00020000;
bank->size = 128 * 1024;
bank->num_sectors = TMS470R1A384_BANK1_NUM_SECTORS;
bank->sectors = malloc(sizeof(TMS470R1A384_BANK1_SECTORS));
bank->sectors = malloc(sizeof(tms470r1a384_bank1_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
(void)memcpy(bank->sectors, TMS470R1A384_BANK1_SECTORS,
sizeof(TMS470R1A384_BANK1_SECTORS));
(void)memcpy(bank->sectors, tms470r1a384_bank1_sectors,
sizeof(tms470r1a384_bank1_sectors));
} else if ((bank->base >= 0x00040000) && (bank->base < 0x00060000)) {
tms470_info->ordinal = 2;
bank->base = 0x00040000;
bank->size = 128 * 1024;
bank->num_sectors = TMS470R1A384_BANK2_NUM_SECTORS;
bank->sectors = malloc(sizeof(TMS470R1A384_BANK2_SECTORS));
bank->sectors = malloc(sizeof(tms470r1a384_bank2_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
(void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS,
sizeof(TMS470R1A384_BANK2_SECTORS));
(void)memcpy(bank->sectors, tms470r1a384_bank2_sectors,
sizeof(tms470r1a384_bank2_sectors));
} else {
LOG_ERROR("No %s flash bank contains base address " TARGET_ADDR_FMT ".",
part_name, bank->base);
@ -285,8 +285,8 @@ static int tms470_read_part_info(struct flash_bank *bank)
/* ---------------------------------------------------------------------- */
static uint32_t keysSet;
static uint32_t flashKeys[4];
static uint32_t keys_set;
static uint32_t flash_keys[4];
COMMAND_HANDLER(tms470_handle_flash_keyset_command)
{
@ -296,9 +296,9 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command)
int i;
for (i = 0; i < 4; i++) {
int start = (0 == strncmp(CMD_ARGV[i], "0x", 2)) ? 2 : 0;
int start = (strncmp(CMD_ARGV[i], "0x", 2) == 0) ? 2 : 0;
if (1 != sscanf(&CMD_ARGV[i][start], "%" SCNx32 "", &flashKeys[i])) {
if (sscanf(&CMD_ARGV[i][start], "%" SCNx32 "", &flash_keys[i]) != 1) {
command_print(CMD, "could not process flash key %s",
CMD_ARGV[i]);
LOG_ERROR("could not process flash key %s", CMD_ARGV[i]);
@ -306,56 +306,56 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command)
}
}
keysSet = 1;
keys_set = 1;
} else if (CMD_ARGC != 0) {
command_print(CMD, "tms470 flash_keyset <key0> <key1> <key2> <key3>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (keysSet) {
if (keys_set) {
command_print(CMD,
"using flash keys 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 "",
flashKeys[0],
flashKeys[1],
flashKeys[2],
flashKeys[3]);
flash_keys[0],
flash_keys[1],
flash_keys[2],
flash_keys[3]);
} else
command_print(CMD, "flash keys not set");
return ERROR_OK;
}
static const uint32_t FLASH_KEYS_ALL_ONES[] = { 0xFFFFFFFF, 0xFFFFFFFF,
static const uint32_t flash_keys_all_ones[] = { 0xFFFFFFFF, 0xFFFFFFFF,
0xFFFFFFFF, 0xFFFFFFFF,};
static const uint32_t FLASH_KEYS_ALL_ZEROS[] = { 0x00000000, 0x00000000,
static const uint32_t flash_keys_all_zeros[] = { 0x00000000, 0x00000000,
0x00000000, 0x00000000,};
static const uint32_t FLASH_KEYS_MIX1[] = { 0xf0fff0ff, 0xf0fff0ff,
static const uint32_t flash_keys_mix1[] = { 0xf0fff0ff, 0xf0fff0ff,
0xf0fff0ff, 0xf0fff0ff};
static const uint32_t FLASH_KEYS_MIX2[] = { 0x0000ffff, 0x0000ffff,
static const uint32_t flash_keys_mix2[] = { 0x0000ffff, 0x0000ffff,
0x0000ffff, 0x0000ffff};
/* ---------------------------------------------------------------------- */
static int oscMHz = 12;
static int osc_mhz = 12;
COMMAND_HANDLER(tms470_handle_osc_megahertz_command)
{
if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
else if (CMD_ARGC == 1)
sscanf(CMD_ARGV[0], "%d", &oscMHz);
sscanf(CMD_ARGV[0], "%d", &osc_mhz);
if (oscMHz <= 0) {
if (osc_mhz <= 0) {
LOG_ERROR("osc_megahertz must be positive and non-zero!");
command_print(CMD, "osc_megahertz must be positive and non-zero!");
oscMHz = 12;
osc_mhz = 12;
return ERROR_COMMAND_SYNTAX_ERROR;
}
command_print(CMD, "osc_megahertz=%d", oscMHz);
command_print(CMD, "osc_megahertz=%d", osc_mhz);
return ERROR_OK;
}
@ -437,7 +437,7 @@ static int tms470_try_flash_keys(struct target *target, const uint32_t *key_set)
target_write_u32(target, 0xFFE89C0C, key_set[i]);
}
if (ERROR_OK == tms470_check_flash_unlocked(target)) {
if (tms470_check_flash_unlocked(target) == ERROR_OK) {
/*
* There seems to be a side-effect of reading the FMPKEY
* register in that it re-enables the protection. So we
@ -471,19 +471,19 @@ static int tms470_unlock_flash(struct flash_bank *bank)
const uint32_t *p_key_sets[5];
unsigned i, key_set_count;
if (keysSet) {
if (keys_set) {
key_set_count = 5;
p_key_sets[0] = flashKeys;
p_key_sets[1] = FLASH_KEYS_ALL_ONES;
p_key_sets[2] = FLASH_KEYS_ALL_ZEROS;
p_key_sets[3] = FLASH_KEYS_MIX1;
p_key_sets[4] = FLASH_KEYS_MIX2;
p_key_sets[0] = flash_keys;
p_key_sets[1] = flash_keys_all_ones;
p_key_sets[2] = flash_keys_all_zeros;
p_key_sets[3] = flash_keys_mix1;
p_key_sets[4] = flash_keys_mix2;
} else {
key_set_count = 4;
p_key_sets[0] = FLASH_KEYS_ALL_ONES;
p_key_sets[1] = FLASH_KEYS_ALL_ZEROS;
p_key_sets[2] = FLASH_KEYS_MIX1;
p_key_sets[3] = FLASH_KEYS_MIX2;
p_key_sets[0] = flash_keys_all_ones;
p_key_sets[1] = flash_keys_all_zeros;
p_key_sets[2] = flash_keys_mix1;
p_key_sets[3] = flash_keys_mix2;
}
for (i = 0; i < key_set_count; i++) {
@ -573,7 +573,7 @@ static int tms470_flash_initialize_internal_state_machine(struct flash_bank *ban
* the plldis global.
*/
target_read_u32(target, 0xFFFFFFDC, &glbctrl);
sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8) * oscMHz / (1 + (glbctrl & 7));
sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8) * osc_mhz / (1 + (glbctrl & 7));
delay = (sysclk > 10) ? (sysclk + 1) / 2 : 5;
target_write_u32(target, 0xFFE8A018, (delay << 4) | (delay << 8));
LOG_DEBUG("set fmpsetup = 0x%04" PRIx32 "", (delay << 4) | (delay << 8));
@ -685,7 +685,7 @@ static int tms470_erase_sector(struct flash_bank *bank, int sector)
{
uint32_t glbctrl, orig_fmregopt, fmbsea, fmbseb, fmmstat;
struct target *target = bank->target;
uint32_t flashAddr = bank->base + bank->sectors[sector].offset;
uint32_t flash_addr = bank->base + bank->sectors[sector].offset;
int result = ERROR_OK;
/*
@ -722,12 +722,12 @@ static int tms470_erase_sector(struct flash_bank *bank, int sector)
/*
* clear status register, sent erase command, kickoff erase
*/
target_write_u16(target, flashAddr, 0x0040);
LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0040", flashAddr);
target_write_u16(target, flashAddr, 0x0020);
LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0020", flashAddr);
target_write_u16(target, flashAddr, 0xffff);
LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0xffff", flashAddr);
target_write_u16(target, flash_addr, 0x0040);
LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0040", flash_addr);
target_write_u16(target, flash_addr, 0x0020);
LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0020", flash_addr);
target_write_u16(target, flash_addr, 0xffff);
LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0xffff", flash_addr);
/*
* Monitor FMMSTAT, busy until clear, then check and other flags for

26
src/flash/nor/virtual.c
View File

@ -27,7 +27,7 @@ static struct flash_bank *virtual_get_master_bank(struct flash_bank *bank)
struct flash_bank *master_bank;
master_bank = get_flash_bank_by_name_noprobe(bank->driver_priv);
if (master_bank == NULL)
if (!master_bank)
LOG_ERROR("master flash bank '%s' does not exist", (char *)bank->driver_priv);
return master_bank;
@ -37,7 +37,7 @@ static void virtual_update_bank_info(struct flash_bank *bank)
{
struct flash_bank *master_bank = virtual_get_master_bank(bank);
if (master_bank == NULL)
if (!master_bank)
return;
/* update the info we do not have */
@ -64,7 +64,7 @@ FLASH_BANK_COMMAND_HANDLER(virtual_flash_bank_command)
const char *bank_name = CMD_ARGV[6];
struct flash_bank *master_bank = get_flash_bank_by_name_noprobe(bank_name);
if (master_bank == NULL) {
if (!master_bank) {
LOG_ERROR("master flash bank '%s' does not exist", bank_name);
return ERROR_FLASH_OPERATION_FAILED;
}
@ -80,7 +80,7 @@ static int virtual_protect(struct flash_bank *bank, int set, unsigned int first,
{
struct flash_bank *master_bank = virtual_get_master_bank(bank);
if (master_bank == NULL)
if (!master_bank)
return ERROR_FLASH_OPERATION_FAILED;
return flash_driver_protect(master_bank, set, first, last);
@ -90,10 +90,10 @@ static int virtual_protect_check(struct flash_bank *bank)
{
struct flash_bank *master_bank = virtual_get_master_bank(bank);
if (master_bank == NULL)
if (!master_bank)
return ERROR_FLASH_OPERATION_FAILED;
if (master_bank->driver->protect_check == NULL)
if (!master_bank->driver->protect_check)
return ERROR_FLASH_OPER_UNSUPPORTED;
/* call master handler */
@ -106,7 +106,7 @@ static int virtual_erase(struct flash_bank *bank, unsigned int first,
struct flash_bank *master_bank = virtual_get_master_bank(bank);
int retval;
if (master_bank == NULL)
if (!master_bank)
return ERROR_FLASH_OPERATION_FAILED;
/* call master handler */
@ -123,7 +123,7 @@ static int virtual_write(struct flash_bank *bank, const uint8_t *buffer,
struct flash_bank *master_bank = virtual_get_master_bank(bank);
int retval;
if (master_bank == NULL)
if (!master_bank)
return ERROR_FLASH_OPERATION_FAILED;
/* call master handler */
@ -139,7 +139,7 @@ static int virtual_probe(struct flash_bank *bank)
struct flash_bank *master_bank = virtual_get_master_bank(bank);
int retval;
if (master_bank == NULL)
if (!master_bank)
return ERROR_FLASH_OPERATION_FAILED;
/* call master handler */
@ -158,7 +158,7 @@ static int virtual_auto_probe(struct flash_bank *bank)
struct flash_bank *master_bank = virtual_get_master_bank(bank);
int retval;
if (master_bank == NULL)
if (!master_bank)
return ERROR_FLASH_OPERATION_FAILED;
/* call master handler */
@ -176,7 +176,7 @@ static int virtual_info(struct flash_bank *bank, struct command_invocation *cmd)
{
struct flash_bank *master_bank = virtual_get_master_bank(bank);
if (master_bank == NULL)
if (!master_bank)
return ERROR_FLASH_OPERATION_FAILED;
command_print_sameline(cmd, "%s driver for flash bank %s at " TARGET_ADDR_FMT,
@ -190,7 +190,7 @@ static int virtual_blank_check(struct flash_bank *bank)
struct flash_bank *master_bank = virtual_get_master_bank(bank);
int retval;
if (master_bank == NULL)
if (!master_bank)
return ERROR_FLASH_OPERATION_FAILED;
/* call master handler */
@ -207,7 +207,7 @@ static int virtual_flash_read(struct flash_bank *bank,
struct flash_bank *master_bank = virtual_get_master_bank(bank);
int retval;
if (master_bank == NULL)
if (!master_bank)
return ERROR_FLASH_OPERATION_FAILED;
/* call master handler */

100
src/flash/nor/xcf.c
View File

@ -68,25 +68,25 @@ struct xcf_status {
* GLOBAL VARIABLES
******************************************************************************
*/
static const uint8_t CMD_BYPASS[2] = {0xFF, 0xFF};
static const uint8_t cmd_bypass[2] = {0xFF, 0xFF};
static const uint8_t CMD_ISC_ADDRESS_SHIFT[2] = {0xEB, 0x00};
static const uint8_t CMD_ISC_DATA_SHIFT[2] = {0xED, 0x00};
static const uint8_t CMD_ISC_DISABLE[2] = {0xF0, 0x00};
static const uint8_t CMD_ISC_ENABLE[2] = {0xE8, 0x00};
static const uint8_t CMD_ISC_ERASE[2] = {0xEC, 0x00};
static const uint8_t CMD_ISC_PROGRAM[2] = {0xEA, 0x00};
static const uint8_t cmd_isc_address_shift[2] = {0xEB, 0x00};
static const uint8_t cmd_isc_data_shift[2] = {0xED, 0x00};
static const uint8_t cmd_isc_disable[2] = {0xF0, 0x00};
static const uint8_t cmd_isc_enable[2] = {0xE8, 0x00};
static const uint8_t cmd_isc_erase[2] = {0xEC, 0x00};
static const uint8_t cmd_isc_program[2] = {0xEA, 0x00};
static const uint8_t CMD_XSC_BLANK_CHECK[2] = {0x0D, 0x00};
static const uint8_t CMD_XSC_CONFIG[2] = {0xEE, 0x00};
static const uint8_t CMD_XSC_DATA_BTC[2] = {0xF2, 0x00};
static const uint8_t CMD_XSC_DATA_CCB[2] = {0x0C, 0x00};
static const uint8_t CMD_XSC_DATA_DONE[2] = {0x09, 0x00};
static const uint8_t CMD_XSC_DATA_SUCR[2] = {0x0E, 0x00};
static const uint8_t CMD_XSC_DATA_WRPT[2] = {0xF7, 0x00};
static const uint8_t CMD_XSC_OP_STATUS[2] = {0xE3, 0x00};
static const uint8_t CMD_XSC_READ[2] = {0xEF, 0x00};
static const uint8_t CMD_XSC_UNLOCK[2] = {0x55, 0xAA};
static const uint8_t cmd_xsc_blank_check[2] = {0x0D, 0x00};
static const uint8_t cmd_xsc_config[2] = {0xEE, 0x00};
static const uint8_t cmd_xsc_data_btc[2] = {0xF2, 0x00};
static const uint8_t cmd_xsc_data_ccb[2] = {0x0C, 0x00};
static const uint8_t cmd_xsc_data_done[2] = {0x09, 0x00};
static const uint8_t cmd_xsc_data_sucr[2] = {0x0E, 0x00};
static const uint8_t cmd_xsc_data_wrpt[2] = {0xF7, 0x00};
static const uint8_t cmd_xsc_op_status[2] = {0xE3, 0x00};
static const uint8_t cmd_xsc_read[2] = {0xEF, 0x00};
static const uint8_t cmd_xsc_unlock[2] = {0x55, 0xAA};
/*
******************************************************************************
@ -135,7 +135,7 @@ static struct xcf_status read_status(struct flash_bank *bank)
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
scan.out_value = CMD_BYPASS;
scan.out_value = cmd_bypass;
scan.in_value = irdata;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
@ -162,7 +162,7 @@ static int isc_enter(struct flash_bank *bank)
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
scan.out_value = CMD_ISC_ENABLE;
scan.out_value = cmd_isc_enable;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
@ -191,7 +191,7 @@ static int isc_leave(struct flash_bank *bank)
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
scan.out_value = CMD_ISC_DISABLE;
scan.out_value = cmd_isc_disable;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
@ -252,7 +252,7 @@ static int isc_wait_erase_program(struct flash_bank *bank, int64_t timeout_ms)
int64_t dt;
do {
isc_read_register(bank, CMD_XSC_OP_STATUS, &isc_default, 8);
isc_read_register(bank, cmd_xsc_op_status, &isc_default, 8);
if (((isc_default >> 2) & 1) == 1)
return ERROR_OK;
dt = timeval_ms() - t0;
@ -307,7 +307,7 @@ static int isc_program_register(struct flash_bank *bank, const uint8_t *cmd,
jtag_add_dr_scan(bank->target->tap, 1, &scan, TAP_IRSHIFT);
scan.num_bits = 16;
scan.out_value = CMD_ISC_PROGRAM;
scan.out_value = cmd_isc_program;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
@ -322,7 +322,7 @@ static int isc_clear_protect(struct flash_bank *bank, unsigned int first,
{
uint8_t select_block[3] = {0x0, 0x0, 0x0};
select_block[0] = fill_select_block(first, last);
return isc_set_register(bank, CMD_XSC_UNLOCK, select_block, 24, 0);
return isc_set_register(bank, cmd_xsc_unlock, select_block, 24, 0);
}
static int isc_set_protect(struct flash_bank *bank, unsigned int first,
@ -332,7 +332,7 @@ static int isc_set_protect(struct flash_bank *bank, unsigned int first,
for (unsigned int i = first; i <= last; i++)
wrpt[0] &= ~(1 << i);
return isc_program_register(bank, CMD_XSC_DATA_WRPT, wrpt, 16, 0);
return isc_program_register(bank, cmd_xsc_data_wrpt, wrpt, 16, 0);
}
static int isc_erase_sectors(struct flash_bank *bank, unsigned int first,
@ -341,19 +341,19 @@ static int isc_erase_sectors(struct flash_bank *bank, unsigned int first,
uint8_t select_block[3] = {0, 0, 0};
select_block[0] = fill_select_block(first, last);
int64_t timeout = SECTOR_ERASE_TIMEOUT_MS * (last - first + 1);
return isc_set_register(bank, CMD_ISC_ERASE, select_block, 24, timeout);
return isc_set_register(bank, cmd_isc_erase, select_block, 24, timeout);
}
static int isc_adr_shift(struct flash_bank *bank, int adr)
{
uint8_t adr_buf[3];
h_u24_to_le(adr_buf, adr);
return isc_set_register(bank, CMD_ISC_ADDRESS_SHIFT, adr_buf, 24, 0);
return isc_set_register(bank, cmd_isc_address_shift, adr_buf, 24, 0);
}
static int isc_program_data_page(struct flash_bank *bank, const uint8_t *page_buf)
{
return isc_program_register(bank, CMD_ISC_DATA_SHIFT, page_buf, 8 * XCF_PAGE_SIZE, 100);
return isc_program_register(bank, cmd_isc_data_shift, page_buf, 8 * XCF_PAGE_SIZE, 100);
}
static void isc_data_read_out(struct flash_bank *bank, uint8_t *buffer, uint32_t count)
@ -366,7 +366,7 @@ static void isc_data_read_out(struct flash_bank *bank, uint8_t *buffer, uint32_t
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
scan.out_value = CMD_XSC_READ;
scan.out_value = cmd_xsc_read;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
@ -382,7 +382,7 @@ static int isc_set_data_done(struct flash_bank *bank, int sector)
{
uint8_t done = 0xFF;
done &= ~(1 << sector);
return isc_program_register(bank, CMD_XSC_DATA_DONE, &done, 8, 100);
return isc_program_register(bank, cmd_xsc_data_done, &done, 8, 100);
}
static void flip_u8(uint8_t *out, const uint8_t *in, int len)
@ -475,7 +475,7 @@ static int read_write_data(struct flash_bank *bank, const uint8_t *w_buffer,
w_buffer += len;
sector_bytes -= len;
ret = isc_program_data_page(bank, page_buf);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
goto EXIT;
else {
LOG_DEBUG("written %d bytes from %d", dbg_written, dbg_count);
@ -494,7 +494,7 @@ static int read_write_data(struct flash_bank *bank, const uint8_t *w_buffer,
if (write_flag) {
for (unsigned int i = 0; i < bank->num_sectors; i++) {
ret = isc_set_data_done(bank, i);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
goto EXIT;
}
}
@ -508,7 +508,7 @@ EXIT:
static uint16_t isc_read_ccb(struct flash_bank *bank)
{
uint8_t ccb[2];
isc_read_register(bank, CMD_XSC_DATA_CCB, ccb, 16);
isc_read_register(bank, cmd_xsc_data_ccb, ccb, 16);
return le_to_h_u16(ccb);
}
@ -526,13 +526,13 @@ static int isc_program_ccb(struct flash_bank *bank, uint16_t ccb)
{
uint8_t buf[2];
h_u16_to_le(buf, ccb);
return isc_program_register(bank, CMD_XSC_DATA_CCB, buf, 16, 100);
return isc_program_register(bank, cmd_xsc_data_ccb, buf, 16, 100);
}
static int isc_program_singe_revision_sucr(struct flash_bank *bank)
{
uint8_t sucr[2] = {0xFC, 0xFF};
return isc_program_register(bank, CMD_XSC_DATA_SUCR, sucr, 16, 100);
return isc_program_register(bank, cmd_xsc_data_sucr, sucr, 16, 100);
}
static int isc_program_single_revision_btc(struct flash_bank *bank)
@ -543,7 +543,7 @@ static int isc_program_single_revision_btc(struct flash_bank *bank)
btc |= ((bank->num_sectors - 1) << 2);
btc &= ~(1 << 4);
h_u32_to_le(buf, btc);
return isc_program_register(bank, CMD_XSC_DATA_BTC, buf, 32, 100);
return isc_program_register(bank, cmd_xsc_data_btc, buf, 32, 100);
}
static int fpga_configure(struct flash_bank *bank)
@ -553,7 +553,7 @@ static int fpga_configure(struct flash_bank *bank)
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
scan.out_value = CMD_XSC_CONFIG;
scan.out_value = cmd_xsc_config;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
jtag_execute_queue();
@ -572,7 +572,7 @@ FLASH_BANK_COMMAND_HANDLER(xcf_flash_bank_command)
struct xcf_priv *priv;
priv = malloc(sizeof(struct xcf_priv));
if (priv == NULL) {
if (!priv) {
LOG_ERROR("no memory for flash bank info");
return ERROR_FAIL;
}
@ -602,7 +602,7 @@ static int xcf_probe(struct flash_bank *bank)
free(bank->sectors);
priv->probed = false;
if (bank->target->tap == NULL) {
if (!bank->target->tap) {
LOG_ERROR("Target has no JTAG tap");
return ERROR_FAIL;
}
@ -629,7 +629,7 @@ static int xcf_probe(struct flash_bank *bank)
}
bank->sectors = malloc(bank->num_sectors * sizeof(struct flash_sector));
if (bank->sectors == NULL) {
if (!bank->sectors) {
LOG_ERROR("No memory for sector table");
return ERROR_FAIL;
}
@ -663,7 +663,7 @@ static int xcf_protect_check(struct flash_bank *bank)
uint8_t wrpt[2];
isc_enter(bank);
isc_read_register(bank, CMD_XSC_DATA_WRPT, wrpt, 16);
isc_read_register(bank, cmd_xsc_data_wrpt, wrpt, 16);
isc_leave(bank);
for (unsigned int i = 0; i < bank->num_sectors; i++)
@ -684,7 +684,7 @@ static int xcf_erase_check(struct flash_bank *bank)
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
scan.out_value = CMD_XSC_BLANK_CHECK;
scan.out_value = cmd_xsc_blank_check;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
jtag_execute_queue();
@ -755,7 +755,7 @@ COMMAND_HANDLER(xcf_handle_ccb_command) {
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
uint16_t ccb = 0xFFFF;
@ -800,29 +800,29 @@ COMMAND_HANDLER(xcf_handle_ccb_command) {
sector = gucr_num(bank);
isc_clear_protect(bank, sector, sector);
int ret = isc_erase_sectors(bank, sector, sector);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
goto EXIT;
ret = isc_program_ccb(bank, ccb);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
goto EXIT;
ret = isc_program_single_revision_btc(bank);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
goto EXIT;
ret = isc_set_data_done(bank, sector);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
goto EXIT;
/* SUCR sector */
sector = sucr_num(bank);
isc_clear_protect(bank, sector, sector);
ret = isc_erase_sectors(bank, sector, sector);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
goto EXIT;
ret = isc_program_singe_revision_sucr(bank);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
goto EXIT;
ret = isc_set_data_done(bank, sector);
if (ERROR_OK != ret)
if (ret != ERROR_OK)
goto EXIT;
EXIT:
@ -838,7 +838,7 @@ COMMAND_HANDLER(xcf_handle_configure_command) {
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
return fpga_configure(bank);

8
src/flash/nor/xmc1xxx.c
View File

@ -11,6 +11,7 @@
#endif
#include "imp.h"
#include <helper/align.h>
#include <helper/binarybuffer.h>
#include <target/algorithm.h>
#include <target/armv7m.h>
@ -140,9 +141,6 @@ static int xmc1xxx_erase(struct flash_bank *bank, unsigned int first,
goto err_run;
}
for (unsigned int sector = first; sector <= last; sector++)
bank->sectors[sector].is_erased = 1;
err_run:
for (i = 0; i < ARRAY_SIZE(reg_params); i++)
destroy_reg_param(&reg_params[i]);
@ -256,12 +254,12 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRIu32 " bytes)",
offset, byte_count);
if (offset & (NVM_BLOCK_SIZE - 1)) {
if (!IS_ALIGNED(offset, NVM_BLOCK_SIZE)) {
LOG_ERROR("offset 0x%" PRIx32 " breaks required block alignment",
offset);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
if (byte_count & (NVM_BLOCK_SIZE - 1)) {
if (!IS_ALIGNED(byte_count, NVM_BLOCK_SIZE)) {
LOG_WARNING("length %" PRIu32 " is not block aligned, rounding up",
byte_count);
}

8
src/flash/nor/xmc4xxx.c
View File

@ -577,8 +577,6 @@ static int xmc4xxx_erase(struct flash_bank *bank, unsigned int first,
if (res != ERROR_OK)
goto clear_status_and_exit;
bank->sectors[i].is_erased = 1;
}
clear_status_and_exit:
@ -941,7 +939,7 @@ static int xmc4xxx_get_info_command(struct flash_bank *bank, struct command_invo
}
}
if (rev_str != NULL)
if (rev_str)
command_print_sameline(cmd, "%s - Rev: %s%s", dev_str, rev_str, prot_str);
else
command_print_sameline(cmd, "%s - Rev: unknown (0x%01x)%s", dev_str, rev_id, prot_str);
@ -1270,12 +1268,12 @@ COMMAND_HANDLER(xmc4xxx_handle_flash_password_command)
errno = 0;
/* We skip over the flash bank */
fb->pw1 = strtol(CMD_ARGV[1], NULL, 16);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], fb->pw1);
if (errno)
return ERROR_COMMAND_SYNTAX_ERROR;
fb->pw2 = strtol(CMD_ARGV[2], NULL, 16);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], fb->pw2);
if (errno)
return ERROR_COMMAND_SYNTAX_ERROR;

3
src/flash/startup.tcl
View File

@ -114,9 +114,10 @@ proc stm32f7x args { eval stm32f2x $args }
proc stm32l0x args { eval stm32lx $args }
proc stm32l1x args { eval stm32lx $args }
# stm32[g0|g4|wb|wl] uses the same flash driver as the stm32l4x
# stm32[g0|g4|l5|u5|wb|wl] uses the same flash driver as the stm32l4x
proc stm32g0x args { eval stm32l4x $args }
proc stm32g4x args { eval stm32l4x $args }
proc stm32l5x args { eval stm32l4x $args }
proc stm32u5x args { eval stm32l4x $args }
proc stm32wbx args { eval stm32l4x $args }
proc stm32wlx args { eval stm32l4x $args }

2
src/hello.c
View File

@ -88,7 +88,7 @@ COMMAND_HANDLER(handle_hello_command)
{
const char *sep, *name;
int retval = CALL_COMMAND_HANDLER(handle_hello_args, &sep, &name);
if (ERROR_OK == retval)
if (retval == ERROR_OK)
command_print(CMD, "Greetings%s%s!", sep, name);
return retval;
}

9
src/helper/Makefile.am
View File

@ -1,7 +1,5 @@
noinst_LTLIBRARIES += %D%/libhelper.la
%C%_libhelper_la_CPPFLAGS = $(AM_CPPFLAGS) $(LIBUSB1_CFLAGS)
%C%_libhelper_la_SOURCES = \
%D%/binarybuffer.c \
%D%/options.c \
@ -15,6 +13,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la
%D%/util.c \
%D%/jep106.c \
%D%/jim-nvp.c \
%D%/align.h \
%D%/binarybuffer.h \
%D%/bits.h \
%D%/configuration.h \
@ -33,12 +32,6 @@ noinst_LTLIBRARIES += %D%/libhelper.la
%D%/base64.c \
%D%/base64.h
%C%_libhelper_la_CFLAGS = $(AM_CFLAGS)
if IS_MINGW
# FD_* macros are sloppy with their signs on MinGW32 platform
%C%_libhelper_la_CFLAGS += -Wno-sign-compare
endif
STARTUP_TCL_SRCS += %D%/startup.tcl
EXTRA_DIST += \
%D%/bin2char.sh \

30
src/helper/align.h Normal file
View File

@ -0,0 +1,30 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* The content of this file is mainly copied/inspired from Linux kernel
* code in include/linux/align.h and include/uapi/linux/const.h
*
* Macro name 'ALIGN' conflicts with macOS/BSD file param.h
*/
#ifndef OPENOCD_HELPER_ALIGN_H
#define OPENOCD_HELPER_ALIGN_H
#define ALIGN_MASK(x, mask) \
({ \
typeof(mask) _mask = (mask); \
((x) + _mask) & ~_mask; \
})
/* @a is a power of 2 value */
#define ALIGN_UP(x, a) ALIGN_MASK(x, (typeof(x))(a) - 1)
#define ALIGN_DOWN(x, a) ((x) & ~((typeof(x))(a) - 1))
#define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0)
#define IS_PWR_OF_2(x) \
({ \
typeof(x) _x = (x); \
_x == 0 || (_x & (_x - 1)) == 0; \
})
#endif /* OPENOCD_HELPER_ALIGN_H */

4
src/helper/binarybuffer.c
View File

@ -53,7 +53,7 @@ static const char hex_digits[] = {
void *buf_cpy(const void *from, void *_to, unsigned size)
{
if (NULL == from || NULL == _to)
if (!from || !_to)
return NULL;
/* copy entire buffer */
@ -222,7 +222,7 @@ static void str_radix_guess(const char **_str, unsigned *_str_len,
unsigned *_radix)
{
unsigned radix = *_radix;
if (0 != radix)
if (radix != 0)
return;
const char *str = *_str;
unsigned str_len = *_str_len;

56
src/helper/command.c
View File

@ -118,7 +118,7 @@ static struct log_capture_state *command_log_capture_start(Jim_Interp *interp)
*/
static void command_log_capture_finish(struct log_capture_state *state)
{
if (NULL == state)
if (!state)
return;
log_remove_callback(tcl_output, state);
@ -175,7 +175,7 @@ static int workaround_createcommand(Jim_Interp *interp, const char *cmdName,
static int command_retval_set(Jim_Interp *interp, int retval)
{
int *return_retval = Jim_GetAssocData(interp, "retval");
if (return_retval != NULL)
if (return_retval)
*return_retval = retval;
return (retval == ERROR_OK) ? JIM_OK : retval;
@ -213,7 +213,7 @@ static char **script_command_args_alloc(
unsigned argc, Jim_Obj * const *argv, unsigned *nwords)
{
char **words = malloc(argc * sizeof(char *));
if (NULL == words)
if (!words)
return NULL;
unsigned i;
@ -221,7 +221,7 @@ static char **script_command_args_alloc(
int len;
const char *w = Jim_GetString(argv[i], &len);
words[i] = strdup(w);
if (words[i] == NULL) {
if (!words[i]) {
script_command_args_free(words, i);
return NULL;
}
@ -234,7 +234,7 @@ struct command_context *current_command_context(Jim_Interp *interp)
{
/* grab the command context from the associated data */
struct command_context *cmd_ctx = Jim_GetAssocData(interp, "context");
if (NULL == cmd_ctx) {
if (!cmd_ctx) {
/* Tcl can invoke commands directly instead of via command_run_line(). This would
* happen when the Jim Tcl interpreter is provided by eCos or if we are running
* commands in a startup script.
@ -285,7 +285,7 @@ static struct command *command_new(struct command_context *cmd_ctx,
full_name);
struct command *c = calloc(1, sizeof(struct command));
if (NULL == c)
if (!c)
return NULL;
c->name = strdup(cr->name);
@ -369,16 +369,16 @@ int __register_commands(struct command_context *cmd_ctx, const char *cmd_prefix,
const struct command_registration *cr = cmds + i;
struct command *c = NULL;
if (NULL != cr->name) {
if (cr->name) {
c = register_command(cmd_ctx, cmd_prefix, cr);
if (NULL == c) {
if (!c) {
retval = ERROR_FAIL;
break;
}
c->jim_handler_data = data;
c->jim_override_target = override_target;
}
if (NULL != cr->chain) {
if (cr->chain) {
if (cr->name) {
if (cmd_prefix) {
char *new_prefix = alloc_printf("%s %s", cmd_prefix, cr->name);
@ -394,11 +394,11 @@ int __register_commands(struct command_context *cmd_ctx, const char *cmd_prefix,
} else {
retval = __register_commands(cmd_ctx, cmd_prefix, cr->chain, data, override_target);
}
if (ERROR_OK != retval)
if (retval != ERROR_OK)
break;
}
}
if (ERROR_OK != retval) {
if (retval != ERROR_OK) {
for (unsigned j = 0; j < i; j++)
unregister_command(cmd_ctx, cmd_prefix, cmds[j].name);
}
@ -501,7 +501,7 @@ void command_print_sameline(struct command_invocation *cmd, const char *format,
va_start(ap, format);
string = alloc_vprintf(format, ap);
if (string != NULL && cmd) {
if (string && cmd) {
/* we want this collected in the log + we also want to pick it up as a tcl return
* value.
*
@ -524,7 +524,7 @@ void command_print(struct command_invocation *cmd, const char *format, ...)
va_start(ap, format);
string = alloc_vprintf(format, ap);
if (string != NULL && cmd) {
if (string && cmd) {
strcat(string, "\n"); /* alloc_vprintf guaranteed the buffer to be at least one
*char longer */
/* we want this collected in the log + we also want to pick it up as a tcl return
@ -670,7 +670,7 @@ int command_run_linef(struct command_context *context, const char *format, ...)
va_list ap;
va_start(ap, format);
string = alloc_vprintf(format, ap);
if (string != NULL) {
if (string) {
retval = command_run_line(context, string);
free(string);
}
@ -696,7 +696,7 @@ struct command_context *copy_command_context(struct command_context *context)
void command_done(struct command_context *cmd_ctx)
{
if (NULL == cmd_ctx)
if (!cmd_ctx)
return;
free(cmd_ctx);
@ -709,7 +709,7 @@ static int jim_find(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
return JIM_ERR;
const char *file = Jim_GetString(argv[1], NULL);
char *full_path = find_file(file);
if (full_path == NULL)
if (!full_path)
return JIM_ERR;
Jim_Obj *result = Jim_NewStringObj(interp, full_path, strlen(full_path));
free(full_path);
@ -815,9 +815,9 @@ static COMMAND_HELPER(command_help_show, struct help_entry *c,
/* If the match string occurs anywhere, we print out
* stuff for this command. */
bool is_match = (strstr(c->cmd_name, cmd_match) != NULL) ||
((c->usage != NULL) && (strstr(c->usage, cmd_match) != NULL)) ||
((c->help != NULL) && (strstr(c->help, cmd_match) != NULL));
bool is_match = strstr(c->cmd_name, cmd_match) ||
(c->usage && strstr(c->usage, cmd_match)) ||
(c->help && strstr(c->help, cmd_match));
if (is_match) {
if (c->usage && strlen(c->usage) > 0) {
@ -870,7 +870,7 @@ static COMMAND_HELPER(command_help_show, struct help_entry *c,
} else
msg = alloc_printf("%s", c->help ? c->help : "");
if (NULL != msg) {
if (msg) {
command_help_show_wrap(msg, n + 3, n + 3);
free(msg);
} else
@ -899,7 +899,7 @@ COMMAND_HANDLER(handle_help_command)
}
}
if (cmd_match == NULL) {
if (!cmd_match) {
LOG_ERROR("unable to build search string");
return -ENOMEM;
}
@ -954,8 +954,6 @@ static int exec_command(Jim_Interp *interp, struct command_context *cmd_ctx,
static int jim_command_dispatch(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
{
script_debug(interp, argc, argv);
/* check subcommands */
if (argc > 1) {
char *s = alloc_printf("%s %s", Jim_GetString(argv[0], NULL), Jim_GetString(argv[1], NULL));
@ -971,6 +969,8 @@ static int jim_command_dispatch(Jim_Interp *interp, int argc, Jim_Obj * const *a
Jim_DecrRefCount(interp, js);
}
script_debug(interp, argc, argv);
struct command *c = jim_to_command(interp);
if (!c->jim_handler && !c->handler) {
Jim_EvalObjPrefix(interp, Jim_NewStringObj(interp, "usage", -1), 1, argv);
@ -1171,7 +1171,7 @@ COMMAND_HANDLER(handle_sleep_command)
unsigned long duration = 0;
int retval = parse_ulong(CMD_ARGV[0], &duration);
if (ERROR_OK != retval)
if (retval != ERROR_OK)
return retval;
if (!busy) {
@ -1286,7 +1286,7 @@ struct command_context *command_init(const char *startup_tcl, Jim_Interp *interp
INIT_LIST_HEAD(context->help_list);
/* Create a jim interpreter if we were not handed one */
if (interp == NULL) {
if (!interp) {
/* Create an interpreter */
interp = Jim_CreateInterp();
/* Add all the Jim core commands */
@ -1354,11 +1354,11 @@ void process_jim_events(struct command_context *cmd_ctx)
LOG_ERROR("Invalid command argument"); \
return ERROR_COMMAND_ARGUMENT_INVALID; \
} \
if ((max == *ul) && (ERANGE == errno)) { \
if ((max == *ul) && (errno == ERANGE)) { \
LOG_ERROR("Argument overflow"); \
return ERROR_COMMAND_ARGUMENT_OVERFLOW; \
} \
if (min && (min == *ul) && (ERANGE == errno)) { \
if (min && (min == *ul) && (errno == ERANGE)) { \
LOG_ERROR("Argument underflow"); \
return ERROR_COMMAND_ARGUMENT_UNDERFLOW; \
} \
@ -1374,7 +1374,7 @@ DEFINE_PARSE_NUM_TYPE(_llong, long long, strtoll, LLONG_MIN, LLONG_MAX)
{ \
functype n; \
int retval = parse ## funcname(str, &n); \
if (ERROR_OK != retval) \
if (retval != ERROR_OK) \
return retval; \
if (n > max) \
return ERROR_COMMAND_ARGUMENT_OVERFLOW; \

4
src/helper/command.h
View File

@ -427,7 +427,7 @@ DECLARE_PARSE_WRAPPER(_target_addr, target_addr_t);
#define COMMAND_PARSE_NUMBER(type, in, out) \
do { \
int retval_macro_tmp = parse_ ## type(in, &(out)); \
if (ERROR_OK != retval_macro_tmp) { \
if (retval_macro_tmp != ERROR_OK) { \
command_print(CMD, stringify(out) \
" option value ('%s') is not valid", in); \
return retval_macro_tmp; \
@ -489,7 +489,7 @@ DECLARE_PARSE_WRAPPER(_target_addr, target_addr_t);
do { \
bool value; \
int retval_macro_tmp = command_parse_bool_arg(in, &value); \
if (ERROR_OK != retval_macro_tmp) { \
if (retval_macro_tmp != ERROR_OK) { \
command_print(CMD, stringify(out) \
" option value ('%s') is not valid", in); \
command_print(CMD, " choices are '%s' or '%s'", \

8
src/helper/configuration.c
View File

@ -111,7 +111,7 @@ FILE *open_file_from_path(const char *file, const char *mode)
return fopen(file, mode);
else {
char *full_path = find_file(file);
if (full_path == NULL)
if (!full_path)
return NULL;
FILE *fp = NULL;
fp = fopen(full_path, mode);
@ -150,12 +150,12 @@ char *get_home_dir(const char *append_path)
{
char *home = getenv("HOME");
if (home == NULL) {
if (!home) {
#ifdef _WIN32
home = getenv("USERPROFILE");
if (home == NULL) {
if (!home) {
char homepath[MAX_PATH];
char *drive = getenv("HOMEDRIVE");
@ -173,7 +173,7 @@ char *get_home_dir(const char *append_path)
#endif
}
if (home == NULL)
if (!home)
return home;
char *home_path;

8
src/helper/fileio.c
View File

@ -198,9 +198,9 @@ int fileio_read_u32(struct fileio *fileio, uint32_t *data)
retval = fileio_local_read(fileio, sizeof(uint32_t), buf, &size_read);
if (ERROR_OK == retval && sizeof(uint32_t) != size_read)
if (retval == ERROR_OK && sizeof(uint32_t) != size_read)
retval = -EIO;
if (ERROR_OK == retval)
if (retval == ERROR_OK)
*data = be_to_h_u32(buf);
return retval;
@ -208,7 +208,7 @@ int fileio_read_u32(struct fileio *fileio, uint32_t *data)
static int fileio_local_fgets(struct fileio *fileio, size_t size, void *buffer)
{
if (fgets(buffer, size, fileio->file) == NULL)
if (!fgets(buffer, size, fileio->file))
return ERROR_FILEIO_OPERATION_FAILED;
return ERROR_OK;
@ -252,7 +252,7 @@ int fileio_write_u32(struct fileio *fileio, uint32_t data)
retval = fileio_write(fileio, 4, buf, &size_written);
if (ERROR_OK == retval && size_written != sizeof(uint32_t))
if (retval == ERROR_OK && size_written != sizeof(uint32_t))
retval = -EIO;
return retval;

2
src/helper/jep106.c
View File

@ -27,7 +27,7 @@ static const char * const jep106[][126] = {
#include "jep106.inc"
};
const char *jep106_manufacturer(unsigned bank, unsigned id)
const char *jep106_table_manufacturer(unsigned int bank, unsigned int id)
{
if (id < 1 || id > 126) {
LOG_DEBUG("BUG: Caller passed out-of-range JEP106 ID!");

7
src/helper/jep106.h
View File

@ -27,6 +27,11 @@
* manufacturer associated with bank and id, or one of the strings
* "<invalid>" and "<unknown>".
*/
const char *jep106_manufacturer(unsigned bank, unsigned id);
const char *jep106_table_manufacturer(unsigned int bank, unsigned int id);
static inline const char *jep106_manufacturer(unsigned int manufacturer)
{
return jep106_table_manufacturer(manufacturer >> 7, manufacturer & 0x7f);
}
#endif /* OPENOCD_HELPER_JEP106_H */

14
src/helper/jim-nvp.c
View File

@ -66,7 +66,7 @@ int jim_get_nvp(Jim_Interp *interp,
struct jim_nvp *jim_nvp_name2value_simple(const struct jim_nvp *p, const char *name)
{
while (p->name) {
if (0 == strcmp(name, p->name))
if (strcmp(name, p->name) == 0)
break;
p++;
}
@ -76,7 +76,7 @@ struct jim_nvp *jim_nvp_name2value_simple(const struct jim_nvp *p, const char *n
struct jim_nvp *jim_nvp_name2value_nocase_simple(const struct jim_nvp *p, const char *name)
{
while (p->name) {
if (0 == strcasecmp(name, p->name))
if (strcasecmp(name, p->name) == 0)
break;
p++;
}
@ -199,7 +199,7 @@ int jim_getopt_obj(struct jim_getopt_info *goi, Jim_Obj **puthere)
}
if (puthere)
*puthere = o;
if (o != NULL)
if (o)
return JIM_OK;
else
return JIM_ERR;
@ -227,7 +227,7 @@ int jim_getopt_double(struct jim_getopt_info *goi, double *puthere)
Jim_Obj *o;
double _safe;
if (puthere == NULL)
if (!puthere)
puthere = &_safe;
r = jim_getopt_obj(goi, &o);
@ -245,7 +245,7 @@ int jim_getopt_wide(struct jim_getopt_info *goi, jim_wide *puthere)
Jim_Obj *o;
jim_wide _safe;
if (puthere == NULL)
if (!puthere)
puthere = &_safe;
r = jim_getopt_obj(goi, &o);
@ -260,7 +260,7 @@ int jim_getopt_nvp(struct jim_getopt_info *goi, const struct jim_nvp *nvp, struc
Jim_Obj *o;
int e;
if (puthere == NULL)
if (!puthere)
puthere = &_safe;
e = jim_getopt_obj(goi, &o);
@ -284,7 +284,7 @@ int jim_getopt_enum(struct jim_getopt_info *goi, const char *const *lookup, int
Jim_Obj *o;
int e;
if (puthere == NULL)
if (!puthere)
puthere = &_safe;
e = jim_getopt_obj(goi, &o);
if (e == JIM_OK)

28
src/helper/log.c
View File

@ -108,7 +108,7 @@ static void log_puts(enum log_levels level,
}
f = strrchr(file, '/');
if (f != NULL)
if (f)
file = f + 1;
if (strlen(string) > 0) {
@ -163,7 +163,7 @@ void log_printf(enum log_levels level,
va_start(ap, format);
string = alloc_vprintf(format, ap);
if (string != NULL) {
if (string) {
log_puts(level, file, line, function, string);
free(string);
}
@ -230,7 +230,7 @@ COMMAND_HANDLER(handle_debug_level_command)
COMMAND_HANDLER(handle_log_output_command)
{
if (CMD_ARGC == 0 || (CMD_ARGC == 1 && strcmp(CMD_ARGV[0], "default") == 0)) {
if (log_output != stderr && log_output != NULL) {
if (log_output != stderr && log_output) {
/* Close previous log file, if it was open and wasn't stderr. */
fclose(log_output);
}
@ -240,11 +240,11 @@ COMMAND_HANDLER(handle_log_output_command)
}
if (CMD_ARGC == 1) {
FILE *file = fopen(CMD_ARGV[0], "w");
if (file == NULL) {
if (!file) {
LOG_ERROR("failed to open output log '%s'", CMD_ARGV[0]);
return ERROR_FAIL;
}
if (log_output != stderr && log_output != NULL) {
if (log_output != stderr && log_output) {
/* Close previous log file, if it was open and wasn't stderr. */
fclose(log_output);
}
@ -287,16 +287,16 @@ void log_init(void)
/* set defaults for daemon configuration,
* if not set by cmdline or cfgfile */
char *debug_env = getenv("OPENOCD_DEBUG_LEVEL");
if (NULL != debug_env) {
if (debug_env) {
int value;
int retval = parse_int(debug_env, &value);
if (ERROR_OK == retval &&
if (retval == ERROR_OK &&
debug_level >= LOG_LVL_SILENT &&
debug_level <= LOG_LVL_DEBUG_IO)
debug_level = value;
}
if (log_output == NULL)
if (!log_output)
log_output = stderr;
start = last_time = timeval_ms();
@ -322,7 +322,7 @@ int log_add_callback(log_callback_fn fn, void *priv)
/* alloc memory, it is safe just to return in case of an error, no need for the caller to
*check this */
cb = malloc(sizeof(struct log_callback));
if (cb == NULL)
if (!cb)
return ERROR_BUF_TOO_SMALL;
/* add item to the beginning of the linked list */
@ -367,7 +367,7 @@ char *alloc_vprintf(const char *fmt, va_list ap)
* other code depend on that. They should be probably be fixed, but for
* now reserve the extra byte. */
string = malloc(len + 2);
if (string == NULL)
if (!string)
return NULL;
/* do the real work */
@ -473,11 +473,11 @@ void kept_alive(void)
/* if we sleep for extended periods of time, we must invoke keep_alive() intermittently */
void alive_sleep(uint64_t ms)
{
uint64_t napTime = 10;
for (uint64_t i = 0; i < ms; i += napTime) {
uint64_t nap_time = 10;
for (uint64_t i = 0; i < ms; i += nap_time) {
uint64_t sleep_a_bit = ms - i;
if (sleep_a_bit > napTime)
sleep_a_bit = napTime;
if (sleep_a_bit > nap_time)
sleep_a_bit = nap_time;
usleep(sleep_a_bit * 1000);
keep_alive();

14
src/helper/options.c
View File

@ -75,7 +75,7 @@ static char *find_exe_path(void)
do {
#if IS_WIN32 && !IS_CYGWIN
exepath = malloc(MAX_PATH);
if (exepath == NULL)
if (!exepath)
break;
GetModuleFileName(NULL, exepath, MAX_PATH);
@ -87,7 +87,7 @@ static char *find_exe_path(void)
#elif IS_DARWIN
exepath = malloc(PROC_PIDPATHINFO_MAXSIZE);
if (exepath == NULL)
if (!exepath)
break;
if (proc_pidpath(getpid(), exepath, PROC_PIDPATHINFO_MAXSIZE) <= 0) {
free(exepath);
@ -99,7 +99,7 @@ static char *find_exe_path(void)
#define PATH_MAX 1024
#endif
char *path = malloc(PATH_MAX);
if (path == NULL)
if (!path)
break;
int mib[] = { CTL_KERN, KERN_PROC, KERN_PROC_PATHNAME, -1 };
size_t size = PATH_MAX;
@ -117,14 +117,14 @@ static char *find_exe_path(void)
#elif defined(HAVE_REALPATH) /* Assume POSIX.1-2008 */
/* Try Unices in order of likelihood. */
exepath = realpath("/proc/self/exe", NULL); /* Linux/Cygwin */
if (exepath == NULL)
if (!exepath)
exepath = realpath("/proc/self/path/a.out", NULL); /* Solaris */
if (exepath == NULL)
if (!exepath)
exepath = realpath("/proc/curproc/file", NULL); /* FreeBSD (Should be covered above) */
#endif
} while (0);
if (exepath != NULL) {
if (exepath) {
/* Strip executable file name, leaving path */
*strrchr(exepath, '/') = '\0';
} else {
@ -163,7 +163,7 @@ static char *find_relative_path(const char *from, const char *to)
if (from[0] != '/')
i++;
char *next = strchr(from, '/');
if (next == NULL)
if (!next)
break;
from = next + 1;
}

60
src/helper/replacements.c
View File

@ -33,7 +33,7 @@
void *clear_malloc(size_t size)
{
void *t = malloc(size);
if (t != NULL)
if (t)
memset(t, 0x00, size);
return t;
}
@ -41,7 +41,7 @@ void *clear_malloc(size_t size)
void *fill_malloc(size_t size)
{
void *t = malloc(size);
if (t != NULL) {
if (t) {
/* We want to initialize memory to some known bad state.
* 0 and 0xff yields 0 and -1 as integers, which often
* have meaningful values. 0x5555... is not often a valid
@ -124,7 +124,7 @@ char *strndup(const char *s, size_t n)
size_t len = strnlen(s, n);
char *new = malloc(len + 1);
if (new == NULL)
if (!new)
return NULL;
new[len] = '\0';
@ -145,10 +145,10 @@ int win_select(int max_fd, fd_set *rfds, fd_set *wfds, fd_set *efds, struct time
struct timeval tvslice;
int retcode;
#define SAFE_FD_ISSET(fd, set) (set != NULL && FD_ISSET(fd, set))
#define SAFE_FD_ISSET(fd, set) (set && FD_ISSET(fd, set))
/* calculate how long we need to wait in milliseconds */
if (tv == NULL)
if (!tv)
ms_total = INFINITE;
else {
ms_total = tv->tv_sec * 1000;
@ -233,16 +233,16 @@ int win_select(int max_fd, fd_set *rfds, fd_set *wfds, fd_set *efds, struct time
if (retcode < 0)
retcode = 0;
for (i = 0; i < n_handles; i++) {
if (WAIT_OBJECT_0 == WaitForSingleObject(handles[i], 0)) {
if (WaitForSingleObject(handles[i], 0) == WAIT_OBJECT_0) {
if (SAFE_FD_ISSET(handle_slot_to_fd[i], rfds)) {
DWORD dwBytes;
DWORD bytes;
intptr_t handle = (intptr_t) _get_osfhandle(
handle_slot_to_fd[i]);
if (PeekNamedPipe((HANDLE)handle, NULL, 0,
NULL, &dwBytes, NULL)) {
NULL, &bytes, NULL)) {
/* check to see if gdb pipe has data available */
if (dwBytes) {
if (bytes) {
FD_SET(handle_slot_to_fd[i], &aread);
retcode++;
}
@ -275,45 +275,3 @@ int win_select(int max_fd, fd_set *rfds, fd_set *wfds, fd_set *efds, struct time
return retcode;
}
#endif
#if defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME
#include <libusb.h>
/* Verbatim from git://git.libusb.org/libusb.git tag 1.0.9
* The libusb_error enum is compatible down to v0.9.1
*/
const char *libusb_error_name(int error_code)
{
enum libusb_error error = error_code;
switch (error) {
case LIBUSB_SUCCESS:
return "LIBUSB_SUCCESS";
case LIBUSB_ERROR_IO:
return "LIBUSB_ERROR_IO";
case LIBUSB_ERROR_INVALID_PARAM:
return "LIBUSB_ERROR_INVALID_PARAM";
case LIBUSB_ERROR_ACCESS:
return "LIBUSB_ERROR_ACCESS";
case LIBUSB_ERROR_NO_DEVICE:
return "LIBUSB_ERROR_NO_DEVICE";
case LIBUSB_ERROR_NOT_FOUND:
return "LIBUSB_ERROR_NOT_FOUND";
case LIBUSB_ERROR_BUSY:
return "LIBUSB_ERROR_BUSY";
case LIBUSB_ERROR_TIMEOUT:
return "LIBUSB_ERROR_TIMEOUT";
case LIBUSB_ERROR_OVERFLOW:
return "LIBUSB_ERROR_OVERFLOW";
case LIBUSB_ERROR_PIPE:
return "LIBUSB_ERROR_PIPE";
case LIBUSB_ERROR_INTERRUPTED:
return "LIBUSB_ERROR_INTERRUPTED";
case LIBUSB_ERROR_NO_MEM:
return "LIBUSB_ERROR_NO_MEM";
case LIBUSB_ERROR_NOT_SUPPORTED:
return "LIBUSB_ERROR_NOT_SUPPORTED";
case LIBUSB_ERROR_OTHER:
return "LIBUSB_ERROR_OTHER";
}
return "**UNKNOWN**";
}
#endif

4
src/helper/replacements.h
View File

@ -328,8 +328,4 @@ typedef struct {
#endif /* HAVE_ELF64 */
#if defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME
const char *libusb_error_name(int error_code);
#endif /* defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME */
#endif /* OPENOCD_HELPER_REPLACEMENTS_H */

2
src/helper/time_support.c
View File

@ -86,7 +86,7 @@ int duration_measure(struct duration *duration)
{
struct timeval end;
int retval = gettimeofday(&end, NULL);
if (0 == retval)
if (retval == 0)
timeval_subtract(&duration->elapsed, &end, &duration->start);
return retval;
}

Some files were not shown because too many files have changed in this diff Show More