diff --git a/.github/workflows/snapshot.yml b/.github/workflows/snapshot.yml index b5a9e07ee..c53b1944b 100644 --- a/.github/workflows/snapshot.yml +++ b/.github/workflows/snapshot.yml @@ -22,7 +22,7 @@ jobs: - run: ./bootstrap - name: Prepare libusb1 env: - LIBUSB1_VER: 1.0.23 + LIBUSB1_VER: 1.0.24 run: | mkdir -p $DL_DIR && cd $DL_DIR wget "https://github.com/libusb/libusb/releases/download/v${LIBUSB1_VER}/libusb-${LIBUSB1_VER}.tar.bz2" @@ -30,7 +30,7 @@ jobs: echo "LIBUSB1_SRC=$PWD/libusb-${LIBUSB1_VER}" >> $GITHUB_ENV - name: Prepare hidapi env: - HIDAPI_VER: 0.9.0 + HIDAPI_VER: 0.10.1 run: | mkdir -p $DL_DIR && cd $DL_DIR wget "https://github.com/libusb/hidapi/archive/hidapi-${HIDAPI_VER}.tar.gz" @@ -38,14 +38,6 @@ jobs: cd hidapi-hidapi-${HIDAPI_VER} ./bootstrap echo "HIDAPI_SRC=$PWD" >> $GITHUB_ENV - - name: Prepare libftdi - env: - LIBFTDI_VER: 1.4 - run: | - mkdir -p $DL_DIR && cd $DL_DIR - wget "http://www.intra2net.com/en/developer/libftdi/download/libftdi1-${LIBFTDI_VER}.tar.bz2" - tar -xjf libftdi1-${LIBFTDI_VER}.tar.bz2 - echo "LIBFTDI_SRC=$PWD/libftdi1-${LIBFTDI_VER}" >> $GITHUB_ENV - name: Prepare capstone env: CAPSTONE_VER: 4.0.2 @@ -60,9 +52,8 @@ jobs: env: MAKE_JOBS: 2 HOST: i686-w64-mingw32 - LIBUSB1_CONFIG: --enable-shared --enable-static + LIBUSB1_CONFIG: --enable-shared --disable-static HIDAPI_CONFIG: --enable-shared --disable-static --disable-testgui - LIBFTDI_CONFIG: "-DCMAKE_TOOLCHAIN_FILE='${{ env.LIBFTDI_SRC }}/cmake/Toolchain-i686-w64-mingw32.cmake' -DBUILD_TESTS:BOOL=off -DFTDIPP:BOOL=off -DPYTHON_BINDINGS:BOOL=off -DEXAMPLES:BOOL=off -DDOCUMENTATION:BOOL=off -DFTDI_EEPROM:BOOL=off" CAPSTONE_CONFIG: "CAPSTONE_BUILD_CORE_ONLY=yes CAPSTONE_STATIC=yes CAPSTONE_SHARED=no" run: | # check if there is tag pointing at HEAD, otherwise take the HEAD SHA-1 as OPENOCD_TAG diff --git a/configure.ac b/configure.ac index 46bd269e4..f969680f5 100644 --- a/configure.ac +++ b/configure.ac @@ -571,9 +571,6 @@ AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [ PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [ use_libusb1=yes AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x]) - PKG_CHECK_EXISTS([libusb-1.0 >= 1.0.9], - [AC_DEFINE([HAVE_LIBUSB_ERROR_NAME], [1], [Define if your libusb has libusb_error_name()])], - [AC_MSG_WARN([libusb-1.x older than 1.0.9 detected, consider updating])]) LIBUSB1_CFLAGS=`echo $LIBUSB1_CFLAGS | sed 's/-I/-isystem /'` AC_MSG_NOTICE([libusb-1.0 header bug workaround: LIBUSB1_CFLAGS changed to "$LIBUSB1_CFLAGS"]) PKG_CHECK_EXISTS([libusb-1.0 >= 1.0.16], diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules index 1829f076c..a6ff995e1 100644 --- a/contrib/60-openocd.rules +++ b/contrib/60-openocd.rules @@ -24,6 +24,8 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6011", MODE="660", GROUP="plugdev", # Original FT232H VID:PID ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="660", GROUP="plugdev", TAG+="uaccess" +# Original FT231XQ VID:PID +ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", MODE="660", GROUP="plugdev", TAG+="uaccess" # DISTORTEC JTAG-lock-pick Tiny 2 ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="660", GROUP="plugdev", TAG+="uaccess" @@ -125,6 +127,9 @@ ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6001", MODE="660", GROUP="plugdev", ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6010", MODE="660", GROUP="plugdev", TAG+="uaccess" ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6810", MODE="660", GROUP="plugdev", TAG+="uaccess" +# Ashling Opella-LD +ATTRS{idVendor}=="0B6B", ATTRS{idProduct}=="0040", MODE="660", GROUP="plugdev", TAG+="uaccess" + # Amontec JTAGkey-HiSpeed ATTRS{idVendor}=="0fbb", ATTRS{idProduct}=="1000", MODE="660", GROUP="plugdev", TAG+="uaccess" diff --git a/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c b/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c index 5c717ce0e..6cf30c3bc 100644 --- a/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c +++ b/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c @@ -30,12 +30,12 @@ socat TCP6-LISTEN:7777,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10" On host run: - openocd -c "interface remote_bitbang; remote_bitbang_host raspberrypi; remote_bitbang_port 7777" \ + openocd -c "interface remote_bitbang; remote_bitbang host raspberrypi; remote_bitbang port 7777" \ -f target/stm32f1x.cfg Or if you want to test UNIX sockets, run both on Raspberry Pi: socat UNIX-LISTEN:/tmp/remotebitbang-socket,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10" - openocd -c "interface remote_bitbang; remote_bitbang_host /tmp/remotebitbang-socket" -f target/stm32f1x.cfg + openocd -c "interface remote_bitbang; remote_bitbang host /tmp/remotebitbang-socket" -f target/stm32f1x.cfg */ #include diff --git a/doc/openocd.texi b/doc/openocd.texi index b66ee44bf..bcfc53f98 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -202,7 +202,7 @@ communication between users: @section OpenOCD IRC Support can also be found on irc: -@uref{irc://irc.freenode.net/openocd} +@uref{irc://irc.libera.chat/openocd} @node Developers @chapter OpenOCD Developer Resources @@ -2378,7 +2378,7 @@ Amontec Chameleon in its JTAG Accelerator configuration, connected to a PC's EPP mode parallel port. This defines some driver-specific commands: -@deffn {Config Command} {parport_port} number +@deffn {Config Command} {parport port} number Specifies either the address of the I/O port (default: 0x378 for LPT1) or the number of the @file{/dev/parport} device. @end deffn @@ -2466,10 +2466,10 @@ configuration files, without the need to patch and rebuild OpenOCD. The driver uses a signal abstraction to enable Tcl configuration files to define outputs for one or several FTDI GPIO. These outputs can then be -controlled using the @command{ftdi_set_signal} command. Special signal names +controlled using the @command{ftdi set_signal} command. Special signal names are reserved for nTRST, nSRST and LED (for blink) so that they, if defined, will be used for their customary purpose. Inputs can be read using the -@command{ftdi_get_signal} command. +@command{ftdi get_signal} command. To support SWD, a signal named SWD_EN must be defined. It is set to 1 when the SWD protocol is selected. When set, the adapter should route the SWDIO pin to @@ -2494,21 +2494,21 @@ signal. The following output buffer configurations are supported: These interfaces have several commands, used to configure the driver before initializing the JTAG scan chain: -@deffn {Config Command} {ftdi_vid_pid} [vid pid]+ +@deffn {Config Command} {ftdi vid_pid} [vid pid]+ The vendor ID and product ID of the adapter. Up to eight [@var{vid}, @var{pid}] pairs may be given, e.g. @example -ftdi_vid_pid 0x0403 0xcff8 0x15ba 0x0003 +ftdi vid_pid 0x0403 0xcff8 0x15ba 0x0003 @end example @end deffn -@deffn {Config Command} {ftdi_device_desc} description +@deffn {Config Command} {ftdi device_desc} description Provides the USB device description (the @emph{iProduct string}) of the adapter. If not specified, the device description is ignored during device selection. @end deffn -@deffn {Config Command} {ftdi_serial} serial-number +@deffn {Config Command} {ftdi serial} serial-number Specifies the @var{serial-number} of the adapter to use, in case the vendor provides unique IDs and more than one adapter is connected to the host. @@ -2517,12 +2517,12 @@ If not specified, serial numbers are not considered. and are not restricted to containing only decimal digits.) @end deffn -@deffn {Config Command} {ftdi_channel} channel +@deffn {Config Command} {ftdi channel} channel Selects the channel of the FTDI device to use for MPSSE operations. Most adapters use the default, channel 0, but there are exceptions. @end deffn -@deffn {Config Command} {ftdi_layout_init} data direction +@deffn {Config Command} {ftdi layout_init} data direction Specifies the initial values of the FTDI GPIO data and direction registers. Each value is a 16-bit number corresponding to the concatenation of the high and low FTDI GPIO registers. The values should be selected based on the @@ -2531,7 +2531,7 @@ minimal impact on the target system. Avoid floating inputs, conflicting outputs and initially asserted reset signals. @end deffn -@deffn {Command} {ftdi_layout_signal} name [@option{-data}|@option{-ndata} data_mask] [@option{-input}|@option{-ninput} input_mask] [@option{-oe}|@option{-noe} oe_mask] [@option{-alias}|@option{-nalias} name] +@deffn {Command} {ftdi layout_signal} name [@option{-data}|@option{-ndata} data_mask] [@option{-input}|@option{-ninput} input_mask] [@option{-oe}|@option{-noe} oe_mask] [@option{-alias}|@option{-nalias} name] Creates a signal with the specified @var{name}, controlled by one or more FTDI GPIO pins via a range of possible buffer connections. The masks are FTDI GPIO register bitmasks to tell the driver the connection and type of the output @@ -2541,7 +2541,7 @@ used with inverting data inputs and @option{-data} with non-inverting inputs. The @option{-oe} (or @option{-noe}) option tells where the output-enable (or not-output-enable) input to the output buffer is connected. The options @option{-input} and @option{-ninput} specify the bitmask for pins to be read -with the method @command{ftdi_get_signal}. +with the method @command{ftdi get_signal}. Both @var{data_mask} and @var{oe_mask} need not be specified. For example, a simple open-collector transistor driver would be specified with @option{-oe} @@ -2562,7 +2562,7 @@ identical (or with data inverted) to an already specified signal @var{name}. @end deffn -@deffn {Command} {ftdi_set_signal} name @option{0}|@option{1}|@option{z} +@deffn {Command} {ftdi set_signal} name @option{0}|@option{1}|@option{z} Set a previously defined signal to the specified level. @itemize @minus @item @option{0}, drive low @@ -2571,11 +2571,11 @@ Set a previously defined signal to the specified level. @end itemize @end deffn -@deffn {Command} {ftdi_get_signal} name +@deffn {Command} {ftdi get_signal} name Get the value of a previously defined signal. @end deffn -@deffn {Command} {ftdi_tdo_sample_edge} @option{rising}|@option{falling} +@deffn {Command} {ftdi tdo_sample_edge} @option{rising}|@option{falling} Configure TCK edge at which the adapter samples the value of the TDO signal Due to signal propagation delays, sampling TDO on rising TCK can become quite @@ -2632,47 +2632,47 @@ FT232R These interfaces have several commands, used to configure the driver before initializing the JTAG scan chain: -@deffn {Config Command} {ft232r_vid_pid} @var{vid} @var{pid} +@deffn {Config Command} {ft232r vid_pid} @var{vid} @var{pid} The vendor ID and product ID of the adapter. If not specified, default 0x0403:0x6001 is used. @end deffn -@deffn {Config Command} {ft232r_serial_desc} @var{serial} +@deffn {Config Command} {ft232r serial_desc} @var{serial} Specifies the @var{serial} of the adapter to use, in case the vendor provides unique IDs and more than one adapter is connected to the host. If not specified, serial numbers are not considered. @end deffn -@deffn {Config Command} {ft232r_jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo} +@deffn {Config Command} {ft232r jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo} Set four JTAG GPIO numbers at once. If not specified, default 0 3 1 2 or TXD CTS RXD RTS is used. @end deffn -@deffn {Config Command} {ft232r_tck_num} @var{tck} +@deffn {Config Command} {ft232r tck_num} @var{tck} Set TCK GPIO number. If not specified, default 0 or TXD is used. @end deffn -@deffn {Config Command} {ft232r_tms_num} @var{tms} +@deffn {Config Command} {ft232r tms_num} @var{tms} Set TMS GPIO number. If not specified, default 3 or CTS is used. @end deffn -@deffn {Config Command} {ft232r_tdi_num} @var{tdi} +@deffn {Config Command} {ft232r tdi_num} @var{tdi} Set TDI GPIO number. If not specified, default 1 or RXD is used. @end deffn -@deffn {Config Command} {ft232r_tdo_num} @var{tdo} +@deffn {Config Command} {ft232r tdo_num} @var{tdo} Set TDO GPIO number. If not specified, default 2 or RTS is used. @end deffn -@deffn {Config Command} {ft232r_trst_num} @var{trst} +@deffn {Config Command} {ft232r trst_num} @var{trst} Set TRST GPIO number. If not specified, default 4 or DTR is used. @end deffn -@deffn {Config Command} {ft232r_srst_num} @var{srst} +@deffn {Config Command} {ft232r srst_num} @var{srst} Set SRST GPIO number. If not specified, default 6 or DCD is used. @end deffn -@deffn {Config Command} {ft232r_restore_serial} @var{word} +@deffn {Config Command} {ft232r restore_serial} @var{word} Restore serial port after JTAG. This USB bitmode control word (16-bit) will be sent before quit. Lower byte should set GPIO direction register to a "sane" state: @@ -2694,14 +2694,14 @@ instead of directly driving JTAG. The remote_bitbang driver is useful for debugging software running on processors which are being simulated. -@deffn {Config Command} {remote_bitbang_port} number +@deffn {Config Command} {remote_bitbang port} number Specifies the TCP port of the remote process to connect to or 0 to use UNIX sockets instead of TCP. @end deffn -@deffn {Config Command} {remote_bitbang_host} hostname +@deffn {Config Command} {remote_bitbang host} hostname Specifies the hostname of the remote process to connect to using TCP, or the -name of the UNIX socket to use if remote_bitbang_port is 0. +name of the UNIX socket to use if remote_bitbang port is 0. @end deffn For example, to connect remotely via TCP to the host foobar you might have @@ -2709,8 +2709,8 @@ something like: @example adapter driver remote_bitbang -remote_bitbang_port 3335 -remote_bitbang_host foobar +remote_bitbang port 3335 +remote_bitbang host foobar @end example To connect to another process running locally via UNIX sockets with socket @@ -2718,8 +2718,8 @@ named mysocket: @example adapter driver remote_bitbang -remote_bitbang_port 0 -remote_bitbang_host mysocket +remote_bitbang port 0 +remote_bitbang host mysocket @end example @end deffn @@ -2728,28 +2728,28 @@ USB JTAG/USB-Blaster compatibles over one of the userspace libraries for FTDI chips. These interfaces have several commands, used to configure the driver before initializing the JTAG scan chain: -@deffn {Config Command} {usb_blaster_device_desc} description +@deffn {Config Command} {usb_blaster device_desc} description Provides the USB device description (the @emph{iProduct string}) of the FTDI FT245 device. If not specified, the FTDI default value is used. This setting is only valid if compiled with FTD2XX support. @end deffn -@deffn {Config Command} {usb_blaster_vid_pid} vid pid +@deffn {Config Command} {usb_blaster vid_pid} vid pid The vendor ID and product ID of the FTDI FT245 device. If not specified, default values are used. Currently, only one @var{vid}, @var{pid} pair may be given, e.g. for Altera USB-Blaster (default): @example -usb_blaster_vid_pid 0x09FB 0x6001 +usb_blaster vid_pid 0x09FB 0x6001 @end example The following VID/PID is for Kolja Waschk's USB JTAG: @example -usb_blaster_vid_pid 0x16C0 0x06AD +usb_blaster vid_pid 0x16C0 0x06AD @end example @end deffn -@deffn {Command} {usb_blaster_pin} (@option{pin6}|@option{pin8}) (@option{0}|@option{1}|@option{s}|@option{t}) +@deffn {Command} {usb_blaster pin} (@option{pin6}|@option{pin8}) (@option{0}|@option{1}|@option{s}|@option{t}) Sets the state or function of the unused GPIO pins on USB-Blasters (pins 6 and 8 on the female JTAG header). These pins can be used as SRST and/or TRST provided the appropriate connections are made on the @@ -2757,18 +2757,18 @@ target board. For example, to use pin 6 as SRST: @example -usb_blaster_pin pin6 s +usb_blaster pin pin6 s reset_config srst_only @end example @end deffn -@deffn {Config Command} {usb_blaster_lowlevel_driver} (@option{ftdi}|@option{ublast2}) +@deffn {Config Command} {usb_blaster lowlevel_driver} (@option{ftdi}|@option{ublast2}) Chooses the low level access method for the adapter. If not specified, @option{ftdi} is selected unless it wasn't enabled during the configure stage. USB-Blaster II needs @option{ublast2}. @end deffn -@deffn {Config Command} {usb_blaster_firmware} @var{path} +@deffn {Config Command} {usb_blaster firmware} @var{path} This command specifies @var{path} to access USB-Blaster II firmware image. To be used with USB-Blaster II only. @end deffn @@ -2779,7 +2779,7 @@ image. To be used with USB-Blaster II only. Gateworks GW16012 JTAG programmer. This has one driver-specific command: -@deffn {Config Command} {parport_port} [port_number] +@deffn {Config Command} {parport port} [port_number] Display either the address of the I/O port (default: 0x378 for LPT1) or the number of the @file{/dev/parport} device. If a parameter is provided, first switch to use that port. @@ -2938,7 +2938,7 @@ Wigglers, PLD download cable, and more. These interfaces have several commands, used to configure the driver before initializing the JTAG scan chain: -@deffn {Config Command} {parport_cable} name +@deffn {Config Command} {parport cable} name Set the layout of the parallel port cable used to connect to the target. This is a write-once setting. Currently valid cable @var{name} values include: @@ -2968,18 +2968,18 @@ several clones, such as the Olimex ARM-JTAG @end itemize @end deffn -@deffn {Config Command} {parport_port} [port_number] +@deffn {Config Command} {parport port} [port_number] Display either the address of the I/O port (default: 0x378 for LPT1) or the number of the @file{/dev/parport} device. If a parameter is provided, first switch to use that port. This is a write-once setting. When using PPDEV to access the parallel port, use the number of the parallel port: -@option{parport_port 0} (the default). If @option{parport_port 0x378} is specified +@option{parport port 0} (the default). If @option{parport port 0x378} is specified you may encounter a problem. @end deffn -@deffn {Config Command} {parport_toggling_time} [nanoseconds] +@deffn {Config Command} {parport toggling_time} [nanoseconds] Displays how many nanoseconds the hardware needs to toggle TCK; the parport driver uses this value to obey the @command{adapter speed} configuration. @@ -2992,7 +2992,7 @@ However, you may want to calibrate for your specific hardware. To measure the toggling time with a logic analyzer or a digital storage oscilloscope, follow the procedure below: @example -> parport_toggling_time 1000 +> parport toggling_time 1000 > adapter speed 500 @end example This sets the maximum JTAG clock speed of the hardware, but @@ -3002,7 +3002,7 @@ You can use @command{runtest 1000} or something similar to generate a large set of samples. Update the setting to match your measurement: @example -> parport_toggling_time +> parport toggling_time @end example Now the clock speed will be a better match for @command{adapter speed} command given in OpenOCD scripts and event handlers. @@ -3016,7 +3016,7 @@ be conservative. @end quotation @end deffn -@deffn {Config Command} {parport_write_on_exit} (@option{on}|@option{off}) +@deffn {Config Command} {parport write_on_exit} (@option{on}|@option{off}) This will configure the parallel driver to write a known cable-specific value to the parallel interface on exiting OpenOCD. @end deffn @@ -3026,14 +3026,14 @@ classic ``Wiggler'' cable on LPT2 might look something like this: @example adapter driver parport -parport_port 0x278 -parport_cable wiggler +parport port 0x278 +parport cable wiggler @end example @end deffn @deffn {Interface Driver} {presto} ASIX PRESTO USB JTAG programmer. -@deffn {Config Command} {presto_serial} serial_string +@deffn {Config Command} {presto serial} serial_string Configures the USB serial number of the Presto device to use. @end deffn @end deffn @@ -3172,7 +3172,7 @@ exposed via extended capability registers in the PCI Express configuration space For more information see Xilinx PG245 (Section on From_PCIE_to_JTAG mode). -@deffn {Config Command} {xlnx_pcie_xvc_config} device +@deffn {Config Command} {xlnx_pcie_xvc config} device Specifies the PCI Express device via parameter @var{device} to use. The correct value for @var{device} can be obtained by looking at the output @@ -3197,6 +3197,73 @@ configuration on exit. See @file{interface/raspberrypi-native.cfg} for a sample config and pinout. +@deffn {Config Command} {bcm2835gpio jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo} +Set JTAG transport GPIO numbers for TCK, TMS, TDI, and TDO (in that order). +Must be specified to enable JTAG transport. These pins can also be specified +individually. +@end deffn + +@deffn {Config Command} {bcm2835gpio tck_num} @var{tck} +Set TCK GPIO number. Must be specified to enable JTAG transport. Can also be +specified using the configuration command @command{bcm2835gpio jtag_nums}. +@end deffn + +@deffn {Config Command} {bcm2835gpio tms_num} @var{tms} +Set TMS GPIO number. Must be specified to enable JTAG transport. Can also be +specified using the configuration command @command{bcm2835gpio jtag_nums}. +@end deffn + +@deffn {Config Command} {bcm2835gpio tdo_num} @var{tdo} +Set TDO GPIO number. Must be specified to enable JTAG transport. Can also be +specified using the configuration command @command{bcm2835gpio jtag_nums}. +@end deffn + +@deffn {Config Command} {bcm2835gpio tdi_num} @var{tdi} +Set TDI GPIO number. Must be specified to enable JTAG transport. Can also be +specified using the configuration command @command{bcm2835gpio jtag_nums}. +@end deffn + +@deffn {Config Command} {bcm2835gpio swd_nums} @var{swclk} @var{swdio} +Set SWD transport GPIO numbers for SWCLK and SWDIO (in that order). Must be +specified to enable SWD transport. These pins can also be specified individually. +@end deffn + +@deffn {Config Command} {bcm2835gpio swclk_num} @var{swclk} +Set SWCLK GPIO number. Must be specified to enable SWD transport. Can also be +specified using the configuration command @command{bcm2835gpio swd_nums}. +@end deffn + +@deffn {Config Command} {bcm2835gpio swdio_num} @var{swdio} +Set SWDIO GPIO number. Must be specified to enable SWD transport. Can also be +specified using the configuration command @command{bcm2835gpio swd_nums}. +@end deffn + +@deffn {Config Command} {bcm2835gpio swdio_dir_num} @var{swdio} @var{dir} +Set SWDIO direction control pin GPIO number. If specified, this pin can be used +to control the direction of an external buffer on the SWDIO pin (set=output +mode, clear=input mode). If not specified, this feature is disabled. +@end deffn + +@deffn {Config Command} {bcm2835gpio srst_num} @var{srst} +Set SRST GPIO number. Must be specified to enable SRST. +@end deffn + +@deffn {Config Command} {bcm2835gpio trst_num} @var{trst} +Set TRST GPIO number. Must be specified to enable TRST. +@end deffn + +@deffn {Config Command} {bcm2835gpio speed_coeffs} @var{speed_coeff} @var{speed_offset} +Set SPEED_COEFF and SPEED_OFFSET for delay calculations. If unspecified, +speed_coeff defaults to 113714, and speed_offset defaults to 28. +@end deffn + +@deffn {Config Command} {bcm2835gpio peripheral_base} @var{base} +Set the peripheral base register address to access GPIOs. For the RPi1, use +0x20000000. For RPi2 and RPi3, use 0x3F000000. For RPi4, use 0xFE000000. A full +list can be found in the +@uref{https://www.raspberrypi.org/documentation/hardware/raspberrypi/peripheral_addresses.md, official guide}. +@end deffn + @end deffn @deffn {Interface Driver} {imx_gpio} @@ -3231,7 +3298,7 @@ See @file{interface/sysfsgpio-raspberrypi.cfg} for a sample config. OpenJTAG compatible USB adapter. This defines some driver-specific commands: -@deffn {Config Command} {openjtag_variant} variant +@deffn {Config Command} {openjtag variant} variant Specifies the variant of the OpenJTAG adapter (see @uref{http://www.openjtag.org/}). Currently valid @var{variant} values include: @@ -3242,7 +3309,7 @@ Currently valid @var{variant} values include: @end itemize @end deffn -@deffn {Config Command} {openjtag_device_desc} string +@deffn {Config Command} {openjtag device_desc} string The USB device description string of the adapter. This value is only used with the standard variant. @end deffn @@ -3254,11 +3321,11 @@ SystemVerilog Direct Programming Interface (DPI) compatible driver for JTAG devices in emulation. The driver acts as a client for the SystemVerilog DPI server interface. -@deffn {Config Command} {jtag_dpi_set_port} port +@deffn {Config Command} {jtag_dpi set_port} port Specifies the TCP/IP port number of the SystemVerilog DPI server interface. @end deffn -@deffn {Config Command} {jtag_dpi_set_address} address +@deffn {Config Command} {jtag_dpi set_address} address Specifies the TCP/IP address of the SystemVerilog DPI server interface. @end deffn @end deffn @@ -3272,21 +3339,21 @@ It uses a simple data protocol over a serial port connection. Most hardware development boards have a UART, a real serial port, or a virtual USB serial device, so this driver allows you to start building your own JTAG adapter without the complexity of a custom USB connection. -@deffn {Config Command} {buspirate_port} serial_port +@deffn {Config Command} {buspirate port} serial_port Specify the serial port's filename. For example: @example -buspirate_port /dev/ttyUSB0 +buspirate port /dev/ttyUSB0 @end example @end deffn -@deffn {Config Command} {buspirate_speed} (normal|fast) +@deffn {Config Command} {buspirate speed} (normal|fast) Set the communication speed to 115k (normal) or 1M (fast). For example: @example -buspirate_mode normal +buspirate speed normal @end example @end deffn -@deffn {Config Command} {buspirate_mode} (normal|open-drain) +@deffn {Config Command} {buspirate mode} (normal|open-drain) Set the Bus Pirate output mode. @itemize @minus @item In normal mode (push/pull), do not enable the pull-ups, and do not connect I/O header pin VPU to JTAG VREF. @@ -3294,33 +3361,33 @@ Set the Bus Pirate output mode. @end itemize For example: @example -buspirate_mode normal +buspirate mode normal @end example @end deffn -@deffn {Config Command} {buspirate_pullup} (0|1) +@deffn {Config Command} {buspirate pullup} (0|1) Whether to connect (1) or not (0) the I/O header pin VPU (JTAG VREF) to the pull-up/pull-down resistors on MOSI (JTAG TDI), CLK (JTAG TCK), MISO (JTAG TDO) and CS (JTAG TMS). For example: @example -buspirate_pullup 0 +buspirate pullup 0 @end example @end deffn -@deffn {Config Command} {buspirate_vreg} (0|1) +@deffn {Config Command} {buspirate vreg} (0|1) Whether to enable (1) or disable (0) the built-in voltage regulator, which can be used to supply power to a test circuit through I/O header pins +3V3 and +5V. For example: @example -buspirate_vreg 0 +buspirate vreg 0 @end example @end deffn -@deffn {Command} {buspirate_led} (0|1) +@deffn {Command} {buspirate led} (0|1) Turns the Bus Pirate's LED on (1) or off (0). For example: @end deffn @example -buspirate_led 1 +buspirate led 1 @end example @end deffn @@ -4821,8 +4888,8 @@ They are not otherwise documented here. @deffn {Command} {$target_name array2mem} arrayname width address count @deffnx {Command} {$target_name mem2array} arrayname width address count These provide an efficient script-oriented interface to memory. -The @code{array2mem} primitive writes bytes, halfwords, or words; -while @code{mem2array} reads them. +The @code{array2mem} primitive writes bytes, halfwords, words +or double-words; while @code{mem2array} reads them. In both cases, the TCL side uses an array, and the target side uses raw memory. @@ -4835,7 +4902,7 @@ and neither store nor return those values. @itemize @item @var{arrayname} ... is the name of an array variable -@item @var{width} ... is 8/16/32 - indicating the memory access size +@item @var{width} ... is 8/16/32/64 - indicating the memory access size @item @var{address} ... is the target memory address @item @var{count} ... is the number of elements to process @end itemize @@ -7235,7 +7302,7 @@ The @var{num} parameter is a value shown by @command{flash banks}. @end deffn @deffn {Flash Driver} {stm32l4x} -All members of the STM32 G0, G4, L4, L4+, L5, WB and WL +All members of the STM32 G0, G4, L4, L4+, L5, U5, WB and WL microcontroller families from STMicroelectronics include internal flash and use ARM Cortex-M0+, M4 and M33 cores. The driver automatically recognizes a number of these chips using @@ -7277,6 +7344,13 @@ Unlocks the entire stm32 device. The @var{num} parameter is a value shown by @command{flash banks}. @end deffn +@deffn Command {stm32l4x flashloader} num [@option{enable} | @option{disable}] +Enables or disables the flashloader usage (enabled by default), +when disabled it will fall back to direct memory access to program the Flash or OTP memories. +if neither @option{enabled} nor @option{disable} are specified, the command will display +the current configuration. +@end deffn + @deffn {Command} {stm32l4x mass_erase} num Mass erases the entire stm32l4x device. The @var{num} parameter is a value shown by @command{flash banks}. @@ -7333,6 +7407,14 @@ write protected areas in a specific @var{device_bank} Forces a re-load of the option byte registers. Will cause a system reset of the device. The @var{num} parameter is a value shown by @command{flash banks}. @end deffn + +@deffn Command {stm32l4x trustzone} num [@option{enable} | @option{disable}] +Enables or disables Global TrustZone Security, using the TZEN option bit. +If neither @option{enabled} nor @option{disable} are specified, the command will display +the TrustZone status. +@emph{Note:} This command works only with devices with TrustZone, eg. STM32L5. +@emph{Note:} This command will perform an OBL_Launch after modifying the TZEN. +@end deffn @end deffn @deffn {Flash Driver} {str7x} diff --git a/src/flash/common.c b/src/flash/common.c index 3e2551192..0e7fe13ab 100644 --- a/src/flash/common.c +++ b/src/flash/common.c @@ -25,14 +25,14 @@ unsigned get_flash_name_index(const char *name) { const char *name_index = strrchr(name, '.'); - if (NULL == name_index) + if (!name_index) return 0; if (name_index[1] < '0' || name_index[1] > '9') return ~0U; unsigned requested; int retval = parse_uint(name_index + 1, &requested); /* detect parsing error by forcing past end of bank list */ - return (ERROR_OK == retval) ? requested : ~0U; + return (retval == ERROR_OK) ? requested : ~0U; } bool flash_driver_name_matches(const char *name, const char *expected) diff --git a/src/flash/nand/arm_io.c b/src/flash/nand/arm_io.c index 705470e77..2b0c081bd 100644 --- a/src/flash/nand/arm_io.c +++ b/src/flash/nand/arm_io.c @@ -55,7 +55,7 @@ static int arm_code_to_working_area(struct target *target, */ /* make sure we have a working area */ - if (NULL == *area) { + if (!*area) { retval = target_alloc_working_area(target, size, area); if (retval != ERROR_OK) { LOG_DEBUG("%s: no %d byte buffer", __func__, (int) size); diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c index 234dd70c1..c8886d17a 100644 --- a/src/flash/nand/at91sam9.c +++ b/src/flash/nand/at91sam9.c @@ -25,13 +25,13 @@ #include "imp.h" #include "arm_io.h" -#define AT91C_PIOx_SODR (0x30) /**< Offset to PIO SODR. */ -#define AT91C_PIOx_CODR (0x34) /**< Offset to PIO CODR. */ -#define AT91C_PIOx_PDSR (0x3C) /**< Offset to PIO PDSR. */ -#define AT91C_ECCx_CR (0x00) /**< Offset to ECC CR. */ -#define AT91C_ECCx_SR (0x08) /**< Offset to ECC SR. */ -#define AT91C_ECCx_PR (0x0C) /**< Offset to ECC PR. */ -#define AT91C_ECCx_NPR (0x10) /**< Offset to ECC NPR. */ +#define AT91C_PIOX_SODR (0x30) /**< Offset to PIO SODR. */ +#define AT91C_PIOX_CODR (0x34) /**< Offset to PIO CODR. */ +#define AT91C_PIOX_PDSR (0x3C) /**< Offset to PIO PDSR. */ +#define AT91C_ECCX_CR (0x00) /**< Offset to ECC CR. */ +#define AT91C_ECCX_SR (0x08) /**< Offset to ECC SR. */ +#define AT91C_ECCX_PR (0x0C) /**< Offset to ECC PR. */ +#define AT91C_ECCX_NPR (0x10) /**< Offset to ECC NPR. */ /** * Representation of a pin on an AT91SAM9 chip. @@ -113,7 +113,7 @@ static int at91sam9_enable(struct nand_device *nand) struct at91sam9_nand *info = nand->controller_priv; struct target *target = nand->target; - return target_write_u32(target, info->ce.pioc + AT91C_PIOx_CODR, 1 << info->ce.num); + return target_write_u32(target, info->ce.pioc + AT91C_PIOX_CODR, 1 << info->ce.num); } /** @@ -127,7 +127,7 @@ static int at91sam9_disable(struct nand_device *nand) struct at91sam9_nand *info = nand->controller_priv; struct target *target = nand->target; - return target_write_u32(target, info->ce.pioc + AT91C_PIOx_SODR, 1 << info->ce.num); + return target_write_u32(target, info->ce.pioc + AT91C_PIOX_SODR, 1 << info->ce.num); } /** @@ -237,7 +237,7 @@ static int at91sam9_nand_ready(struct nand_device *nand, int timeout) return 0; do { - target_read_u32(target, info->busy.pioc + AT91C_PIOx_PDSR, &status); + target_read_u32(target, info->busy.pioc + AT91C_PIOX_PDSR, &status); if (status & (1 << info->busy.num)) return 1; @@ -311,7 +311,7 @@ static int at91sam9_ecc_init(struct target *target, struct at91sam9_nand *info) } /* reset ECC parity registers */ - return target_write_u32(target, info->ecc + AT91C_ECCx_CR, 1); + return target_write_u32(target, info->ecc + AT91C_ECCX_CR, 1); } /** @@ -368,23 +368,23 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page, uint32_t status; retval = at91sam9_ecc_init(target, info); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = nand_page_command(nand, page, NAND_CMD_READ0, !data); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (data) { retval = nand_read_data_page(nand, data, data_size); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } oob_data = at91sam9_oob_init(nand, oob, &oob_size); retval = nand_read_data_page(nand, oob_data, oob_size); - if (ERROR_OK == retval && data) { - target_read_u32(target, info->ecc + AT91C_ECCx_SR, &status); + if (retval == ERROR_OK && data) { + target_read_u32(target, info->ecc + AT91C_ECCX_SR, &status); if (status & 1) { LOG_ERROR("Error detected!"); if (status & 4) @@ -394,7 +394,7 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page, uint32_t parity; target_read_u32(target, - info->ecc + AT91C_ECCx_PR, + info->ecc + AT91C_ECCX_PR, &parity); uint32_t word = (parity & 0x0000FFF0) >> 4; uint32_t bit = parity & 0x0F; @@ -443,16 +443,16 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page, uint32_t parity, nparity; retval = at91sam9_ecc_init(target, info); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (data) { retval = nand_write_data_page(nand, data, data_size); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Unable to write data to NAND device"); return retval; } @@ -462,8 +462,8 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page, if (!oob) { /* no OOB given, so read in the ECC parity from the ECC controller */ - target_read_u32(target, info->ecc + AT91C_ECCx_PR, &parity); - target_read_u32(target, info->ecc + AT91C_ECCx_NPR, &nparity); + target_read_u32(target, info->ecc + AT91C_ECCX_PR, &parity); + target_read_u32(target, info->ecc + AT91C_ECCX_NPR, &nparity); oob_data[0] = (uint8_t) parity; oob_data[1] = (uint8_t) (parity >> 8); @@ -476,7 +476,7 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page, if (!oob) free(oob_data); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Unable to write OOB data to NAND"); return retval; } diff --git a/src/flash/nand/core.c b/src/flash/nand/core.c index baef5d59c..c1f1bc4b8 100644 --- a/src/flash/nand/core.c +++ b/src/flash/nand/core.c @@ -180,7 +180,7 @@ static struct nand_device *get_nand_device_by_name(const char *name) unsigned found = 0; struct nand_device *nand; - for (nand = nand_devices; NULL != nand; nand = nand->next) { + for (nand = nand_devices; nand; nand = nand->next) { if (strcmp(nand->name, name) == 0) return nand; if (!flash_driver_name_matches(nand->controller->name, name)) @@ -682,7 +682,7 @@ int nand_write_page(struct nand_device *nand, uint32_t page, if (nand->blocks[block].is_erased == 1) nand->blocks[block].is_erased = 0; - if (nand->use_raw || nand->controller->write_page == NULL) + if (nand->use_raw || !nand->controller->write_page) return nand_write_page_raw(nand, page, data, data_size, oob, oob_size); else return nand->controller->write_page(nand, page, data, data_size, oob, oob_size); @@ -695,7 +695,7 @@ int nand_read_page(struct nand_device *nand, uint32_t page, if (!nand->device) return ERROR_NAND_DEVICE_NOT_PROBED; - if (nand->use_raw || nand->controller->read_page == NULL) + if (nand->use_raw || !nand->controller->read_page) return nand_read_page_raw(nand, page, data, data_size, oob, oob_size); else return nand->controller->read_page(nand, page, data, data_size, oob, oob_size); @@ -750,7 +750,7 @@ int nand_page_command(struct nand_device *nand, uint32_t page, nand->controller->address(nand, (page >> 16) & 0xff); /* large page devices need a start command if reading */ - if (NAND_CMD_READ0 == cmd) + if (cmd == NAND_CMD_READ0) nand->controller->command(nand, NAND_CMD_READSTART); } @@ -769,10 +769,10 @@ int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size) { int retval = ERROR_NAND_NO_BUFFER; - if (nand->controller->read_block_data != NULL) + if (nand->controller->read_block_data) retval = (nand->controller->read_block_data)(nand, data, size); - if (ERROR_NAND_NO_BUFFER == retval) { + if (retval == ERROR_NAND_NO_BUFFER) { uint32_t i; int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1; @@ -793,7 +793,7 @@ int nand_read_page_raw(struct nand_device *nand, uint32_t page, int retval; retval = nand_page_command(nand, page, NAND_CMD_READ0, !data); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (data) @@ -809,10 +809,10 @@ int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size) { int retval = ERROR_NAND_NO_BUFFER; - if (nand->controller->write_block_data != NULL) + if (nand->controller->write_block_data) retval = (nand->controller->write_block_data)(nand, data, size); - if (ERROR_NAND_NO_BUFFER == retval) { + if (retval == ERROR_NAND_NO_BUFFER) { bool is16bit = nand->device->options & NAND_BUSWIDTH_16; uint32_t incr = is16bit ? 2 : 1; uint16_t write_data; @@ -825,7 +825,7 @@ int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size) write_data = *data; retval = nand->controller->write_data(nand, write_data); - if (ERROR_OK != retval) + if (retval != ERROR_OK) break; data += incr; @@ -849,7 +849,7 @@ int nand_write_finish(struct nand_device *nand) return ERROR_NAND_OPERATION_TIMEOUT; retval = nand_read_status(nand, &status); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("couldn't read status"); return ERROR_NAND_OPERATION_FAILED; } @@ -870,12 +870,12 @@ int nand_write_page_raw(struct nand_device *nand, uint32_t page, int retval; retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (data) { retval = nand_write_data_page(nand, data, data_size); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Unable to write data to NAND device"); return retval; } @@ -883,7 +883,7 @@ int nand_write_page_raw(struct nand_device *nand, uint32_t page, if (oob) { retval = nand_write_data_page(nand, oob, oob_size); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Unable to write OOB data to NAND device"); return retval; } diff --git a/src/flash/nand/davinci.c b/src/flash/nand/davinci.c index 167b40150..84f8e3480 100644 --- a/src/flash/nand/davinci.c +++ b/src/flash/nand/davinci.c @@ -731,7 +731,7 @@ NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command) } info = calloc(1, sizeof(*info)); - if (info == NULL) + if (!info) goto fail; info->eccmode = eccmode; diff --git a/src/flash/nand/driver.c b/src/flash/nand/driver.c index f7665603f..b525f3d0a 100644 --- a/src/flash/nand/driver.c +++ b/src/flash/nand/driver.c @@ -75,7 +75,7 @@ int nand_driver_walk(nand_driver_walker_t f, void *x) { for (unsigned i = 0; nand_flash_controllers[i]; i++) { int retval = (*f)(nand_flash_controllers[i], x); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } return ERROR_OK; diff --git a/src/flash/nand/fileio.c b/src/flash/nand/fileio.c index fee401292..b9c7f79f7 100644 --- a/src/flash/nand/fileio.c +++ b/src/flash/nand/fileio.c @@ -65,10 +65,10 @@ int nand_fileio_start(struct command_invocation *cmd, duration_start(&state->bench); - if (NULL != filename) { + if (filename) { int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY); - if (ERROR_OK != retval) { - const char *msg = (FILEIO_READ == filemode) ? "read" : "write"; + if (retval != ERROR_OK) { + const char *msg = (filemode == FILEIO_READ) ? "read" : "write"; command_print(cmd, "failed to open '%s' for %s access", filename, msg); return retval; @@ -119,15 +119,15 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state, nand_fileio_init(state); unsigned minargs = need_size ? 4 : 3; - if (CMD_ARGC < minargs) + if (minargs > CMD_ARGC) return ERROR_COMMAND_SYNTAX_ERROR; struct nand_device *nand; int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; - if (NULL == nand->device) { + if (!nand->device) { command_print(CMD, "#%s: not probed", CMD_ARGV[0]); return ERROR_NAND_DEVICE_NOT_PROBED; } @@ -141,7 +141,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state, } } - if (CMD_ARGC > minargs) { + if (minargs < CMD_ARGC) { for (unsigned i = minargs; i < CMD_ARGC; i++) { if (!strcmp(CMD_ARGV[i], "oob_raw")) state->oob_format |= NAND_OOB_RAW; @@ -159,7 +159,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state, } retval = nand_fileio_start(CMD, nand, CMD_ARGV[1], filemode, state); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (!need_size) { @@ -184,7 +184,7 @@ int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s) size_t total_read = 0; size_t one_read; - if (NULL != s->page) { + if (s->page) { fileio_read(s->fileio, s->page_size, s->page, &one_read); if (one_read < s->page_size) memset(s->page + one_read, 0xff, s->page_size - one_read); @@ -213,7 +213,7 @@ int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s) nand_calculate_ecc_kw(nand, s->page + i, ecc); ecc += 10; } - } else if (NULL != s->oob) { + } else if (s->oob) { fileio_read(s->fileio, s->oob_size, s->oob, &one_read); if (one_read < s->oob_size) memset(s->oob + one_read, 0xff, s->oob_size - one_read); diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c index 6ce05753e..bda7b87c3 100644 --- a/src/flash/nand/lpc3180.c +++ b/src/flash/nand/lpc3180.c @@ -589,7 +589,7 @@ static int lpc3180_write_page(struct nand_device *nand, oob_size); } retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* allocate a working area */ @@ -970,7 +970,7 @@ static int lpc3180_read_page(struct nand_device *nand, /* read always the data and also oob areas*/ retval = nand_page_command(nand, page, NAND_CMD_READ0, 0); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* allocate a working area */ diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c index f117eadcc..49890c2ab 100644 --- a/src/flash/nand/lpc32xx.c +++ b/src/flash/nand/lpc32xx.c @@ -90,7 +90,7 @@ NAND_DEVICE_COMMAND_HANDLER(lpc32xx_nand_device_command) "1000 and 20000 kHz, was %i", lpc32xx_info->osc_freq); - lpc32xx_info->selected_controller = LPC32xx_NO_CONTROLLER; + lpc32xx_info->selected_controller = LPC32XX_NO_CONTROLLER; lpc32xx_info->sw_write_protection = 0; lpc32xx_info->sw_wp_lower_bound = 0x0; lpc32xx_info->sw_wp_upper_bound = 0x0; @@ -141,7 +141,7 @@ static float lpc32xx_cycle_time(struct nand_device *nand) /* determine current SYSCLK (13'MHz or main oscillator) */ retval = target_read_u32(target, 0x40004050, &sysclk_ctrl); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read SYSCLK_CTRL"); return ERROR_NAND_OPERATION_FAILED; } @@ -153,7 +153,7 @@ static float lpc32xx_cycle_time(struct nand_device *nand) /* determine selected HCLK source */ retval = target_read_u32(target, 0x40004044, &pwr_ctrl); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read HCLK_CTRL"); return ERROR_NAND_OPERATION_FAILED; } @@ -162,14 +162,14 @@ static float lpc32xx_cycle_time(struct nand_device *nand) hclk = sysclk; else { retval = target_read_u32(target, 0x40004058, &hclkpll_ctrl); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read HCLKPLL_CTRL"); return ERROR_NAND_OPERATION_FAILED; } hclk_pll = lpc32xx_pll(sysclk, hclkpll_ctrl); retval = target_read_u32(target, 0x40004040, &hclkdiv_ctrl); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read CLKDIV_CTRL"); return ERROR_NAND_OPERATION_FAILED; } @@ -222,34 +222,34 @@ static int lpc32xx_init(struct nand_device *nand) } /* select MLC controller if none is currently selected */ - if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) { LOG_DEBUG("no LPC32xx NAND flash controller selected, " "using default 'slc'"); - lpc32xx_info->selected_controller = LPC32xx_SLC_CONTROLLER; + lpc32xx_info->selected_controller = LPC32XX_SLC_CONTROLLER; } - if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) { uint32_t mlc_icr_value = 0x0; float cycle; int twp, twh, trp, treh, trhz, trbwb, tcea; /* FLASHCLK_CTRL = 0x22 (enable clk for MLC) */ retval = target_write_u32(target, 0x400040c8, 0x22); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set FLASHCLK_CTRL"); return ERROR_NAND_OPERATION_FAILED; } /* MLC_CEH = 0x0 (Force nCE assert) */ retval = target_write_u32(target, 0x200b804c, 0x0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_CEH"); return ERROR_NAND_OPERATION_FAILED; } /* MLC_LOCK = 0xa25e (unlock protected registers) */ retval = target_write_u32(target, 0x200b8044, 0xa25e); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_LOCK"); return ERROR_NAND_OPERATION_FAILED; } @@ -264,7 +264,7 @@ static int lpc32xx_init(struct nand_device *nand) if (bus_width == 16) mlc_icr_value |= 0x1; retval = target_write_u32(target, 0x200b8030, mlc_icr_value); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ICR"); return ERROR_NAND_OPERATION_FAILED; } @@ -282,7 +282,7 @@ static int lpc32xx_init(struct nand_device *nand) /* MLC_LOCK = 0xa25e (unlock protected registers) */ retval = target_write_u32(target, 0x200b8044, 0xa25e); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_LOCK"); return ERROR_NAND_OPERATION_FAILED; } @@ -296,22 +296,22 @@ static int lpc32xx_init(struct nand_device *nand) | ((trhz & 0x7) << 16) | ((trbwb & 0x1f) << 19) | ((tcea & 0x3) << 24)); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_TIME_REG"); return ERROR_NAND_OPERATION_FAILED; } retval = lpc32xx_reset(nand); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return ERROR_NAND_OPERATION_FAILED; - } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) { float cycle; int r_setup, r_hold, r_width, r_rdy; int w_setup, w_hold, w_width, w_rdy; /* FLASHCLK_CTRL = 0x05 (enable clk for SLC) */ retval = target_write_u32(target, 0x400040c8, 0x05); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set FLASHCLK_CTRL"); return ERROR_NAND_OPERATION_FAILED; } @@ -320,7 +320,7 @@ static int lpc32xx_init(struct nand_device *nand) * so reset calling is here at the beginning */ retval = lpc32xx_reset(nand); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return ERROR_NAND_OPERATION_FAILED; /* SLC_CFG = @@ -333,14 +333,14 @@ static int lpc32xx_init(struct nand_device *nand) */ retval = target_write_u32(target, 0x20020014, 0x3e | ((bus_width == 16) ? 1 : 0)); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set SLC_CFG"); return ERROR_NAND_OPERATION_FAILED; } /* SLC_IEN = 3 (INT_RDY_EN = 1) ,(INT_TC_STAT = 1) */ retval = target_write_u32(target, 0x20020020, 0x03); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set SLC_IEN"); return ERROR_NAND_OPERATION_FAILED; } @@ -349,14 +349,14 @@ static int lpc32xx_init(struct nand_device *nand) /* DMACLK_CTRL = 0x01 (enable clock for DMA controller) */ retval = target_write_u32(target, 0x400040e8, 0x01); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set DMACLK_CTRL"); return ERROR_NAND_OPERATION_FAILED; } /* DMACConfig = DMA enabled*/ retval = target_write_u32(target, 0x31000030, 0x01); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set DMACConfig"); return ERROR_NAND_OPERATION_FAILED; } @@ -380,7 +380,7 @@ static int lpc32xx_init(struct nand_device *nand) | ((w_hold & 0xf) << 20) | ((w_width & 0xf) << 24) | ((w_rdy & 0xf) << 28)); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set SLC_TAC"); return ERROR_NAND_OPERATION_FAILED; } @@ -401,13 +401,13 @@ static int lpc32xx_reset(struct nand_device *nand) return ERROR_NAND_OPERATION_FAILED; } - if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) { LOG_ERROR("BUG: no LPC32xx NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; - } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) { /* MLC_CMD = 0xff (reset controller and NAND device) */ retval = target_write_u32(target, 0x200b8000, 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_CMD"); return ERROR_NAND_OPERATION_FAILED; } @@ -417,10 +417,10 @@ static int lpc32xx_reset(struct nand_device *nand) "after reset"); return ERROR_NAND_OPERATION_TIMEOUT; } - } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) { /* SLC_CTRL = 0x6 (ECC_CLEAR, SW_RESET) */ retval = target_write_u32(target, 0x20020010, 0x6); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set SLC_CTRL"); return ERROR_NAND_OPERATION_FAILED; } @@ -447,20 +447,20 @@ static int lpc32xx_command(struct nand_device *nand, uint8_t command) return ERROR_NAND_OPERATION_FAILED; } - if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) { LOG_ERROR("BUG: no LPC32xx NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; - } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) { /* MLC_CMD = command */ retval = target_write_u32(target, 0x200b8000, command); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_CMD"); return ERROR_NAND_OPERATION_FAILED; } - } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) { /* SLC_CMD = command */ retval = target_write_u32(target, 0x20020008, command); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set SLC_CMD"); return ERROR_NAND_OPERATION_FAILED; } @@ -481,20 +481,20 @@ static int lpc32xx_address(struct nand_device *nand, uint8_t address) return ERROR_NAND_OPERATION_FAILED; } - if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) { LOG_ERROR("BUG: no LPC32xx NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; - } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) { /* MLC_ADDR = address */ retval = target_write_u32(target, 0x200b8004, address); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } - } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) { /* SLC_ADDR = address */ retval = target_write_u32(target, 0x20020004, address); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set SLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } @@ -515,20 +515,20 @@ static int lpc32xx_write_data(struct nand_device *nand, uint16_t data) return ERROR_NAND_OPERATION_FAILED; } - if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) { LOG_ERROR("BUG: no LPC32xx NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; - } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) { /* MLC_DATA = data */ retval = target_write_u32(target, 0x200b0000, data); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_DATA"); return ERROR_NAND_OPERATION_FAILED; } - } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) { /* SLC_DATA = data */ retval = target_write_u32(target, 0x20020000, data); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set SLC_DATA"); return ERROR_NAND_OPERATION_FAILED; } @@ -549,10 +549,10 @@ static int lpc32xx_read_data(struct nand_device *nand, void *data) return ERROR_NAND_OPERATION_FAILED; } - if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) { LOG_ERROR("BUG: no LPC32xx NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; - } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) { /* data = MLC_DATA, use sized access */ if (nand->bus_width == 8) { uint8_t *data8 = data; @@ -561,16 +561,16 @@ static int lpc32xx_read_data(struct nand_device *nand, void *data) LOG_ERROR("BUG: bus_width neither 8 nor 16 bit"); return ERROR_NAND_OPERATION_FAILED; } - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read MLC_DATA"); return ERROR_NAND_OPERATION_FAILED; } - } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) { uint32_t data32; /* data = SLC_DATA, must use 32-bit access */ retval = target_read_u32(target, 0x20020000, &data32); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read SLC_DATA"); return ERROR_NAND_OPERATION_FAILED; } @@ -600,7 +600,7 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page, /* MLC_CMD = sequential input */ retval = target_write_u32(target, 0x200b8000, NAND_CMD_SEQIN); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_CMD"); return ERROR_NAND_OPERATION_FAILED; } @@ -608,20 +608,20 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page, if (nand->page_size == 512) { /* MLC_ADDR = 0x0 (one column cycle) */ retval = target_write_u32(target, 0x200b8004, 0x0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } /* MLC_ADDR = row */ retval = target_write_u32(target, 0x200b8004, page & 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } retval = target_write_u32(target, 0x200b8004, (page >> 8) & 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } @@ -629,7 +629,7 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page, if (nand->address_cycles == 4) { retval = target_write_u32(target, 0x200b8004, (page >> 16) & 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } @@ -637,25 +637,25 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page, } else { /* MLC_ADDR = 0x0 (two column cycles) */ retval = target_write_u32(target, 0x200b8004, 0x0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } retval = target_write_u32(target, 0x200b8004, 0x0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } /* MLC_ADDR = row */ retval = target_write_u32(target, 0x200b8004, page & 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } retval = target_write_u32(target, 0x200b8004, (page >> 8) & 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } @@ -687,27 +687,27 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page, /* write MLC_ECC_ENC_REG to start encode cycle */ retval = target_write_u32(target, 0x200b8008, 0x0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ECC_ENC_REG"); return ERROR_NAND_OPERATION_FAILED; } retval = target_write_memory(target, 0x200a8000, 4, 128, page_buffer); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_BUF (data)"); return ERROR_NAND_OPERATION_FAILED; } retval = target_write_memory(target, 0x200a8000, 1, 6, oob_buffer); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_BUF (oob)"); return ERROR_NAND_OPERATION_FAILED; } /* write MLC_ECC_AUTO_ENC_REG to start auto encode */ retval = target_write_u32(target, 0x200b8010, 0x0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ECC_AUTO_ENC_REG"); return ERROR_NAND_OPERATION_FAILED; } @@ -721,7 +721,7 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page, /* MLC_CMD = auto program command */ retval = target_write_u32(target, 0x200b8000, NAND_CMD_PAGEPROG); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_CMD"); return ERROR_NAND_OPERATION_FAILED; } @@ -901,14 +901,14 @@ static int lpc32xx_start_slc_dma(struct nand_device *nand, uint32_t count, /* DMACIntTCClear = ch0 */ retval = target_write_u32(target, 0x31000008, 1); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not set DMACIntTCClear"); return retval; } /* DMACIntErrClear = ch0 */ retval = target_write_u32(target, 0x31000010, 1); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not set DMACIntErrClear"); return retval; } @@ -926,28 +926,28 @@ static int lpc32xx_start_slc_dma(struct nand_device *nand, uint32_t count, retval = target_write_u32(target, 0x31000110, 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14 | 0<<15 | 0<<16 | 0<<18); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not set DMACC0Config"); return retval; } /* SLC_CTRL = 3 (START DMA), ECC_CLEAR */ retval = target_write_u32(target, 0x20020010, 0x3); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not set SLC_CTRL"); return retval; } /* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/ retval = target_write_u32(target, 0x20020028, 2); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not set SLC_ICR"); return retval; } /* SLC_TC */ retval = target_write_u32(target, 0x20020030, count); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("lpc32xx_start_slc_dma: Could not set SLC_TC"); return retval; } @@ -974,13 +974,13 @@ static int lpc32xx_dma_ready(struct nand_device *nand, int timeout) /* Read DMACRawIntTCStat */ retval = target_read_u32(target, 0x31000014, &tc_stat); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not read DMACRawIntTCStat"); return 0; } /* Read DMACRawIntErrStat */ retval = target_read_u32(target, 0x31000018, &err_stat); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not read DMACRawIntErrStat"); return 0; } @@ -1065,13 +1065,13 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, retval = target_write_memory(target, target_mem_base, 4, nll * sizeof(struct dmac_ll) / 4, (uint8_t *)dmalist); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not write DMA descriptors to IRAM"); return retval; } retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("NAND_CMD_SEQIN failed"); return retval; } @@ -1085,7 +1085,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, WIDTH = bus_width */ retval = target_write_u32(target, 0x20020014, 0x3c); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not set SLC_CFG"); return retval; } @@ -1097,7 +1097,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, retval = target_write_memory(target, target_mem_base + DATA_OFFS, 4, nand->page_size/4, fdata); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not write data to IRAM"); return retval; } @@ -1106,7 +1106,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, retval = target_write_memory(target, 0x31000100, 4, sizeof(struct dmac_ll) / 4, (uint8_t *)dmalist); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not write DMA descriptor to DMAC"); return retval; } @@ -1115,7 +1115,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, int tot_size = nand->page_size; tot_size += tot_size == 2048 ? 64 : 16; retval = lpc32xx_start_slc_dma(nand, tot_size, 0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("DMA failed"); return retval; } @@ -1139,7 +1139,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, static uint32_t hw_ecc[8]; retval = target_read_memory(target, target_mem_base + ECC_OFFS, 4, ecc_count, (uint8_t *)hw_ecc); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Reading hw generated ECC from IRAM failed"); return retval; } @@ -1154,7 +1154,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, } retval = target_write_memory(target, target_mem_base + SPARE_OFFS, 4, foob_size / 4, foob); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Writing OOB to IRAM failed"); return retval; } @@ -1163,7 +1163,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, retval = target_write_memory(target, 0x31000100, 4, sizeof(struct dmac_ll) / 4, (uint8_t *)(&dmalist[nll-1])); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not write OOB DMA descriptor to DMAC"); return retval; } @@ -1173,7 +1173,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, /* DMACIntTCClear = ch0 */ retval = target_write_u32(target, 0x31000008, 1); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not set DMACIntTCClear"); return retval; } @@ -1190,7 +1190,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, retval = target_write_u32(target, 0x31000110, 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14 | 0<<15 | 0<<16 | 0<<18); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not set DMACC0Config"); return retval; } @@ -1203,7 +1203,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, } else { /* Start xfer of data from iram to flash using DMA */ retval = lpc32xx_start_slc_dma(nand, foob_size, 1); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("DMA OOB failed"); return retval; } @@ -1211,7 +1211,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, /* Let NAND start actual writing */ retval = nand_write_finish(nand); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("nand_write_finish failed"); return retval; } @@ -1233,10 +1233,10 @@ static int lpc32xx_write_page(struct nand_device *nand, uint32_t page, return ERROR_NAND_OPERATION_FAILED; } - if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) { LOG_ERROR("BUG: no LPC32xx NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; - } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) { if (!data && oob) { LOG_ERROR("LPC32xx MLC controller can't write " "OOB data only"); @@ -1256,7 +1256,7 @@ static int lpc32xx_write_page(struct nand_device *nand, uint32_t page, retval = lpc32xx_write_page_mlc(nand, page, data, data_size, oob, oob_size); - } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) { struct working_area *pworking_area; if (!data && oob) { /* @@ -1307,7 +1307,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page, /* MLC_CMD = Read0 */ retval = target_write_u32(target, 0x200b8000, NAND_CMD_READ0); } - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_CMD"); return ERROR_NAND_OPERATION_FAILED; } @@ -1315,20 +1315,20 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page, /* small page device * MLC_ADDR = 0x0 (one column cycle) */ retval = target_write_u32(target, 0x200b8004, 0x0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } /* MLC_ADDR = row */ retval = target_write_u32(target, 0x200b8004, page & 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } retval = target_write_u32(target, 0x200b8004, (page >> 8) & 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } @@ -1336,7 +1336,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page, if (nand->address_cycles == 4) { retval = target_write_u32(target, 0x200b8004, (page >> 16) & 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } @@ -1345,25 +1345,25 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page, /* large page device * MLC_ADDR = 0x0 (two column cycles) */ retval = target_write_u32(target, 0x200b8004, 0x0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } retval = target_write_u32(target, 0x200b8004, 0x0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } /* MLC_ADDR = row */ retval = target_write_u32(target, 0x200b8004, page & 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } retval = target_write_u32(target, 0x200b8004, (page >> 8) & 0xff); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ADDR"); return ERROR_NAND_OPERATION_FAILED; } @@ -1371,7 +1371,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page, /* MLC_CMD = Read Start */ retval = target_write_u32(target, 0x200b8000, NAND_CMD_READSTART); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_CMD"); return ERROR_NAND_OPERATION_FAILED; } @@ -1380,7 +1380,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page, while (page_bytes_done < (uint32_t)nand->page_size) { /* MLC_ECC_AUTO_DEC_REG = dummy */ retval = target_write_u32(target, 0x200b8014, 0xaa55aa55); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_ECC_AUTO_DEC_REG"); return ERROR_NAND_OPERATION_FAILED; } @@ -1392,7 +1392,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page, } retval = target_read_u32(target, 0x200b8048, &mlc_isr); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read MLC_ISR"); return ERROR_NAND_OPERATION_FAILED; } @@ -1411,7 +1411,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page, if (data) { retval = target_read_memory(target, 0x200a8000, 4, 128, page_buffer + page_bytes_done); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read MLC_BUF (data)"); return ERROR_NAND_OPERATION_FAILED; } @@ -1420,7 +1420,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page, if (oob) { retval = target_read_memory(target, 0x200a8000, 4, 4, oob_buffer + oob_bytes_done); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read MLC_BUF (oob)"); return ERROR_NAND_OPERATION_FAILED; } @@ -1462,13 +1462,13 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, retval = target_write_memory(target, target_mem_base, 4, nll * sizeof(struct dmac_ll) / 4, (uint8_t *)dmalist); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not write DMA descriptors to IRAM"); return retval; } retval = nand_page_command(nand, page, NAND_CMD_READ0, 0); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("lpc32xx_read_page_slc: NAND_CMD_READ0 failed"); return retval; } @@ -1482,7 +1482,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, WIDTH = bus_width */ retval = target_write_u32(target, 0x20020014, 0x3e); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("lpc32xx_read_page_slc: Could not set SLC_CFG"); return retval; } @@ -1490,7 +1490,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, /* Write first descriptor to DMA controller */ retval = target_write_memory(target, 0x31000100, 4, sizeof(struct dmac_ll) / 4, (uint8_t *)dmalist); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not write DMA descriptor to DMAC"); return retval; } @@ -1499,7 +1499,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, int tot_size = nand->page_size; tot_size += nand->page_size == 2048 ? 64 : 16; retval = lpc32xx_start_slc_dma(nand, tot_size, 1); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("lpc32xx_read_page_slc: DMA read failed"); return retval; } @@ -1508,7 +1508,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, if (data) { retval = target_read_memory(target, target_mem_base + DATA_OFFS, 4, data_size/4, data); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not read data from IRAM"); return retval; } @@ -1518,7 +1518,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, retval = target_read_memory(target, target_mem_base + SPARE_OFFS, 4, oob_size/4, oob); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not read OOB from IRAM"); return retval; } @@ -1530,7 +1530,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, retval = target_read_memory(target, target_mem_base + SPARE_OFFS, 4, nand->page_size == 2048 ? 16 : 4, foob); lpc32xx_dump_oob(foob, nand->page_size == 2048 ? 64 : 16); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not read OOB from IRAM"); return retval; } @@ -1539,7 +1539,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, static uint32_t hw_ecc[8]; /* max size */ retval = target_read_memory(target, target_mem_base + ECC_OFFS, 4, ecc_count, (uint8_t *)hw_ecc); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not read hw generated ECC from IRAM"); return retval; } @@ -1584,17 +1584,17 @@ static int lpc32xx_read_page(struct nand_device *nand, uint32_t page, return ERROR_NAND_OPERATION_FAILED; } - if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_NO_CONTROLLER) { LOG_ERROR("BUG: no LPC32xx NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; - } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) { if (data_size > (uint32_t)nand->page_size) { LOG_ERROR("data size exceeds page size"); return ERROR_NAND_OPERATION_NOT_SUPPORTED; } retval = lpc32xx_read_page_mlc(nand, page, data, data_size, oob, oob_size); - } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) { struct working_area *pworking_area; retval = target_alloc_working_area(target, @@ -1628,12 +1628,12 @@ static int lpc32xx_controller_ready(struct nand_device *nand, int timeout) LOG_DEBUG("lpc32xx_controller_ready count start=%d", timeout); do { - if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) { uint8_t status; /* Read MLC_ISR, wait for controller to become ready */ retval = target_read_u8(target, 0x200b8048, &status); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set MLC_STAT"); return ERROR_NAND_OPERATION_FAILED; } @@ -1643,12 +1643,12 @@ static int lpc32xx_controller_ready(struct nand_device *nand, int timeout) timeout); return 1; } - } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) { uint32_t status; /* Read SLC_STAT and check READY bit */ retval = target_read_u32(target, 0x20020018, &status); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not set SLC_STAT"); return ERROR_NAND_OPERATION_FAILED; } @@ -1681,13 +1681,13 @@ static int lpc32xx_nand_ready(struct nand_device *nand, int timeout) LOG_DEBUG("lpc32xx_nand_ready count start=%d", timeout); do { - if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) { + if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) { uint8_t status = 0x0; /* Read MLC_ISR, wait for NAND flash device to * become ready */ retval = target_read_u8(target, 0x200b8048, &status); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read MLC_ISR"); return ERROR_NAND_OPERATION_FAILED; } @@ -1697,12 +1697,12 @@ static int lpc32xx_nand_ready(struct nand_device *nand, int timeout) timeout); return 1; } - } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) { + } else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) { uint32_t status = 0x0; /* Read SLC_STAT and check READY bit */ retval = target_read_u32(target, 0x20020018, &status); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("could not read SLC_STAT"); return ERROR_NAND_OPERATION_FAILED; } @@ -1731,7 +1731,7 @@ static int lpc32xx_tc_ready(struct nand_device *nand, int timeout) int retval; /* Read SLC_INT_STAT and check INT_TC_STAT bit */ retval = target_read_u32(target, 0x2002001c, &status); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Could not read SLC_INT_STAT"); return 0; } @@ -1770,10 +1770,10 @@ COMMAND_HANDLER(handle_lpc32xx_select_command) if (CMD_ARGC >= 2) { if (strcmp(CMD_ARGV[1], "mlc") == 0) { lpc32xx_info->selected_controller = - LPC32xx_MLC_CONTROLLER; + LPC32XX_MLC_CONTROLLER; } else if (strcmp(CMD_ARGV[1], "slc") == 0) { lpc32xx_info->selected_controller = - LPC32xx_SLC_CONTROLLER; + LPC32XX_SLC_CONTROLLER; } else return ERROR_COMMAND_SYNTAX_ERROR; } diff --git a/src/flash/nand/lpc32xx.h b/src/flash/nand/lpc32xx.h index 90b20b247..12c8f48e6 100644 --- a/src/flash/nand/lpc32xx.h +++ b/src/flash/nand/lpc32xx.h @@ -20,9 +20,9 @@ #define OPENOCD_FLASH_NAND_LPC32XX_H enum lpc32xx_selected_controller { - LPC32xx_NO_CONTROLLER, - LPC32xx_MLC_CONTROLLER, - LPC32xx_SLC_CONTROLLER, + LPC32XX_NO_CONTROLLER, + LPC32XX_MLC_CONTROLLER, + LPC32XX_SLC_CONTROLLER, }; struct lpc32xx_nand_controller { diff --git a/src/flash/nand/mx3.c b/src/flash/nand/mx3.c index b9f5ff1b9..dc8d619a0 100644 --- a/src/flash/nand/mx3.c +++ b/src/flash/nand/mx3.c @@ -64,7 +64,7 @@ NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command) { struct mx3_nf_controller *mx3_nf_info; mx3_nf_info = malloc(sizeof(struct mx3_nf_controller)); - if (mx3_nf_info == NULL) { + if (!mx3_nf_info) { LOG_ERROR("no memory for nand controller"); return ERROR_FAIL; } diff --git a/src/flash/nand/mxc.c b/src/flash/nand/mxc.c index 90027070f..7aac72163 100644 --- a/src/flash/nand/mxc.c +++ b/src/flash/nand/mxc.c @@ -89,7 +89,7 @@ NAND_DEVICE_COMMAND_HANDLER(mxc_nand_device_command) int hwecc_needed; mxc_nf_info = malloc(sizeof(struct mxc_nf_controller)); - if (mxc_nf_info == NULL) { + if (!mxc_nf_info) { LOG_ERROR("no memory for nand controller"); return ERROR_FAIL; } @@ -207,9 +207,9 @@ static int mxc_init(struct nand_device *nand) int validate_target_result; uint16_t buffsize_register_content; uint32_t sreg_content; - uint32_t SREG = MX2_FMCR; - uint32_t SEL_16BIT = MX2_FMCR_NF_16BIT_SEL; - uint32_t SEL_FMS = MX2_FMCR_NF_FMS; + uint32_t sreg = MX2_FMCR; + uint32_t sel_16bit = MX2_FMCR_NF_16BIT_SEL; + uint32_t sel_fms = MX2_FMCR_NF_FMS; int retval; uint16_t nand_status_content; /* @@ -226,27 +226,27 @@ static int mxc_init(struct nand_device *nand) mxc_nf_info->flags.one_kb_sram = 0; if (mxc_nf_info->mxc_version == MXC_VERSION_MX31) { - SREG = MX3_PCSR; - SEL_16BIT = MX3_PCSR_NF_16BIT_SEL; - SEL_FMS = MX3_PCSR_NF_FMS; + sreg = MX3_PCSR; + sel_16bit = MX3_PCSR_NF_16BIT_SEL; + sel_fms = MX3_PCSR_NF_FMS; } else if (mxc_nf_info->mxc_version == MXC_VERSION_MX25) { - SREG = MX25_RCSR; - SEL_16BIT = MX25_RCSR_NF_16BIT_SEL; - SEL_FMS = MX25_RCSR_NF_FMS; + sreg = MX25_RCSR; + sel_16bit = MX25_RCSR_NF_16BIT_SEL; + sel_fms = MX25_RCSR_NF_FMS; } else if (mxc_nf_info->mxc_version == MXC_VERSION_MX35) { - SREG = MX35_RCSR; - SEL_16BIT = MX35_RCSR_NF_16BIT_SEL; - SEL_FMS = MX35_RCSR_NF_FMS; + sreg = MX35_RCSR; + sel_16bit = MX35_RCSR_NF_16BIT_SEL; + sel_fms = MX35_RCSR_NF_FMS; } - target_read_u32(target, SREG, &sreg_content); + target_read_u32(target, sreg, &sreg_content); if (!nand->bus_width) { /* bus_width not yet defined. Read it from MXC_FMCR */ - nand->bus_width = (sreg_content & SEL_16BIT) ? 16 : 8; + nand->bus_width = (sreg_content & sel_16bit) ? 16 : 8; } else { /* bus_width forced in soft. Sync it to MXC_FMCR */ - sreg_content |= ((nand->bus_width == 16) ? SEL_16BIT : 0x00000000); - target_write_u32(target, SREG, sreg_content); + sreg_content |= ((nand->bus_width == 16) ? sel_16bit : 0x00000000); + target_write_u32(target, sreg, sreg_content); } if (nand->bus_width == 16) LOG_DEBUG("MXC_NF : bus is 16-bit width"); @@ -254,10 +254,10 @@ static int mxc_init(struct nand_device *nand) LOG_DEBUG("MXC_NF : bus is 8-bit width"); if (!nand->page_size) - nand->page_size = (sreg_content & SEL_FMS) ? 2048 : 512; + nand->page_size = (sreg_content & sel_fms) ? 2048 : 512; else { - sreg_content |= ((nand->page_size == 2048) ? SEL_FMS : 0x00000000); - target_write_u32(target, SREG, sreg_content); + sreg_content |= ((nand->page_size == 2048) ? sel_fms : 0x00000000); + target_write_u32(target, sreg, sreg_content); } if (mxc_nf_info->flags.one_kb_sram && (nand->page_size == 2048)) { LOG_ERROR("NAND controller have only 1 kb SRAM, so " @@ -649,18 +649,18 @@ static int mxc_read_page(struct nand_device *nand, uint32_t page, } if (nand->page_size > 512 && mxc_nf_info->flags.biswap_enabled) { - uint32_t SPARE_BUFFER3; + uint32_t spare_buffer3; /* BI-swap - work-around of mxc NFC for NAND device with page == 2k */ target_read_u16(target, MXC_NF_MAIN_BUFFER3 + 464, &swap1); if (nfc_is_v1()) - SPARE_BUFFER3 = MXC_NF_V1_SPARE_BUFFER3 + 4; + spare_buffer3 = MXC_NF_V1_SPARE_BUFFER3 + 4; else - SPARE_BUFFER3 = MXC_NF_V2_SPARE_BUFFER3; - target_read_u16(target, SPARE_BUFFER3, &swap2); + spare_buffer3 = MXC_NF_V2_SPARE_BUFFER3; + target_read_u16(target, spare_buffer3, &swap2); new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8); swap2 = (swap1 << 8) | (swap2 & 0xFF); target_write_u16(target, MXC_NF_MAIN_BUFFER3 + 464, new_swap1); - target_write_u16(target, SPARE_BUFFER3, swap2); + target_write_u16(target, spare_buffer3, swap2); } if (data) diff --git a/src/flash/nand/s3c24xx.c b/src/flash/nand/s3c24xx.c index ae3f13737..c0471eddf 100644 --- a/src/flash/nand/s3c24xx.c +++ b/src/flash/nand/s3c24xx.c @@ -34,7 +34,7 @@ S3C24XX_DEVICE_COMMAND() struct s3c24xx_nand_controller *s3c24xx_info; s3c24xx_info = malloc(sizeof(struct s3c24xx_nand_controller)); - if (s3c24xx_info == NULL) { + if (!s3c24xx_info) { LOG_ERROR("no memory for nand controller"); return -ENOMEM; } diff --git a/src/flash/nand/s3c24xx.h b/src/flash/nand/s3c24xx.h index 5c7782dab..4b0c02fc4 100644 --- a/src/flash/nand/s3c24xx.h +++ b/src/flash/nand/s3c24xx.h @@ -51,7 +51,7 @@ S3C24XX_DEVICE_COMMAND(); #define CALL_S3C24XX_DEVICE_COMMAND(d, i) \ do { \ int retval = CALL_COMMAND_HANDLER(s3c24xx_nand_device_command, d, i); \ - if (ERROR_OK != retval) \ + if (retval != ERROR_OK) \ return retval; \ } while (0) diff --git a/src/flash/nand/s3c24xx_regs.h b/src/flash/nand/s3c24xx_regs.h index 88bc66567..46bda6bfe 100644 --- a/src/flash/nand/s3c24xx_regs.h +++ b/src/flash/nand/s3c24xx_regs.h @@ -61,7 +61,7 @@ #define S3C2410_NFCONF_512BYTE (1 << 14) #define S3C2410_NFCONF_4STEP (1 << 13) #define S3C2410_NFCONF_INITECC (1 << 12) -#define S3C2410_NFCONF_nFCE (1 << 11) +#define S3C2410_NFCONF_NFCE (1 << 11) #define S3C2410_NFCONF_TACLS(x) ((x) << 8) #define S3C2410_NFCONF_TWRPH0(x) ((x) << 4) #define S3C2410_NFCONF_TWRPH1(x) ((x) << 0) @@ -83,12 +83,12 @@ #define S3C2440_NFCONT_SPARE_ECCLOCK (1 << 6) #define S3C2440_NFCONT_MAIN_ECCLOCK (1 << 5) #define S3C2440_NFCONT_INITECC (1 << 4) -#define S3C2440_NFCONT_nFCE (1 << 1) +#define S3C2440_NFCONT_NFCE (1 << 1) #define S3C2440_NFCONT_ENABLE (1 << 0) #define S3C2440_NFSTAT_READY (1 << 0) -#define S3C2440_NFSTAT_nCE (1 << 1) -#define S3C2440_NFSTAT_RnB_CHANGE (1 << 2) +#define S3C2440_NFSTAT_NCE (1 << 1) +#define S3C2440_NFSTAT_RNB_CHANGE (1 << 2) #define S3C2440_NFSTAT_ILLEGAL_ACCESS (1 << 3) #define S3C2412_NFCONF_NANDBOOT (1 << 31) @@ -103,16 +103,16 @@ #define S3C2412_NFCONT_ECC4_DECINT (1 << 12) #define S3C2412_NFCONT_MAIN_ECC_LOCK (1 << 7) #define S3C2412_NFCONT_INIT_MAIN_ECC (1 << 5) -#define S3C2412_NFCONT_nFCE1 (1 << 2) -#define S3C2412_NFCONT_nFCE0 (1 << 1) +#define S3C2412_NFCONT_NFCE1 (1 << 2) +#define S3C2412_NFCONT_NFCE0 (1 << 1) #define S3C2412_NFSTAT_ECC_ENCDONE (1 << 7) #define S3C2412_NFSTAT_ECC_DECDONE (1 << 6) #define S3C2412_NFSTAT_ILLEGAL_ACCESS (1 << 5) -#define S3C2412_NFSTAT_RnB_CHANGE (1 << 4) -#define S3C2412_NFSTAT_nFCE1 (1 << 3) -#define S3C2412_NFSTAT_nFCE0 (1 << 2) -#define S3C2412_NFSTAT_Res1 (1 << 1) +#define S3C2412_NFSTAT_RNB_CHANGE (1 << 4) +#define S3C2412_NFSTAT_NFCE1 (1 << 3) +#define S3C2412_NFSTAT_NFCE0 (1 << 2) +#define S3C2412_NFSTAT_RES1 (1 << 1) #define S3C2412_NFSTAT_READY (1 << 0) #define S3C2412_NFECCERR_SERRDATA(x) (((x) >> 21) & 0xf) diff --git a/src/flash/nand/tcl.c b/src/flash/nand/tcl.c index 9e0ca41ac..6707314cc 100644 --- a/src/flash/nand/tcl.c +++ b/src/flash/nand/tcl.c @@ -83,10 +83,10 @@ COMMAND_HANDLER(handle_nand_info_command) struct nand_device *p; int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; - if (NULL == p->device) { + if (!p->device) { command_print(CMD, "#%s: not probed", CMD_ARGV[0]); return ERROR_OK; } @@ -142,7 +142,7 @@ COMMAND_HANDLER(handle_nand_probe_command) struct nand_device *p; int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = nand_probe(p); @@ -161,7 +161,7 @@ COMMAND_HANDLER(handle_nand_erase_command) struct nand_device *p; int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; unsigned long offset; @@ -208,7 +208,7 @@ COMMAND_HANDLER(handle_nand_check_bad_blocks_command) struct nand_device *p; int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (CMD_ARGC == 3) { @@ -246,7 +246,7 @@ COMMAND_HANDLER(handle_nand_write_command) struct nand_fileio_state s; int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args, &s, &nand, FILEIO_READ, false, true); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; uint32_t total_bytes = s.size; @@ -261,7 +261,7 @@ COMMAND_HANDLER(handle_nand_write_command) retval = nand_write_page(nand, s.address / nand->page_size, s.page, s.page_size, s.oob, s.oob_size); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { command_print(CMD, "failed writing file %s " "to NAND flash %s at offset 0x%8.8" PRIx32, CMD_ARGV[1], CMD_ARGV[0], s.address); @@ -286,7 +286,7 @@ COMMAND_HANDLER(handle_nand_verify_command) struct nand_fileio_state file; int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args, &file, &nand, FILEIO_READ, false, true); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct nand_fileio_state dev; @@ -295,13 +295,13 @@ COMMAND_HANDLER(handle_nand_verify_command) dev.size = file.size; dev.oob_format = file.oob_format; retval = nand_fileio_start(CMD, nand, NULL, FILEIO_NONE, &dev); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; while (file.size > 0) { retval = nand_read_page(nand, dev.address / dev.page_size, dev.page, dev.page_size, dev.oob, dev.oob_size); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { command_print(CMD, "reading NAND flash page failed"); nand_fileio_cleanup(&dev); nand_fileio_cleanup(&file); @@ -346,23 +346,23 @@ COMMAND_HANDLER(handle_nand_dump_command) struct nand_fileio_state s; int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args, &s, &nand, FILEIO_WRITE, true, false); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; while (s.size > 0) { size_t size_written; retval = nand_read_page(nand, s.address / nand->page_size, s.page, s.page_size, s.oob, s.oob_size); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { command_print(CMD, "reading NAND flash page failed"); nand_fileio_cleanup(&s); return retval; } - if (NULL != s.page) + if (s.page) fileio_write(s.fileio, s.page_size, s.page, &size_written); - if (NULL != s.oob) + if (s.oob) fileio_write(s.fileio, s.oob_size, s.oob, &size_written); s.size -= nand->page_size; @@ -388,10 +388,10 @@ COMMAND_HANDLER(handle_nand_raw_access_command) struct nand_device *p; int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; - if (NULL == p->device) { + if (!p->device) { command_print(CMD, "#%s: not probed", CMD_ARGV[0]); return ERROR_OK; } @@ -527,14 +527,14 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name, return ERROR_COMMAND_ARGUMENT_INVALID; } - if (NULL != controller->commands) { + if (controller->commands) { retval = register_commands(CMD_CTX, NULL, controller->commands); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } c = malloc(sizeof(struct nand_device)); - if (c == NULL) { + if (!c) { LOG_ERROR("End of memory"); return ERROR_FAIL; } @@ -552,7 +552,7 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name, c->next = NULL; retval = CALL_COMMAND_HANDLER(controller->nand_device_command, c); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("'%s' driver rejected nand flash. Usage: %s", controller->name, controller->usage); @@ -560,7 +560,7 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name, return retval; } - if (controller->usage == NULL) + if (!controller->usage) LOG_DEBUG("'%s' driver usage field missing", controller->name); nand_device_add(c); @@ -580,7 +580,7 @@ COMMAND_HANDLER(handle_nand_device_command) const char *driver_name = CMD_ARGV[0]; struct nand_flash_controller *controller; controller = nand_driver_find_by_name(CMD_ARGV[0]); - if (NULL == controller) { + if (!controller) { LOG_ERROR("No valid NAND flash driver found (%s)", driver_name); return CALL_COMMAND_HANDLER(handle_nand_list_drivers); } diff --git a/src/flash/nor/aduc702x.c b/src/flash/nor/aduc702x.c index b7d2299f7..492b65813 100644 --- a/src/flash/nor/aduc702x.c +++ b/src/flash/nor/aduc702x.c @@ -31,15 +31,15 @@ static int aduc702x_build_sector_list(struct flash_bank *bank); static int aduc702x_check_flash_completion(struct target *target, unsigned int timeout_ms); static int aduc702x_set_write_enable(struct target *target, int enable); -#define ADUC702x_FLASH 0xfffff800 -#define ADUC702x_FLASH_FEESTA (0*4) -#define ADUC702x_FLASH_FEEMOD (1*4) -#define ADUC702x_FLASH_FEECON (2*4) -#define ADUC702x_FLASH_FEEDAT (3*4) -#define ADUC702x_FLASH_FEEADR (4*4) -#define ADUC702x_FLASH_FEESIGN (5*4) -#define ADUC702x_FLASH_FEEPRO (6*4) -#define ADUC702x_FLASH_FEEHIDE (7*4) +#define ADUC702X_FLASH 0xfffff800 +#define ADUC702X_FLASH_FEESTA (0*4) +#define ADUC702X_FLASH_FEEMOD (1*4) +#define ADUC702X_FLASH_FEECON (2*4) +#define ADUC702X_FLASH_FEEDAT (3*4) +#define ADUC702X_FLASH_FEEADR (4*4) +#define ADUC702X_FLASH_FEESIGN (5*4) +#define ADUC702X_FLASH_FEEPRO (6*4) +#define ADUC702X_FLASH_FEEHIDE (7*4) /* flash bank aduc702x 0 0 0 0 * The ADC7019-28 devices all have the same flash layout */ @@ -87,9 +87,9 @@ static int aduc702x_erase(struct flash_bank *bank, unsigned int first, /* mass erase */ if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) { LOG_DEBUG("performing mass erase."); - target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff); - target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3); - target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06); + target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEDAT, 0x3cff); + target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEADR, 0xffc3); + target_write_u8(target, ADUC702X_FLASH + ADUC702X_FLASH_FEECON, 0x06); if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK) { LOG_ERROR("mass erase failed"); @@ -106,8 +106,8 @@ static int aduc702x_erase(struct flash_bank *bank, unsigned int first, for (x = 0; x < count; ++x) { adr = bank->base + ((first + x) * 512); - target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr); - target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05); + target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEADR, adr); + target_write_u8(target, ADUC702X_FLASH + ADUC702X_FLASH_FEECON, 0x05); if (aduc702x_check_flash_completion(target, 50) != ERROR_OK) { LOG_ERROR("failed to erase sector at address 0x%08lX", adr); @@ -283,7 +283,7 @@ static int aduc702x_write_single(struct flash_bank *bank, for (x = 0; x < count; x += 2) { /* FEEADR = address */ - target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x); + target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEADR, offset + x); /* set up data */ if ((x + 1) == count) { @@ -292,10 +292,10 @@ static int aduc702x_write_single(struct flash_bank *bank, } else b = buffer[x + 1]; - target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8)); + target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEDAT, buffer[x] | (b << 8)); /* do single-write command */ - target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02); + target_write_u8(target, ADUC702X_FLASH + ADUC702X_FLASH_FEECON, 0x02); if (aduc702x_check_flash_completion(target, 1) != ERROR_OK) { LOG_ERROR("single write failed for address 0x%08lX", @@ -345,7 +345,7 @@ static int aduc702x_probe(struct flash_bank *bank) static int aduc702x_set_write_enable(struct target *target, int enable) { /* don't bother to preserve int enable bit here */ - target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0); + target_write_u16(target, ADUC702X_FLASH + ADUC702X_FLASH_FEEMOD, enable ? 8 : 0); return ERROR_OK; } @@ -361,7 +361,7 @@ static int aduc702x_check_flash_completion(struct target *target, unsigned int t int64_t endtime = timeval_ms() + timeout_ms; while (1) { - target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v); + target_read_u8(target, ADUC702X_FLASH + ADUC702X_FLASH_FEESTA, &v); if ((v & 4) == 0) break; alive_sleep(1); diff --git a/src/flash/nor/ambiqmicro.c b/src/flash/nor/ambiqmicro.c index c4c69ce2b..6eda9286c 100644 --- a/src/flash/nor/ambiqmicro.c +++ b/src/flash/nor/ambiqmicro.c @@ -123,7 +123,7 @@ static struct { uint8_t class; uint8_t partno; const char *partname; -} ambiqmicroParts[6] = { +} ambiqmicro_parts[6] = { {0xFF, 0x00, "Unknown"}, {0x01, 0x00, "Apollo"}, {0x02, 0x00, "Apollo2"}, @@ -132,7 +132,7 @@ static struct { {0x05, 0x00, "Apollo"}, }; -static char *ambiqmicroClassname[6] = { +static char *ambiqmicro_classname[6] = { "Unknown", "Apollo", "Apollo2", "Unknown", "Unknown", "Apollo" }; @@ -172,10 +172,10 @@ static int get_ambiqmicro_info(struct flash_bank *bank, struct command_invocatio } /* Check class name in range. */ - if (ambiqmicro_info->target_class < sizeof(ambiqmicroClassname)) - classname = ambiqmicroClassname[ambiqmicro_info->target_class]; + if (ambiqmicro_info->target_class < sizeof(ambiqmicro_classname)) + classname = ambiqmicro_classname[ambiqmicro_info->target_class]; else - classname = ambiqmicroClassname[0]; + classname = ambiqmicro_classname[0]; command_print_sameline(cmd, "\nAmbiq Micro information: Chip is " "class %d (%s) %s\n", @@ -195,24 +195,24 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank) { struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv; struct target *target = bank->target; - uint32_t PartNum = 0; + uint32_t part_num = 0; int retval; /* * Read Part Number. */ - retval = target_read_u32(target, 0x40020000, &PartNum); + retval = target_read_u32(target, 0x40020000, &part_num); if (retval != ERROR_OK) { - LOG_ERROR("status(0x%x):Could not read PartNum.\n", retval); - /* Set PartNum to default device */ - PartNum = 0; + LOG_ERROR("status(0x%x):Could not read part_num.\n", retval); + /* Set part_num to default device */ + part_num = 0; } - LOG_DEBUG("Part number: 0x%" PRIx32, PartNum); + LOG_DEBUG("Part number: 0x%" PRIx32, part_num); /* * Determine device class. */ - ambiqmicro_info->target_class = (PartNum & 0xFF000000) >> 24; + ambiqmicro_info->target_class = (part_num & 0xFF000000) >> 24; switch (ambiqmicro_info->target_class) { case 1: /* 1 - Apollo */ @@ -220,9 +220,9 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank) bank->base = bank->bank_number * 0x40000; ambiqmicro_info->pagesize = 2048; ambiqmicro_info->flshsiz = - apollo_flash_size[(PartNum & 0x00F00000) >> 20]; + apollo_flash_size[(part_num & 0x00F00000) >> 20]; ambiqmicro_info->sramsiz = - apollo_sram_size[(PartNum & 0x000F0000) >> 16]; + apollo_sram_size[(part_num & 0x000F0000) >> 16]; ambiqmicro_info->num_pages = ambiqmicro_info->flshsiz / ambiqmicro_info->pagesize; if (ambiqmicro_info->num_pages > 128) { @@ -248,12 +248,12 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank) } - if (ambiqmicro_info->target_class < ARRAY_SIZE(ambiqmicroParts)) + if (ambiqmicro_info->target_class < ARRAY_SIZE(ambiqmicro_parts)) ambiqmicro_info->target_name = - ambiqmicroParts[ambiqmicro_info->target_class].partname; + ambiqmicro_parts[ambiqmicro_info->target_class].partname; else ambiqmicro_info->target_name = - ambiqmicroParts[0].partname; + ambiqmicro_parts[0].partname; LOG_DEBUG("num_pages: %" PRIu32 ", pagesize: %" PRIu32 ", flash: %" PRIu32 ", sram: %" PRIu32, ambiqmicro_info->num_pages, @@ -774,16 +774,12 @@ COMMAND_HANDLER(ambiqmicro_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; - if (ambiqmicro_mass_erase(bank) == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - + if (ambiqmicro_mass_erase(bank) == ERROR_OK) command_print(CMD, "ambiqmicro mass erase complete"); - } else + else command_print(CMD, "ambiqmicro mass erase failed"); return ERROR_OK; @@ -802,7 +798,7 @@ COMMAND_HANDLER(ambiqmicro_handle_page_erase_command) COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], last); retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (ambiqmicro_erase(bank, first, last) == ERROR_OK) diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c index e0c779a33..cec86fc24 100644 --- a/src/flash/nor/at91sam3.c +++ b/src/flash/nor/at91sam3.c @@ -104,10 +104,10 @@ #define AT91C_EFC_FCMD_STUI (0xE) /* (EFC) Start Read Unique ID */ #define AT91C_EFC_FCMD_SPUI (0xF) /* (EFC) Stop Read Unique ID */ -#define offset_EFC_FMR 0 -#define offset_EFC_FCR 4 -#define offset_EFC_FSR 8 -#define offset_EFC_FRR 12 +#define OFFSET_EFC_FMR 0 +#define OFFSET_EFC_FCR 4 +#define OFFSET_EFC_FSR 8 +#define OFFSET_EFC_FRR 12 extern const struct flash_driver at91sam3_flash; @@ -191,13 +191,13 @@ struct sam3_bank_private { /* DANGER: THERE ARE DRAGONS HERE.. */ /* NOTE: If you add more 'ghost' pointers */ /* be aware that you must *manually* update */ - /* these pointers in the function sam3_GetDetails() */ + /* these pointers in the function sam3_get_details() */ /* See the comment "Here there be dragons" */ /* so we can find the chip we belong to */ - struct sam3_chip *pChip; + struct sam3_chip *chip; /* so we can find the original bank pointer */ - struct flash_bank *pBank; + struct flash_bank *bank; unsigned bank_number; uint32_t controller_address; uint32_t base_address; @@ -214,7 +214,7 @@ struct sam3_chip_details { /* note: If you add pointers here */ /* be careful about them as they */ /* may need to be updated inside */ - /* the function: "sam3_GetDetails() */ + /* the function: "sam3_get_details() */ /* which copy/overwrites the */ /* 'runtime' copy of this structure */ uint32_t chipid_cidr; @@ -244,7 +244,7 @@ struct sam3_chip { struct sam3_reg_list { uint32_t address; size_t struct_offset; const char *name; - void (*explain_func)(struct sam3_chip *pInfo); + void (*explain_func)(struct sam3_chip *chip); }; static struct sam3_chip *all_sam3_chips; @@ -277,7 +277,7 @@ static struct sam3_chip *get_current_sam3(struct command_invocation *cmd) return NULL; } -/* these are used to *initialize* the "pChip->details" structure. */ +/* these are used to *initialize* the "chip->details" structure. */ static const struct sam3_chip_details all_sam3_details[] = { /* Start at91sam3u* series */ { @@ -307,8 +307,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_U, .controller_address = 0x400e0800, @@ -323,8 +323,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_U, .controller_address = 0x400e0a00, @@ -358,8 +358,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_U, .controller_address = 0x400e0800, @@ -400,8 +400,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_U, .controller_address = 0x400e0800, @@ -449,8 +449,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { /* .bank[0] = { */ .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_U, .controller_address = 0x400e0800, @@ -464,8 +464,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_U, .controller_address = 0x400e0a00, @@ -499,8 +499,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_U, .controller_address = 0x400e0800, @@ -541,8 +541,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_U, .controller_address = 0x400e0800, @@ -579,8 +579,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -612,8 +612,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -644,8 +644,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -676,8 +676,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -708,8 +708,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -740,8 +740,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, @@ -755,8 +755,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_512K_SD, .controller_address = 0x400e0a00, @@ -780,8 +780,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, @@ -795,8 +795,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_512K_SD, .controller_address = 0x400e0a00, @@ -820,8 +820,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, @@ -835,8 +835,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_512K_SD, .controller_address = 0x400e0a00, @@ -860,8 +860,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -892,8 +892,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -924,8 +924,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -956,8 +956,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -988,8 +988,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1020,8 +1020,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1052,8 +1052,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1102,8 +1102,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1151,8 +1151,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1200,8 +1200,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1249,8 +1249,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1298,8 +1298,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1347,8 +1347,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1396,8 +1396,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1445,8 +1445,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1494,8 +1494,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1528,8 +1528,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1562,8 +1562,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1596,8 +1596,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1630,8 +1630,8 @@ static const struct sam3_chip_details all_sam3_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_N, .controller_address = 0x400e0A00, @@ -1681,8 +1681,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_AX, .controller_address = 0x400e0a00, @@ -1696,8 +1696,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_512K_AX, .controller_address = 0x400e0c00, @@ -1722,8 +1722,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_AX, .controller_address = 0x400e0a00, @@ -1737,8 +1737,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_256K_AX, .controller_address = 0x400e0c00, @@ -1781,8 +1781,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_AX, .controller_address = 0x400e0a00, @@ -1796,8 +1796,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_512K_AX, .controller_address = 0x400e0c00, @@ -1823,8 +1823,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_AX, .controller_address = 0x400e0a00, @@ -1838,8 +1838,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_512K_AX, .controller_address = 0x400e0c00, @@ -1864,8 +1864,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_AX, .controller_address = 0x400e0a00, @@ -1879,8 +1879,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_512K_AX, .controller_address = 0x400e0c00, @@ -1905,8 +1905,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_AX, .controller_address = 0x400e0a00, @@ -1920,8 +1920,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_512K_AX, .controller_address = 0x400e0c00, @@ -1946,8 +1946,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_AX, .controller_address = 0x400e0a00, @@ -1961,8 +1961,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_256K_AX, .controller_address = 0x400e0c00, @@ -1987,8 +1987,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[0] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_AX, .controller_address = 0x400e0a00, @@ -2002,8 +2002,8 @@ static const struct sam3_chip_details all_sam3_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_256K_AX, .controller_address = 0x400e0c00, @@ -2036,14 +2036,14 @@ static const struct sam3_chip_details all_sam3_details[] = { /** * Get the current status of the EEFC and * the value of some status bits (LOCKE, PROGE). - * @param pPrivate - info about the bank + * @param private - info about the bank * @param v - result goes here */ -static int EFC_GetStatus(struct sam3_bank_private *pPrivate, uint32_t *v) +static int efc_get_status(struct sam3_bank_private *private, uint32_t *v) { int r; - r = target_read_u32(pPrivate->pChip->target, - pPrivate->controller_address + offset_EFC_FSR, + r = target_read_u32(private->chip->target, + private->controller_address + OFFSET_EFC_FSR, v); LOG_DEBUG("Status: 0x%08x (lockerror: %d, cmderror: %d, ready: %d)", (unsigned int)(*v), @@ -2056,15 +2056,15 @@ static int EFC_GetStatus(struct sam3_bank_private *pPrivate, uint32_t *v) /** * Get the result of the last executed command. - * @param pPrivate - info about the bank + * @param private - info about the bank * @param v - result goes here */ -static int EFC_GetResult(struct sam3_bank_private *pPrivate, uint32_t *v) +static int efc_get_result(struct sam3_bank_private *private, uint32_t *v) { int r; uint32_t rv; - r = target_read_u32(pPrivate->pChip->target, - pPrivate->controller_address + offset_EFC_FRR, + r = target_read_u32(private->chip->target, + private->controller_address + OFFSET_EFC_FRR, &rv); if (v) *v = rv; @@ -2072,7 +2072,7 @@ static int EFC_GetResult(struct sam3_bank_private *pPrivate, uint32_t *v) return r; } -static int EFC_StartCommand(struct sam3_bank_private *pPrivate, +static int efc_start_command(struct sam3_bank_private *private, unsigned command, unsigned argument) { uint32_t n, v; @@ -2093,16 +2093,16 @@ do_retry: /* case AT91C_EFC_FCMD_EPA: */ case AT91C_EFC_FCMD_SLB: case AT91C_EFC_FCMD_CLB: - n = (pPrivate->size_bytes / pPrivate->page_size); + n = (private->size_bytes / private->page_size); if (argument >= n) LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n)); break; case AT91C_EFC_FCMD_SFB: case AT91C_EFC_FCMD_CFB: - if (argument >= pPrivate->pChip->details.n_gpnvms) { + if (argument >= private->chip->details.n_gpnvms) { LOG_ERROR("*BUG*: Embedded flash has only %d GPNVMs", - pPrivate->pChip->details.n_gpnvms); + private->chip->details.n_gpnvms); } break; @@ -2127,7 +2127,7 @@ do_retry: /* Situation (2) - normal, finished reading unique id */ } else { /* it should be "ready" */ - EFC_GetStatus(pPrivate, &v); + efc_get_status(private, &v); if (v & 1) { /* then it is ready */ /* we go on */ @@ -2136,14 +2136,14 @@ do_retry: /* we have done this before */ /* the controller is not responding. */ LOG_ERROR("flash controller(%d) is not ready! Error", - pPrivate->bank_number); + private->bank_number); return ERROR_FAIL; } else { retry++; LOG_ERROR("Flash controller(%d) is not ready, attempting reset", - pPrivate->bank_number); + private->bank_number); /* we do that by issuing the *STOP* command */ - EFC_StartCommand(pPrivate, AT91C_EFC_FCMD_SPUI, 0); + efc_start_command(private, AT91C_EFC_FCMD_SPUI, 0); /* above is recursive, and further recursion is blocked by */ /* if (command == AT91C_EFC_FCMD_SPUI) above */ goto do_retry; @@ -2153,8 +2153,8 @@ do_retry: v = (0x5A << 24) | (argument << 8) | command; LOG_DEBUG("Command: 0x%08x", ((unsigned int)(v))); - r = target_write_u32(pPrivate->pBank->target, - pPrivate->controller_address + offset_EFC_FCR, v); + r = target_write_u32(private->bank->target, + private->controller_address + OFFSET_EFC_FCR, v); if (r != ERROR_OK) LOG_DEBUG("Error Write failed"); return r; @@ -2162,12 +2162,12 @@ do_retry: /** * Performs the given command and wait until its completion (or an error). - * @param pPrivate - info about the bank + * @param private - info about the bank * @param command - Command to perform. * @param argument - Optional command argument. * @param status - put command status bits here */ -static int EFC_PerformCommand(struct sam3_bank_private *pPrivate, +static int efc_perform_command(struct sam3_bank_private *private, unsigned command, unsigned argument, uint32_t *status) @@ -2181,14 +2181,14 @@ static int EFC_PerformCommand(struct sam3_bank_private *pPrivate, if (status) *status = 0; - r = EFC_StartCommand(pPrivate, command, argument); + r = efc_start_command(private, command, argument); if (r != ERROR_OK) return r; ms_end = 500 + timeval_ms(); do { - r = EFC_GetStatus(pPrivate, &v); + r = efc_get_status(private, &v); if (r != ERROR_OK) return r; ms_now = timeval_ms(); @@ -2208,87 +2208,87 @@ static int EFC_PerformCommand(struct sam3_bank_private *pPrivate, /** * Read the unique ID. - * @param pPrivate - info about the bank - * The unique ID is stored in the 'pPrivate' structure. + * @param private - info about the bank + * The unique ID is stored in the 'private' structure. */ -static int FLASHD_ReadUniqueID(struct sam3_bank_private *pPrivate) +static int flashd_read_uid(struct sam3_bank_private *private) { int r; uint32_t v; int x; /* assume 0 */ - pPrivate->pChip->cfg.unique_id[0] = 0; - pPrivate->pChip->cfg.unique_id[1] = 0; - pPrivate->pChip->cfg.unique_id[2] = 0; - pPrivate->pChip->cfg.unique_id[3] = 0; + private->chip->cfg.unique_id[0] = 0; + private->chip->cfg.unique_id[1] = 0; + private->chip->cfg.unique_id[2] = 0; + private->chip->cfg.unique_id[3] = 0; LOG_DEBUG("Begin"); - r = EFC_StartCommand(pPrivate, AT91C_EFC_FCMD_STUI, 0); + r = efc_start_command(private, AT91C_EFC_FCMD_STUI, 0); if (r < 0) return r; for (x = 0; x < 4; x++) { - r = target_read_u32(pPrivate->pChip->target, - pPrivate->pBank->base + (x * 4), + r = target_read_u32(private->chip->target, + private->bank->base + (x * 4), &v); if (r < 0) return r; - pPrivate->pChip->cfg.unique_id[x] = v; + private->chip->cfg.unique_id[x] = v; } - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SPUI, 0, NULL); + r = efc_perform_command(private, AT91C_EFC_FCMD_SPUI, 0, NULL); LOG_DEBUG("End: R=%d, id = 0x%08x, 0x%08x, 0x%08x, 0x%08x", r, - (unsigned int)(pPrivate->pChip->cfg.unique_id[0]), - (unsigned int)(pPrivate->pChip->cfg.unique_id[1]), - (unsigned int)(pPrivate->pChip->cfg.unique_id[2]), - (unsigned int)(pPrivate->pChip->cfg.unique_id[3])); + (unsigned int)(private->chip->cfg.unique_id[0]), + (unsigned int)(private->chip->cfg.unique_id[1]), + (unsigned int)(private->chip->cfg.unique_id[2]), + (unsigned int)(private->chip->cfg.unique_id[3])); return r; } /** * Erases the entire flash. - * @param pPrivate - the info about the bank. + * @param private - the info about the bank. */ -static int FLASHD_EraseEntireBank(struct sam3_bank_private *pPrivate) +static int flashd_erase_entire_bank(struct sam3_bank_private *private) { LOG_DEBUG("Here"); - return EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_EA, 0, NULL); + return efc_perform_command(private, AT91C_EFC_FCMD_EA, 0, NULL); } /** * Gets current GPNVM state. - * @param pPrivate - info about the bank. + * @param private - info about the bank. * @param gpnvm - GPNVM bit index. * @param puthere - result stored here. */ /* ------------------------------------------------------------------------------ */ -static int FLASHD_GetGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm, unsigned *puthere) +static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned gpnvm, unsigned *puthere) { uint32_t v; int r; LOG_DEBUG("Here"); - if (pPrivate->bank_number != 0) { + if (private->bank_number != 0) { LOG_ERROR("GPNVM only works with Bank0"); return ERROR_FAIL; } - if (gpnvm >= pPrivate->pChip->details.n_gpnvms) { + if (gpnvm >= private->chip->details.n_gpnvms) { LOG_ERROR("Invalid GPNVM %d, max: %d, ignored", - gpnvm, pPrivate->pChip->details.n_gpnvms); + gpnvm, private->chip->details.n_gpnvms); return ERROR_FAIL; } /* Get GPNVMs status */ - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_GFB, 0, NULL); + r = efc_perform_command(private, AT91C_EFC_FCMD_GFB, 0, NULL); if (r != ERROR_OK) { LOG_ERROR("Failed"); return r; } - r = EFC_GetResult(pPrivate, &v); + r = efc_get_result(private, &v); if (puthere) { /* Check if GPNVM is set */ @@ -2301,59 +2301,59 @@ static int FLASHD_GetGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm, u /** * Clears the selected GPNVM bit. - * @param pPrivate info about the bank + * @param private info about the bank * @param gpnvm GPNVM index. * @returns 0 if successful; otherwise returns an error code. */ -static int FLASHD_ClrGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm) +static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned gpnvm) { int r; unsigned v; LOG_DEBUG("Here"); - if (pPrivate->bank_number != 0) { + if (private->bank_number != 0) { LOG_ERROR("GPNVM only works with Bank0"); return ERROR_FAIL; } - if (gpnvm >= pPrivate->pChip->details.n_gpnvms) { + if (gpnvm >= private->chip->details.n_gpnvms) { LOG_ERROR("Invalid GPNVM %d, max: %d, ignored", - gpnvm, pPrivate->pChip->details.n_gpnvms); + gpnvm, private->chip->details.n_gpnvms); return ERROR_FAIL; } - r = FLASHD_GetGPNVM(pPrivate, gpnvm, &v); + r = flashd_get_gpnvm(private, gpnvm, &v); if (r != ERROR_OK) { LOG_DEBUG("Failed: %d", r); return r; } - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_CFB, gpnvm, NULL); + r = efc_perform_command(private, AT91C_EFC_FCMD_CFB, gpnvm, NULL); LOG_DEBUG("End: %d", r); return r; } /** * Sets the selected GPNVM bit. - * @param pPrivate info about the bank + * @param private info about the bank * @param gpnvm GPNVM index. */ -static int FLASHD_SetGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm) +static int flashd_set_gpnvm(struct sam3_bank_private *private, unsigned gpnvm) { int r; unsigned v; - if (pPrivate->bank_number != 0) { + if (private->bank_number != 0) { LOG_ERROR("GPNVM only works with Bank0"); return ERROR_FAIL; } - if (gpnvm >= pPrivate->pChip->details.n_gpnvms) { + if (gpnvm >= private->chip->details.n_gpnvms) { LOG_ERROR("Invalid GPNVM %d, max: %d, ignored", - gpnvm, pPrivate->pChip->details.n_gpnvms); + gpnvm, private->chip->details.n_gpnvms); return ERROR_FAIL; } - r = FLASHD_GetGPNVM(pPrivate, gpnvm, &v); + r = flashd_get_gpnvm(private, gpnvm, &v); if (r != ERROR_OK) return r; if (v) { @@ -2361,35 +2361,35 @@ static int FLASHD_SetGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm) r = ERROR_OK; } else { /* set it */ - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SFB, gpnvm, NULL); + r = efc_perform_command(private, AT91C_EFC_FCMD_SFB, gpnvm, NULL); } return r; } /** * Returns a bit field (at most 64) of locked regions within a page. - * @param pPrivate info about the bank + * @param private info about the bank * @param v where to store locked bits */ -static int FLASHD_GetLockBits(struct sam3_bank_private *pPrivate, uint32_t *v) +static int flashd_get_lock_bits(struct sam3_bank_private *private, uint32_t *v) { int r; LOG_DEBUG("Here"); - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_GLB, 0, NULL); + r = efc_perform_command(private, AT91C_EFC_FCMD_GLB, 0, NULL); if (r == ERROR_OK) - r = EFC_GetResult(pPrivate, v); + r = efc_get_result(private, v); LOG_DEBUG("End: %d", r); return r; } /** * Unlocks all the regions in the given address range. - * @param pPrivate info about the bank + * @param private info about the bank * @param start_sector first sector to unlock * @param end_sector last (inclusive) to unlock */ -static int FLASHD_Unlock(struct sam3_bank_private *pPrivate, +static int flashd_unlock(struct sam3_bank_private *private, unsigned start_sector, unsigned end_sector) { @@ -2398,13 +2398,13 @@ static int FLASHD_Unlock(struct sam3_bank_private *pPrivate, uint32_t pg; uint32_t pages_per_sector; - pages_per_sector = pPrivate->sector_size / pPrivate->page_size; + pages_per_sector = private->sector_size / private->page_size; /* Unlock all pages */ while (start_sector <= end_sector) { pg = start_sector * pages_per_sector; - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_CLB, pg, &status); + r = efc_perform_command(private, AT91C_EFC_FCMD_CLB, pg, &status); if (r != ERROR_OK) return r; start_sector++; @@ -2415,11 +2415,11 @@ static int FLASHD_Unlock(struct sam3_bank_private *pPrivate, /** * Locks regions - * @param pPrivate - info about the bank + * @param private - info about the bank * @param start_sector - first sector to lock * @param end_sector - last sector (inclusive) to lock */ -static int FLASHD_Lock(struct sam3_bank_private *pPrivate, +static int flashd_lock(struct sam3_bank_private *private, unsigned start_sector, unsigned end_sector) { @@ -2428,13 +2428,13 @@ static int FLASHD_Lock(struct sam3_bank_private *pPrivate, uint32_t pages_per_sector; int r; - pages_per_sector = pPrivate->sector_size / pPrivate->page_size; + pages_per_sector = private->sector_size / private->page_size; /* Lock all pages */ while (start_sector <= end_sector) { pg = start_sector * pages_per_sector; - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SLB, pg, &status); + r = efc_perform_command(private, AT91C_EFC_FCMD_SLB, pg, &status); if (r != ERROR_OK) return r; start_sector++; @@ -2446,7 +2446,7 @@ static int FLASHD_Lock(struct sam3_bank_private *pPrivate, /* begin helpful debug code */ /* print the fieldname, the field value, in dec & hex, and return field value */ -static uint32_t sam3_reg_fieldname(struct sam3_chip *pChip, +static uint32_t sam3_reg_fieldname(struct sam3_chip *chip, const char *regname, uint32_t value, unsigned shift, @@ -2598,72 +2598,72 @@ static const char *const _rc_freq[] = { "4 MHz", "8 MHz", "12 MHz", "reserved" }; -static void sam3_explain_ckgr_mor(struct sam3_chip *pChip) +static void sam3_explain_ckgr_mor(struct sam3_chip *chip) { uint32_t v; uint32_t rcen; - v = sam3_reg_fieldname(pChip, "MOSCXTEN", pChip->cfg.CKGR_MOR, 0, 1); + v = sam3_reg_fieldname(chip, "MOSCXTEN", chip->cfg.CKGR_MOR, 0, 1); LOG_USER("(main xtal enabled: %s)", _yes_or_no(v)); - v = sam3_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1); + v = sam3_reg_fieldname(chip, "MOSCXTBY", chip->cfg.CKGR_MOR, 1, 1); LOG_USER("(main osc bypass: %s)", _yes_or_no(v)); - rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 3, 1); + rcen = sam3_reg_fieldname(chip, "MOSCRCEN", chip->cfg.CKGR_MOR, 3, 1); LOG_USER("(onchip RC-OSC enabled: %s)", _yes_or_no(rcen)); - v = sam3_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3); + v = sam3_reg_fieldname(chip, "MOSCRCF", chip->cfg.CKGR_MOR, 4, 3); LOG_USER("(onchip RC-OSC freq: %s)", _rc_freq[v]); - pChip->cfg.rc_freq = 0; + chip->cfg.rc_freq = 0; if (rcen) { switch (v) { default: - pChip->cfg.rc_freq = 0; + chip->cfg.rc_freq = 0; break; case 0: - pChip->cfg.rc_freq = 4 * 1000 * 1000; + chip->cfg.rc_freq = 4 * 1000 * 1000; break; case 1: - pChip->cfg.rc_freq = 8 * 1000 * 1000; + chip->cfg.rc_freq = 8 * 1000 * 1000; break; case 2: - pChip->cfg.rc_freq = 12 * 1000 * 1000; + chip->cfg.rc_freq = 12 * 1000 * 1000; break; } } - v = sam3_reg_fieldname(pChip, "MOSCXTST", pChip->cfg.CKGR_MOR, 8, 8); + v = sam3_reg_fieldname(chip, "MOSCXTST", chip->cfg.CKGR_MOR, 8, 8); LOG_USER("(startup clks, time= %f uSecs)", - ((float)(v * 1000000)) / ((float)(pChip->cfg.slow_freq))); - v = sam3_reg_fieldname(pChip, "MOSCSEL", pChip->cfg.CKGR_MOR, 24, 1); + ((float)(v * 1000000)) / ((float)(chip->cfg.slow_freq))); + v = sam3_reg_fieldname(chip, "MOSCSEL", chip->cfg.CKGR_MOR, 24, 1); LOG_USER("(mainosc source: %s)", v ? "external xtal" : "internal RC"); - v = sam3_reg_fieldname(pChip, "CFDEN", pChip->cfg.CKGR_MOR, 25, 1); + v = sam3_reg_fieldname(chip, "CFDEN", chip->cfg.CKGR_MOR, 25, 1); LOG_USER("(clock failure enabled: %s)", _yes_or_no(v)); } -static void sam3_explain_chipid_cidr(struct sam3_chip *pChip) +static void sam3_explain_chipid_cidr(struct sam3_chip *chip) { int x; uint32_t v; const char *cp; - sam3_reg_fieldname(pChip, "Version", pChip->cfg.CHIPID_CIDR, 0, 5); + sam3_reg_fieldname(chip, "Version", chip->cfg.CHIPID_CIDR, 0, 5); LOG_USER_N("\n"); - v = sam3_reg_fieldname(pChip, "EPROC", pChip->cfg.CHIPID_CIDR, 5, 3); + v = sam3_reg_fieldname(chip, "EPROC", chip->cfg.CHIPID_CIDR, 5, 3); LOG_USER("%s", eproc_names[v]); - v = sam3_reg_fieldname(pChip, "NVPSIZE", pChip->cfg.CHIPID_CIDR, 8, 4); + v = sam3_reg_fieldname(chip, "NVPSIZE", chip->cfg.CHIPID_CIDR, 8, 4); LOG_USER("%s", nvpsize[v]); - v = sam3_reg_fieldname(pChip, "NVPSIZE2", pChip->cfg.CHIPID_CIDR, 12, 4); + v = sam3_reg_fieldname(chip, "NVPSIZE2", chip->cfg.CHIPID_CIDR, 12, 4); LOG_USER("%s", nvpsize2[v]); - v = sam3_reg_fieldname(pChip, "SRAMSIZE", pChip->cfg.CHIPID_CIDR, 16, 4); + v = sam3_reg_fieldname(chip, "SRAMSIZE", chip->cfg.CHIPID_CIDR, 16, 4); LOG_USER("%s", sramsize[v]); - v = sam3_reg_fieldname(pChip, "ARCH", pChip->cfg.CHIPID_CIDR, 20, 8); + v = sam3_reg_fieldname(chip, "ARCH", chip->cfg.CHIPID_CIDR, 20, 8); cp = _unknown; for (x = 0; archnames[x].name; x++) { if (v == archnames[x].value) { @@ -2674,73 +2674,73 @@ static void sam3_explain_chipid_cidr(struct sam3_chip *pChip) LOG_USER("%s", cp); - v = sam3_reg_fieldname(pChip, "NVPTYP", pChip->cfg.CHIPID_CIDR, 28, 3); + v = sam3_reg_fieldname(chip, "NVPTYP", chip->cfg.CHIPID_CIDR, 28, 3); LOG_USER("%s", nvptype[v]); - v = sam3_reg_fieldname(pChip, "EXTID", pChip->cfg.CHIPID_CIDR, 31, 1); + v = sam3_reg_fieldname(chip, "EXTID", chip->cfg.CHIPID_CIDR, 31, 1); LOG_USER("(exists: %s)", _yes_or_no(v)); } -static void sam3_explain_ckgr_mcfr(struct sam3_chip *pChip) +static void sam3_explain_ckgr_mcfr(struct sam3_chip *chip) { uint32_t v; - v = sam3_reg_fieldname(pChip, "MAINFRDY", pChip->cfg.CKGR_MCFR, 16, 1); + v = sam3_reg_fieldname(chip, "MAINFRDY", chip->cfg.CKGR_MCFR, 16, 1); LOG_USER("(main ready: %s)", _yes_or_no(v)); - v = sam3_reg_fieldname(pChip, "MAINF", pChip->cfg.CKGR_MCFR, 0, 16); + v = sam3_reg_fieldname(chip, "MAINF", chip->cfg.CKGR_MCFR, 0, 16); - v = (v * pChip->cfg.slow_freq) / 16; - pChip->cfg.mainosc_freq = v; + v = (v * chip->cfg.slow_freq) / 16; + chip->cfg.mainosc_freq = v; LOG_USER("(%3.03f Mhz (%" PRIu32 ".%03" PRIu32 "khz slowclk)", _tomhz(v), - (uint32_t)(pChip->cfg.slow_freq / 1000), - (uint32_t)(pChip->cfg.slow_freq % 1000)); + (uint32_t)(chip->cfg.slow_freq / 1000), + (uint32_t)(chip->cfg.slow_freq % 1000)); } -static void sam3_explain_ckgr_plla(struct sam3_chip *pChip) +static void sam3_explain_ckgr_plla(struct sam3_chip *chip) { uint32_t mula, diva; - diva = sam3_reg_fieldname(pChip, "DIVA", pChip->cfg.CKGR_PLLAR, 0, 8); + diva = sam3_reg_fieldname(chip, "DIVA", chip->cfg.CKGR_PLLAR, 0, 8); LOG_USER_N("\n"); - mula = sam3_reg_fieldname(pChip, "MULA", pChip->cfg.CKGR_PLLAR, 16, 11); + mula = sam3_reg_fieldname(chip, "MULA", chip->cfg.CKGR_PLLAR, 16, 11); LOG_USER_N("\n"); - pChip->cfg.plla_freq = 0; + chip->cfg.plla_freq = 0; if (mula == 0) LOG_USER("\tPLLA Freq: (Disabled,mula = 0)"); else if (diva == 0) LOG_USER("\tPLLA Freq: (Disabled,diva = 0)"); else if (diva >= 1) { - pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1) / diva); + chip->cfg.plla_freq = (chip->cfg.mainosc_freq * (mula + 1) / diva); LOG_USER("\tPLLA Freq: %3.03f MHz", - _tomhz(pChip->cfg.plla_freq)); + _tomhz(chip->cfg.plla_freq)); } } -static void sam3_explain_mckr(struct sam3_chip *pChip) +static void sam3_explain_mckr(struct sam3_chip *chip) { uint32_t css, pres, fin = 0; int pdiv = 0; const char *cp = NULL; - css = sam3_reg_fieldname(pChip, "CSS", pChip->cfg.PMC_MCKR, 0, 2); + css = sam3_reg_fieldname(chip, "CSS", chip->cfg.PMC_MCKR, 0, 2); switch (css & 3) { case 0: - fin = pChip->cfg.slow_freq; + fin = chip->cfg.slow_freq; cp = "slowclk"; break; case 1: - fin = pChip->cfg.mainosc_freq; + fin = chip->cfg.mainosc_freq; cp = "mainosc"; break; case 2: - fin = pChip->cfg.plla_freq; + fin = chip->cfg.plla_freq; cp = "plla"; break; case 3: - if (pChip->cfg.CKGR_UCKR & (1 << 16)) { + if (chip->cfg.CKGR_UCKR & (1 << 16)) { fin = 480 * 1000 * 1000; cp = "upll"; } else { @@ -2756,7 +2756,7 @@ static void sam3_explain_mckr(struct sam3_chip *pChip) LOG_USER("%s (%3.03f Mhz)", cp, _tomhz(fin)); - pres = sam3_reg_fieldname(pChip, "PRES", pChip->cfg.PMC_MCKR, 4, 3); + pres = sam3_reg_fieldname(chip, "PRES", chip->cfg.PMC_MCKR, 4, 3); switch (pres & 0x07) { case 0: pdiv = 1; @@ -2798,33 +2798,33 @@ static void sam3_explain_mckr(struct sam3_chip *pChip) fin = fin / pdiv; /* sam3 has a *SINGLE* clock - */ /* other at91 series parts have divisors for these. */ - pChip->cfg.cpu_freq = fin; - pChip->cfg.mclk_freq = fin; - pChip->cfg.fclk_freq = fin; + chip->cfg.cpu_freq = fin; + chip->cfg.mclk_freq = fin; + chip->cfg.fclk_freq = fin; LOG_USER("\t\tResult CPU Freq: %3.03f", _tomhz(fin)); } #if 0 -static struct sam3_chip *target2sam3(struct target *pTarget) +static struct sam3_chip *target2sam3(struct target *target) { - struct sam3_chip *pChip; + struct sam3_chip *chip; - if (pTarget == NULL) + if (!target) return NULL; - pChip = all_sam3_chips; - while (pChip) { - if (pChip->target == pTarget) + chip = all_sam3_chips; + while (chip) { + if (chip->target == target) break; /* return below */ else - pChip = pChip->next; + chip = chip->next; } - return pChip; + return chip; } #endif -static uint32_t *sam3_get_reg_ptr(struct sam3_cfg *pCfg, const struct sam3_reg_list *pList) +static uint32_t *sam3_get_reg_ptr(struct sam3_cfg *cfg, const struct sam3_reg_list *list) { /* this function exists to help */ /* keep funky offsetof() errors */ @@ -2833,7 +2833,7 @@ static uint32_t *sam3_get_reg_ptr(struct sam3_cfg *pCfg, const struct sam3_reg_l /* By using prototypes - we can detect what would */ /* be casting errors. */ - return (uint32_t *)(void *)(((char *)(pCfg)) + pList->struct_offset); + return (uint32_t *)(void *)(((char *)(cfg)) + list->struct_offset); } @@ -2873,65 +2873,65 @@ static struct sam3_bank_private *get_sam3_bank_private(struct flash_bank *bank) * Given a pointer to where it goes in the structure, * determine the register name, address from the all registers table. */ -static const struct sam3_reg_list *sam3_GetReg(struct sam3_chip *pChip, uint32_t *goes_here) +static const struct sam3_reg_list *sam3_get_reg(struct sam3_chip *chip, uint32_t *goes_here) { - const struct sam3_reg_list *pReg; + const struct sam3_reg_list *reg; - pReg = &(sam3_all_regs[0]); - while (pReg->name) { - uint32_t *pPossible; + reg = &(sam3_all_regs[0]); + while (reg->name) { + uint32_t *possible; /* calculate where this one go.. */ /* it is "possibly" this register. */ - pPossible = ((uint32_t *)(void *)(((char *)(&(pChip->cfg))) + pReg->struct_offset)); + possible = ((uint32_t *)(void *)(((char *)(&(chip->cfg))) + reg->struct_offset)); /* well? Is it this register */ - if (pPossible == goes_here) { + if (possible == goes_here) { /* Jump for joy! */ - return pReg; + return reg; } /* next... */ - pReg++; + reg++; } /* This is *TOTAL*PANIC* - we are totally screwed. */ LOG_ERROR("INVALID SAM3 REGISTER"); return NULL; } -static int sam3_ReadThisReg(struct sam3_chip *pChip, uint32_t *goes_here) +static int sam3_read_this_reg(struct sam3_chip *chip, uint32_t *goes_here) { - const struct sam3_reg_list *pReg; + const struct sam3_reg_list *reg; int r; - pReg = sam3_GetReg(pChip, goes_here); - if (!pReg) + reg = sam3_get_reg(chip, goes_here); + if (!reg) return ERROR_FAIL; - r = target_read_u32(pChip->target, pReg->address, goes_here); + r = target_read_u32(chip->target, reg->address, goes_here); if (r != ERROR_OK) { LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d", - pReg->name, (unsigned)(pReg->address), r); + reg->name, (unsigned)(reg->address), r); } return r; } -static int sam3_ReadAllRegs(struct sam3_chip *pChip) +static int sam3_read_all_regs(struct sam3_chip *chip) { int r; - const struct sam3_reg_list *pReg; + const struct sam3_reg_list *reg; - pReg = &(sam3_all_regs[0]); - while (pReg->name) { - r = sam3_ReadThisReg(pChip, - sam3_get_reg_ptr(&(pChip->cfg), pReg)); + reg = &(sam3_all_regs[0]); + while (reg->name) { + r = sam3_read_this_reg(chip, + sam3_get_reg_ptr(&(chip->cfg), reg)); if (r != ERROR_OK) { LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Error: %d", - pReg->name, ((unsigned)(pReg->address)), r); + reg->name, ((unsigned)(reg->address)), r); return r; } - pReg++; + reg++; } /* Chip identification register @@ -2948,45 +2948,45 @@ static int sam3_ReadAllRegs(struct sam3_chip *pChip) * located in the memory map of the Power Management Controller * (PMC). Furthermore, the address is not used by the PMC. * So when read, the memory controller returns zero.*/ - if (pChip->cfg.CHIPID_CIDR == 0) { - /*Put the correct CIDR and EXID values in the pChip structure */ - pChip->cfg.CHIPID_CIDR = pChip->cfg.CHIPID_CIDR2; - pChip->cfg.CHIPID_EXID = pChip->cfg.CHIPID_EXID2; + if (chip->cfg.CHIPID_CIDR == 0) { + /*Put the correct CIDR and EXID values in the chip structure */ + chip->cfg.CHIPID_CIDR = chip->cfg.CHIPID_CIDR2; + chip->cfg.CHIPID_EXID = chip->cfg.CHIPID_EXID2; } return ERROR_OK; } -static int sam3_GetInfo(struct sam3_chip *pChip) +static int sam3_get_info(struct sam3_chip *chip) { - const struct sam3_reg_list *pReg; + const struct sam3_reg_list *reg; uint32_t regval; - pReg = &(sam3_all_regs[0]); - while (pReg->name) { + reg = &(sam3_all_regs[0]); + while (reg->name) { /* display all regs */ - LOG_DEBUG("Start: %s", pReg->name); - regval = *sam3_get_reg_ptr(&(pChip->cfg), pReg); + LOG_DEBUG("Start: %s", reg->name); + regval = *sam3_get_reg_ptr(&(chip->cfg), reg); LOG_USER("%*s: [0x%08" PRIx32 "] -> 0x%08" PRIx32, REG_NAME_WIDTH, - pReg->name, - pReg->address, + reg->name, + reg->address, regval); - if (pReg->explain_func) - (*(pReg->explain_func))(pChip); - LOG_DEBUG("End: %s", pReg->name); - pReg++; + if (reg->explain_func) + (*(reg->explain_func))(chip); + LOG_DEBUG("End: %s", reg->name); + reg++; } - LOG_USER(" rc-osc: %3.03f MHz", _tomhz(pChip->cfg.rc_freq)); - LOG_USER(" mainosc: %3.03f MHz", _tomhz(pChip->cfg.mainosc_freq)); - LOG_USER(" plla: %3.03f MHz", _tomhz(pChip->cfg.plla_freq)); - LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq)); - LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq)); + LOG_USER(" rc-osc: %3.03f MHz", _tomhz(chip->cfg.rc_freq)); + LOG_USER(" mainosc: %3.03f MHz", _tomhz(chip->cfg.mainosc_freq)); + LOG_USER(" plla: %3.03f MHz", _tomhz(chip->cfg.plla_freq)); + LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(chip->cfg.cpu_freq)); + LOG_USER("mclk-freq: %3.03f MHz", _tomhz(chip->cfg.mclk_freq)); LOG_USER(" UniqueId: 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32, - pChip->cfg.unique_id[0], - pChip->cfg.unique_id[1], - pChip->cfg.unique_id[2], - pChip->cfg.unique_id[3]); + chip->cfg.unique_id[0], + chip->cfg.unique_id[1], + chip->cfg.unique_id[2], + chip->cfg.unique_id[3]); return ERROR_OK; } @@ -2996,7 +2996,7 @@ static int sam3_protect_check(struct flash_bank *bank) int r; uint32_t v = 0; unsigned x; - struct sam3_bank_private *pPrivate; + struct sam3_bank_private *private; LOG_DEBUG("Begin"); if (bank->target->state != TARGET_HALTED) { @@ -3004,21 +3004,21 @@ static int sam3_protect_check(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } - pPrivate = get_sam3_bank_private(bank); - if (!pPrivate) { + private = get_sam3_bank_private(bank); + if (!private) { LOG_ERROR("no private for this bank?"); return ERROR_FAIL; } - if (!(pPrivate->probed)) + if (!(private->probed)) return ERROR_FLASH_BANK_NOT_PROBED; - r = FLASHD_GetLockBits(pPrivate, &v); + r = flashd_get_lock_bits(private, &v); if (r != ERROR_OK) { LOG_DEBUG("Failed: %d", r); return r; } - for (x = 0; x < pPrivate->nsectors; x++) + for (x = 0; x < private->nsectors; x++) bank->sectors[x].is_protected = (!!(v & (1 << x))); LOG_DEBUG("Done"); return ERROR_OK; @@ -3026,32 +3026,32 @@ static int sam3_protect_check(struct flash_bank *bank) FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command) { - struct sam3_chip *pChip; + struct sam3_chip *chip; - pChip = all_sam3_chips; + chip = all_sam3_chips; /* is this an existing chip? */ - while (pChip) { - if (pChip->target == bank->target) + while (chip) { + if (chip->target == bank->target) break; - pChip = pChip->next; + chip = chip->next; } - if (!pChip) { + if (!chip) { /* this is a *NEW* chip */ - pChip = calloc(1, sizeof(struct sam3_chip)); - if (!pChip) { + chip = calloc(1, sizeof(struct sam3_chip)); + if (!chip) { LOG_ERROR("NO RAM!"); return ERROR_FAIL; } - pChip->target = bank->target; + chip->target = bank->target; /* insert at head */ - pChip->next = all_sam3_chips; - all_sam3_chips = pChip; - pChip->target = bank->target; + chip->next = all_sam3_chips; + all_sam3_chips = chip; + chip->target = bank->target; /* assumption is this runs at 32khz */ - pChip->cfg.slow_freq = 32768; - pChip->probed = false; + chip->cfg.slow_freq = 32768; + chip->probed = false; } switch (bank->base) { @@ -3073,20 +3073,20 @@ FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command) /* at91sam3u and at91sam3ax series has the same address for bank 0*/ case FLASH_BANK_BASE_S: case FLASH_BANK0_BASE_U: - bank->driver_priv = &(pChip->details.bank[0]); + bank->driver_priv = &(chip->details.bank[0]); bank->bank_number = 0; - pChip->details.bank[0].pChip = pChip; - pChip->details.bank[0].pBank = bank; + chip->details.bank[0].chip = chip; + chip->details.bank[0].bank = bank; break; /* Bank 1 of at91sam3u or at91sam3ax series */ case FLASH_BANK1_BASE_U: case FLASH_BANK1_BASE_256K_AX: case FLASH_BANK1_BASE_512K_AX: - bank->driver_priv = &(pChip->details.bank[1]); + bank->driver_priv = &(chip->details.bank[1]); bank->bank_number = 1; - pChip->details.bank[1].pChip = pChip; - pChip->details.bank[1].pBank = bank; + chip->details.bank[1].chip = chip; + chip->details.bank[1].bank = bank; break; } @@ -3110,57 +3110,57 @@ static void sam3_free_driver_priv(struct flash_bank *bank) all_sam3_chips = NULL; } -static int sam3_GetDetails(struct sam3_bank_private *pPrivate) +static int sam3_get_details(struct sam3_bank_private *private) { - const struct sam3_chip_details *pDetails; - struct sam3_chip *pChip; + const struct sam3_chip_details *details; + struct sam3_chip *chip; struct flash_bank *saved_banks[SAM3_MAX_FLASH_BANKS]; unsigned x; LOG_DEBUG("Begin"); - pDetails = all_sam3_details; - while (pDetails->name) { + details = all_sam3_details; + while (details->name) { /* Compare cidr without version bits */ - if (((pDetails->chipid_cidr ^ pPrivate->pChip->cfg.CHIPID_CIDR) & 0xFFFFFFE0) == 0) + if (((details->chipid_cidr ^ private->chip->cfg.CHIPID_CIDR) & 0xFFFFFFE0) == 0) break; else - pDetails++; + details++; } - if (pDetails->name == NULL) { + if (!details->name) { LOG_ERROR("SAM3 ChipID 0x%08x not found in table (perhaps you can ID this chip?)", - (unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR)); + (unsigned int)(private->chip->cfg.CHIPID_CIDR)); /* Help the victim, print details about the chip */ LOG_INFO("SAM3 CHIPID_CIDR: 0x%08" PRIx32 " decodes as follows", - pPrivate->pChip->cfg.CHIPID_CIDR); - sam3_explain_chipid_cidr(pPrivate->pChip); + private->chip->cfg.CHIPID_CIDR); + sam3_explain_chipid_cidr(private->chip); return ERROR_FAIL; } /* DANGER: THERE ARE DRAGONS HERE */ - /* get our pChip - it is going */ + /* get our chip - it is going */ /* to be over-written shortly */ - pChip = pPrivate->pChip; + chip = private->chip; /* Note that, in reality: */ /* */ - /* pPrivate = &(pChip->details.bank[0]) */ - /* or pPrivate = &(pChip->details.bank[1]) */ + /* private = &(chip->details.bank[0]) */ + /* or private = &(chip->details.bank[1]) */ /* */ /* save the "bank" pointers */ for (x = 0; x < SAM3_MAX_FLASH_BANKS; x++) - saved_banks[x] = pChip->details.bank[x].pBank; + saved_banks[x] = chip->details.bank[x].bank; /* Overwrite the "details" structure. */ - memcpy(&(pPrivate->pChip->details), - pDetails, - sizeof(pPrivate->pChip->details)); + memcpy(&(private->chip->details), + details, + sizeof(private->chip->details)); /* now fix the ghosted pointers */ for (x = 0; x < SAM3_MAX_FLASH_BANKS; x++) { - pChip->details.bank[x].pChip = pChip; - pChip->details.bank[x].pBank = saved_banks[x]; + chip->details.bank[x].chip = chip; + chip->details.bank[x].bank = saved_banks[x]; } /* update the *BANK*SIZE* */ @@ -3172,7 +3172,7 @@ static int sam3_GetDetails(struct sam3_bank_private *pPrivate) static int _sam3_probe(struct flash_bank *bank, int noise) { int r; - struct sam3_bank_private *pPrivate; + struct sam3_bank_private *private; LOG_DEBUG("Begin: Bank: %u, Noise: %d", bank->bank_number, noise); @@ -3181,61 +3181,61 @@ static int _sam3_probe(struct flash_bank *bank, int noise) return ERROR_TARGET_NOT_HALTED; } - pPrivate = get_sam3_bank_private(bank); - if (!pPrivate) { + private = get_sam3_bank_private(bank); + if (!private) { LOG_ERROR("Invalid/unknown bank number"); return ERROR_FAIL; } - r = sam3_ReadAllRegs(pPrivate->pChip); + r = sam3_read_all_regs(private->chip); if (r != ERROR_OK) return r; LOG_DEBUG("Here"); - if (pPrivate->pChip->probed) - r = sam3_GetInfo(pPrivate->pChip); + if (private->chip->probed) + r = sam3_get_info(private->chip); else - r = sam3_GetDetails(pPrivate); + r = sam3_get_details(private); if (r != ERROR_OK) return r; /* update the flash bank size */ for (unsigned int x = 0; x < SAM3_MAX_FLASH_BANKS; x++) { - if (bank->base == pPrivate->pChip->details.bank[x].base_address) { - bank->size = pPrivate->pChip->details.bank[x].size_bytes; + if (bank->base == private->chip->details.bank[x].base_address) { + bank->size = private->chip->details.bank[x].size_bytes; break; } } - if (bank->sectors == NULL) { - bank->sectors = calloc(pPrivate->nsectors, (sizeof((bank->sectors)[0]))); - if (bank->sectors == NULL) { + if (!bank->sectors) { + bank->sectors = calloc(private->nsectors, (sizeof((bank->sectors)[0]))); + if (!bank->sectors) { LOG_ERROR("No memory!"); return ERROR_FAIL; } - bank->num_sectors = pPrivate->nsectors; + bank->num_sectors = private->nsectors; for (unsigned int x = 0; x < bank->num_sectors; x++) { - bank->sectors[x].size = pPrivate->sector_size; - bank->sectors[x].offset = x * (pPrivate->sector_size); + bank->sectors[x].size = private->sector_size; + bank->sectors[x].offset = x * (private->sector_size); /* mark as unknown */ bank->sectors[x].is_erased = -1; bank->sectors[x].is_protected = -1; } } - pPrivate->probed = true; + private->probed = true; r = sam3_protect_check(bank); if (r != ERROR_OK) return r; LOG_DEBUG("Bank = %d, nbanks = %d", - pPrivate->bank_number, pPrivate->pChip->details.n_banks); - if ((pPrivate->bank_number + 1) == pPrivate->pChip->details.n_banks) { + private->bank_number, private->chip->details.n_banks); + if ((private->bank_number + 1) == private->chip->details.n_banks) { /* read unique id, */ /* it appears to be associated with the *last* flash bank. */ - FLASHD_ReadUniqueID(pPrivate); + flashd_read_uid(private); } return r; @@ -3254,7 +3254,7 @@ static int sam3_auto_probe(struct flash_bank *bank) static int sam3_erase(struct flash_bank *bank, unsigned int first, unsigned int last) { - struct sam3_bank_private *pPrivate; + struct sam3_bank_private *private; int r; LOG_DEBUG("Here"); @@ -3269,14 +3269,14 @@ static int sam3_erase(struct flash_bank *bank, unsigned int first, return r; } - pPrivate = get_sam3_bank_private(bank); - if (!(pPrivate->probed)) + private = get_sam3_bank_private(bank); + if (!(private->probed)) return ERROR_FLASH_BANK_NOT_PROBED; - if ((first == 0) && ((last + 1) == pPrivate->nsectors)) { + if ((first == 0) && ((last + 1) == private->nsectors)) { /* whole chip */ LOG_DEBUG("Here"); - return FLASHD_EraseEntireBank(pPrivate); + return flashd_erase_entire_bank(private); } LOG_INFO("sam3 auto-erases while programming (request ignored)"); return ERROR_OK; @@ -3285,7 +3285,7 @@ static int sam3_erase(struct flash_bank *bank, unsigned int first, static int sam3_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last) { - struct sam3_bank_private *pPrivate; + struct sam3_bank_private *private; int r; LOG_DEBUG("Here"); @@ -3294,32 +3294,32 @@ static int sam3_protect(struct flash_bank *bank, int set, unsigned int first, return ERROR_TARGET_NOT_HALTED; } - pPrivate = get_sam3_bank_private(bank); - if (!(pPrivate->probed)) + private = get_sam3_bank_private(bank); + if (!(private->probed)) return ERROR_FLASH_BANK_NOT_PROBED; if (set) - r = FLASHD_Lock(pPrivate, first, last); + r = flashd_lock(private, first, last); else - r = FLASHD_Unlock(pPrivate, first, last); + r = flashd_unlock(private, first, last); LOG_DEBUG("End: r=%d", r); return r; } -static int sam3_page_read(struct sam3_bank_private *pPrivate, unsigned pagenum, uint8_t *buf) +static int sam3_page_read(struct sam3_bank_private *private, unsigned pagenum, uint8_t *buf) { uint32_t adr; int r; - adr = pagenum * pPrivate->page_size; - adr += pPrivate->base_address; + adr = pagenum * private->page_size; + adr += private->base_address; - r = target_read_memory(pPrivate->pChip->target, + r = target_read_memory(private->chip->target, adr, 4, /* THIS*MUST*BE* in 32bit values */ - pPrivate->page_size / 4, + private->page_size / 4, buf); if (r != ERROR_OK) LOG_ERROR("SAM3: Flash program failed to read page phys address: 0x%08x", @@ -3327,18 +3327,18 @@ static int sam3_page_read(struct sam3_bank_private *pPrivate, unsigned pagenum, return r; } -static int sam3_page_write(struct sam3_bank_private *pPrivate, unsigned pagenum, const uint8_t *buf) +static int sam3_page_write(struct sam3_bank_private *private, unsigned pagenum, const uint8_t *buf) { uint32_t adr; uint32_t status; uint32_t fmr; /* EEFC Flash Mode Register */ int r; - adr = pagenum * pPrivate->page_size; - adr += pPrivate->base_address; + adr = pagenum * private->page_size; + adr += private->base_address; /* Get flash mode register value */ - r = target_read_u32(pPrivate->pChip->target, pPrivate->controller_address, &fmr); + r = target_read_u32(private->chip->target, private->controller_address, &fmr); if (r != ERROR_OK) LOG_DEBUG("Error Read failed: read flash mode register"); @@ -3346,18 +3346,18 @@ static int sam3_page_write(struct sam3_bank_private *pPrivate, unsigned pagenum, fmr &= 0xfffff0ff; /* set FWS (flash wait states) field in the FMR (flash mode register) */ - fmr |= (pPrivate->flash_wait_states << 8); + fmr |= (private->flash_wait_states << 8); LOG_DEBUG("Flash Mode: 0x%08x", ((unsigned int)(fmr))); - r = target_write_u32(pPrivate->pBank->target, pPrivate->controller_address, fmr); + r = target_write_u32(private->bank->target, private->controller_address, fmr); if (r != ERROR_OK) LOG_DEBUG("Error Write failed: set flash mode register"); LOG_DEBUG("Wr Page %u @ phys address: 0x%08x", pagenum, (unsigned int)(adr)); - r = target_write_memory(pPrivate->pChip->target, + r = target_write_memory(private->chip->target, adr, 4, /* THIS*MUST*BE* in 32bit values */ - pPrivate->page_size / 4, + private->page_size / 4, buf); if (r != ERROR_OK) { LOG_ERROR("SAM3: Failed to write (buffer) page at phys address 0x%08x", @@ -3365,7 +3365,7 @@ static int sam3_page_write(struct sam3_bank_private *pPrivate, unsigned pagenum, return r; } - r = EFC_PerformCommand(pPrivate, + r = efc_perform_command(private, /* send Erase & Write Page */ AT91C_EFC_FCMD_EWP, pagenum, @@ -3395,7 +3395,7 @@ static int sam3_write(struct flash_bank *bank, unsigned page_end; int r; unsigned page_offset; - struct sam3_bank_private *pPrivate; + struct sam3_bank_private *private; uint8_t *pagebuffer; /* in case we bail further below, set this to null */ @@ -3413,32 +3413,32 @@ static int sam3_write(struct flash_bank *bank, goto done; } - pPrivate = get_sam3_bank_private(bank); - if (!(pPrivate->probed)) { + private = get_sam3_bank_private(bank); + if (!(private->probed)) { r = ERROR_FLASH_BANK_NOT_PROBED; goto done; } - if ((offset + count) > pPrivate->size_bytes) { + if ((offset + count) > private->size_bytes) { LOG_ERROR("Flash write error - past end of bank"); LOG_ERROR(" offset: 0x%08x, count 0x%08x, BankEnd: 0x%08x", (unsigned int)(offset), (unsigned int)(count), - (unsigned int)(pPrivate->size_bytes)); + (unsigned int)(private->size_bytes)); r = ERROR_FAIL; goto done; } - pagebuffer = malloc(pPrivate->page_size); + pagebuffer = malloc(private->page_size); if (!pagebuffer) { - LOG_ERROR("No memory for %d Byte page buffer", (int)(pPrivate->page_size)); + LOG_ERROR("No memory for %d Byte page buffer", (int)(private->page_size)); r = ERROR_FAIL; goto done; } /* what page do we start & end in? */ - page_cur = offset / pPrivate->page_size; - page_end = (offset + count - 1) / pPrivate->page_size; + page_cur = offset / private->page_size; + page_end = (offset + count - 1) / private->page_size; LOG_DEBUG("Offset: 0x%08x, Count: 0x%08x", (unsigned int)(offset), (unsigned int)(count)); LOG_DEBUG("Page start: %d, Page End: %d", (int)(page_cur), (int)(page_end)); @@ -3453,16 +3453,16 @@ static int sam3_write(struct flash_bank *bank, /* Handle special case - all one page. */ if (page_cur == page_end) { LOG_DEBUG("Special case, all in one page"); - r = sam3_page_read(pPrivate, page_cur, pagebuffer); + r = sam3_page_read(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; - page_offset = (offset & (pPrivate->page_size-1)); + page_offset = (offset & (private->page_size-1)); memcpy(pagebuffer + page_offset, buffer, count); - r = sam3_page_write(pPrivate, page_cur, pagebuffer); + r = sam3_page_write(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; r = ERROR_OK; @@ -3470,21 +3470,21 @@ static int sam3_write(struct flash_bank *bank, } /* non-aligned start */ - page_offset = offset & (pPrivate->page_size - 1); + page_offset = offset & (private->page_size - 1); if (page_offset) { LOG_DEBUG("Not-Aligned start"); /* read the partial */ - r = sam3_page_read(pPrivate, page_cur, pagebuffer); + r = sam3_page_read(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; /* over-write with new data */ - n = (pPrivate->page_size - page_offset); + n = (private->page_size - page_offset); memcpy(pagebuffer + page_offset, buffer, n); - r = sam3_page_write(pPrivate, page_cur, pagebuffer); + r = sam3_page_write(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; @@ -3496,7 +3496,7 @@ static int sam3_write(struct flash_bank *bank, /* By checking that offset is correct here, we also fix a clang warning */ - assert(offset % pPrivate->page_size == 0); + assert(offset % private->page_size == 0); /* intermediate large pages */ /* also - the final *terminal* */ @@ -3505,12 +3505,12 @@ static int sam3_write(struct flash_bank *bank, (int)page_cur, (int)page_end, (unsigned int)(count)); while ((page_cur < page_end) && - (count >= pPrivate->page_size)) { - r = sam3_page_write(pPrivate, page_cur, buffer); + (count >= private->page_size)) { + r = sam3_page_write(private, page_cur, buffer); if (r != ERROR_OK) goto done; - count -= pPrivate->page_size; - buffer += pPrivate->page_size; + count -= private->page_size; + buffer += private->page_size; page_cur += 1; } @@ -3518,12 +3518,12 @@ static int sam3_write(struct flash_bank *bank, if (count) { LOG_DEBUG("Terminal partial page, count = 0x%08x", (unsigned int)(count)); /* we have a partial page */ - r = sam3_page_read(pPrivate, page_cur, pagebuffer); + r = sam3_page_read(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; /* data goes at start */ memcpy(pagebuffer, buffer, count); - r = sam3_page_write(pPrivate, page_cur, pagebuffer); + r = sam3_page_write(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; } @@ -3536,16 +3536,16 @@ done: COMMAND_HANDLER(sam3_handle_info_command) { - struct sam3_chip *pChip; - pChip = get_current_sam3(CMD); - if (!pChip) + struct sam3_chip *chip; + chip = get_current_sam3(CMD); + if (!chip) return ERROR_OK; unsigned x; int r; /* bank0 must exist before we can do anything */ - if (pChip->details.bank[0].pBank == NULL) { + if (!chip->details.bank[0].bank) { x = 0; need_define: command_print(CMD, @@ -3556,8 +3556,8 @@ need_define: } /* if bank 0 is not probed, then probe it */ - if (!(pChip->details.bank[0].probed)) { - r = sam3_auto_probe(pChip->details.bank[0].pBank); + if (!(chip->details.bank[0].probed)) { + r = sam3_auto_probe(chip->details.bank[0].bank); if (r != ERROR_OK) return ERROR_FAIL; } @@ -3568,21 +3568,21 @@ need_define: /* auto-probe other banks, 0 done above */ for (x = 1; x < SAM3_MAX_FLASH_BANKS; x++) { /* skip banks not present */ - if (!(pChip->details.bank[x].present)) + if (!(chip->details.bank[x].present)) continue; - if (pChip->details.bank[x].pBank == NULL) + if (!chip->details.bank[x].bank) goto need_define; - if (pChip->details.bank[x].probed) + if (chip->details.bank[x].probed) continue; - r = sam3_auto_probe(pChip->details.bank[x].pBank); + r = sam3_auto_probe(chip->details.bank[x].bank); if (r != ERROR_OK) return r; } - r = sam3_GetInfo(pChip); + r = sam3_get_info(chip); if (r != ERROR_OK) { LOG_DEBUG("Sam3Info, Failed %d", r); return r; @@ -3595,24 +3595,24 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command) { unsigned x, v; int r, who; - struct sam3_chip *pChip; + struct sam3_chip *chip; - pChip = get_current_sam3(CMD); - if (!pChip) + chip = get_current_sam3(CMD); + if (!chip) return ERROR_OK; - if (pChip->target->state != TARGET_HALTED) { + if (chip->target->state != TARGET_HALTED) { LOG_ERROR("sam3 - target not halted"); return ERROR_TARGET_NOT_HALTED; } - if (pChip->details.bank[0].pBank == NULL) { + if (!chip->details.bank[0].bank) { command_print(CMD, "Bank0 must be defined first via: flash bank %s ...", at91sam3_flash.name); return ERROR_FAIL; } - if (!pChip->details.bank[0].probed) { - r = sam3_auto_probe(pChip->details.bank[0].pBank); + if (!chip->details.bank[0].probed) { + r = sam3_auto_probe(chip->details.bank[0].bank); if (r != ERROR_OK) return r; } @@ -3626,7 +3626,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command) who = -1; break; case 2: - if ((0 == strcmp(CMD_ARGV[0], "show")) && (0 == strcmp(CMD_ARGV[1], "all"))) + if ((strcmp(CMD_ARGV[0], "show") == 0) && (strcmp(CMD_ARGV[1], "all") == 0)) who = -1; else { uint32_t v32; @@ -3636,20 +3636,20 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command) break; } - if (0 == strcmp("show", CMD_ARGV[0])) { + if (strcmp("show", CMD_ARGV[0]) == 0) { if (who == -1) { showall: r = ERROR_OK; - for (x = 0; x < pChip->details.n_gpnvms; x++) { - r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), x, &v); + for (x = 0; x < chip->details.n_gpnvms; x++) { + r = flashd_get_gpnvm(&(chip->details.bank[0]), x, &v); if (r != ERROR_OK) break; command_print(CMD, "sam3-gpnvm%u: %u", x, v); } return r; } - if ((who >= 0) && (((unsigned)(who)) < pChip->details.n_gpnvms)) { - r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), who, &v); + if ((who >= 0) && (((unsigned)(who)) < chip->details.n_gpnvms)) { + r = flashd_get_gpnvm(&(chip->details.bank[0]), who, &v); if (r == ERROR_OK) command_print(CMD, "sam3-gpnvm%u: %u", who, v); return r; @@ -3664,11 +3664,11 @@ showall: return ERROR_COMMAND_SYNTAX_ERROR; } - if (0 == strcmp("set", CMD_ARGV[0])) - r = FLASHD_SetGPNVM(&(pChip->details.bank[0]), who); - else if ((0 == strcmp("clr", CMD_ARGV[0])) || - (0 == strcmp("clear", CMD_ARGV[0]))) /* quietly accept both */ - r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who); + if (strcmp("set", CMD_ARGV[0]) == 0) + r = flashd_set_gpnvm(&(chip->details.bank[0]), who); + else if ((strcmp("clr", CMD_ARGV[0]) == 0) || + (strcmp("clear", CMD_ARGV[0]) == 0)) /* quietly accept both */ + r = flashd_clr_gpnvm(&(chip->details.bank[0]), who); else { command_print(CMD, "Unknown command: %s", CMD_ARGV[0]); r = ERROR_COMMAND_SYNTAX_ERROR; @@ -3678,10 +3678,10 @@ showall: COMMAND_HANDLER(sam3_handle_slowclk_command) { - struct sam3_chip *pChip; + struct sam3_chip *chip; - pChip = get_current_sam3(CMD); - if (!pChip) + chip = get_current_sam3(CMD); + if (!chip) return ERROR_OK; switch (CMD_ARGC) { @@ -3698,7 +3698,7 @@ COMMAND_HANDLER(sam3_handle_slowclk_command) command_print(CMD, "Absurd/illegal slow clock freq: %d\n", (int)(v)); return ERROR_COMMAND_SYNTAX_ERROR; } - pChip->cfg.slow_freq = v; + chip->cfg.slow_freq = v; break; } default: @@ -3707,8 +3707,8 @@ COMMAND_HANDLER(sam3_handle_slowclk_command) return ERROR_COMMAND_SYNTAX_ERROR; } command_print(CMD, "Slowclk freq: %d.%03dkhz", - (int)(pChip->cfg.slow_freq / 1000), - (int)(pChip->cfg.slow_freq % 1000)); + (int)(chip->cfg.slow_freq / 1000), + (int)(chip->cfg.slow_freq % 1000)); return ERROR_OK; } diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c index b7ae7f691..4ec2ee89e 100644 --- a/src/flash/nor/at91sam4.c +++ b/src/flash/nor/at91sam4.c @@ -98,10 +98,10 @@ #define AT91C_EFC_FCMD_STUI (0xE) /* (EFC) Start Read Unique ID */ #define AT91C_EFC_FCMD_SPUI (0xF) /* (EFC) Stop Read Unique ID */ -#define offset_EFC_FMR 0 -#define offset_EFC_FCR 4 -#define offset_EFC_FSR 8 -#define offset_EFC_FRR 12 +#define OFFSET_EFC_FMR 0 +#define OFFSET_EFC_FCR 4 +#define OFFSET_EFC_FSR 8 +#define OFFSET_EFC_FRR 12 extern const struct flash_driver at91sam4_flash; @@ -170,13 +170,13 @@ struct sam4_bank_private { /* DANGER: THERE ARE DRAGONS HERE.. */ /* NOTE: If you add more 'ghost' pointers */ /* be aware that you must *manually* update */ - /* these pointers in the function sam4_GetDetails() */ + /* these pointers in the function sam4_get_details() */ /* See the comment "Here there be dragons" */ /* so we can find the chip we belong to */ - struct sam4_chip *pChip; + struct sam4_chip *chip; /* so we can find the original bank pointer */ - struct flash_bank *pBank; + struct flash_bank *bank; unsigned bank_number; uint32_t controller_address; uint32_t base_address; @@ -193,7 +193,7 @@ struct sam4_chip_details { /* note: If you add pointers here */ /* be careful about them as they */ /* may need to be updated inside */ - /* the function: "sam4_GetDetails() */ + /* the function: "sam4_get_details() */ /* which copy/overwrites the */ /* 'runtime' copy of this structure */ uint32_t chipid_cidr; @@ -223,7 +223,7 @@ struct sam4_chip { struct sam4_reg_list { uint32_t address; size_t struct_offset; const char *name; - void (*explain_func)(struct sam4_chip *pInfo); + void (*explain_func)(struct sam4_chip *chip); }; static struct sam4_chip *all_sam4_chips; @@ -261,7 +261,7 @@ static struct sam4_chip *get_current_sam4(struct command_invocation *cmd) /*For the best results, nsectors are thus set to the amount of lock regions, and the sector_size*/ /*set to the lock region size. Page erases are used to erase 8KB sections when programming*/ -/* these are used to *initialize* the "pChip->details" structure. */ +/* these are used to *initialize* the "chip->details" structure. */ static const struct sam4_chip_details all_sam4_details[] = { /* Start at91sam4c* series */ /* at91sam4c32e - LQFP144 */ @@ -276,8 +276,8 @@ static const struct sam4_chip_details all_sam4_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_C32, .controller_address = 0x400e0a00, @@ -291,8 +291,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_C32, .controller_address = 0x400e0c00, @@ -317,8 +317,8 @@ static const struct sam4_chip_details all_sam4_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_C32, .controller_address = 0x400e0a00, @@ -332,8 +332,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_C32, .controller_address = 0x400e0c00, @@ -358,8 +358,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_C, .controller_address = 0x400e0a00, @@ -391,8 +391,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_C, .controller_address = 0x400e0a00, @@ -424,8 +424,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_C, .controller_address = 0x400e0a00, @@ -459,8 +459,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -494,8 +494,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -527,8 +527,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -560,8 +560,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -593,8 +593,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -626,8 +626,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -661,8 +661,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -695,8 +695,8 @@ static const struct sam4_chip_details all_sam4_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -728,8 +728,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -761,8 +761,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -794,8 +794,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -827,8 +827,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -860,8 +860,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -893,8 +893,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -927,8 +927,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -961,8 +961,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -995,8 +995,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1029,8 +1029,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1063,8 +1063,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1097,8 +1097,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = {*/ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1132,8 +1132,8 @@ static const struct sam4_chip_details all_sam4_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, @@ -1148,8 +1148,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_2048K_SD, .controller_address = 0x400e0c00, @@ -1176,8 +1176,8 @@ static const struct sam4_chip_details all_sam4_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, @@ -1192,8 +1192,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_2048K_SD, .controller_address = 0x400e0c00, @@ -1220,8 +1220,8 @@ static const struct sam4_chip_details all_sam4_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, @@ -1236,8 +1236,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_1024K_SD, .controller_address = 0x400e0c00, @@ -1264,8 +1264,8 @@ static const struct sam4_chip_details all_sam4_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK0_BASE_SD, .controller_address = 0x400e0a00, @@ -1280,8 +1280,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[1] = { */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 1, .base_address = FLASH_BANK1_BASE_1024K_SD, .controller_address = 0x400e0c00, @@ -1308,8 +1308,8 @@ static const struct sam4_chip_details all_sam4_details[] = { { { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1343,8 +1343,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1377,8 +1377,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1411,8 +1411,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1445,8 +1445,8 @@ static const struct sam4_chip_details all_sam4_details[] = { /* .bank[0] = */ { .probed = false, - .pChip = NULL, - .pBank = NULL, + .chip = NULL, + .bank = NULL, .bank_number = 0, .base_address = FLASH_BANK_BASE_S, .controller_address = 0x400e0a00, @@ -1485,14 +1485,14 @@ static const struct sam4_chip_details all_sam4_details[] = { /** * Get the current status of the EEFC and * the value of some status bits (LOCKE, PROGE). - * @param pPrivate - info about the bank + * @param private - info about the bank * @param v - result goes here */ -static int EFC_GetStatus(struct sam4_bank_private *pPrivate, uint32_t *v) +static int efc_get_status(struct sam4_bank_private *private, uint32_t *v) { int r; - r = target_read_u32(pPrivate->pChip->target, - pPrivate->controller_address + offset_EFC_FSR, + r = target_read_u32(private->chip->target, + private->controller_address + OFFSET_EFC_FSR, v); LOG_DEBUG("Status: 0x%08x (lockerror: %d, cmderror: %d, ready: %d)", (unsigned int)(*v), @@ -1505,15 +1505,15 @@ static int EFC_GetStatus(struct sam4_bank_private *pPrivate, uint32_t *v) /** * Get the result of the last executed command. - * @param pPrivate - info about the bank + * @param private - info about the bank * @param v - result goes here */ -static int EFC_GetResult(struct sam4_bank_private *pPrivate, uint32_t *v) +static int efc_get_result(struct sam4_bank_private *private, uint32_t *v) { int r; uint32_t rv; - r = target_read_u32(pPrivate->pChip->target, - pPrivate->controller_address + offset_EFC_FRR, + r = target_read_u32(private->chip->target, + private->controller_address + OFFSET_EFC_FRR, &rv); if (v) *v = rv; @@ -1521,7 +1521,7 @@ static int EFC_GetResult(struct sam4_bank_private *pPrivate, uint32_t *v) return r; } -static int EFC_StartCommand(struct sam4_bank_private *pPrivate, +static int efc_start_command(struct sam4_bank_private *private, unsigned command, unsigned argument) { uint32_t n, v; @@ -1542,16 +1542,16 @@ do_retry: case AT91C_EFC_FCMD_EPA: case AT91C_EFC_FCMD_SLB: case AT91C_EFC_FCMD_CLB: - n = (pPrivate->size_bytes / pPrivate->page_size); + n = (private->size_bytes / private->page_size); if (argument >= n) LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n)); break; case AT91C_EFC_FCMD_SFB: case AT91C_EFC_FCMD_CFB: - if (argument >= pPrivate->pChip->details.n_gpnvms) { + if (argument >= private->chip->details.n_gpnvms) { LOG_ERROR("*BUG*: Embedded flash has only %d GPNVMs", - pPrivate->pChip->details.n_gpnvms); + private->chip->details.n_gpnvms); } break; @@ -1576,7 +1576,7 @@ do_retry: /* Situation (2) - normal, finished reading unique id */ } else { /* it should be "ready" */ - EFC_GetStatus(pPrivate, &v); + efc_get_status(private, &v); if (v & 1) { /* then it is ready */ /* we go on */ @@ -1585,14 +1585,14 @@ do_retry: /* we have done this before */ /* the controller is not responding. */ LOG_ERROR("flash controller(%d) is not ready! Error", - pPrivate->bank_number); + private->bank_number); return ERROR_FAIL; } else { retry++; LOG_ERROR("Flash controller(%d) is not ready, attempting reset", - pPrivate->bank_number); + private->bank_number); /* we do that by issuing the *STOP* command */ - EFC_StartCommand(pPrivate, AT91C_EFC_FCMD_SPUI, 0); + efc_start_command(private, AT91C_EFC_FCMD_SPUI, 0); /* above is recursive, and further recursion is blocked by */ /* if (command == AT91C_EFC_FCMD_SPUI) above */ goto do_retry; @@ -1602,8 +1602,8 @@ do_retry: v = (0x5A << 24) | (argument << 8) | command; LOG_DEBUG("Command: 0x%08x", ((unsigned int)(v))); - r = target_write_u32(pPrivate->pBank->target, - pPrivate->controller_address + offset_EFC_FCR, v); + r = target_write_u32(private->bank->target, + private->controller_address + OFFSET_EFC_FCR, v); if (r != ERROR_OK) LOG_DEBUG("Error Write failed"); return r; @@ -1611,12 +1611,12 @@ do_retry: /** * Performs the given command and wait until its completion (or an error). - * @param pPrivate - info about the bank + * @param private - info about the bank * @param command - Command to perform. * @param argument - Optional command argument. * @param status - put command status bits here */ -static int EFC_PerformCommand(struct sam4_bank_private *pPrivate, +static int efc_perform_command(struct sam4_bank_private *private, unsigned command, unsigned argument, uint32_t *status) @@ -1630,14 +1630,14 @@ static int EFC_PerformCommand(struct sam4_bank_private *pPrivate, if (status) *status = 0; - r = EFC_StartCommand(pPrivate, command, argument); + r = efc_start_command(private, command, argument); if (r != ERROR_OK) return r; ms_end = 10000 + timeval_ms(); do { - r = EFC_GetStatus(pPrivate, &v); + r = efc_get_status(private, &v); if (r != ERROR_OK) return r; ms_now = timeval_ms(); @@ -1657,84 +1657,84 @@ static int EFC_PerformCommand(struct sam4_bank_private *pPrivate, /** * Read the unique ID. - * @param pPrivate - info about the bank - * The unique ID is stored in the 'pPrivate' structure. + * @param private - info about the bank + * The unique ID is stored in the 'private' structure. */ -static int FLASHD_ReadUniqueID(struct sam4_bank_private *pPrivate) +static int flashd_read_uid(struct sam4_bank_private *private) { int r; uint32_t v; int x; /* assume 0 */ - pPrivate->pChip->cfg.unique_id[0] = 0; - pPrivate->pChip->cfg.unique_id[1] = 0; - pPrivate->pChip->cfg.unique_id[2] = 0; - pPrivate->pChip->cfg.unique_id[3] = 0; + private->chip->cfg.unique_id[0] = 0; + private->chip->cfg.unique_id[1] = 0; + private->chip->cfg.unique_id[2] = 0; + private->chip->cfg.unique_id[3] = 0; LOG_DEBUG("Begin"); - r = EFC_StartCommand(pPrivate, AT91C_EFC_FCMD_STUI, 0); + r = efc_start_command(private, AT91C_EFC_FCMD_STUI, 0); if (r < 0) return r; for (x = 0; x < 4; x++) { - r = target_read_u32(pPrivate->pChip->target, - pPrivate->pBank->base + (x * 4), + r = target_read_u32(private->chip->target, + private->bank->base + (x * 4), &v); if (r < 0) return r; - pPrivate->pChip->cfg.unique_id[x] = v; + private->chip->cfg.unique_id[x] = v; } - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SPUI, 0, NULL); + r = efc_perform_command(private, AT91C_EFC_FCMD_SPUI, 0, NULL); LOG_DEBUG("End: R=%d, id = 0x%08x, 0x%08x, 0x%08x, 0x%08x", r, - (unsigned int)(pPrivate->pChip->cfg.unique_id[0]), - (unsigned int)(pPrivate->pChip->cfg.unique_id[1]), - (unsigned int)(pPrivate->pChip->cfg.unique_id[2]), - (unsigned int)(pPrivate->pChip->cfg.unique_id[3])); + (unsigned int)(private->chip->cfg.unique_id[0]), + (unsigned int)(private->chip->cfg.unique_id[1]), + (unsigned int)(private->chip->cfg.unique_id[2]), + (unsigned int)(private->chip->cfg.unique_id[3])); return r; } /** * Erases the entire flash. - * @param pPrivate - the info about the bank. + * @param private - the info about the bank. */ -static int FLASHD_EraseEntireBank(struct sam4_bank_private *pPrivate) +static int flashd_erase_entire_bank(struct sam4_bank_private *private) { LOG_DEBUG("Here"); - return EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_EA, 0, NULL); + return efc_perform_command(private, AT91C_EFC_FCMD_EA, 0, NULL); } /** * Erases the entire flash. - * @param pPrivate - the info about the bank. - * @param firstPage - * @param numPages + * @param private - the info about the bank. + * @param first_page + * @param num_pages * @param status */ -static int FLASHD_ErasePages(struct sam4_bank_private *pPrivate, - int firstPage, - int numPages, +static int flashd_erase_pages(struct sam4_bank_private *private, + int first_page, + int num_pages, uint32_t *status) { LOG_DEBUG("Here"); - uint8_t erasePages; - switch (numPages) { + uint8_t erase_pages; + switch (num_pages) { case 4: - erasePages = 0x00; + erase_pages = 0x00; break; case 8: - erasePages = 0x01; + erase_pages = 0x01; break; case 16: - erasePages = 0x02; + erase_pages = 0x02; break; case 32: - erasePages = 0x03; + erase_pages = 0x03; break; default: - erasePages = 0x00; + erase_pages = 0x00; break; } @@ -1745,45 +1745,45 @@ static int FLASHD_ErasePages(struct sam4_bank_private *pPrivate, * number of pages to be erased. Previously (firstpage << 2) was used * to conform to this, seems it should not be shifted... */ - return EFC_PerformCommand(pPrivate, + return efc_perform_command(private, /* send Erase Page */ AT91C_EFC_FCMD_EPA, - (firstPage) | erasePages, + (first_page) | erase_pages, status); } /** * Gets current GPNVM state. - * @param pPrivate - info about the bank. + * @param private - info about the bank. * @param gpnvm - GPNVM bit index. * @param puthere - result stored here. */ /* ------------------------------------------------------------------------------ */ -static int FLASHD_GetGPNVM(struct sam4_bank_private *pPrivate, unsigned gpnvm, unsigned *puthere) +static int flashd_get_gpnvm(struct sam4_bank_private *private, unsigned gpnvm, unsigned *puthere) { uint32_t v; int r; LOG_DEBUG("Here"); - if (pPrivate->bank_number != 0) { + if (private->bank_number != 0) { LOG_ERROR("GPNVM only works with Bank0"); return ERROR_FAIL; } - if (gpnvm >= pPrivate->pChip->details.n_gpnvms) { + if (gpnvm >= private->chip->details.n_gpnvms) { LOG_ERROR("Invalid GPNVM %d, max: %d, ignored", - gpnvm, pPrivate->pChip->details.n_gpnvms); + gpnvm, private->chip->details.n_gpnvms); return ERROR_FAIL; } /* Get GPNVMs status */ - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_GFB, 0, NULL); + r = efc_perform_command(private, AT91C_EFC_FCMD_GFB, 0, NULL); if (r != ERROR_OK) { LOG_ERROR("Failed"); return r; } - r = EFC_GetResult(pPrivate, &v); + r = efc_get_result(private, &v); if (puthere) { /* Check if GPNVM is set */ @@ -1796,59 +1796,59 @@ static int FLASHD_GetGPNVM(struct sam4_bank_private *pPrivate, unsigned gpnvm, u /** * Clears the selected GPNVM bit. - * @param pPrivate info about the bank + * @param private info about the bank * @param gpnvm GPNVM index. * @returns 0 if successful; otherwise returns an error code. */ -static int FLASHD_ClrGPNVM(struct sam4_bank_private *pPrivate, unsigned gpnvm) +static int flashd_clr_gpnvm(struct sam4_bank_private *private, unsigned gpnvm) { int r; unsigned v; LOG_DEBUG("Here"); - if (pPrivate->bank_number != 0) { + if (private->bank_number != 0) { LOG_ERROR("GPNVM only works with Bank0"); return ERROR_FAIL; } - if (gpnvm >= pPrivate->pChip->details.n_gpnvms) { + if (gpnvm >= private->chip->details.n_gpnvms) { LOG_ERROR("Invalid GPNVM %d, max: %d, ignored", - gpnvm, pPrivate->pChip->details.n_gpnvms); + gpnvm, private->chip->details.n_gpnvms); return ERROR_FAIL; } - r = FLASHD_GetGPNVM(pPrivate, gpnvm, &v); + r = flashd_get_gpnvm(private, gpnvm, &v); if (r != ERROR_OK) { LOG_DEBUG("Failed: %d", r); return r; } - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_CFB, gpnvm, NULL); + r = efc_perform_command(private, AT91C_EFC_FCMD_CFB, gpnvm, NULL); LOG_DEBUG("End: %d", r); return r; } /** * Sets the selected GPNVM bit. - * @param pPrivate info about the bank + * @param private info about the bank * @param gpnvm GPNVM index. */ -static int FLASHD_SetGPNVM(struct sam4_bank_private *pPrivate, unsigned gpnvm) +static int flashd_set_gpnvm(struct sam4_bank_private *private, unsigned gpnvm) { int r; unsigned v; - if (pPrivate->bank_number != 0) { + if (private->bank_number != 0) { LOG_ERROR("GPNVM only works with Bank0"); return ERROR_FAIL; } - if (gpnvm >= pPrivate->pChip->details.n_gpnvms) { + if (gpnvm >= private->chip->details.n_gpnvms) { LOG_ERROR("Invalid GPNVM %d, max: %d, ignored", - gpnvm, pPrivate->pChip->details.n_gpnvms); + gpnvm, private->chip->details.n_gpnvms); return ERROR_FAIL; } - r = FLASHD_GetGPNVM(pPrivate, gpnvm, &v); + r = flashd_get_gpnvm(private, gpnvm, &v); if (r != ERROR_OK) return r; if (v) { @@ -1856,26 +1856,26 @@ static int FLASHD_SetGPNVM(struct sam4_bank_private *pPrivate, unsigned gpnvm) r = ERROR_OK; } else { /* set it */ - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SFB, gpnvm, NULL); + r = efc_perform_command(private, AT91C_EFC_FCMD_SFB, gpnvm, NULL); } return r; } /** * Returns a bit field (at most 64) of locked regions within a page. - * @param pPrivate info about the bank + * @param private info about the bank * @param v where to store locked bits */ -static int FLASHD_GetLockBits(struct sam4_bank_private *pPrivate, uint32_t *v) +static int flashd_get_lock_bits(struct sam4_bank_private *private, uint32_t *v) { int r; LOG_DEBUG("Here"); - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_GLB, 0, NULL); + r = efc_perform_command(private, AT91C_EFC_FCMD_GLB, 0, NULL); if (r == ERROR_OK) { - EFC_GetResult(pPrivate, v); - EFC_GetResult(pPrivate, v); - EFC_GetResult(pPrivate, v); - r = EFC_GetResult(pPrivate, v); + efc_get_result(private, v); + efc_get_result(private, v); + efc_get_result(private, v); + r = efc_get_result(private, v); } LOG_DEBUG("End: %d", r); return r; @@ -1883,12 +1883,12 @@ static int FLASHD_GetLockBits(struct sam4_bank_private *pPrivate, uint32_t *v) /** * Unlocks all the regions in the given address range. - * @param pPrivate info about the bank + * @param private info about the bank * @param start_sector first sector to unlock * @param end_sector last (inclusive) to unlock */ -static int FLASHD_Unlock(struct sam4_bank_private *pPrivate, +static int flashd_unlock(struct sam4_bank_private *private, unsigned start_sector, unsigned end_sector) { @@ -1897,13 +1897,13 @@ static int FLASHD_Unlock(struct sam4_bank_private *pPrivate, uint32_t pg; uint32_t pages_per_sector; - pages_per_sector = pPrivate->sector_size / pPrivate->page_size; + pages_per_sector = private->sector_size / private->page_size; /* Unlock all pages */ while (start_sector <= end_sector) { pg = start_sector * pages_per_sector; - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_CLB, pg, &status); + r = efc_perform_command(private, AT91C_EFC_FCMD_CLB, pg, &status); if (r != ERROR_OK) return r; start_sector++; @@ -1914,11 +1914,11 @@ static int FLASHD_Unlock(struct sam4_bank_private *pPrivate, /** * Locks regions - * @param pPrivate - info about the bank + * @param private - info about the bank * @param start_sector - first sector to lock * @param end_sector - last sector (inclusive) to lock */ -static int FLASHD_Lock(struct sam4_bank_private *pPrivate, +static int flashd_lock(struct sam4_bank_private *private, unsigned start_sector, unsigned end_sector) { @@ -1927,13 +1927,13 @@ static int FLASHD_Lock(struct sam4_bank_private *pPrivate, uint32_t pages_per_sector; int r; - pages_per_sector = pPrivate->sector_size / pPrivate->page_size; + pages_per_sector = private->sector_size / private->page_size; /* Lock all pages */ while (start_sector <= end_sector) { pg = start_sector * pages_per_sector; - r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SLB, pg, &status); + r = efc_perform_command(private, AT91C_EFC_FCMD_SLB, pg, &status); if (r != ERROR_OK) return r; start_sector++; @@ -1945,7 +1945,7 @@ static int FLASHD_Lock(struct sam4_bank_private *pPrivate, /* begin helpful debug code */ /* print the fieldname, the field value, in dec & hex, and return field value */ -static uint32_t sam4_reg_fieldname(struct sam4_chip *pChip, +static uint32_t sam4_reg_fieldname(struct sam4_chip *chip, const char *regname, uint32_t value, unsigned shift, @@ -2106,72 +2106,72 @@ static const char *const _rc_freq[] = { "4 MHz", "8 MHz", "12 MHz", "reserved" }; -static void sam4_explain_ckgr_mor(struct sam4_chip *pChip) +static void sam4_explain_ckgr_mor(struct sam4_chip *chip) { uint32_t v; uint32_t rcen; - v = sam4_reg_fieldname(pChip, "MOSCXTEN", pChip->cfg.CKGR_MOR, 0, 1); + v = sam4_reg_fieldname(chip, "MOSCXTEN", chip->cfg.CKGR_MOR, 0, 1); LOG_USER("(main xtal enabled: %s)", _yes_or_no(v)); - v = sam4_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1); + v = sam4_reg_fieldname(chip, "MOSCXTBY", chip->cfg.CKGR_MOR, 1, 1); LOG_USER("(main osc bypass: %s)", _yes_or_no(v)); - rcen = sam4_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 3, 1); + rcen = sam4_reg_fieldname(chip, "MOSCRCEN", chip->cfg.CKGR_MOR, 3, 1); LOG_USER("(onchip RC-OSC enabled: %s)", _yes_or_no(rcen)); - v = sam4_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3); + v = sam4_reg_fieldname(chip, "MOSCRCF", chip->cfg.CKGR_MOR, 4, 3); LOG_USER("(onchip RC-OSC freq: %s)", _rc_freq[v]); - pChip->cfg.rc_freq = 0; + chip->cfg.rc_freq = 0; if (rcen) { switch (v) { default: - pChip->cfg.rc_freq = 0; + chip->cfg.rc_freq = 0; break; case 0: - pChip->cfg.rc_freq = 4 * 1000 * 1000; + chip->cfg.rc_freq = 4 * 1000 * 1000; break; case 1: - pChip->cfg.rc_freq = 8 * 1000 * 1000; + chip->cfg.rc_freq = 8 * 1000 * 1000; break; case 2: - pChip->cfg.rc_freq = 12 * 1000 * 1000; + chip->cfg.rc_freq = 12 * 1000 * 1000; break; } } - v = sam4_reg_fieldname(pChip, "MOSCXTST", pChip->cfg.CKGR_MOR, 8, 8); + v = sam4_reg_fieldname(chip, "MOSCXTST", chip->cfg.CKGR_MOR, 8, 8); LOG_USER("(startup clks, time= %f uSecs)", - ((float)(v * 1000000)) / ((float)(pChip->cfg.slow_freq))); - v = sam4_reg_fieldname(pChip, "MOSCSEL", pChip->cfg.CKGR_MOR, 24, 1); + ((float)(v * 1000000)) / ((float)(chip->cfg.slow_freq))); + v = sam4_reg_fieldname(chip, "MOSCSEL", chip->cfg.CKGR_MOR, 24, 1); LOG_USER("(mainosc source: %s)", v ? "external xtal" : "internal RC"); - v = sam4_reg_fieldname(pChip, "CFDEN", pChip->cfg.CKGR_MOR, 25, 1); + v = sam4_reg_fieldname(chip, "CFDEN", chip->cfg.CKGR_MOR, 25, 1); LOG_USER("(clock failure enabled: %s)", _yes_or_no(v)); } -static void sam4_explain_chipid_cidr(struct sam4_chip *pChip) +static void sam4_explain_chipid_cidr(struct sam4_chip *chip) { int x; uint32_t v; const char *cp; - sam4_reg_fieldname(pChip, "Version", pChip->cfg.CHIPID_CIDR, 0, 5); + sam4_reg_fieldname(chip, "Version", chip->cfg.CHIPID_CIDR, 0, 5); LOG_USER_N("\n"); - v = sam4_reg_fieldname(pChip, "EPROC", pChip->cfg.CHIPID_CIDR, 5, 3); + v = sam4_reg_fieldname(chip, "EPROC", chip->cfg.CHIPID_CIDR, 5, 3); LOG_USER("%s", eproc_names[v]); - v = sam4_reg_fieldname(pChip, "NVPSIZE", pChip->cfg.CHIPID_CIDR, 8, 4); + v = sam4_reg_fieldname(chip, "NVPSIZE", chip->cfg.CHIPID_CIDR, 8, 4); LOG_USER("%s", nvpsize[v]); - v = sam4_reg_fieldname(pChip, "NVPSIZE2", pChip->cfg.CHIPID_CIDR, 12, 4); + v = sam4_reg_fieldname(chip, "NVPSIZE2", chip->cfg.CHIPID_CIDR, 12, 4); LOG_USER("%s", nvpsize2[v]); - v = sam4_reg_fieldname(pChip, "SRAMSIZE", pChip->cfg.CHIPID_CIDR, 16, 4); + v = sam4_reg_fieldname(chip, "SRAMSIZE", chip->cfg.CHIPID_CIDR, 16, 4); LOG_USER("%s", sramsize[v]); - v = sam4_reg_fieldname(pChip, "ARCH", pChip->cfg.CHIPID_CIDR, 20, 8); + v = sam4_reg_fieldname(chip, "ARCH", chip->cfg.CHIPID_CIDR, 20, 8); cp = _unknown; for (x = 0; archnames[x].name; x++) { if (v == archnames[x].value) { @@ -2182,73 +2182,73 @@ static void sam4_explain_chipid_cidr(struct sam4_chip *pChip) LOG_USER("%s", cp); - v = sam4_reg_fieldname(pChip, "NVPTYP", pChip->cfg.CHIPID_CIDR, 28, 3); + v = sam4_reg_fieldname(chip, "NVPTYP", chip->cfg.CHIPID_CIDR, 28, 3); LOG_USER("%s", nvptype[v]); - v = sam4_reg_fieldname(pChip, "EXTID", pChip->cfg.CHIPID_CIDR, 31, 1); + v = sam4_reg_fieldname(chip, "EXTID", chip->cfg.CHIPID_CIDR, 31, 1); LOG_USER("(exists: %s)", _yes_or_no(v)); } -static void sam4_explain_ckgr_mcfr(struct sam4_chip *pChip) +static void sam4_explain_ckgr_mcfr(struct sam4_chip *chip) { uint32_t v; - v = sam4_reg_fieldname(pChip, "MAINFRDY", pChip->cfg.CKGR_MCFR, 16, 1); + v = sam4_reg_fieldname(chip, "MAINFRDY", chip->cfg.CKGR_MCFR, 16, 1); LOG_USER("(main ready: %s)", _yes_or_no(v)); - v = sam4_reg_fieldname(pChip, "MAINF", pChip->cfg.CKGR_MCFR, 0, 16); + v = sam4_reg_fieldname(chip, "MAINF", chip->cfg.CKGR_MCFR, 0, 16); - v = (v * pChip->cfg.slow_freq) / 16; - pChip->cfg.mainosc_freq = v; + v = (v * chip->cfg.slow_freq) / 16; + chip->cfg.mainosc_freq = v; LOG_USER("(%3.03f Mhz (%" PRIu32 ".%03" PRIu32 "khz slowclk)", _tomhz(v), - (uint32_t)(pChip->cfg.slow_freq / 1000), - (uint32_t)(pChip->cfg.slow_freq % 1000)); + (uint32_t)(chip->cfg.slow_freq / 1000), + (uint32_t)(chip->cfg.slow_freq % 1000)); } -static void sam4_explain_ckgr_plla(struct sam4_chip *pChip) +static void sam4_explain_ckgr_plla(struct sam4_chip *chip) { uint32_t mula, diva; - diva = sam4_reg_fieldname(pChip, "DIVA", pChip->cfg.CKGR_PLLAR, 0, 8); + diva = sam4_reg_fieldname(chip, "DIVA", chip->cfg.CKGR_PLLAR, 0, 8); LOG_USER_N("\n"); - mula = sam4_reg_fieldname(pChip, "MULA", pChip->cfg.CKGR_PLLAR, 16, 11); + mula = sam4_reg_fieldname(chip, "MULA", chip->cfg.CKGR_PLLAR, 16, 11); LOG_USER_N("\n"); - pChip->cfg.plla_freq = 0; + chip->cfg.plla_freq = 0; if (mula == 0) LOG_USER("\tPLLA Freq: (Disabled,mula = 0)"); else if (diva == 0) LOG_USER("\tPLLA Freq: (Disabled,diva = 0)"); else if (diva >= 1) { - pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1) / diva); + chip->cfg.plla_freq = (chip->cfg.mainosc_freq * (mula + 1) / diva); LOG_USER("\tPLLA Freq: %3.03f MHz", - _tomhz(pChip->cfg.plla_freq)); + _tomhz(chip->cfg.plla_freq)); } } -static void sam4_explain_mckr(struct sam4_chip *pChip) +static void sam4_explain_mckr(struct sam4_chip *chip) { uint32_t css, pres, fin = 0; int pdiv = 0; const char *cp = NULL; - css = sam4_reg_fieldname(pChip, "CSS", pChip->cfg.PMC_MCKR, 0, 2); + css = sam4_reg_fieldname(chip, "CSS", chip->cfg.PMC_MCKR, 0, 2); switch (css & 3) { case 0: - fin = pChip->cfg.slow_freq; + fin = chip->cfg.slow_freq; cp = "slowclk"; break; case 1: - fin = pChip->cfg.mainosc_freq; + fin = chip->cfg.mainosc_freq; cp = "mainosc"; break; case 2: - fin = pChip->cfg.plla_freq; + fin = chip->cfg.plla_freq; cp = "plla"; break; case 3: - if (pChip->cfg.CKGR_UCKR & (1 << 16)) { + if (chip->cfg.CKGR_UCKR & (1 << 16)) { fin = 480 * 1000 * 1000; cp = "upll"; } else { @@ -2264,7 +2264,7 @@ static void sam4_explain_mckr(struct sam4_chip *pChip) LOG_USER("%s (%3.03f Mhz)", cp, _tomhz(fin)); - pres = sam4_reg_fieldname(pChip, "PRES", pChip->cfg.PMC_MCKR, 4, 3); + pres = sam4_reg_fieldname(chip, "PRES", chip->cfg.PMC_MCKR, 4, 3); switch (pres & 0x07) { case 0: pdiv = 1; @@ -2306,33 +2306,33 @@ static void sam4_explain_mckr(struct sam4_chip *pChip) fin = fin / pdiv; /* sam4 has a *SINGLE* clock - */ /* other at91 series parts have divisors for these. */ - pChip->cfg.cpu_freq = fin; - pChip->cfg.mclk_freq = fin; - pChip->cfg.fclk_freq = fin; + chip->cfg.cpu_freq = fin; + chip->cfg.mclk_freq = fin; + chip->cfg.fclk_freq = fin; LOG_USER("\t\tResult CPU Freq: %3.03f", _tomhz(fin)); } #if 0 -static struct sam4_chip *target2sam4(struct target *pTarget) +static struct sam4_chip *target2sam4(struct target *target) { - struct sam4_chip *pChip; + struct sam4_chip *chip; - if (pTarget == NULL) + if (!target) return NULL; - pChip = all_sam4_chips; - while (pChip) { - if (pChip->target == pTarget) + chip = all_sam4_chips; + while (chip) { + if (chip->target == target) break; /* return below */ else - pChip = pChip->next; + chip = chip->next; } - return pChip; + return chip; } #endif -static uint32_t *sam4_get_reg_ptr(struct sam4_cfg *pCfg, const struct sam4_reg_list *pList) +static uint32_t *sam4_get_reg_ptr(struct sam4_cfg *cfg, const struct sam4_reg_list *list) { /* this function exists to help */ /* keep funky offsetof() errors */ @@ -2341,7 +2341,7 @@ static uint32_t *sam4_get_reg_ptr(struct sam4_cfg *pCfg, const struct sam4_reg_l /* By using prototypes - we can detect what would */ /* be casting errors. */ - return (uint32_t *)(void *)(((char *)(pCfg)) + pList->struct_offset); + return (uint32_t *)(void *)(((char *)(cfg)) + list->struct_offset); } @@ -2379,106 +2379,106 @@ static struct sam4_bank_private *get_sam4_bank_private(struct flash_bank *bank) * Given a pointer to where it goes in the structure, * determine the register name, address from the all registers table. */ -static const struct sam4_reg_list *sam4_GetReg(struct sam4_chip *pChip, uint32_t *goes_here) +static const struct sam4_reg_list *sam4_get_reg(struct sam4_chip *chip, uint32_t *goes_here) { - const struct sam4_reg_list *pReg; + const struct sam4_reg_list *reg; - pReg = &(sam4_all_regs[0]); - while (pReg->name) { - uint32_t *pPossible; + reg = &(sam4_all_regs[0]); + while (reg->name) { + uint32_t *possible; /* calculate where this one go.. */ /* it is "possibly" this register. */ - pPossible = ((uint32_t *)(void *)(((char *)(&(pChip->cfg))) + pReg->struct_offset)); + possible = ((uint32_t *)(void *)(((char *)(&(chip->cfg))) + reg->struct_offset)); /* well? Is it this register */ - if (pPossible == goes_here) { + if (possible == goes_here) { /* Jump for joy! */ - return pReg; + return reg; } /* next... */ - pReg++; + reg++; } /* This is *TOTAL*PANIC* - we are totally screwed. */ LOG_ERROR("INVALID SAM4 REGISTER"); return NULL; } -static int sam4_ReadThisReg(struct sam4_chip *pChip, uint32_t *goes_here) +static int sam4_read_this_reg(struct sam4_chip *chip, uint32_t *goes_here) { - const struct sam4_reg_list *pReg; + const struct sam4_reg_list *reg; int r; - pReg = sam4_GetReg(pChip, goes_here); - if (!pReg) + reg = sam4_get_reg(chip, goes_here); + if (!reg) return ERROR_FAIL; - r = target_read_u32(pChip->target, pReg->address, goes_here); + r = target_read_u32(chip->target, reg->address, goes_here); if (r != ERROR_OK) { LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Err: %d", - pReg->name, (unsigned)(pReg->address), r); + reg->name, (unsigned)(reg->address), r); } return r; } -static int sam4_ReadAllRegs(struct sam4_chip *pChip) +static int sam4_read_all_regs(struct sam4_chip *chip) { int r; - const struct sam4_reg_list *pReg; + const struct sam4_reg_list *reg; - pReg = &(sam4_all_regs[0]); - while (pReg->name) { - r = sam4_ReadThisReg(pChip, - sam4_get_reg_ptr(&(pChip->cfg), pReg)); + reg = &(sam4_all_regs[0]); + while (reg->name) { + r = sam4_read_this_reg(chip, + sam4_get_reg_ptr(&(chip->cfg), reg)); if (r != ERROR_OK) { LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Error: %d", - pReg->name, ((unsigned)(pReg->address)), r); + reg->name, ((unsigned)(reg->address)), r); return r; } - pReg++; + reg++; } return ERROR_OK; } -static int sam4_GetInfo(struct sam4_chip *pChip) +static int sam4_get_info(struct sam4_chip *chip) { - const struct sam4_reg_list *pReg; + const struct sam4_reg_list *reg; uint32_t regval; int r; - r = sam4_ReadAllRegs(pChip); + r = sam4_read_all_regs(chip); if (r != ERROR_OK) return r; - pReg = &(sam4_all_regs[0]); - while (pReg->name) { + reg = &(sam4_all_regs[0]); + while (reg->name) { /* display all regs */ - LOG_DEBUG("Start: %s", pReg->name); - regval = *sam4_get_reg_ptr(&(pChip->cfg), pReg); + LOG_DEBUG("Start: %s", reg->name); + regval = *sam4_get_reg_ptr(&(chip->cfg), reg); LOG_USER("%*s: [0x%08" PRIx32 "] -> 0x%08" PRIx32, REG_NAME_WIDTH, - pReg->name, - pReg->address, + reg->name, + reg->address, regval); - if (pReg->explain_func) - (*(pReg->explain_func))(pChip); - LOG_DEBUG("End: %s", pReg->name); - pReg++; + if (reg->explain_func) + (*(reg->explain_func))(chip); + LOG_DEBUG("End: %s", reg->name); + reg++; } - LOG_USER(" rc-osc: %3.03f MHz", _tomhz(pChip->cfg.rc_freq)); - LOG_USER(" mainosc: %3.03f MHz", _tomhz(pChip->cfg.mainosc_freq)); - LOG_USER(" plla: %3.03f MHz", _tomhz(pChip->cfg.plla_freq)); - LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq)); - LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq)); + LOG_USER(" rc-osc: %3.03f MHz", _tomhz(chip->cfg.rc_freq)); + LOG_USER(" mainosc: %3.03f MHz", _tomhz(chip->cfg.mainosc_freq)); + LOG_USER(" plla: %3.03f MHz", _tomhz(chip->cfg.plla_freq)); + LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(chip->cfg.cpu_freq)); + LOG_USER("mclk-freq: %3.03f MHz", _tomhz(chip->cfg.mclk_freq)); LOG_USER(" UniqueId: 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08"PRIx32, - pChip->cfg.unique_id[0], - pChip->cfg.unique_id[1], - pChip->cfg.unique_id[2], - pChip->cfg.unique_id[3]); + chip->cfg.unique_id[0], + chip->cfg.unique_id[1], + chip->cfg.unique_id[2], + chip->cfg.unique_id[3]); return ERROR_OK; } @@ -2488,7 +2488,7 @@ static int sam4_protect_check(struct flash_bank *bank) int r; uint32_t v[4] = {0}; unsigned x; - struct sam4_bank_private *pPrivate; + struct sam4_bank_private *private; LOG_DEBUG("Begin"); if (bank->target->state != TARGET_HALTED) { @@ -2496,21 +2496,21 @@ static int sam4_protect_check(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } - pPrivate = get_sam4_bank_private(bank); - if (!pPrivate) { + private = get_sam4_bank_private(bank); + if (!private) { LOG_ERROR("no private for this bank?"); return ERROR_FAIL; } - if (!(pPrivate->probed)) + if (!(private->probed)) return ERROR_FLASH_BANK_NOT_PROBED; - r = FLASHD_GetLockBits(pPrivate, v); + r = flashd_get_lock_bits(private, v); if (r != ERROR_OK) { LOG_DEBUG("Failed: %d", r); return r; } - for (x = 0; x < pPrivate->nsectors; x++) + for (x = 0; x < private->nsectors; x++) bank->sectors[x].is_protected = (!!(v[x >> 5] & (1 << (x % 32)))); LOG_DEBUG("Done"); return ERROR_OK; @@ -2518,32 +2518,32 @@ static int sam4_protect_check(struct flash_bank *bank) FLASH_BANK_COMMAND_HANDLER(sam4_flash_bank_command) { - struct sam4_chip *pChip; + struct sam4_chip *chip; - pChip = all_sam4_chips; + chip = all_sam4_chips; /* is this an existing chip? */ - while (pChip) { - if (pChip->target == bank->target) + while (chip) { + if (chip->target == bank->target) break; - pChip = pChip->next; + chip = chip->next; } - if (!pChip) { + if (!chip) { /* this is a *NEW* chip */ - pChip = calloc(1, sizeof(struct sam4_chip)); - if (!pChip) { + chip = calloc(1, sizeof(struct sam4_chip)); + if (!chip) { LOG_ERROR("NO RAM!"); return ERROR_FAIL; } - pChip->target = bank->target; + chip->target = bank->target; /* insert at head */ - pChip->next = all_sam4_chips; - all_sam4_chips = pChip; - pChip->target = bank->target; + chip->next = all_sam4_chips; + all_sam4_chips = chip; + chip->target = bank->target; /* assumption is this runs at 32khz */ - pChip->cfg.slow_freq = 32768; - pChip->probed = false; + chip->cfg.slow_freq = 32768; + chip->probed = false; } switch (bank->base) { @@ -2558,20 +2558,20 @@ FLASH_BANK_COMMAND_HANDLER(sam4_flash_bank_command) /* at91sam4sd series has the same address for bank 0 (FLASH_BANK0_BASE_SD)*/ case FLASH_BANK_BASE_S: case FLASH_BANK_BASE_C: - bank->driver_priv = &(pChip->details.bank[0]); + bank->driver_priv = &(chip->details.bank[0]); bank->bank_number = 0; - pChip->details.bank[0].pChip = pChip; - pChip->details.bank[0].pBank = bank; + chip->details.bank[0].chip = chip; + chip->details.bank[0].bank = bank; break; /* Bank 1 of at91sam4sd/at91sam4c32 series */ case FLASH_BANK1_BASE_1024K_SD: case FLASH_BANK1_BASE_2048K_SD: case FLASH_BANK1_BASE_C32: - bank->driver_priv = &(pChip->details.bank[1]); + bank->driver_priv = &(chip->details.bank[1]); bank->bank_number = 1; - pChip->details.bank[1].pChip = pChip; - pChip->details.bank[1].pBank = bank; + chip->details.bank[1].chip = chip; + chip->details.bank[1].bank = bank; break; } @@ -2595,59 +2595,59 @@ static void sam4_free_driver_priv(struct flash_bank *bank) all_sam4_chips = NULL; } -static int sam4_GetDetails(struct sam4_bank_private *pPrivate) +static int sam4_get_details(struct sam4_bank_private *private) { - const struct sam4_chip_details *pDetails; - struct sam4_chip *pChip; + const struct sam4_chip_details *details; + struct sam4_chip *chip; struct flash_bank *saved_banks[SAM4_MAX_FLASH_BANKS]; unsigned x; LOG_DEBUG("Begin"); - pDetails = all_sam4_details; - while (pDetails->name) { + details = all_sam4_details; + while (details->name) { /* Compare cidr without version bits */ - if (pDetails->chipid_cidr == (pPrivate->pChip->cfg.CHIPID_CIDR & 0xFFFFFFE0)) + if (details->chipid_cidr == (private->chip->cfg.CHIPID_CIDR & 0xFFFFFFE0)) break; else - pDetails++; + details++; } - if (pDetails->name == NULL) { + if (!details->name) { LOG_ERROR("SAM4 ChipID 0x%08x not found in table (perhaps you can ID this chip?)", - (unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR)); + (unsigned int)(private->chip->cfg.CHIPID_CIDR)); /* Help the victim, print details about the chip */ LOG_INFO("SAM4 CHIPID_CIDR: 0x%08" PRIx32 " decodes as follows", - pPrivate->pChip->cfg.CHIPID_CIDR); - sam4_explain_chipid_cidr(pPrivate->pChip); + private->chip->cfg.CHIPID_CIDR); + sam4_explain_chipid_cidr(private->chip); return ERROR_FAIL; } else { - LOG_DEBUG("SAM4 Found chip %s, CIDR 0x%08" PRIx32, pDetails->name, pDetails->chipid_cidr); + LOG_DEBUG("SAM4 Found chip %s, CIDR 0x%08" PRIx32, details->name, details->chipid_cidr); } /* DANGER: THERE ARE DRAGONS HERE */ - /* get our pChip - it is going */ + /* get our chip - it is going */ /* to be over-written shortly */ - pChip = pPrivate->pChip; + chip = private->chip; /* Note that, in reality: */ /* */ - /* pPrivate = &(pChip->details.bank[0]) */ - /* or pPrivate = &(pChip->details.bank[1]) */ + /* private = &(chip->details.bank[0]) */ + /* or private = &(chip->details.bank[1]) */ /* */ /* save the "bank" pointers */ for (x = 0; x < SAM4_MAX_FLASH_BANKS; x++) - saved_banks[x] = pChip->details.bank[x].pBank; + saved_banks[x] = chip->details.bank[x].bank; /* Overwrite the "details" structure. */ - memcpy(&(pPrivate->pChip->details), - pDetails, - sizeof(pPrivate->pChip->details)); + memcpy(&(private->chip->details), + details, + sizeof(private->chip->details)); /* now fix the ghosted pointers */ for (x = 0; x < SAM4_MAX_FLASH_BANKS; x++) { - pChip->details.bank[x].pChip = pChip; - pChip->details.bank[x].pBank = saved_banks[x]; + chip->details.bank[x].chip = chip; + chip->details.bank[x].bank = saved_banks[x]; } /* update the *BANK*SIZE* */ @@ -2658,16 +2658,16 @@ static int sam4_GetDetails(struct sam4_bank_private *pPrivate) static int sam4_info(struct flash_bank *bank, struct command_invocation *cmd) { - struct sam4_bank_private *pPrivate; + struct sam4_bank_private *private; int k = bank->size / 1024; - pPrivate = get_sam4_bank_private(bank); - if (pPrivate == NULL) + private = get_sam4_bank_private(bank); + if (!private) return ERROR_FAIL; command_print_sameline(cmd, "%s bank %d: %d kB at " TARGET_ADDR_FMT, - pPrivate->pChip->details.name, - pPrivate->bank_number, + private->chip->details.name, + private->bank_number, k, bank->base); @@ -2677,7 +2677,7 @@ static int sam4_info(struct flash_bank *bank, struct command_invocation *cmd) static int sam4_probe(struct flash_bank *bank) { int r; - struct sam4_bank_private *pPrivate; + struct sam4_bank_private *private; LOG_DEBUG("Begin: Bank: %u", bank->bank_number); @@ -2686,28 +2686,28 @@ static int sam4_probe(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } - pPrivate = get_sam4_bank_private(bank); - if (!pPrivate) { + private = get_sam4_bank_private(bank); + if (!private) { LOG_ERROR("Invalid/unknown bank number"); return ERROR_FAIL; } - r = sam4_ReadAllRegs(pPrivate->pChip); + r = sam4_read_all_regs(private->chip); if (r != ERROR_OK) return r; LOG_DEBUG("Here"); - if (pPrivate->pChip->probed) - r = sam4_GetInfo(pPrivate->pChip); + if (private->chip->probed) + r = sam4_get_info(private->chip); else - r = sam4_GetDetails(pPrivate); + r = sam4_get_details(private); if (r != ERROR_OK) return r; /* update the flash bank size */ for (unsigned int x = 0; x < SAM4_MAX_FLASH_BANKS; x++) { - if (bank->base == pPrivate->pChip->details.bank[x].base_address) { - bank->size = pPrivate->pChip->details.bank[x].size_bytes; + if (bank->base == private->chip->details.bank[x].base_address) { + bank->size = private->chip->details.bank[x].size_bytes; LOG_DEBUG("SAM4 Set flash bank to " TARGET_ADDR_FMT " - " TARGET_ADDR_FMT ", idx %d", bank->base, bank->base + bank->size, x); @@ -2715,35 +2715,35 @@ static int sam4_probe(struct flash_bank *bank) } } - if (bank->sectors == NULL) { - bank->sectors = calloc(pPrivate->nsectors, (sizeof((bank->sectors)[0]))); - if (bank->sectors == NULL) { + if (!bank->sectors) { + bank->sectors = calloc(private->nsectors, (sizeof((bank->sectors)[0]))); + if (!bank->sectors) { LOG_ERROR("No memory!"); return ERROR_FAIL; } - bank->num_sectors = pPrivate->nsectors; + bank->num_sectors = private->nsectors; for (unsigned int x = 0; x < bank->num_sectors; x++) { - bank->sectors[x].size = pPrivate->sector_size; - bank->sectors[x].offset = x * (pPrivate->sector_size); + bank->sectors[x].size = private->sector_size; + bank->sectors[x].offset = x * (private->sector_size); /* mark as unknown */ bank->sectors[x].is_erased = -1; bank->sectors[x].is_protected = -1; } } - pPrivate->probed = true; + private->probed = true; r = sam4_protect_check(bank); if (r != ERROR_OK) return r; LOG_DEBUG("Bank = %d, nbanks = %d", - pPrivate->bank_number, pPrivate->pChip->details.n_banks); - if ((pPrivate->bank_number + 1) == pPrivate->pChip->details.n_banks) { + private->bank_number, private->chip->details.n_banks); + if ((private->bank_number + 1) == private->chip->details.n_banks) { /* read unique id, */ /* it appears to be associated with the *last* flash bank. */ - FLASHD_ReadUniqueID(pPrivate); + flashd_read_uid(private); } return r; @@ -2751,10 +2751,10 @@ static int sam4_probe(struct flash_bank *bank) static int sam4_auto_probe(struct flash_bank *bank) { - struct sam4_bank_private *pPrivate; + struct sam4_bank_private *private; - pPrivate = get_sam4_bank_private(bank); - if (pPrivate && pPrivate->probed) + private = get_sam4_bank_private(bank); + if (private && private->probed) return ERROR_OK; return sam4_probe(bank); @@ -2763,11 +2763,11 @@ static int sam4_auto_probe(struct flash_bank *bank) static int sam4_erase(struct flash_bank *bank, unsigned int first, unsigned int last) { - struct sam4_bank_private *pPrivate; + struct sam4_bank_private *private; int r; - int pageCount; + int page_count; /*16 pages equals 8KB - Same size as a lock region*/ - pageCount = 16; + page_count = 16; uint32_t status; LOG_DEBUG("Here"); @@ -2782,20 +2782,20 @@ static int sam4_erase(struct flash_bank *bank, unsigned int first, return r; } - pPrivate = get_sam4_bank_private(bank); - if (!(pPrivate->probed)) + private = get_sam4_bank_private(bank); + if (!(private->probed)) return ERROR_FLASH_BANK_NOT_PROBED; - if ((first == 0) && ((last + 1) == pPrivate->nsectors)) { + if ((first == 0) && ((last + 1) == private->nsectors)) { /* whole chip */ LOG_DEBUG("Here"); - return FLASHD_EraseEntireBank(pPrivate); + return flashd_erase_entire_bank(private); } LOG_INFO("sam4 does not auto-erase while programming (Erasing relevant sectors)"); LOG_INFO("sam4 First: 0x%08x Last: 0x%08x", first, last); for (unsigned int i = first; i <= last; i++) { /*16 pages equals 8KB - Same size as a lock region*/ - r = FLASHD_ErasePages(pPrivate, (i * pageCount), pageCount, &status); + r = flashd_erase_pages(private, (i * page_count), page_count, &status); LOG_INFO("Erasing sector: 0x%08x", i); if (r != ERROR_OK) LOG_ERROR("SAM4: Error performing Erase page @ lock region number %u", @@ -2816,7 +2816,7 @@ static int sam4_erase(struct flash_bank *bank, unsigned int first, static int sam4_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last) { - struct sam4_bank_private *pPrivate; + struct sam4_bank_private *private; int r; LOG_DEBUG("Here"); @@ -2825,32 +2825,32 @@ static int sam4_protect(struct flash_bank *bank, int set, unsigned int first, return ERROR_TARGET_NOT_HALTED; } - pPrivate = get_sam4_bank_private(bank); - if (!(pPrivate->probed)) + private = get_sam4_bank_private(bank); + if (!(private->probed)) return ERROR_FLASH_BANK_NOT_PROBED; if (set) - r = FLASHD_Lock(pPrivate, first, last); + r = flashd_lock(private, first, last); else - r = FLASHD_Unlock(pPrivate, first, last); + r = flashd_unlock(private, first, last); LOG_DEBUG("End: r=%d", r); return r; } -static int sam4_page_read(struct sam4_bank_private *pPrivate, unsigned pagenum, uint8_t *buf) +static int sam4_page_read(struct sam4_bank_private *private, unsigned pagenum, uint8_t *buf) { uint32_t adr; int r; - adr = pagenum * pPrivate->page_size; - adr = adr + pPrivate->base_address; + adr = pagenum * private->page_size; + adr = adr + private->base_address; - r = target_read_memory(pPrivate->pChip->target, + r = target_read_memory(private->chip->target, adr, 4, /* THIS*MUST*BE* in 32bit values */ - pPrivate->page_size / 4, + private->page_size / 4, buf); if (r != ERROR_OK) LOG_ERROR("SAM4: Flash program failed to read page phys address: 0x%08x", @@ -2858,13 +2858,13 @@ static int sam4_page_read(struct sam4_bank_private *pPrivate, unsigned pagenum, return r; } -static int sam4_set_wait(struct sam4_bank_private *pPrivate) +static int sam4_set_wait(struct sam4_bank_private *private) { uint32_t fmr; /* EEFC Flash Mode Register */ int r; /* Get flash mode register value */ - r = target_read_u32(pPrivate->pChip->target, pPrivate->controller_address, &fmr); + r = target_read_u32(private->chip->target, private->controller_address, &fmr); if (r != ERROR_OK) { LOG_ERROR("Error Read failed: read flash mode register"); return r; @@ -2874,33 +2874,33 @@ static int sam4_set_wait(struct sam4_bank_private *pPrivate) fmr &= 0xfffff0ff; /* set FWS (flash wait states) field in the FMR (flash mode register) */ - fmr |= (pPrivate->flash_wait_states << 8); + fmr |= (private->flash_wait_states << 8); LOG_DEBUG("Flash Mode: 0x%08x", ((unsigned int)(fmr))); - r = target_write_u32(pPrivate->pBank->target, pPrivate->controller_address, fmr); + r = target_write_u32(private->bank->target, private->controller_address, fmr); if (r != ERROR_OK) LOG_ERROR("Error Write failed: set flash mode register"); return r; } -static int sam4_page_write(struct sam4_bank_private *pPrivate, unsigned pagenum, const uint8_t *buf) +static int sam4_page_write(struct sam4_bank_private *private, unsigned pagenum, const uint8_t *buf) { uint32_t adr; uint32_t status; int r; - adr = pagenum * pPrivate->page_size; - adr = (adr + pPrivate->base_address); + adr = pagenum * private->page_size; + adr = (adr + private->base_address); /* 1st sector 8kBytes - page 0 - 15*/ /* 2nd sector 8kBytes - page 16 - 30*/ /* 3rd sector 48kBytes - page 31 - 127*/ LOG_DEBUG("Wr Page %u @ phys address: 0x%08x", pagenum, (unsigned int)(adr)); - r = target_write_memory(pPrivate->pChip->target, + r = target_write_memory(private->chip->target, adr, 4, /* THIS*MUST*BE* in 32bit values */ - pPrivate->page_size / 4, + private->page_size / 4, buf); if (r != ERROR_OK) { LOG_ERROR("SAM4: Failed to write (buffer) page at phys address 0x%08x", @@ -2908,7 +2908,7 @@ static int sam4_page_write(struct sam4_bank_private *pPrivate, unsigned pagenum, return r; } - r = EFC_PerformCommand(pPrivate, + r = efc_perform_command(private, /* send Erase & Write Page */ AT91C_EFC_FCMD_WP, /*AT91C_EFC_FCMD_EWP only works on first two 8kb sectors*/ pagenum, @@ -2938,7 +2938,7 @@ static int sam4_write(struct flash_bank *bank, unsigned page_end; int r; unsigned page_offset; - struct sam4_bank_private *pPrivate; + struct sam4_bank_private *private; uint8_t *pagebuffer; /* in case we bail further below, set this to null */ @@ -2956,36 +2956,36 @@ static int sam4_write(struct flash_bank *bank, goto done; } - pPrivate = get_sam4_bank_private(bank); - if (!(pPrivate->probed)) { + private = get_sam4_bank_private(bank); + if (!(private->probed)) { r = ERROR_FLASH_BANK_NOT_PROBED; goto done; } - if ((offset + count) > pPrivate->size_bytes) { + if ((offset + count) > private->size_bytes) { LOG_ERROR("Flash write error - past end of bank"); LOG_ERROR(" offset: 0x%08x, count 0x%08x, BankEnd: 0x%08x", (unsigned int)(offset), (unsigned int)(count), - (unsigned int)(pPrivate->size_bytes)); + (unsigned int)(private->size_bytes)); r = ERROR_FAIL; goto done; } - pagebuffer = malloc(pPrivate->page_size); + pagebuffer = malloc(private->page_size); if (!pagebuffer) { - LOG_ERROR("No memory for %d Byte page buffer", (int)(pPrivate->page_size)); + LOG_ERROR("No memory for %d Byte page buffer", (int)(private->page_size)); r = ERROR_FAIL; goto done; } - r = sam4_set_wait(pPrivate); + r = sam4_set_wait(private); if (r != ERROR_OK) goto done; /* what page do we start & end in? */ - page_cur = offset / pPrivate->page_size; - page_end = (offset + count - 1) / pPrivate->page_size; + page_cur = offset / private->page_size; + page_end = (offset + count - 1) / private->page_size; LOG_DEBUG("Offset: 0x%08x, Count: 0x%08x", (unsigned int)(offset), (unsigned int)(count)); LOG_DEBUG("Page start: %d, Page End: %d", (int)(page_cur), (int)(page_end)); @@ -3000,16 +3000,16 @@ static int sam4_write(struct flash_bank *bank, /* Handle special case - all one page. */ if (page_cur == page_end) { LOG_DEBUG("Special case, all in one page"); - r = sam4_page_read(pPrivate, page_cur, pagebuffer); + r = sam4_page_read(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; - page_offset = (offset & (pPrivate->page_size-1)); + page_offset = (offset & (private->page_size-1)); memcpy(pagebuffer + page_offset, buffer, count); - r = sam4_page_write(pPrivate, page_cur, pagebuffer); + r = sam4_page_write(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; r = ERROR_OK; @@ -3017,21 +3017,21 @@ static int sam4_write(struct flash_bank *bank, } /* non-aligned start */ - page_offset = offset & (pPrivate->page_size - 1); + page_offset = offset & (private->page_size - 1); if (page_offset) { LOG_DEBUG("Not-Aligned start"); /* read the partial */ - r = sam4_page_read(pPrivate, page_cur, pagebuffer); + r = sam4_page_read(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; /* over-write with new data */ - n = (pPrivate->page_size - page_offset); + n = (private->page_size - page_offset); memcpy(pagebuffer + page_offset, buffer, n); - r = sam4_page_write(pPrivate, page_cur, pagebuffer); + r = sam4_page_write(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; @@ -3043,7 +3043,7 @@ static int sam4_write(struct flash_bank *bank, /* By checking that offset is correct here, we also fix a clang warning */ - assert(offset % pPrivate->page_size == 0); + assert(offset % private->page_size == 0); /* intermediate large pages */ /* also - the final *terminal* */ @@ -3052,12 +3052,12 @@ static int sam4_write(struct flash_bank *bank, (int)page_cur, (int)page_end, (unsigned int)(count)); while ((page_cur < page_end) && - (count >= pPrivate->page_size)) { - r = sam4_page_write(pPrivate, page_cur, buffer); + (count >= private->page_size)) { + r = sam4_page_write(private, page_cur, buffer); if (r != ERROR_OK) goto done; - count -= pPrivate->page_size; - buffer += pPrivate->page_size; + count -= private->page_size; + buffer += private->page_size; page_cur += 1; } @@ -3065,12 +3065,12 @@ static int sam4_write(struct flash_bank *bank, if (count) { LOG_DEBUG("Terminal partial page, count = 0x%08x", (unsigned int)(count)); /* we have a partial page */ - r = sam4_page_read(pPrivate, page_cur, pagebuffer); + r = sam4_page_read(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; /* data goes at start */ memcpy(pagebuffer, buffer, count); - r = sam4_page_write(pPrivate, page_cur, pagebuffer); + r = sam4_page_write(private, page_cur, pagebuffer); if (r != ERROR_OK) goto done; } @@ -3083,16 +3083,16 @@ done: COMMAND_HANDLER(sam4_handle_info_command) { - struct sam4_chip *pChip; - pChip = get_current_sam4(CMD); - if (!pChip) + struct sam4_chip *chip; + chip = get_current_sam4(CMD); + if (!chip) return ERROR_OK; unsigned x; int r; /* bank0 must exist before we can do anything */ - if (pChip->details.bank[0].pBank == NULL) { + if (!chip->details.bank[0].bank) { x = 0; need_define: command_print(CMD, @@ -3103,8 +3103,8 @@ need_define: } /* if bank 0 is not probed, then probe it */ - if (!(pChip->details.bank[0].probed)) { - r = sam4_auto_probe(pChip->details.bank[0].pBank); + if (!(chip->details.bank[0].probed)) { + r = sam4_auto_probe(chip->details.bank[0].bank); if (r != ERROR_OK) return ERROR_FAIL; } @@ -3115,21 +3115,21 @@ need_define: /* auto-probe other banks, 0 done above */ for (x = 1; x < SAM4_MAX_FLASH_BANKS; x++) { /* skip banks not present */ - if (!(pChip->details.bank[x].present)) + if (!(chip->details.bank[x].present)) continue; - if (pChip->details.bank[x].pBank == NULL) + if (!chip->details.bank[x].bank) goto need_define; - if (pChip->details.bank[x].probed) + if (chip->details.bank[x].probed) continue; - r = sam4_auto_probe(pChip->details.bank[x].pBank); + r = sam4_auto_probe(chip->details.bank[x].bank); if (r != ERROR_OK) return r; } - r = sam4_GetInfo(pChip); + r = sam4_get_info(chip); if (r != ERROR_OK) { LOG_DEBUG("Sam4Info, Failed %d", r); return r; @@ -3142,24 +3142,24 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command) { unsigned x, v; int r, who; - struct sam4_chip *pChip; + struct sam4_chip *chip; - pChip = get_current_sam4(CMD); - if (!pChip) + chip = get_current_sam4(CMD); + if (!chip) return ERROR_OK; - if (pChip->target->state != TARGET_HALTED) { + if (chip->target->state != TARGET_HALTED) { LOG_ERROR("sam4 - target not halted"); return ERROR_TARGET_NOT_HALTED; } - if (pChip->details.bank[0].pBank == NULL) { + if (!chip->details.bank[0].bank) { command_print(CMD, "Bank0 must be defined first via: flash bank %s ...", at91sam4_flash.name); return ERROR_FAIL; } - if (!pChip->details.bank[0].probed) { - r = sam4_auto_probe(pChip->details.bank[0].pBank); + if (!chip->details.bank[0].probed) { + r = sam4_auto_probe(chip->details.bank[0].bank); if (r != ERROR_OK) return r; } @@ -3173,7 +3173,7 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command) who = -1; break; case 2: - if ((0 == strcmp(CMD_ARGV[0], "show")) && (0 == strcmp(CMD_ARGV[1], "all"))) + if ((strcmp(CMD_ARGV[0], "show") == 0) && (strcmp(CMD_ARGV[1], "all") == 0)) who = -1; else { uint32_t v32; @@ -3183,20 +3183,20 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command) break; } - if (0 == strcmp("show", CMD_ARGV[0])) { + if (strcmp("show", CMD_ARGV[0]) == 0) { if (who == -1) { showall: r = ERROR_OK; - for (x = 0; x < pChip->details.n_gpnvms; x++) { - r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), x, &v); + for (x = 0; x < chip->details.n_gpnvms; x++) { + r = flashd_get_gpnvm(&(chip->details.bank[0]), x, &v); if (r != ERROR_OK) break; command_print(CMD, "sam4-gpnvm%u: %u", x, v); } return r; } - if ((who >= 0) && (((unsigned)(who)) < pChip->details.n_gpnvms)) { - r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), who, &v); + if ((who >= 0) && (((unsigned)(who)) < chip->details.n_gpnvms)) { + r = flashd_get_gpnvm(&(chip->details.bank[0]), who, &v); if (r == ERROR_OK) command_print(CMD, "sam4-gpnvm%u: %u", who, v); return r; @@ -3211,11 +3211,11 @@ showall: return ERROR_COMMAND_SYNTAX_ERROR; } - if (0 == strcmp("set", CMD_ARGV[0])) - r = FLASHD_SetGPNVM(&(pChip->details.bank[0]), who); - else if ((0 == strcmp("clr", CMD_ARGV[0])) || - (0 == strcmp("clear", CMD_ARGV[0]))) /* quietly accept both */ - r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who); + if (strcmp("set", CMD_ARGV[0]) == 0) + r = flashd_set_gpnvm(&(chip->details.bank[0]), who); + else if ((strcmp("clr", CMD_ARGV[0]) == 0) || + (strcmp("clear", CMD_ARGV[0]) == 0)) /* quietly accept both */ + r = flashd_clr_gpnvm(&(chip->details.bank[0]), who); else { command_print(CMD, "Unknown command: %s", CMD_ARGV[0]); r = ERROR_COMMAND_SYNTAX_ERROR; @@ -3225,10 +3225,10 @@ showall: COMMAND_HANDLER(sam4_handle_slowclk_command) { - struct sam4_chip *pChip; + struct sam4_chip *chip; - pChip = get_current_sam4(CMD); - if (!pChip) + chip = get_current_sam4(CMD); + if (!chip) return ERROR_OK; switch (CMD_ARGC) { @@ -3245,7 +3245,7 @@ COMMAND_HANDLER(sam4_handle_slowclk_command) command_print(CMD, "Absurd/illegal slow clock freq: %d\n", (int)(v)); return ERROR_COMMAND_SYNTAX_ERROR; } - pChip->cfg.slow_freq = v; + chip->cfg.slow_freq = v; break; } default: @@ -3254,8 +3254,8 @@ COMMAND_HANDLER(sam4_handle_slowclk_command) return ERROR_COMMAND_SYNTAX_ERROR; } command_print(CMD, "Slowclk freq: %d.%03dkhz", - (int)(pChip->cfg.slow_freq / 1000), - (int)(pChip->cfg.slow_freq % 1000)); + (int)(chip->cfg.slow_freq / 1000), + (int)(chip->cfg.slow_freq % 1000)); return ERROR_OK; } diff --git a/src/flash/nor/at91sam4l.c b/src/flash/nor/at91sam4l.c index d09414cbe..f8c6f6490 100644 --- a/src/flash/nor/at91sam4l.c +++ b/src/flash/nor/at91sam4l.c @@ -480,9 +480,6 @@ static int sam4l_erase(struct flash_bank *bank, unsigned int first, return ERROR_FAIL; } } - - /* This sector is definitely erased. */ - bank->sectors[i].is_erased = 1; } } diff --git a/src/flash/nor/at91sam7.c b/src/flash/nor/at91sam7.c index 88f489f60..f98d186fb 100644 --- a/src/flash/nor/at91sam7.c +++ b/src/flash/nor/at91sam7.c @@ -104,11 +104,11 @@ static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode); static uint32_t at91sam7_wait_status_busy(struct flash_bank *bank, uint32_t waitbits, int timeout); static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t pagen); -static const uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 }; -static const uint32_t MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 }; -static const uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 }; +static const uint32_t mc_fmr[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 }; +static const uint32_t mc_fcr[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 }; +static const uint32_t mc_fsr[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 }; -static const char *EPROC[8] = { +static const char *eproc[8] = { "Unknown", "ARM946-E", "ARM7TDMI", "Unknown", "ARM920T", "ARM926EJ-S", "Unknown", "Unknown" }; @@ -179,7 +179,7 @@ static long SRAMSIZ[16] = { static uint32_t at91sam7_get_flash_status(struct target *target, int bank_number) { uint32_t fsr; - target_read_u32(target, MC_FSR[bank_number], &fsr); + target_read_u32(target, mc_fsr[bank_number], &fsr); return fsr; } @@ -290,7 +290,7 @@ static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode) LOG_DEBUG("fmcn[%i]: %i", bank->bank_number, (int)(fmcn)); fmr = fmcn << 16 | fws << 8; - target_write_u32(target, MC_FMR[bank->bank_number], fmr); + target_write_u32(target, mc_fmr[bank->bank_number], fmr); } at91sam7_info->flashmode = mode; @@ -329,7 +329,7 @@ static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t struct target *target = bank->target; fcr = (0x5A << 24) | ((pagen&0x3FF) << 8) | cmd; - target_write_u32(target, MC_FCR[bank->bank_number], fcr); + target_write_u32(target, mc_fcr[bank->bank_number], fcr); LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number + 1, @@ -993,7 +993,7 @@ static int get_at91sam7_info(struct flash_bank *bank, struct command_invocation "Flashsize: 0x%8.8" PRIx32 "\n", at91sam7_info->cidr, at91sam7_info->cidr_arch, - EPROC[at91sam7_info->cidr_eproc], + eproc[at91sam7_info->cidr_eproc], at91sam7_info->cidr_version, bank->size); @@ -1040,7 +1040,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command) return ERROR_COMMAND_SYNTAX_ERROR; bank = get_flash_bank_by_num_noprobe(0); - if (bank == NULL) + if (!bank) return ERROR_FLASH_BANK_INVALID; if (strcmp(bank->driver->name, "at91sam7")) { command_print(CMD, "not an at91sam7 flash bank '%s'", CMD_ARGV[0]); diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c index 5fbf8bcaa..d4ac4c998 100644 --- a/src/flash/nor/at91samd.c +++ b/src/flash/nor/at91samd.c @@ -385,7 +385,7 @@ static const struct samd_part *samd_find_part(uint32_t id) { uint8_t devsel = SAMD_GET_DEVSEL(id); const struct samd_family *family = samd_find_family(id); - if (family == NULL) + if (!family) return NULL; for (unsigned i = 0; i < family->num_parts; i++) { @@ -452,7 +452,7 @@ static int samd_probe(struct flash_bank *bank) } part = samd_find_part(id); - if (part == NULL) { + if (!part) { LOG_ERROR("Couldn't find part corresponding to DID %08" PRIx32, id); return ERROR_FAIL; } @@ -606,7 +606,7 @@ static int samd_get_reservedmask(struct target *target, uint64_t *mask) } const struct samd_family *family; family = samd_find_family(id); - if (family == NULL) { + if (!family) { LOG_ERROR("Couldn't determine device family"); return ERROR_FAIL; } @@ -1051,31 +1051,6 @@ COMMAND_HANDLER(samd_handle_eeprom_command) return res; } -static COMMAND_HELPER(get_u64_from_hexarg, unsigned int num, uint64_t *value) -{ - if (num >= CMD_ARGC) { - command_print(CMD, "Too few Arguments."); - return ERROR_COMMAND_SYNTAX_ERROR; - } - - if (strlen(CMD_ARGV[num]) >= 3 && - CMD_ARGV[num][0] == '0' && - CMD_ARGV[num][1] == 'x') { - char *check = NULL; - *value = strtoull(&(CMD_ARGV[num][2]), &check, 16); - if ((value == 0 && errno == ERANGE) || - check == NULL || *check != 0) { - command_print(CMD, "Invalid 64-bit hex value in argument %d.", - num + 1); - return ERROR_COMMAND_SYNTAX_ERROR; - } - } else { - command_print(CMD, "Argument %d needs to be a hex value.", num + 1); - return ERROR_COMMAND_SYNTAX_ERROR; - } - return ERROR_OK; -} - COMMAND_HANDLER(samd_handle_nvmuserrow_command) { int res = ERROR_OK; @@ -1102,14 +1077,12 @@ COMMAND_HANDLER(samd_handle_nvmuserrow_command) mask &= NVMUSERROW_LOCKBIT_MASK; uint64_t value; - res = CALL_COMMAND_HANDLER(get_u64_from_hexarg, 0, &value); - if (res != ERROR_OK) - return res; + COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], value); + if (CMD_ARGC == 2) { uint64_t mask_temp; - res = CALL_COMMAND_HANDLER(get_u64_from_hexarg, 1, &mask_temp); - if (res != ERROR_OK) - return res; + COMMAND_PARSE_NUMBER(u64, CMD_ARGV[1], mask_temp); + mask &= mask_temp; } res = samd_modify_user_row_masked(target, value, mask); diff --git a/src/flash/nor/atsame5.c b/src/flash/nor/atsame5.c index 50e56a72a..203c470ca 100644 --- a/src/flash/nor/atsame5.c +++ b/src/flash/nor/atsame5.c @@ -220,7 +220,7 @@ static const struct samd_part *samd_find_part(uint32_t id) { uint8_t devsel = SAMD_GET_DEVSEL(id); const struct samd_family *family = samd_find_family(id); - if (family == NULL) + if (!family) return NULL; for (unsigned i = 0; i < family->num_parts; i++) { @@ -287,7 +287,7 @@ static int same5_probe(struct flash_bank *bank) } part = samd_find_part(id); - if (part == NULL) { + if (!part) { LOG_ERROR("Couldn't find part corresponding to DID %08" PRIx32, id); return ERROR_FAIL; } @@ -797,11 +797,12 @@ COMMAND_HANDLER(same5_handle_userpage_command) } if (CMD_ARGC >= 1) { - uint64_t mask = NVMUSERROW_SAM_E5_D5_MASK; - uint64_t value = strtoull(CMD_ARGV[0], NULL, 0); + uint64_t value, mask = NVMUSERROW_SAM_E5_D5_MASK; + COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], value); if (CMD_ARGC == 2) { - uint64_t mask_temp = strtoull(CMD_ARGV[1], NULL, 0); + uint64_t mask_temp; + COMMAND_PARSE_NUMBER(u64, CMD_ARGV[1], mask_temp); mask &= mask_temp; } @@ -837,7 +838,9 @@ COMMAND_HANDLER(same5_handle_bootloader_command) return ERROR_FAIL; if (CMD_ARGC >= 1) { - unsigned long size = strtoul(CMD_ARGV[0], NULL, 0); + unsigned long size; + + COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[0], size); uint32_t code = (size + 8191) / 8192; if (code > 15) { command_print(CMD, "Invalid bootloader size. Please " diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c index f70e5d010..efc242395 100644 --- a/src/flash/nor/atsamv.c +++ b/src/flash/nor/atsamv.c @@ -612,7 +612,7 @@ static int samv_get_info(struct flash_bank *bank, struct command_invocation *cmd struct samv_flash_bank *samv_info = bank->driver_priv; if (!samv_info->probed) { int r = samv_probe(bank); - if (ERROR_OK != r) + if (r != ERROR_OK) return r; } command_print_sameline(cmd, "Cortex-M7 detected with %" PRIu32 " kB flash\n", @@ -661,7 +661,7 @@ COMMAND_HANDLER(samv_handle_gpnvm_command) return ERROR_COMMAND_SYNTAX_ERROR; } - unsigned v; + unsigned v = 0; if (!strcmp("show", CMD_ARGV[0])) { if (who == -1) { showall: diff --git a/src/flash/nor/avrf.c b/src/flash/nor/avrf.c index 46621e99f..634f7396a 100644 --- a/src/flash/nor/avrf.c +++ b/src/flash/nor/avrf.c @@ -38,14 +38,14 @@ #define AVR_JTAG_INS_PROG_PAGEREAD 0x07 /* Data Registers: */ -#define AVR_JTAG_REG_Bypass_Len 1 -#define AVR_JTAG_REG_DeviceID_Len 32 +#define AVR_JTAG_REG_BYPASS_LEN 1 +#define AVR_JTAG_REG_DEVICEID_LEN 32 -#define AVR_JTAG_REG_Reset_Len 1 -#define AVR_JTAG_REG_JTAGID_Len 32 -#define AVR_JTAG_REG_ProgrammingEnable_Len 16 -#define AVR_JTAG_REG_ProgrammingCommand_Len 15 -#define AVR_JTAG_REG_FlashDataByte_Len 16 +#define AVR_JTAG_REG_RESET_LEN 1 +#define AVR_JTAG_REG_JTAGID_LEN 32 +#define AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN 16 +#define AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN 15 +#define AVR_JTAG_REG_FLASH_DATA_BYTE_LEN 16 struct avrf_type { char name[15]; @@ -81,7 +81,7 @@ static const struct avrf_type avft_chips_info[] = { static int avr_jtag_reset(struct avr_common *avr, uint32_t reset) { avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET); - avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len); + avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_RESET_LEN); return ERROR_OK; } @@ -89,7 +89,7 @@ static int avr_jtag_reset(struct avr_common *avr, uint32_t reset) static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id) { avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE); - avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len); + avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_LEN); return ERROR_OK; } @@ -99,7 +99,7 @@ static int avr_jtagprg_enterprogmode(struct avr_common *avr) avr_jtag_reset(avr, 1); avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN); return ERROR_OK; } @@ -107,11 +107,11 @@ static int avr_jtagprg_enterprogmode(struct avr_common *avr) static int avr_jtagprg_leaveprogmode(struct avr_common *avr) { avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN); avr_jtag_reset(avr, 0); @@ -123,18 +123,18 @@ static int avr_jtagprg_chiperase(struct avr_common *avr) uint32_t poll_value; avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); do { poll_value = 0; avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, - AVR_JTAG_REG_ProgrammingCommand_Len); - if (ERROR_OK != mcu_execute_queue()) + AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); + if (mcu_execute_queue() != ERROR_OK) return ERROR_FAIL; LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value); } while (!(poll_value & 0x0200)); @@ -152,26 +152,26 @@ static int avr_jtagprg_writeflashpage(struct avr_common *avr, uint32_t poll_value; avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); /* load extended high byte */ if (ext_addressing) avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0b00 | ((addr >> 17) & 0xFF), - AVR_JTAG_REG_ProgrammingCommand_Len); + AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); /* load addr high byte */ avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), - AVR_JTAG_REG_ProgrammingCommand_Len); + AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); /* load addr low byte */ avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), - AVR_JTAG_REG_ProgrammingCommand_Len); + AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD); @@ -184,18 +184,18 @@ static int avr_jtagprg_writeflashpage(struct avr_common *avr, avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len); - avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); + avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); do { poll_value = 0; avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, - AVR_JTAG_REG_ProgrammingCommand_Len); - if (ERROR_OK != mcu_execute_queue()) + AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN); + if (mcu_execute_queue() != ERROR_OK) return ERROR_FAIL; LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value); } while (!(poll_value & 0x0200)); @@ -266,7 +266,7 @@ static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t o LOG_DEBUG("offset is 0x%08" PRIx32 "", offset); LOG_DEBUG("count is %" PRIu32 "", count); - if (ERROR_OK != avr_jtagprg_enterprogmode(avr)) + if (avr_jtagprg_enterprogmode(avr) != ERROR_OK) return ERROR_FAIL; if (bank->size > 0x20000) @@ -315,7 +315,7 @@ static int avrf_probe(struct flash_bank *bank) avrf_info->probed = false; avr_jtag_read_jtagid(avr, &device_id); - if (ERROR_OK != mcu_execute_queue()) + if (mcu_execute_queue() != ERROR_OK) return ERROR_FAIL; LOG_INFO("device id = 0x%08" PRIx32 "", device_id); @@ -332,7 +332,7 @@ static int avrf_probe(struct flash_bank *bank) } } - if (avr_info != NULL) { + if (avr_info) { free(bank->sectors); /* chip found */ @@ -380,7 +380,7 @@ static int avrf_info(struct flash_bank *bank, struct command_invocation *cmd) } avr_jtag_read_jtagid(avr, &device_id); - if (ERROR_OK != mcu_execute_queue()) + if (mcu_execute_queue() != ERROR_OK) return ERROR_FAIL; LOG_INFO("device id = 0x%08" PRIx32 "", device_id); @@ -398,7 +398,7 @@ static int avrf_info(struct flash_bank *bank, struct command_invocation *cmd) } } - if (avr_info != NULL) { + if (avr_info) { /* chip found */ command_print_sameline(cmd, "%s - Rev: 0x%" PRIx32 "", avr_info->name, EXTRACT_VER(device_id)); @@ -420,9 +420,9 @@ static int avrf_mass_erase(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } - if ((ERROR_OK != avr_jtagprg_enterprogmode(avr)) - || (ERROR_OK != avr_jtagprg_chiperase(avr)) - || (ERROR_OK != avr_jtagprg_leaveprogmode(avr))) + if ((avr_jtagprg_enterprogmode(avr) != ERROR_OK) + || (avr_jtagprg_chiperase(avr) != ERROR_OK) + || (avr_jtagprg_leaveprogmode(avr) != ERROR_OK)) return ERROR_FAIL; return ERROR_OK; @@ -435,16 +435,12 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; - if (avrf_mass_erase(bank) == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - + if (avrf_mass_erase(bank) == ERROR_OK) command_print(CMD, "avr mass erase complete"); - } else + else command_print(CMD, "avr mass erase failed"); LOG_DEBUG("%s", __func__); diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c index f533d54e9..a686e83d3 100644 --- a/src/flash/nor/bluenrg-x.c +++ b/src/flash/nor/bluenrg-x.c @@ -94,7 +94,7 @@ FLASH_BANK_COMMAND_HANDLER(bluenrgx_flash_bank_command) bluenrgx_info = calloc(1, sizeof(*bluenrgx_info)); /* Check allocation */ - if (bluenrgx_info == NULL) { + if (!bluenrgx_info) { LOG_ERROR("failed to allocate bank structure"); return ERROR_FAIL; } diff --git a/src/flash/nor/cc26xx.c b/src/flash/nor/cc26xx.c index 4d58daad8..f6b563279 100644 --- a/src/flash/nor/cc26xx.c +++ b/src/flash/nor/cc26xx.c @@ -107,9 +107,9 @@ static int cc26xx_wait_algo_done(struct flash_bank *bank, uint32_t params_addr) int retval = ERROR_OK; start_ms = timeval_ms(); - while (CC26XX_BUFFER_FULL == status) { + while (status == CC26XX_BUFFER_FULL) { retval = target_read_u32(target, status_addr, &status); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; elapsed_ms = timeval_ms() - start_ms; @@ -119,7 +119,7 @@ static int cc26xx_wait_algo_done(struct flash_bank *bank, uint32_t params_addr) break; }; - if (CC26XX_BUFFER_EMPTY != status) { + if (status != CC26XX_BUFFER_EMPTY) { LOG_ERROR("%s: Flash operation failed", cc26xx_bank->family_name); return ERROR_FAIL; } @@ -136,25 +136,25 @@ static int cc26xx_init(struct flash_bank *bank) /* Make sure we've probed the flash to get the device and size */ retval = cc26xx_auto_probe(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Check for working area to use for flash helper algorithm */ - if (NULL != cc26xx_bank->working_area) + if (cc26xx_bank->working_area) target_free_working_area(target, cc26xx_bank->working_area); retval = target_alloc_working_area(target, cc26xx_bank->algo_working_size, &cc26xx_bank->working_area); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Confirm the defined working address is the area we need to use */ - if (CC26XX_ALGO_BASE_ADDRESS != cc26xx_bank->working_area->address) + if (cc26xx_bank->working_area->address != CC26XX_ALGO_BASE_ADDRESS) return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; /* Write flash helper algorithm into target memory */ retval = target_write_buffer(target, CC26XX_ALGO_BASE_ADDRESS, cc26xx_bank->algo_size, cc26xx_bank->algo_code); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("%s: Failed to load flash helper algorithm", cc26xx_bank->family_name); target_free_working_area(target, cc26xx_bank->working_area); @@ -168,7 +168,7 @@ static int cc26xx_init(struct flash_bank *bank) /* Begin executing the flash helper algorithm */ retval = target_start_algorithm(target, 0, NULL, 0, NULL, CC26XX_ALGO_BASE_ADDRESS, 0, &cc26xx_bank->armv7m_info); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("%s: Failed to start flash helper algorithm", cc26xx_bank->family_name); target_free_working_area(target, cc26xx_bank->working_area); @@ -211,13 +211,13 @@ static int cc26xx_mass_erase(struct flash_bank *bank) int retval; - if (TARGET_HALTED != target->state) { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } retval = cc26xx_init(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Initialize algorithm parameters */ @@ -231,7 +231,7 @@ static int cc26xx_mass_erase(struct flash_bank *bank) sizeof(algo_params), (uint8_t *)&algo_params); /* Wait for command to complete */ - if (ERROR_OK == retval) + if (retval == ERROR_OK) retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[0]); /* Regardless of errors, try to close down algo */ @@ -248,7 +248,7 @@ FLASH_BANK_COMMAND_HANDLER(cc26xx_flash_bank_command) return ERROR_COMMAND_SYNTAX_ERROR; cc26xx_bank = malloc(sizeof(struct cc26xx_bank)); - if (NULL == cc26xx_bank) + if (!cc26xx_bank) return ERROR_FAIL; /* Initialize private flash information */ @@ -275,7 +275,7 @@ static int cc26xx_erase(struct flash_bank *bank, unsigned int first, uint32_t length; int retval; - if (TARGET_HALTED != target->state) { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -290,7 +290,7 @@ static int cc26xx_erase(struct flash_bank *bank, unsigned int first, length = (last - first + 1) * cc26xx_bank->sector_length; retval = cc26xx_init(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Set up algorithm parameters for erase command */ @@ -304,7 +304,7 @@ static int cc26xx_erase(struct flash_bank *bank, unsigned int first, sizeof(algo_params), (uint8_t *)&algo_params); /* If no error, wait for erase to finish */ - if (ERROR_OK == retval) + if (retval == ERROR_OK) retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[0]); /* Regardless of errors, try to close down algo */ @@ -327,13 +327,13 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t index; int retval; - if (TARGET_HALTED != target->state) { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } retval = cc26xx_init(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Initialize algorithm parameters to default values */ @@ -354,7 +354,7 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer, /* Put next block of data to flash into buffer */ retval = target_write_buffer(target, cc26xx_bank->buffer_addr[index], size, buffer); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Unable to write data to target memory"); break; } @@ -367,13 +367,13 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer, /* Issue flash helper algorithm parameters for block write */ retval = target_write_buffer(target, cc26xx_bank->params_addr[index], sizeof(algo_params[index]), (uint8_t *)&algo_params[index]); - if (ERROR_OK != retval) + if (retval != ERROR_OK) break; /* Wait for next ping pong buffer to be ready */ index ^= 1; retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[index]); - if (ERROR_OK != retval) + if (retval != ERROR_OK) break; count -= size; @@ -386,7 +386,7 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer, } /* If no error yet, wait for last buffer to finish */ - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { index ^= 1; retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[index]); } @@ -410,12 +410,12 @@ static int cc26xx_probe(struct flash_bank *bank) int retval; retval = target_read_u32(target, FCFG1_ICEPICK_ID, &value); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; cc26xx_bank->icepick_id = value; retval = target_read_u32(target, FCFG1_USER_ID, &value); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; cc26xx_bank->user_id = value; @@ -454,14 +454,14 @@ static int cc26xx_probe(struct flash_bank *bank) } retval = target_read_u32(target, CC26XX_FLASH_SIZE_INFO, &value); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; num_sectors = value & 0xff; if (num_sectors > max_sectors) num_sectors = max_sectors; bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors); - if (NULL == bank->sectors) + if (!bank->sectors) return ERROR_FAIL; bank->base = CC26XX_FLASH_BASE_ADDR; diff --git a/src/flash/nor/cc3220sf.c b/src/flash/nor/cc3220sf.c index 1d01ba3be..b29653841 100644 --- a/src/flash/nor/cc3220sf.c +++ b/src/flash/nor/cc3220sf.c @@ -42,19 +42,19 @@ static int cc3220sf_mass_erase(struct flash_bank *bank) int retval = ERROR_OK; - if (TARGET_HALTED != target->state) { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } /* Set starting address to erase to zero */ retval = target_write_u32(target, FMA_REGISTER_ADDR, 0); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Write the MERASE bit of the FMC register */ retval = target_write_u32(target, FMC_REGISTER_ADDR, FMC_MERASE_VALUE); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Poll the MERASE bit until the mass erase is complete */ @@ -62,7 +62,7 @@ static int cc3220sf_mass_erase(struct flash_bank *bank) start_ms = timeval_ms(); while (!done) { retval = target_read_u32(target, FMC_REGISTER_ADDR, &value); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if ((value & FMC_MERASE_BIT) == 0) { @@ -93,7 +93,7 @@ FLASH_BANK_COMMAND_HANDLER(cc3220sf_flash_bank_command) return ERROR_COMMAND_SYNTAX_ERROR; cc3220sf_bank = malloc(sizeof(struct cc3220sf_bank)); - if (NULL == cc3220sf_bank) + if (!cc3220sf_bank) return ERROR_FAIL; /* Initialize private flash information */ @@ -118,7 +118,7 @@ static int cc3220sf_erase(struct flash_bank *bank, unsigned int first, int retval = ERROR_OK; - if (TARGET_HALTED != target->state) { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -137,12 +137,12 @@ static int cc3220sf_erase(struct flash_bank *bank, unsigned int first, /* Set starting address to erase */ retval = target_write_u32(target, FMA_REGISTER_ADDR, address); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Write the ERASE bit of the FMC register */ retval = target_write_u32(target, FMC_REGISTER_ADDR, FMC_ERASE_VALUE); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Poll the ERASE bit until the erase is complete */ @@ -150,7 +150,7 @@ static int cc3220sf_erase(struct flash_bank *bank, unsigned int first, start_ms = timeval_ms(); while (!done) { retval = target_read_u32(target, FMC_REGISTER_ADDR, &value); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if ((value & FMC_ERASE_BIT) == 0) { @@ -192,7 +192,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, int retval = ERROR_OK; - if (TARGET_HALTED != target->state) { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -200,13 +200,13 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, /* Obtain working area to use for flash helper algorithm */ retval = target_alloc_working_area(target, sizeof(cc3220sf_algo), &algo_working_area); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Obtain working area to use for flash buffer */ retval = target_alloc_working_area(target, target_get_working_area_avail(target), &buffer_working_area); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { target_free_working_area(target, algo_working_area); return retval; } @@ -223,7 +223,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, /* Write flash helper algorithm into target memory */ retval = target_write_buffer(target, algo_base_address, sizeof(cc3220sf_algo), cc3220sf_algo); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { target_free_working_area(target, algo_working_area); target_free_working_area(target, buffer_working_area); return retval; @@ -262,7 +262,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, /* Retrieve what is already in flash at the head address */ retval = target_read_buffer(target, head_address, sizeof(head), head); - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { /* Substitute in the new data to write */ while ((remaining > 0) && (head_offset < 4)) { head[head_offset] = *buffer; @@ -273,7 +273,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, } } - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { /* Helper parameters are passed in registers R0-R2 */ /* Set start of data buffer, address to write to, and word count */ buf_set_u32(reg_params[0].value, 0, 32, algo_buffer_address); @@ -285,17 +285,17 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, sizeof(head), head); } - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { /* Execute the flash helper algorithm */ retval = target_run_algorithm(target, 0, NULL, 3, reg_params, algo_base_address, 0, FLASH_TIMEOUT, &cc3220sf_bank->armv7m_info); - if (ERROR_OK != retval) + if (retval != ERROR_OK) LOG_ERROR("cc3220sf: Flash algorithm failed to run"); /* Check that the head value was written to flash */ result = buf_get_u32(reg_params[2].value, 0, 32); - if (0 != result) { + if (result != 0) { retval = ERROR_FAIL; LOG_ERROR("cc3220sf: Flash operation failed"); } @@ -307,7 +307,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, /* Adjust remaining so it is a multiple of whole words */ remaining -= tail_count; - while ((ERROR_OK == retval) && (remaining > 0)) { + while ((retval == ERROR_OK) && (remaining > 0)) { /* Set start of data buffer and address to write to */ buf_set_u32(reg_params[0].value, 0, 32, algo_buffer_address); buf_set_u32(reg_params[1].value, 0, 32, address); @@ -317,7 +317,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, /* Fill up buffer with data to flash */ retval = target_write_buffer(target, algo_buffer_address, algo_buffer_size, buffer); - if (ERROR_OK != retval) + if (retval != ERROR_OK) break; /* Count to write is in 32-bit words */ @@ -331,7 +331,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, /* Fill buffer with what's left of the data */ retval = target_write_buffer(target, algo_buffer_address, remaining, buffer); - if (ERROR_OK != retval) + if (retval != ERROR_OK) break; /* Calculate the final word count to write */ @@ -352,14 +352,14 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, retval = target_run_algorithm(target, 0, NULL, 3, reg_params, algo_base_address, 0, FLASH_TIMEOUT, &cc3220sf_bank->armv7m_info); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("cc3220sf: Flash algorithm failed to run"); break; } /* Check that all words were written to flash */ result = buf_get_u32(reg_params[2].value, 0, 32); - if (0 != result) { + if (result != 0) { retval = ERROR_FAIL; LOG_ERROR("cc3220sf: Flash operation failed"); break; @@ -369,7 +369,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, } /* Do one word write for any final bytes less than a full word */ - if ((ERROR_OK == retval) && (0 != tail_count)) { + if ((retval == ERROR_OK) && (tail_count != 0)) { uint8_t tail[4]; /* Set starting byte offset for data to write */ @@ -378,7 +378,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, /* Retrieve what is already in flash at the tail address */ retval = target_read_buffer(target, address, sizeof(tail), tail); - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { /* Substitute in the new data to write */ while (tail_count > 0) { tail[tail_offset] = *buffer; @@ -388,7 +388,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, } } - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { /* Set start of data buffer, address to write to, and word count */ buf_set_u32(reg_params[0].value, 0, 32, algo_buffer_address); buf_set_u32(reg_params[1].value, 0, 32, address); @@ -399,17 +399,17 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, sizeof(tail), tail); } - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { /* Execute the flash helper algorithm */ retval = target_run_algorithm(target, 0, NULL, 3, reg_params, algo_base_address, 0, FLASH_TIMEOUT, &cc3220sf_bank->armv7m_info); - if (ERROR_OK != retval) + if (retval != ERROR_OK) LOG_ERROR("cc3220sf: Flash algorithm failed to run"); /* Check that the tail was written to flash */ result = buf_get_u32(reg_params[2].value, 0, 32); - if (0 != result) { + if (result != 0) { retval = ERROR_FAIL; LOG_ERROR("cc3220sf: Flash operation failed"); } @@ -441,7 +441,7 @@ static int cc3220sf_probe(struct flash_bank *bank) free(bank->sectors); bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors); - if (NULL == bank->sectors) + if (!bank->sectors) return ERROR_FAIL; bank->base = base; diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index 666316932..e3fb6c8ff 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -426,7 +426,7 @@ static int cfi_read_intel_pri_ext(struct flash_bank *bank) free(cfi_info->pri_ext); pri_ext = malloc(sizeof(struct cfi_intel_pri_ext)); - if (pri_ext == NULL) { + if (!pri_ext) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -522,7 +522,7 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank) free(cfi_info->pri_ext); pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext)); - if (pri_ext == NULL) { + if (!pri_ext) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -561,55 +561,55 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank) LOG_DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1], pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version); - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 5, &pri_ext->SiliconRevision); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 5, &pri_ext->silicon_revision); if (retval != ERROR_OK) return retval; - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 6, &pri_ext->EraseSuspend); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 6, &pri_ext->erase_suspend); if (retval != ERROR_OK) return retval; - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 7, &pri_ext->BlkProt); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 7, &pri_ext->blk_prot); if (retval != ERROR_OK) return retval; - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 8, &pri_ext->TmpBlkUnprotect); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 8, &pri_ext->tmp_blk_unprotected); if (retval != ERROR_OK) return retval; - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9, &pri_ext->BlkProtUnprot); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9, &pri_ext->blk_prot_unprot); if (retval != ERROR_OK) return retval; - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 10, &pri_ext->SimultaneousOps); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 10, &pri_ext->simultaneous_ops); if (retval != ERROR_OK) return retval; - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 11, &pri_ext->BurstMode); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 11, &pri_ext->burst_mode); if (retval != ERROR_OK) return retval; - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 12, &pri_ext->PageMode); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 12, &pri_ext->page_mode); if (retval != ERROR_OK) return retval; - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 13, &pri_ext->VppMin); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 13, &pri_ext->vpp_min); if (retval != ERROR_OK) return retval; - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 14, &pri_ext->VppMax); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 14, &pri_ext->vpp_max); if (retval != ERROR_OK) return retval; - retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 15, &pri_ext->TopBottom); + retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 15, &pri_ext->top_bottom); if (retval != ERROR_OK) return retval; LOG_DEBUG("Silicon Revision: 0x%x, Erase Suspend: 0x%x, Block protect: 0x%x", - pri_ext->SiliconRevision, pri_ext->EraseSuspend, pri_ext->BlkProt); + pri_ext->silicon_revision, pri_ext->erase_suspend, pri_ext->blk_prot); LOG_DEBUG("Temporary Unprotect: 0x%x, Block Protect Scheme: 0x%x, " - "Simultaneous Ops: 0x%x", pri_ext->TmpBlkUnprotect, - pri_ext->BlkProtUnprot, pri_ext->SimultaneousOps); + "Simultaneous Ops: 0x%x", pri_ext->tmp_blk_unprotected, + pri_ext->blk_prot_unprot, pri_ext->simultaneous_ops); - LOG_DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->BurstMode, pri_ext->PageMode); + LOG_DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->burst_mode, pri_ext->page_mode); LOG_DEBUG("Vpp min: %u.%x, Vpp max: %u.%x", - (pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f, - (pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f); + (pri_ext->vpp_min & 0xf0) >> 4, pri_ext->vpp_min & 0x0f, + (pri_ext->vpp_max & 0xf0) >> 4, pri_ext->vpp_max & 0x0f); - LOG_DEBUG("WP# protection 0x%x", pri_ext->TopBottom); + LOG_DEBUG("WP# protection 0x%x", pri_ext->top_bottom); return ERROR_OK; } @@ -624,7 +624,7 @@ static int cfi_read_atmel_pri_ext(struct flash_bank *bank) free(cfi_info->pri_ext); pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext)); - if (pri_ext == NULL) { + if (!pri_ext) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -696,20 +696,20 @@ static int cfi_read_atmel_pri_ext(struct flash_bank *bank) atmel_pri_ext.page_mode); if (atmel_pri_ext.features & 0x02) - pri_ext->EraseSuspend = 2; + pri_ext->erase_suspend = 2; /* some chips got it backwards... */ if (cfi_info->device_id == AT49BV6416 || cfi_info->device_id == AT49BV6416T) { if (atmel_pri_ext.bottom_boot) - pri_ext->TopBottom = 3; + pri_ext->top_bottom = 3; else - pri_ext->TopBottom = 2; + pri_ext->top_bottom = 2; } else { if (atmel_pri_ext.bottom_boot) - pri_ext->TopBottom = 2; + pri_ext->top_bottom = 2; else - pri_ext->TopBottom = 3; + pri_ext->top_bottom = 3; } pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1; @@ -740,16 +740,16 @@ static int cfi_spansion_info(struct flash_bank *bank, struct command_invocation pri_ext->major_version, pri_ext->minor_version); command_print_sameline(cmd, "Silicon Rev.: 0x%x, Address Sensitive unlock: 0x%x\n", - (pri_ext->SiliconRevision) >> 2, - (pri_ext->SiliconRevision) & 0x03); + (pri_ext->silicon_revision) >> 2, + (pri_ext->silicon_revision) & 0x03); command_print_sameline(cmd, "Erase Suspend: 0x%x, Sector Protect: 0x%x\n", - pri_ext->EraseSuspend, - pri_ext->BlkProt); + pri_ext->erase_suspend, + pri_ext->blk_prot); command_print_sameline(cmd, "VppMin: %u.%x, VppMax: %u.%x\n", - (pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f, - (pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f); + (pri_ext->vpp_min & 0xf0) >> 4, pri_ext->vpp_min & 0x0f, + (pri_ext->vpp_max & 0xf0) >> 4, pri_ext->vpp_max & 0x0f); return ERROR_OK; } @@ -811,7 +811,7 @@ int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char ** } cfi_info = calloc(1, sizeof(struct cfi_flash_bank)); - if (cfi_info == NULL) { + if (!cfi_info) { LOG_ERROR("No memory for flash bank info"); return ERROR_FAIL; } @@ -870,9 +870,7 @@ static int cfi_intel_erase(struct flash_bank *bank, unsigned int first, if (retval != ERROR_OK) return retval; - if (status == 0x80) - bank->sectors[i].is_erased = 1; - else { + if (status != 0x80) { retval = cfi_send_command(bank, 0xff, cfi_flash_address(bank, 0, 0x0)); if (retval != ERROR_OK) return retval; @@ -927,9 +925,7 @@ static int cfi_spansion_erase(struct flash_bank *bank, unsigned int first, if (retval != ERROR_OK) return retval; - if (cfi_spansion_wait_status_busy(bank, cfi_info->block_erase_timeout) == ERROR_OK) - bank->sectors[i].is_erased = 1; - else { + if (cfi_spansion_wait_status_busy(bank, cfi_info->block_erase_timeout) != ERROR_OK) { retval = cfi_send_command(bank, 0xf0, cfi_flash_address(bank, 0, 0x0)); if (retval != ERROR_OK) return retval; @@ -1488,7 +1484,7 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, const uint8_t /* convert bus-width dependent algorithm code to correct endianness */ target_code = malloc(target_code_size); - if (target_code == NULL) { + if (!target_code) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -1867,7 +1863,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff /* convert bus-width dependent algorithm code to correct endianness */ target_code = malloc(target_code_size); - if (target_code == NULL) { + if (!target_code) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -2480,7 +2476,7 @@ static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *pa struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; (void) param; - if ((pri_ext->_reversed_geometry) || (pri_ext->TopBottom == 3)) { + if ((pri_ext->_reversed_geometry) || (pri_ext->top_bottom == 3)) { LOG_DEBUG("swapping reversed erase region information on cmdset 0002 device"); for (unsigned int i = 0; i < cfi_info->num_erase_regions / 2; i++) { diff --git a/src/flash/nor/cfi.h b/src/flash/nor/cfi.h index 80633f494..f8ca290a5 100644 --- a/src/flash/nor/cfi.h +++ b/src/flash/nor/cfi.h @@ -108,17 +108,17 @@ struct cfi_spansion_pri_ext { uint8_t pri[3]; uint8_t major_version; uint8_t minor_version; - uint8_t SiliconRevision; /* bits 1-0: Address Sensitive Unlock */ - uint8_t EraseSuspend; - uint8_t BlkProt; - uint8_t TmpBlkUnprotect; - uint8_t BlkProtUnprot; - uint8_t SimultaneousOps; - uint8_t BurstMode; - uint8_t PageMode; - uint8_t VppMin; - uint8_t VppMax; - uint8_t TopBottom; + uint8_t silicon_revision; /* bits 1-0: Address Sensitive Unlock */ + uint8_t erase_suspend; + uint8_t blk_prot; + uint8_t tmp_blk_unprotected; + uint8_t blk_prot_unprot; + uint8_t simultaneous_ops; + uint8_t burst_mode; + uint8_t page_mode; + uint8_t vpp_min; + uint8_t vpp_max; + uint8_t top_bottom; int _reversed_geometry; uint32_t _unlock1; uint32_t _unlock2; diff --git a/src/flash/nor/core.c b/src/flash/nor/core.c index c162c7097..30d387ae0 100644 --- a/src/flash/nor/core.c +++ b/src/flash/nor/core.c @@ -70,7 +70,7 @@ int flash_driver_protect(struct flash_bank *bank, int set, unsigned int first, /* force "set" to 0/1 */ set = !!set; - if (bank->driver->protect == NULL) { + if (!bank->driver->protect) { LOG_ERROR("Flash protection is not supported."); return ERROR_FLASH_OPER_UNSUPPORTED; } @@ -179,7 +179,7 @@ void flash_bank_add(struct flash_bank *bank) if (flash_banks) { /* find last flash bank */ struct flash_bank *p = flash_banks; - while (NULL != p->next) { + while (p->next) { bank_num += 1; p = p->next; } @@ -257,7 +257,7 @@ struct flash_bank *get_flash_bank_by_name_noprobe(const char *name) unsigned found = 0; struct flash_bank *bank; - for (bank = flash_banks; NULL != bank; bank = bank->next) { + for (bank = flash_banks; bank; bank = bank->next) { if (strcmp(bank->name, name) == 0) return bank; if (!flash_driver_name_matches(bank->driver->name, name)) @@ -275,7 +275,7 @@ int get_flash_bank_by_name(const char *name, struct flash_bank **bank_result) int retval; bank = get_flash_bank_by_name_noprobe(name); - if (bank != NULL) { + if (bank) { retval = bank->driver->auto_probe(bank); if (retval != ERROR_OK) { @@ -293,7 +293,7 @@ int get_flash_bank_by_num(unsigned int num, struct flash_bank **bank) struct flash_bank *p = get_flash_bank_by_num_noprobe(num); int retval; - if (p == NULL) + if (!p) return ERROR_FAIL; retval = p->driver->auto_probe(p); @@ -345,7 +345,7 @@ static int default_flash_mem_blank_check(struct flash_bank *bank) { struct target *target = bank->target; const int buffer_size = 1024; - uint32_t nBytes; + uint32_t n_bytes; int retval = ERROR_OK; if (bank->target->state != TARGET_HALTED) { @@ -373,8 +373,8 @@ static int default_flash_mem_blank_check(struct flash_bank *bank) if (retval != ERROR_OK) goto done; - for (nBytes = 0; nBytes < chunk; nBytes++) { - if (buffer[nBytes] != bank->erased_value) { + for (n_bytes = 0; n_bytes < chunk; n_bytes++) { + if (buffer[n_bytes] != bank->erased_value) { bank->sectors[i].is_erased = 0; break; } @@ -400,7 +400,7 @@ int default_flash_blank_check(struct flash_bank *bank) struct target_memory_check_block *block_array; block_array = malloc(bank->num_sectors * sizeof(struct target_memory_check_block)); - if (block_array == NULL) + if (!block_array) return default_flash_mem_blank_check(bank); for (unsigned int i = 0; i < bank->num_sectors; i++) { @@ -491,7 +491,7 @@ static int flash_iterate_address_range_inner(struct target *target, return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } - if (c->prot_blocks == NULL || c->num_prot_blocks == 0) { + if (!c->prot_blocks || c->num_prot_blocks == 0) { /* flash driver does not define protect blocks, use sectors instead */ iterate_protect_blocks = false; } @@ -791,7 +791,7 @@ int flash_write_unlock_verify(struct target *target, struct image *image, retval = get_flash_bank_by_addr(target, run_address, false, &c); if (retval != ERROR_OK) goto done; - if (c == NULL) { + if (!c) { LOG_WARNING("no flash bank found for address " TARGET_ADDR_FMT, run_address); section++; /* and skip it */ section_offset = 0; @@ -903,7 +903,7 @@ int flash_write_unlock_verify(struct target *target, struct image *image, /* allocate buffer */ buffer = malloc(run_size); - if (buffer == NULL) { + if (!buffer) { LOG_ERROR("Out of memory for flash bank buffer"); retval = ERROR_FAIL; goto done; @@ -989,7 +989,7 @@ int flash_write_unlock_verify(struct target *target, struct image *image, goto done; } - if (written != NULL) + if (written) *written += run_size; /* add run size to total written counter */ } @@ -1010,7 +1010,7 @@ struct flash_sector *alloc_block_array(uint32_t offset, uint32_t size, unsigned int num_blocks) { struct flash_sector *array = calloc(num_blocks, sizeof(struct flash_sector)); - if (array == NULL) + if (!array) return NULL; for (unsigned int i = 0; i < num_blocks; i++) { diff --git a/src/flash/nor/dsp5680xx_flash.c b/src/flash/nor/dsp5680xx_flash.c index 49022825e..5e8eec30f 100644 --- a/src/flash/nor/dsp5680xx_flash.c +++ b/src/flash/nor/dsp5680xx_flash.c @@ -130,15 +130,9 @@ static int dsp5680xx_flash_protect(struct flash_bank *bank, int set, if (set) retval = dsp5680xx_f_lock(bank->target); - else { + else retval = dsp5680xx_f_unlock(bank->target); - if (retval == ERROR_OK) { - /* mark all as erased */ - for (int i = 0; i <= (HFM_SECTOR_COUNT - 1); i++) - /* FM does not recognize it as erased if erased via JTAG. */ - bank->sectors[i].is_erased = 1; - } - } + return retval; } @@ -156,8 +150,6 @@ static int dsp5680xx_flash_protect(struct flash_bank *bank, int set, static int dsp5680xx_flash_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { - int retval; - if ((offset + count / 2) > bank->size) { LOG_ERROR("%s: Flash bank cannot fit data.", __func__); return ERROR_FAIL; @@ -171,17 +163,7 @@ static int dsp5680xx_flash_write(struct flash_bank *bank, const uint8_t *buffer, LOG_ERROR("%s: Writing to odd addresses not supported for this target", __func__); return ERROR_FAIL; } - retval = dsp5680xx_f_wr(bank->target, buffer, bank->base + offset / 2, count, 0); - uint32_t addr_word; - - for (addr_word = bank->base + offset / 2; addr_word < count / 2; - addr_word += (HFM_SECTOR_SIZE / 2)) { - if (retval == ERROR_OK) - bank->sectors[addr_word / (HFM_SECTOR_SIZE / 2)].is_erased = 0; - else - bank->sectors[addr_word / (HFM_SECTOR_SIZE / 2)].is_erased = -1; - } - return retval; + return dsp5680xx_f_wr(bank->target, buffer, bank->base + offset / 2, count, 0); } static int dsp5680xx_probe(struct flash_bank *bank) @@ -206,22 +188,7 @@ static int dsp5680xx_probe(struct flash_bank *bank) static int dsp5680xx_flash_erase(struct flash_bank *bank, unsigned int first, unsigned int last) { - int retval; - - retval = dsp5680xx_f_erase(bank->target, (uint32_t) first, (uint32_t) last); - if ((!(first | last)) || ((first == 0) && (last == (HFM_SECTOR_COUNT - 1)))) - last = HFM_SECTOR_COUNT - 1; - if (retval == ERROR_OK) - for (unsigned int i = first; i <= last; i++) - bank->sectors[i].is_erased = 1; - else - /** - * If an error occurred unknown status - *is set even though some sector could have been correctly erased. - */ - for (unsigned int i = first; i <= last; i++) - bank->sectors[i].is_erased = -1; - return retval; + return dsp5680xx_f_erase(bank->target, (uint32_t) first, (uint32_t) last); } /** @@ -241,16 +208,14 @@ static int dsp5680xx_flash_erase_check(struct flash_bank *bank) uint32_t i; for (i = 0; i < HFM_SECTOR_COUNT; i++) { - if (bank->sectors[i].is_erased == -1) { - retval = dsp5680xx_f_erase_check(bank->target, &erased, i); - if (retval != ERROR_OK) { - bank->sectors[i].is_erased = -1; - } else { - if (erased) - bank->sectors[i].is_erased = 1; - else - bank->sectors[i].is_erased = 0; - } + retval = dsp5680xx_f_erase_check(bank->target, &erased, i); + if (retval != ERROR_OK) { + bank->sectors[i].is_erased = -1; + } else { + if (erased) + bank->sectors[i].is_erased = 1; + else + bank->sectors[i].is_erased = 0; } } return retval; diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c index 6461e4c72..ab0186d7d 100644 --- a/src/flash/nor/efm32.c +++ b/src/flash/nor/efm32.c @@ -232,7 +232,7 @@ static int efm32x_read_info(struct flash_bank *bank, memset(efm32_info, 0, sizeof(struct efm32_info)); ret = target_read_u32(bank->target, CPUID, &cpuid); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; if (((cpuid >> 4) & 0xfff) == 0xc23) { @@ -247,23 +247,23 @@ static int efm32x_read_info(struct flash_bank *bank, } ret = efm32x_get_flash_size(bank, &(efm32_info->flash_sz_kib)); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; ret = efm32x_get_ram_size(bank, &(efm32_info->ram_sz_kib)); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; ret = efm32x_get_part_num(bank, &(efm32_info->part_num)); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; ret = efm32x_get_part_family(bank, &(efm32_info->part_family)); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; ret = efm32x_get_prod_rev(bank, &(efm32_info->prod_rev)); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; for (size_t i = 0; i < ARRAY_SIZE(efm32_families); i++) { @@ -271,7 +271,7 @@ static int efm32x_read_info(struct flash_bank *bank, efm32_info->family_data = &efm32_families[i]; } - if (efm32_info->family_data == NULL) { + if (!efm32_info->family_data) { LOG_ERROR("Unknown MCU family %d", efm32_info->part_family); return ERROR_FAIL; } @@ -296,7 +296,7 @@ static int efm32x_read_info(struct flash_bank *bank, uint8_t pg_size = 0; ret = target_read_u8(bank->target, EFM32_MSC_DI_PAGE_SIZE, &pg_size); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; efm32_info->page_size = (1 << ((pg_size+10) & 0xff)); @@ -349,7 +349,7 @@ static int efm32x_set_reg_bits(struct flash_bank *bank, uint32_t reg, uint32_t reg_val = 0; ret = efm32x_read_reg_u32(bank, reg, ®_val); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; if (set) @@ -381,12 +381,12 @@ static int efm32x_wait_status(struct flash_bank *bank, int timeout, while (1) { ret = efm32x_read_reg_u32(bank, EFM32_MSC_REG_STATUS, &status); - if (ERROR_OK != ret) + if (ret != ERROR_OK) break; LOG_DEBUG("status: 0x%" PRIx32 "", status); - if (((status & wait_mask) == 0) && (0 == wait_for_set)) + if (((status & wait_mask) == 0) && (wait_for_set == 0)) break; else if (((status & wait_mask) != 0) && wait_for_set) break; @@ -420,16 +420,16 @@ static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr) LOG_DEBUG("erasing flash page at 0x%08" PRIx32, addr); ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_ADDRB, addr); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; ret = efm32x_set_reg_bits(bank, EFM32_MSC_REG_WRITECMD, EFM32_MSC_WRITECMD_LADDRIM_MASK, 1); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; ret = efm32x_read_reg_u32(bank, EFM32_MSC_REG_STATUS, &status); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; LOG_DEBUG("status 0x%" PRIx32, status); @@ -444,7 +444,7 @@ static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr) ret = efm32x_set_reg_bits(bank, EFM32_MSC_REG_WRITECMD, EFM32_MSC_WRITECMD_ERASEPAGE_MASK, 1); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; return efm32x_wait_status(bank, EFM32_FLASH_ERASE_TMO, @@ -457,21 +457,21 @@ static int efm32x_erase(struct flash_bank *bank, unsigned int first, struct target *target = bank->target; int ret = 0; - if (TARGET_HALTED != target->state) { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } efm32x_msc_lock(bank, 0); ret = efm32x_set_wren(bank, 1); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to enable MSC write"); return ret; } for (unsigned int i = first; i <= last; i++) { ret = efm32x_erase_page(bank, bank->sectors[i].offset); - if (ERROR_OK != ret) + if (ret != ERROR_OK) LOG_ERROR("Failed to erase page %d", i); } @@ -498,7 +498,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank) for (int i = 0; i < data_size; i++, ptr++) { ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+i*4, ptr); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to read PLW %d", i); return ret; } @@ -509,7 +509,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank) /* ULW, word 126 */ ptr = efm32x_info->lb_page + 126; ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+126*4, ptr); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to read ULW"); return ret; } @@ -517,7 +517,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank) /* DLW, word 127 */ ptr = efm32x_info->lb_page + 127; ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+127*4, ptr); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to read DLW"); return ret; } @@ -525,7 +525,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank) /* MLW, word 125, present in GG, LG, PG, JG, EFR32 */ ptr = efm32x_info->lb_page + 125; ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+125*4, ptr); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to read MLW"); return ret; } @@ -533,7 +533,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank) /* ALW, word 124, present in GG, LG, PG, JG, EFR32 */ ptr = efm32x_info->lb_page + 124; ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+124*4, ptr); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to read ALW"); return ret; } @@ -541,7 +541,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank) /* CLW1, word 123, present in EFR32 */ ptr = efm32x_info->lb_page + 123; ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+123*4, ptr); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to read CLW1"); return ret; } @@ -549,7 +549,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank) /* CLW0, word 122, present in GG, LG, PG, JG, EFR32 */ ptr = efm32x_info->lb_page + 122; ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+122*4, ptr); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to read CLW0"); return ret; } @@ -563,7 +563,7 @@ static int efm32x_write_lock_data(struct flash_bank *bank) int ret = 0; ret = efm32x_erase_page(bank, EFM32_MSC_LOCK_BITS); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to erase LB page"); return ret; } @@ -617,14 +617,14 @@ static int efm32x_protect(struct flash_bank *bank, int set, unsigned int first, for (unsigned int i = first; i <= last; i++) { ret = efm32x_set_page_lock(bank, i, set); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to set lock on page %d", i); return ret; } } ret = efm32x_write_lock_data(bank); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to write LB page"); return ret; } @@ -812,16 +812,16 @@ static int efm32x_write_word(struct flash_bank *bank, uint32_t addr, keep_alive(); ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_ADDRB, addr); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; ret = efm32x_set_reg_bits(bank, EFM32_MSC_REG_WRITECMD, EFM32_MSC_WRITECMD_LADDRIM_MASK, 1); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; ret = efm32x_read_reg_u32(bank, EFM32_MSC_REG_STATUS, &status); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; LOG_DEBUG("status 0x%" PRIx32, status); @@ -836,27 +836,27 @@ static int efm32x_write_word(struct flash_bank *bank, uint32_t addr, ret = efm32x_wait_status(bank, EFM32_FLASH_WDATAREADY_TMO, EFM32_MSC_STATUS_WDATAREADY_MASK, 1); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Wait for WDATAREADY failed"); return ret; } ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_WDATA, val); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("WDATA write failed"); return ret; } ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_WRITECMD, EFM32_MSC_WRITECMD_WRITEONCE_MASK); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("WRITECMD write failed"); return ret; } ret = efm32x_wait_status(bank, EFM32_FLASH_WRITE_TMO, EFM32_MSC_STATUS_BUSY_MASK, 0); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Wait for BUSY failed"); return ret; } @@ -885,7 +885,7 @@ static int efm32x_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t old_count = count; count = (old_count | 3) + 1; new_buffer = malloc(count); - if (new_buffer == NULL) { + if (!new_buffer) { LOG_ERROR("odd number of bytes to write and no memory " "for padding buffer"); return ERROR_FAIL; @@ -950,7 +950,7 @@ static int efm32x_probe(struct flash_bank *bank) memset(efm32x_info->lb_page, 0xff, LOCKBITS_PAGE_SZ); ret = efm32x_read_info(bank, &efm32_mcu_info); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; LOG_INFO("detected part: %s Gecko, rev %d", @@ -958,7 +958,7 @@ static int efm32x_probe(struct flash_bank *bank) LOG_INFO("flash size = %dkbytes", efm32_mcu_info.flash_sz_kib); LOG_INFO("flash page size = %dbytes", efm32_mcu_info.page_size); - assert(0 != efm32_mcu_info.page_size); + assert(efm32_mcu_info.page_size != 0); int num_pages = efm32_mcu_info.flash_sz_kib * 1024 / efm32_mcu_info.page_size; @@ -973,7 +973,7 @@ static int efm32x_probe(struct flash_bank *bank) bank->num_sectors = num_pages; ret = efm32x_read_lock_data(bank); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to read LB data"); return ret; } @@ -1011,12 +1011,12 @@ static int efm32x_protect_check(struct flash_bank *bank) } ret = efm32x_read_lock_data(bank); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to read LB data"); return ret; } - assert(NULL != bank->sectors); + assert(bank->sectors); for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = efm32x_get_page_lock(bank, i); @@ -1030,7 +1030,7 @@ static int get_efm32x_info(struct flash_bank *bank, struct command_invocation *c int ret; ret = efm32x_read_info(bank, &info); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { LOG_ERROR("Failed to read EFM32 info"); return ret; } @@ -1048,7 +1048,7 @@ COMMAND_HANDLER(efm32x_handle_debuglock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct efm32x_flash_bank *efm32x_info = bank->driver_priv; @@ -1065,7 +1065,7 @@ COMMAND_HANDLER(efm32x_handle_debuglock_command) *ptr = 0; retval = efm32x_write_lock_data(bank); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Failed to write LB page"); return retval; } diff --git a/src/flash/nor/em357.c b/src/flash/nor/em357.c index 4e2a169c6..705c1b339 100644 --- a/src/flash/nor/em357.c +++ b/src/flash/nor/em357.c @@ -382,8 +382,6 @@ static int em357_erase(struct flash_bank *bank, unsigned int first, retval = em357_wait_status_busy(bank, 100); if (retval != ERROR_OK) return retval; - - bank->sectors[i].is_erased = 1; } retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK); @@ -761,7 +759,7 @@ COMMAND_HANDLER(em357_handle_lock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; em357_info = bank->driver_priv; @@ -800,7 +798,7 @@ COMMAND_HANDLER(em357_handle_unlock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; target = bank->target; @@ -873,17 +871,13 @@ COMMAND_HANDLER(em357_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = em357_mass_erase(bank); - if (retval == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - + if (retval == ERROR_OK) command_print(CMD, "em357 mass erase complete"); - } else + else command_print(CMD, "em357 mass erase failed"); return retval; diff --git a/src/flash/nor/faux.c b/src/flash/nor/faux.c index ed278b424..7646e4b1d 100644 --- a/src/flash/nor/faux.c +++ b/src/flash/nor/faux.c @@ -30,7 +30,7 @@ struct faux_flash_bank { uint32_t start_address; }; -static const int sectorSize = 0x10000; +static const int sector_size = 0x10000; /* flash bank faux @@ -43,12 +43,12 @@ FLASH_BANK_COMMAND_HANDLER(faux_flash_bank_command) return ERROR_COMMAND_SYNTAX_ERROR; info = malloc(sizeof(struct faux_flash_bank)); - if (info == NULL) { + if (!info) { LOG_ERROR("no memory for flash bank info"); return ERROR_FAIL; } info->memory = malloc(bank->size); - if (info->memory == NULL) { + if (!info->memory) { free(info); LOG_ERROR("no memory for flash bank info"); return ERROR_FAIL; @@ -57,18 +57,18 @@ FLASH_BANK_COMMAND_HANDLER(faux_flash_bank_command) /* Use 0x10000 as a fixed sector size. */ uint32_t offset = 0; - bank->num_sectors = bank->size/sectorSize; + bank->num_sectors = bank->size/sector_size; bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; - bank->sectors[i].size = sectorSize; + bank->sectors[i].size = sector_size; offset += bank->sectors[i].size; bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = 0; } info->target = get_target(CMD_ARGV[5]); - if (info->target == NULL) { + if (!info->target) { LOG_ERROR("target '%s' not defined", CMD_ARGV[5]); free(info->memory); free(info); @@ -81,7 +81,7 @@ static int faux_erase(struct flash_bank *bank, unsigned int first, unsigned int last) { struct faux_flash_bank *info = bank->driver_priv; - memset(info->memory + first*sectorSize, 0xff, sectorSize*(last-first + 1)); + memset(info->memory + first*sector_size, 0xff, sector_size*(last-first + 1)); return ERROR_OK; } diff --git a/src/flash/nor/fespi.c b/src/flash/nor/fespi.c index 5cb5653a3..b2b3f97df 100644 --- a/src/flash/nor/fespi.c +++ b/src/flash/nor/fespi.c @@ -151,7 +151,7 @@ FLASH_BANK_COMMAND_HANDLER(fespi_flash_bank_command) return ERROR_COMMAND_SYNTAX_ERROR; fespi_info = malloc(sizeof(struct fespi_flash_bank)); - if (fespi_info == NULL) { + if (!fespi_info) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } @@ -812,7 +812,7 @@ static int fespi_probe(struct flash_bank *bank) /* create and fill sectors array */ bank->num_sectors = fespi_info->dev->size_in_bytes / sectorsize; sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - if (sectors == NULL) { + if (!sectors) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } diff --git a/src/flash/nor/fm3.c b/src/flash/nor/fm3.c index fef179706..831f34257 100644 --- a/src/flash/nor/fm3.c +++ b/src/flash/nor/fm3.c @@ -33,29 +33,29 @@ #define FLASH_DQ5 0x20 /* Time limit exceeding flag bit (TLOV) position */ enum fm3_variant { - mb9bfxx1, /* Flash Type '1' */ - mb9bfxx2, - mb9bfxx3, - mb9bfxx4, - mb9bfxx5, - mb9bfxx6, - mb9bfxx7, - mb9bfxx8, + MB9BFXX1, /* Flash Type '1' */ + MB9BFXX2, + MB9BFXX3, + MB9BFXX4, + MB9BFXX5, + MB9BFXX6, + MB9BFXX7, + MB9BFXX8, - mb9afxx1, /* Flash Type '2' */ - mb9afxx2, - mb9afxx3, - mb9afxx4, - mb9afxx5, - mb9afxx6, - mb9afxx7, - mb9afxx8, + MB9AFXX1, /* Flash Type '2' */ + MB9AFXX2, + MB9AFXX3, + MB9AFXX4, + MB9AFXX5, + MB9AFXX6, + MB9AFXX7, + MB9AFXX8, }; enum fm3_flash_type { - fm3_no_flash_type = 0, - fm3_flash_type1 = 1, - fm3_flash_type2 = 2 + FM3_NO_FLASH_TYPE = 0, + FM3_FLASH_TYPE1 = 1, + FM3_FLASH_TYPE2 = 2 }; struct fm3_flash_bank { @@ -76,53 +76,53 @@ FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command) /* Flash type '1' */ if (strcmp(CMD_ARGV[5], "mb9bfxx1.cpu") == 0) { - fm3_info->variant = mb9bfxx1; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX1; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx2.cpu") == 0) { - fm3_info->variant = mb9bfxx2; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX2; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx3.cpu") == 0) { - fm3_info->variant = mb9bfxx3; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX3; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx4.cpu") == 0) { - fm3_info->variant = mb9bfxx4; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX4; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx5.cpu") == 0) { - fm3_info->variant = mb9bfxx5; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX5; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx6.cpu") == 0) { - fm3_info->variant = mb9bfxx6; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX6; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx7.cpu") == 0) { - fm3_info->variant = mb9bfxx7; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX7; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx8.cpu") == 0) { - fm3_info->variant = mb9bfxx8; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX8; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9afxx1.cpu") == 0) { /* Flash type '2' */ - fm3_info->variant = mb9afxx1; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX1; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx2.cpu") == 0) { - fm3_info->variant = mb9afxx2; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX2; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx3.cpu") == 0) { - fm3_info->variant = mb9afxx3; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX3; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx4.cpu") == 0) { - fm3_info->variant = mb9afxx4; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX4; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx5.cpu") == 0) { - fm3_info->variant = mb9afxx5; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX5; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx6.cpu") == 0) { - fm3_info->variant = mb9afxx6; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX6; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx7.cpu") == 0) { - fm3_info->variant = mb9afxx7; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX7; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx8.cpu") == 0) { - fm3_info->variant = mb9afxx8; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX8; + fm3_info->flashtype = FM3_FLASH_TYPE2; } /* unknown Flash type */ @@ -207,24 +207,24 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first, struct fm3_flash_bank *fm3_info = bank->driver_priv; struct target *target = bank->target; int retval = ERROR_OK; - uint32_t u32DummyRead; + uint32_t u32_dummy_read; int odd; - uint32_t u32FlashType; - uint32_t u32FlashSeqAddress1; - uint32_t u32FlashSeqAddress2; + uint32_t u32_flash_type; + uint32_t u32_flash_seq_address1; + uint32_t u32_flash_seq_address2; struct working_area *write_algorithm; struct reg_param reg_params[3]; struct armv7m_algorithm armv7m_info; - u32FlashType = (uint32_t) fm3_info->flashtype; + u32_flash_type = (uint32_t) fm3_info->flashtype; - if (u32FlashType == fm3_flash_type1) { - u32FlashSeqAddress1 = 0x00001550; - u32FlashSeqAddress2 = 0x00000AA8; - } else if (u32FlashType == fm3_flash_type2) { - u32FlashSeqAddress1 = 0x00000AA8; - u32FlashSeqAddress2 = 0x00000554; + if (u32_flash_type == FM3_FLASH_TYPE1) { + u32_flash_seq_address1 = 0x00001550; + u32_flash_seq_address2 = 0x00000AA8; + } else if (u32_flash_type == FM3_FLASH_TYPE2) { + u32_flash_seq_address1 = 0x00000AA8; + u32_flash_seq_address2 = 0x00000554; } else { LOG_ERROR("Flash/Device type unknown!"); return ERROR_FLASH_OPERATION_FAILED; @@ -282,7 +282,7 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first, return retval; /* dummy read of FASZR */ - retval = target_read_u32(target, 0x40000000, &u32DummyRead); + retval = target_read_u32(target, 0x40000000, &u32_dummy_read); if (retval != ERROR_OK) return retval; @@ -300,8 +300,8 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first, armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARM_MODE_THREAD; - init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */ - init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */ + init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32_flash_seq_address1 */ + init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32_flash_seq_address2 */ init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* offset */ /* write code buffer and use Flash sector erase code within fm3 */ @@ -312,8 +312,8 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first, if (odd) offset += 4; - buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1); - buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2); + buf_set_u32(reg_params[0].value, 0, 32, u32_flash_seq_address1); + buf_set_u32(reg_params[1].value, 0, 32, u32_flash_seq_address2); buf_set_u32(reg_params[2].value, 0, 32, offset); retval = target_run_algorithm(target, 0, NULL, 3, reg_params, @@ -328,7 +328,6 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first, if (retval != ERROR_OK) return retval; } - bank->sectors[sector].is_erased = 1; } target_free_working_area(target, write_algorithm); @@ -341,7 +340,7 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first, if (retval != ERROR_OK) return retval; - retval = target_read_u32(target, 0x40000000, &u32DummyRead); /* dummy read of FASZR */ + retval = target_read_u32(target, 0x40000000, &u32_dummy_read); /* dummy read of FASZR */ return retval; } @@ -358,22 +357,22 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, struct reg_param reg_params[6]; struct armv7m_algorithm armv7m_info; int retval = ERROR_OK; - uint32_t u32FlashType; - uint32_t u32FlashSeqAddress1; - uint32_t u32FlashSeqAddress2; + uint32_t u32_flash_type; + uint32_t u32_flash_seq_address1; + uint32_t u32_flash_seq_address2; /* Increase buffer_size if needed */ if (buffer_size < (target->working_area_size / 2)) buffer_size = (target->working_area_size / 2); - u32FlashType = (uint32_t) fm3_info->flashtype; + u32_flash_type = (uint32_t) fm3_info->flashtype; - if (u32FlashType == fm3_flash_type1) { - u32FlashSeqAddress1 = 0x00001550; - u32FlashSeqAddress2 = 0x00000AA8; - } else if (u32FlashType == fm3_flash_type2) { - u32FlashSeqAddress1 = 0x00000AA8; - u32FlashSeqAddress2 = 0x00000554; + if (u32_flash_type == FM3_FLASH_TYPE1) { + u32_flash_seq_address1 = 0x00001550; + u32_flash_seq_address2 = 0x00000AA8; + } else if (u32_flash_type == FM3_FLASH_TYPE2) { + u32_flash_seq_address1 = 0x00000AA8; + u32_flash_seq_address2 = 0x00000554; } else { LOG_ERROR("Flash/Device type unknown!"); return ERROR_FLASH_OPERATION_FAILED; @@ -401,8 +400,8 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, 0x55, 0xF0, 0x01, 0x05, /* ORRS.W R5, R5, #1 */ 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */ 0x35, 0x60, /* STR R5, [R6] */ - /* u32DummyRead = fm3_FLASH_IF->FASZ; */ - 0x28, 0x4D, /* LDR.N R5, ??u32DummyRead */ + /* u32_dummy_read = fm3_FLASH_IF->FASZ; */ + 0x28, 0x4D, /* LDR.N R5, ??u32_dummy_read */ 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */ 0x36, 0x68, /* LDR R6, [R6] */ 0x2E, 0x60, /* STR R6, [R5] */ @@ -492,8 +491,8 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, 0x55, 0xF0, 0x02, 0x05, /* ORRS.W R5, R5, #2 */ 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */ 0x35, 0x60, /* STR R5, [R6] */ - /* u32DummyRead = fm3_FLASH_IF->FASZ; */ - 0x04, 0x4D, /* LDR.N R5, ??u32DummyRead */ + /* u32_dummy_read = fm3_FLASH_IF->FASZ; */ + 0x04, 0x4D, /* LDR.N R5, ??u32_dummy_read */ 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */ 0x36, 0x68, /* LDR R6, [R6] */ 0x2E, 0x60, /* STR R6, [R5] */ @@ -508,7 +507,7 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, /* SRAM basic-address + 8.These address pointers will be patched, if a */ /* different start address in RAM is used (e.g. for Flash type 2)! */ /* Default SRAM basic-address is 0x20000000. */ - 0x00, 0x00, 0x00, 0x20, /* u32DummyRead address in RAM (0x20000000) */ + 0x00, 0x00, 0x00, 0x20, /* u32_dummy_read address in RAM (0x20000000) */ 0x04, 0x00, 0x00, 0x20 /* u32FlashResult address in RAM (0x20000004) */ }; @@ -548,7 +547,7 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, return retval; /* Patching 'local variable address' */ - /* Algorithm: u32DummyRead: */ + /* Algorithm: u32_dummy_read: */ retval = target_write_u32(target, (write_algorithm->address + 8) + sizeof(fm3_flash_write_code) - 8, (write_algorithm->address)); if (retval != ERROR_OK) @@ -595,8 +594,8 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, address); buf_set_u32(reg_params[2].value, 0, 32, thisrun_count); - buf_set_u32(reg_params[3].value, 0, 32, u32FlashSeqAddress1); - buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2); + buf_set_u32(reg_params[3].value, 0, 32, u32_flash_seq_address1); + buf_set_u32(reg_params[4].value, 0, 32, u32_flash_seq_address2); retval = target_run_algorithm(target, 0, NULL, 6, reg_params, (write_algorithm->address + 8), 0, 1000, &armv7m_info); @@ -673,8 +672,8 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[1].is_erased = -1; bank->sectors[1].is_protected = -1; - if ((fm3_info->variant == mb9bfxx1) - || (fm3_info->variant == mb9afxx1)) { + if ((fm3_info->variant == MB9BFXX1) + || (fm3_info->variant == MB9AFXX1)) { num_pages = 3; bank->size = 64 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -685,18 +684,18 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[2].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx2) - || (fm3_info->variant == mb9bfxx4) - || (fm3_info->variant == mb9bfxx5) - || (fm3_info->variant == mb9bfxx6) - || (fm3_info->variant == mb9bfxx7) - || (fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx2) - || (fm3_info->variant == mb9afxx4) - || (fm3_info->variant == mb9afxx5) - || (fm3_info->variant == mb9afxx6) - || (fm3_info->variant == mb9afxx7) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX2) + || (fm3_info->variant == MB9BFXX4) + || (fm3_info->variant == MB9BFXX5) + || (fm3_info->variant == MB9BFXX6) + || (fm3_info->variant == MB9BFXX7) + || (fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX2) + || (fm3_info->variant == MB9AFXX4) + || (fm3_info->variant == MB9AFXX5) + || (fm3_info->variant == MB9AFXX6) + || (fm3_info->variant == MB9AFXX7) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 3; bank->size = 128 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -707,16 +706,16 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[2].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx4) - || (fm3_info->variant == mb9bfxx5) - || (fm3_info->variant == mb9bfxx6) - || (fm3_info->variant == mb9bfxx7) - || (fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx4) - || (fm3_info->variant == mb9afxx5) - || (fm3_info->variant == mb9afxx6) - || (fm3_info->variant == mb9afxx7) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX4) + || (fm3_info->variant == MB9BFXX5) + || (fm3_info->variant == MB9BFXX6) + || (fm3_info->variant == MB9BFXX7) + || (fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX4) + || (fm3_info->variant == MB9AFXX5) + || (fm3_info->variant == MB9AFXX6) + || (fm3_info->variant == MB9AFXX7) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 4; bank->size = 256 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -727,14 +726,14 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[3].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx5) - || (fm3_info->variant == mb9bfxx6) - || (fm3_info->variant == mb9bfxx7) - || (fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx5) - || (fm3_info->variant == mb9afxx6) - || (fm3_info->variant == mb9afxx7) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX5) + || (fm3_info->variant == MB9BFXX6) + || (fm3_info->variant == MB9BFXX7) + || (fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX5) + || (fm3_info->variant == MB9AFXX6) + || (fm3_info->variant == MB9AFXX7) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 5; bank->size = 384 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -745,12 +744,12 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[4].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx6) - || (fm3_info->variant == mb9bfxx7) - || (fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx6) - || (fm3_info->variant == mb9afxx7) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX6) + || (fm3_info->variant == MB9BFXX7) + || (fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX6) + || (fm3_info->variant == MB9AFXX7) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 6; bank->size = 512 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -761,10 +760,10 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[5].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx7) - || (fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx7) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX7) + || (fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX7) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 8; bank->size = 768 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -780,8 +779,8 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[7].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 10; bank->size = 1024 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -816,25 +815,25 @@ static int fm3_chip_erase(struct flash_bank *bank) struct target *target = bank->target; struct fm3_flash_bank *fm3_info2 = bank->driver_priv; int retval = ERROR_OK; - uint32_t u32DummyRead; - uint32_t u32FlashType; - uint32_t u32FlashSeqAddress1; - uint32_t u32FlashSeqAddress2; + uint32_t u32_dummy_read; + uint32_t u32_flash_type; + uint32_t u32_flash_seq_address1; + uint32_t u32_flash_seq_address2; struct working_area *write_algorithm; struct reg_param reg_params[3]; struct armv7m_algorithm armv7m_info; - u32FlashType = (uint32_t) fm3_info2->flashtype; + u32_flash_type = (uint32_t) fm3_info2->flashtype; - if (u32FlashType == fm3_flash_type1) { + if (u32_flash_type == FM3_FLASH_TYPE1) { LOG_INFO("*** Erasing mb9bfxxx type"); - u32FlashSeqAddress1 = 0x00001550; - u32FlashSeqAddress2 = 0x00000AA8; - } else if (u32FlashType == fm3_flash_type2) { + u32_flash_seq_address1 = 0x00001550; + u32_flash_seq_address2 = 0x00000AA8; + } else if (u32_flash_type == FM3_FLASH_TYPE2) { LOG_INFO("*** Erasing mb9afxxx type"); - u32FlashSeqAddress1 = 0x00000AA8; - u32FlashSeqAddress2 = 0x00000554; + u32_flash_seq_address1 = 0x00000AA8; + u32_flash_seq_address2 = 0x00000554; } else { LOG_ERROR("Flash/Device type unknown!"); return ERROR_FLASH_OPERATION_FAILED; @@ -891,7 +890,7 @@ static int fm3_chip_erase(struct flash_bank *bank) return retval; /* dummy read of FASZR */ - retval = target_read_u32(target, 0x40000000, &u32DummyRead); + retval = target_read_u32(target, 0x40000000, &u32_dummy_read); if (retval != ERROR_OK) return retval; @@ -909,11 +908,11 @@ static int fm3_chip_erase(struct flash_bank *bank) armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARM_MODE_THREAD; - init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */ - init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */ + init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32_flash_seq_address1 */ + init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32_flash_seq_address2 */ - buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1); - buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2); + buf_set_u32(reg_params[0].value, 0, 32, u32_flash_seq_address1); + buf_set_u32(reg_params[1].value, 0, 32, u32_flash_seq_address2); retval = target_run_algorithm(target, 0, NULL, 2, reg_params, write_algorithm->address, 0, 100000, &armv7m_info); @@ -928,7 +927,7 @@ static int fm3_chip_erase(struct flash_bank *bank) destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); - retval = fm3_busy_wait(target, u32FlashSeqAddress2, 20000); /* 20s timeout */ + retval = fm3_busy_wait(target, u32_flash_seq_address2, 20000); /* 20s timeout */ if (retval != ERROR_OK) return retval; @@ -937,7 +936,7 @@ static int fm3_chip_erase(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - retval = target_read_u32(target, 0x40000000, &u32DummyRead); /* dummy read of FASZR */ + retval = target_read_u32(target, 0x40000000, &u32_dummy_read); /* dummy read of FASZR */ return retval; } @@ -949,14 +948,10 @@ COMMAND_HANDLER(fm3_handle_chip_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (fm3_chip_erase(bank) == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - command_print(CMD, "fm3 chip erase complete"); } else { command_print(CMD, "fm3 chip erase failed"); diff --git a/src/flash/nor/fm4.c b/src/flash/nor/fm4.c index 2c51e007f..09865d2ab 100644 --- a/src/flash/nor/fm4.c +++ b/src/flash/nor/fm4.c @@ -28,17 +28,17 @@ #define WDG_LCK (WDG_BASE + 0xC00) enum fm4_variant { - mb9bfx64, - mb9bfx65, - mb9bfx66, - mb9bfx67, - mb9bfx68, + MB9BFX64, + MB9BFX65, + MB9BFX66, + MB9BFX67, + MB9BFX68, - s6e2cx8, - s6e2cx9, - s6e2cxa, + S6E2CX8, + S6E2CX9, + S6E2CXA, - s6e2dx, + S6E2DX, }; struct fm4_flash_bank { @@ -177,8 +177,6 @@ static int fm4_flash_erase(struct flash_bank *bank, unsigned int first, goto err_run_ret; } else retval = ERROR_OK; - - bank->sectors[sector].is_erased = 1; } err_run_ret: @@ -350,19 +348,19 @@ static int mb9bf_probe(struct flash_bank *bank) uint32_t flash_addr = bank->base; switch (fm4_bank->variant) { - case mb9bfx64: + case MB9BFX64: bank->num_sectors = 8; break; - case mb9bfx65: + case MB9BFX65: bank->num_sectors = 10; break; - case mb9bfx66: + case MB9BFX66: bank->num_sectors = 12; break; - case mb9bfx67: + case MB9BFX67: bank->num_sectors = 16; break; - case mb9bfx68: + case MB9BFX68: bank->num_sectors = 20; break; default: @@ -421,13 +419,13 @@ static int s6e2cc_probe(struct flash_bank *bank) } switch (fm4_bank->variant) { - case s6e2cx8: + case S6E2CX8: num_sectors = (fm4_bank->macro_nr == 0) ? 20 : 0; break; - case s6e2cx9: + case S6E2CX9: num_sectors = (fm4_bank->macro_nr == 0) ? 20 : 12; break; - case s6e2cxa: + case S6E2CXA: num_sectors = 20; break; default: @@ -503,19 +501,19 @@ static int fm4_probe(struct flash_bank *bank) } switch (fm4_bank->variant) { - case mb9bfx64: - case mb9bfx65: - case mb9bfx66: - case mb9bfx67: - case mb9bfx68: + case MB9BFX64: + case MB9BFX65: + case MB9BFX66: + case MB9BFX67: + case MB9BFX68: retval = mb9bf_probe(bank); break; - case s6e2cx8: - case s6e2cx9: - case s6e2cxa: + case S6E2CX8: + case S6E2CX9: + case S6E2CXA: retval = s6e2cc_probe(bank); break; - case s6e2dx: + case S6E2DX: retval = s6e2dh_probe(bank); break; default: @@ -550,31 +548,31 @@ static int fm4_get_info_command(struct flash_bank *bank, struct command_invocati } switch (fm4_bank->variant) { - case mb9bfx64: + case MB9BFX64: name = "MB9BFx64"; break; - case mb9bfx65: + case MB9BFX65: name = "MB9BFx65"; break; - case mb9bfx66: + case MB9BFX66: name = "MB9BFx66"; break; - case mb9bfx67: + case MB9BFX67: name = "MB9BFx67"; break; - case mb9bfx68: + case MB9BFX68: name = "MB9BFx68"; break; - case s6e2cx8: + case S6E2CX8: name = "S6E2Cx8"; break; - case s6e2cx9: + case S6E2CX9: name = "S6E2Cx9"; break; - case s6e2cxa: + case S6E2CXA: name = "S6E2CxA"; break; - case s6e2dx: + case S6E2DX: name = "S6E2Dx"; break; default: @@ -583,9 +581,9 @@ static int fm4_get_info_command(struct flash_bank *bank, struct command_invocati } switch (fm4_bank->variant) { - case s6e2cx8: - case s6e2cx9: - case s6e2cxa: + case S6E2CX8: + case S6E2CX9: + case S6E2CXA: command_print_sameline(cmd, "%s MainFlash Macro #%i", name, fm4_bank->macro_nr); break; default: @@ -617,15 +615,15 @@ static int mb9bf_bank_setup(struct flash_bank *bank, const char *variant) struct fm4_flash_bank *fm4_bank = bank->driver_priv; if (fm4_name_match(variant, "MB9BFx64")) { - fm4_bank->variant = mb9bfx64; + fm4_bank->variant = MB9BFX64; } else if (fm4_name_match(variant, "MB9BFx65")) { - fm4_bank->variant = mb9bfx65; + fm4_bank->variant = MB9BFX65; } else if (fm4_name_match(variant, "MB9BFx66")) { - fm4_bank->variant = mb9bfx66; + fm4_bank->variant = MB9BFX66; } else if (fm4_name_match(variant, "MB9BFx67")) { - fm4_bank->variant = mb9bfx67; + fm4_bank->variant = MB9BFX67; } else if (fm4_name_match(variant, "MB9BFx68")) { - fm4_bank->variant = mb9bfx68; + fm4_bank->variant = MB9BFX68; } else { LOG_WARNING("MB9BF variant %s not recognized.", variant); return ERROR_FLASH_OPER_UNSUPPORTED; @@ -639,11 +637,11 @@ static int s6e2cc_bank_setup(struct flash_bank *bank, const char *variant) struct fm4_flash_bank *fm4_bank = bank->driver_priv; if (fm4_name_match(variant, "S6E2Cx8")) { - fm4_bank->variant = s6e2cx8; + fm4_bank->variant = S6E2CX8; } else if (fm4_name_match(variant, "S6E2Cx9")) { - fm4_bank->variant = s6e2cx9; + fm4_bank->variant = S6E2CX9; } else if (fm4_name_match(variant, "S6E2CxA")) { - fm4_bank->variant = s6e2cxa; + fm4_bank->variant = S6E2CXA; } else { LOG_WARNING("S6E2CC variant %s not recognized.", variant); return ERROR_FLASH_OPER_UNSUPPORTED; @@ -677,7 +675,7 @@ FLASH_BANK_COMMAND_HANDLER(fm4_flash_bank_command) else if (fm4_name_match(variant, "S6E2Cx")) ret = s6e2cc_bank_setup(bank, variant); else if (fm4_name_match(variant, "S6E2Dx")) { - fm4_bank->variant = s6e2dx; + fm4_bank->variant = S6E2DX; ret = ERROR_OK; } else { LOG_WARNING("Family %s not recognized.", variant); diff --git a/src/flash/nor/jtagspi.c b/src/flash/nor/jtagspi.c index f40efe84f..dc49fda61 100644 --- a/src/flash/nor/jtagspi.c +++ b/src/flash/nor/jtagspi.c @@ -42,7 +42,7 @@ FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command) return ERROR_COMMAND_SYNTAX_ERROR; info = malloc(sizeof(struct jtagspi_flash_bank)); - if (info == NULL) { + if (!info) { LOG_ERROR("no memory for flash bank info"); return ERROR_FAIL; } @@ -129,7 +129,7 @@ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd, lenb = DIV_ROUND_UP(len, 8); data_buf = malloc(lenb); if (lenb > 0) { - if (data_buf == NULL) { + if (!data_buf) { LOG_ERROR("no memory for spi buffer"); return ERROR_FAIL; } @@ -172,7 +172,7 @@ static int jtagspi_probe(struct flash_bank *bank) free(bank->sectors); info->probed = false; - if (bank->target->tap == NULL) { + if (!bank->target->tap) { LOG_ERROR("Target has no JTAG tap"); return ERROR_FAIL; } @@ -211,7 +211,7 @@ static int jtagspi_probe(struct flash_bank *bank) /* create and fill sectors array */ bank->num_sectors = info->dev->size_in_bytes / sectorsize; sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - if (sectors == NULL) { + if (!sectors) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index 45046d607..3aa4c6bb5 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -91,11 +91,11 @@ #define MSCM_OCMDR0 0x40001400 #define FMC_PFB01CR 0x4001f004 -#define FTFx_FSTAT 0x40020000 -#define FTFx_FCNFG 0x40020001 -#define FTFx_FCCOB3 0x40020004 -#define FTFx_FPROT3 0x40020010 -#define FTFx_FDPROT 0x40020017 +#define FTFX_FSTAT 0x40020000 +#define FTFX_FCNFG 0x40020001 +#define FTFX_FCCOB3 0x40020004 +#define FTFX_FPROT3 0x40020010 +#define FTFX_FDPROT 0x40020017 #define SIM_BASE 0x40047000 #define SIM_BASE_KL28 0x40074000 #define SIM_COPC 0x40048100 @@ -124,14 +124,14 @@ #define PM_CTRL_RUNM_RUN 0x00 /* Commands */ -#define FTFx_CMD_BLOCKSTAT 0x00 -#define FTFx_CMD_SECTSTAT 0x01 -#define FTFx_CMD_LWORDPROG 0x06 -#define FTFx_CMD_SECTERASE 0x09 -#define FTFx_CMD_SECTWRITE 0x0b -#define FTFx_CMD_MASSERASE 0x44 -#define FTFx_CMD_PGMPART 0x80 -#define FTFx_CMD_SETFLEXRAM 0x81 +#define FTFX_CMD_BLOCKSTAT 0x00 +#define FTFX_CMD_SECTSTAT 0x01 +#define FTFX_CMD_LWORDPROG 0x06 +#define FTFX_CMD_SECTERASE 0x09 +#define FTFX_CMD_SECTWRITE 0x0b +#define FTFX_CMD_MASSERASE 0x44 +#define FTFX_CMD_PGMPART 0x80 +#define FTFX_CMD_SETFLEXRAM 0x81 /* The older Kinetis K series uses the following SDID layout : * Bit 31-16 : 0 @@ -232,8 +232,8 @@ /* The field originally named DIEID has new name/meaning on KE1x */ #define KINETIS_SDID_PROJECTID_MASK KINETIS_SDID_DIEID_MASK -#define KINETIS_SDID_PROJECTID_KE1xF 0x00000080 -#define KINETIS_SDID_PROJECTID_KE1xZ 0x00000100 +#define KINETIS_SDID_PROJECTID_KE1XF 0x00000080 +#define KINETIS_SDID_PROJECTID_KE1XZ 0x00000100 struct kinetis_flash_bank { struct kinetis_chip *k_chip; @@ -882,9 +882,9 @@ FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command) k_chip = kinetis_get_chip(target); - if (k_chip == NULL) { + if (!k_chip) { k_chip = calloc(sizeof(struct kinetis_chip), 1); - if (k_chip == NULL) { + if (!k_chip) { LOG_ERROR("No memory"); return ERROR_FAIL; } @@ -915,11 +915,11 @@ FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command) static void kinetis_free_driver_priv(struct flash_bank *bank) { struct kinetis_flash_bank *k_bank = bank->driver_priv; - if (k_bank == NULL) + if (!k_bank) return; struct kinetis_chip *k_chip = k_bank->k_chip; - if (k_chip == NULL) + if (!k_chip) return; k_chip->num_banks--; @@ -985,7 +985,7 @@ static int kinetis_create_missing_banks(struct kinetis_chip *k_chip) } bank = calloc(sizeof(struct flash_bank), 1); - if (bank == NULL) + if (!bank) return ERROR_FAIL; bank->target = k_chip->target; @@ -1174,7 +1174,7 @@ COMMAND_HANDLER(kinetis_disable_wdog_handler) struct target *target = get_current_target(CMD_CTX); struct kinetis_chip *k_chip = kinetis_get_chip(target); - if (k_chip == NULL) + if (!k_chip) return ERROR_FAIL; if (CMD_ARGC > 0) @@ -1209,7 +1209,7 @@ static int kinetis_ftfx_decode_error(uint8_t fstat) static int kinetis_ftfx_clear_error(struct target *target) { /* reset error flags */ - return target_write_u8(target, FTFx_FSTAT, 0x70); + return target_write_u8(target, FTFX_FSTAT, 0x70); } @@ -1220,7 +1220,7 @@ static int kinetis_ftfx_prepare(struct target *target) /* wait until busy */ for (unsigned int i = 0; i < 50; i++) { - result = target_read_u8(target, FTFx_FSTAT, &fstat); + result = target_read_u8(target, FTFX_FSTAT, &fstat); if (result != ERROR_OK) return result; @@ -1300,7 +1300,7 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, buf_set_u32(reg_params[1].value, 0, 32, wcount); buf_set_u32(reg_params[2].value, 0, 32, source->address); buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size); - buf_set_u32(reg_params[4].value, 0, 32, FTFx_FSTAT); + buf_set_u32(reg_params[4].value, 0, 32, FTFX_FSTAT); retval = target_run_flash_async_algorithm(target, buffer, wcount, 4, 0, NULL, @@ -1314,12 +1314,12 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, LOG_ERROR("Error writing flash at %08" PRIx32, end_address); - retval = target_read_u8(target, FTFx_FSTAT, &fstat); + retval = target_read_u8(target, FTFX_FSTAT, &fstat); if (retval == ERROR_OK) { retval = kinetis_ftfx_decode_error(fstat); /* reset error flags */ - target_write_u8(target, FTFx_FSTAT, 0x70); + target_write_u8(target, FTFX_FSTAT, 0x70); } } else if (retval != ERROR_OK) LOG_ERROR("Error executing kinetis Flash programming algorithm"); @@ -1369,7 +1369,7 @@ static int kinetis_protect_check(struct flash_bank *bank) if (k_bank->flash_class == FC_PFLASH) { /* read protection register */ - result = target_read_u32(bank->target, FTFx_FPROT3, &fprot); + result = target_read_u32(bank->target, FTFX_FPROT3, &fprot); if (result != ERROR_OK) return result; @@ -1379,7 +1379,7 @@ static int kinetis_protect_check(struct flash_bank *bank) uint8_t fdprot; /* read protection register */ - result = target_read_u8(bank->target, FTFx_FDPROT, &fdprot); + result = target_read_u8(bank->target, FTFX_FDPROT, &fdprot); if (result != ERROR_OK) return result; @@ -1428,7 +1428,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf) k_bank = &(k_chip->banks[bank_idx]); bank_iter = k_bank->bank; - if (bank_iter == NULL) { + if (!bank_iter) { LOG_WARNING("Missing bank %u configuration, FCF protection flags may be incomplete", bank_idx); continue; } @@ -1475,18 +1475,18 @@ static int kinetis_ftfx_command(struct target *target, uint8_t fcmd, uint32_t fa uint8_t fstat; int64_t ms_timeout = timeval_ms() + 250; - result = target_write_memory(target, FTFx_FCCOB3, 4, 3, command); + result = target_write_memory(target, FTFX_FCCOB3, 4, 3, command); if (result != ERROR_OK) return result; /* start command */ - result = target_write_u8(target, FTFx_FSTAT, 0x80); + result = target_write_u8(target, FTFX_FSTAT, 0x80); if (result != ERROR_OK) return result; /* wait for done */ do { - result = target_read_u8(target, FTFx_FSTAT, &fstat); + result = target_read_u8(target, FTFX_FSTAT, &fstat); if (result != ERROR_OK) return result; @@ -1538,7 +1538,7 @@ static int kinetis_check_run_mode(struct kinetis_chip *k_chip) uint8_t pmstat; struct target *target; - if (k_chip == NULL) { + if (!k_chip) { LOG_ERROR("Chip not probed."); return ERROR_FAIL; } @@ -1641,7 +1641,7 @@ static int kinetis_erase(struct flash_bank *bank, unsigned int first, */ for (unsigned int i = first; i <= last; i++) { /* set command and sector address */ - result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTERASE, k_bank->prog_base + bank->sectors[i].offset, + result = kinetis_ftfx_command(bank->target, FTFX_CMD_SECTERASE, k_bank->prog_base + bank->sectors[i].offset, 0, 0, 0, 0, 0, 0, 0, 0, NULL); if (result != ERROR_OK) { @@ -1679,7 +1679,7 @@ static int kinetis_make_ram_ready(struct target *target) uint8_t ftfx_fcnfg; /* check if ram ready */ - result = target_read_u8(target, FTFx_FCNFG, &ftfx_fcnfg); + result = target_read_u8(target, FTFX_FCNFG, &ftfx_fcnfg); if (result != ERROR_OK) return result; @@ -1687,13 +1687,13 @@ static int kinetis_make_ram_ready(struct target *target) return ERROR_OK; /* ram ready */ /* make flex ram available */ - result = kinetis_ftfx_command(target, FTFx_CMD_SETFLEXRAM, 0x00ff0000, + result = kinetis_ftfx_command(target, FTFX_CMD_SETFLEXRAM, 0x00ff0000, 0, 0, 0, 0, 0, 0, 0, 0, NULL); if (result != ERROR_OK) return ERROR_FLASH_OPERATION_FAILED; /* check again */ - result = target_read_u8(target, FTFx_FCNFG, &ftfx_fcnfg); + result = target_read_u8(target, FTFX_FCNFG, &ftfx_fcnfg); if (result != ERROR_OK) return result; @@ -1766,7 +1766,7 @@ static int kinetis_write_sections(struct flash_bank *bank, const uint8_t *buffer } /* execute section-write command */ - result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTWRITE, + result = kinetis_ftfx_command(bank->target, FTFX_CMD_SECTWRITE, k_bank->prog_base + offset - align_begin, chunk_count>>8, chunk_count, 0, 0, 0, 0, 0, 0, &ftfx_fstat); @@ -1840,7 +1840,7 @@ static int kinetis_write_inner(struct flash_bank *bank, const uint8_t *buffer, uint32_t old_count = count; count = (old_count | 3) + 1; new_buffer = malloc(count); - if (new_buffer == NULL) { + if (!new_buffer) { LOG_ERROR("odd number of bytes to write and no memory " "for padding buffer"); return ERROR_FAIL; @@ -1869,7 +1869,7 @@ static int kinetis_write_inner(struct flash_bank *bank, const uint8_t *buffer, LOG_DEBUG("write longword @ %08" PRIx32, (uint32_t)(bank->base + offset)); - result = kinetis_ftfx_command(bank->target, FTFx_CMD_LWORDPROG, k_bank->prog_base + offset, + result = kinetis_ftfx_command(bank->target, FTFX_CMD_LWORDPROG, k_bank->prog_base + offset, buffer[3], buffer[2], buffer[1], buffer[0], 0, 0, 0, 0, &ftfx_fstat); @@ -2405,8 +2405,8 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip) k_chip->watchdog_type = KINETIS_WDOG32_KE1X; switch (k_chip->sim_sdid & (KINETIS_SDID_FAMILYID_MASK | KINETIS_SDID_SUBFAMID_MASK | KINETIS_SDID_PROJECTID_MASK)) { - case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX4 | KINETIS_SDID_PROJECTID_KE1xZ: - case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX5 | KINETIS_SDID_PROJECTID_KE1xZ: + case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX4 | KINETIS_SDID_PROJECTID_KE1XZ: + case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX5 | KINETIS_SDID_PROJECTID_KE1XZ: /* KE1xZ: FTFE, 2kB sectors */ k_chip->pflash_sector_size = 2<<10; k_chip->nvm_sector_size = 2<<10; @@ -2420,9 +2420,9 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip) familyid, subfamid, cpu_mhz / 10); break; - case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX4 | KINETIS_SDID_PROJECTID_KE1xF: - case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX6 | KINETIS_SDID_PROJECTID_KE1xF: - case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX8 | KINETIS_SDID_PROJECTID_KE1xF: + case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX4 | KINETIS_SDID_PROJECTID_KE1XF: + case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX6 | KINETIS_SDID_PROJECTID_KE1XF: + case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX8 | KINETIS_SDID_PROJECTID_KE1XF: /* KE1xF: FTFE, 4kB sectors */ k_chip->pflash_sector_size = 4<<10; k_chip->nvm_sector_size = 2<<10; @@ -2827,7 +2827,7 @@ static int kinetis_blank_check(struct flash_bank *bank) if (use_block_cmd) { /* check if whole bank is blank */ - result = kinetis_ftfx_command(bank->target, FTFx_CMD_BLOCKSTAT, k_bank->prog_base, + result = kinetis_ftfx_command(bank->target, FTFX_CMD_BLOCKSTAT, k_bank->prog_base, 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat); if (result != ERROR_OK) @@ -2840,7 +2840,7 @@ static int kinetis_blank_check(struct flash_bank *bank) /* the whole bank is not erased, check sector-by-sector */ for (unsigned int i = 0; i < bank->num_sectors; i++) { /* normal margin */ - result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTSTAT, + result = kinetis_ftfx_command(bank->target, FTFX_CMD_SECTSTAT, k_bank->prog_base + bank->sectors[i].offset, 1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat); @@ -2890,13 +2890,13 @@ COMMAND_HANDLER(kinetis_nvm_partition) else if (strcmp(CMD_ARGV[0], "eebkp") == 0) sz_type = EEBKP_SIZE; - par = strtoul(CMD_ARGV[1], NULL, 10); + COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], par); while (par >> (log2 + 3)) log2++; } switch (sz_type) { case SHOW_INFO: - if (k_chip == NULL) { + if (!k_chip) { LOG_ERROR("Chip not probed."); return ERROR_FAIL; } @@ -2945,11 +2945,13 @@ COMMAND_HANDLER(kinetis_nvm_partition) break; } - if (CMD_ARGC == 3) - ee1 = ee2 = strtoul(CMD_ARGV[2], NULL, 10) / 2; - else if (CMD_ARGC >= 4) { - ee1 = strtoul(CMD_ARGV[2], NULL, 10); - ee2 = strtoul(CMD_ARGV[3], NULL, 10); + if (CMD_ARGC == 3) { + unsigned long eex; + COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], eex); + ee1 = ee2 = eex / 2; + } else if (CMD_ARGC >= 4) { + COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], ee1); + COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[3], ee2); } enable = ee1 + ee2 > 0; @@ -2992,7 +2994,7 @@ COMMAND_HANDLER(kinetis_nvm_partition) if (result != ERROR_OK) return result; - result = kinetis_ftfx_command(target, FTFx_CMD_PGMPART, load_flex_ram, + result = kinetis_ftfx_command(target, FTFX_CMD_PGMPART, load_flex_ram, ee_size_code, flex_nvm_partition_code, 0, 0, 0, 0, 0, 0, NULL); if (result != ERROR_OK) @@ -3044,7 +3046,7 @@ COMMAND_HANDLER(kinetis_fopt_handler) return ERROR_COMMAND_SYNTAX_ERROR; if (CMD_ARGC == 1) { - fcf_fopt = (uint8_t)strtoul(CMD_ARGV[0], NULL, 0); + COMMAND_PARSE_NUMBER(u8, CMD_ARGV[0], fcf_fopt); } else { command_print(CMD, "FCF_FOPT 0x%02" PRIx8, fcf_fopt); } diff --git a/src/flash/nor/kinetis_ke.c b/src/flash/nor/kinetis_ke.c index 0d094b5f9..513b072dd 100644 --- a/src/flash/nor/kinetis_ke.c +++ b/src/flash/nor/kinetis_ke.c @@ -945,7 +945,7 @@ COMMAND_HANDLER(kinetis_ke_securing_test) if (result != ERROR_OK) return result; - assert(bank != NULL); + assert(bank); if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -1000,8 +1000,6 @@ static int kinetis_ke_erase(struct flash_bank *bank, unsigned int first, return ERROR_FLASH_OPERATION_FAILED; } - bank->sectors[i].is_erased = 1; - if (i == 2) fcf_erased = true; } @@ -1046,7 +1044,7 @@ static int kinetis_ke_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t old_count = count; count = (old_count | 3) + 1; new_buffer = malloc(count); - if (new_buffer == NULL) { + if (!new_buffer) { LOG_ERROR("odd number of bytes to write and no memory " "for padding buffer"); return ERROR_FAIL; diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c index 09b5c6aec..465199d79 100644 --- a/src/flash/nor/lpc2000.c +++ b/src/flash/nor/lpc2000.c @@ -281,18 +281,18 @@ #define IAP_CODE_LEN 0x34 -#define LPC11xx_REG_SECTORS 24 +#define LPC11XX_REG_SECTORS 24 typedef enum { - lpc2000_v1, - lpc2000_v2, - lpc1700, - lpc4300, - lpc800, - lpc1100, - lpc1500, - lpc54100, - lpc_auto, + LPC2000_V1, + LPC2000_V2, + LPC1700, + LPC4300, + LPC800, + LPC1100, + LPC1500, + LPC54100, + LPC_AUTO, } lpc2000_variant; struct lpc2000_flash_bank { @@ -342,7 +342,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) /* default to a 4096 write buffer */ lpc2000_info->cmd51_max_buffer = 4096; - if (lpc2000_info->variant == lpc2000_v1) { + if (lpc2000_info->variant == LPC2000_V1) { lpc2000_info->cmd51_dst_boundary = 512; lpc2000_info->checksum_vector = 5; lpc2000_info->iap_max_stack = 128; @@ -387,7 +387,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); } - } else if (lpc2000_info->variant == lpc2000_v2) { + } else if (lpc2000_info->variant == LPC2000_V2) { lpc2000_info->cmd51_dst_boundary = 256; lpc2000_info->checksum_vector = 5; lpc2000_info->iap_max_stack = 128; @@ -453,7 +453,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors[i].is_protected = 1; } } - } else if (lpc2000_info->variant == lpc1700) { + } else if (lpc2000_info->variant == LPC1700) { lpc2000_info->cmd51_dst_boundary = 256; lpc2000_info->checksum_vector = 7; lpc2000_info->iap_max_stack = 128; @@ -502,7 +502,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = 1; } - } else if (lpc2000_info->variant == lpc4300) { + } else if (lpc2000_info->variant == LPC4300) { lpc2000_info->cmd51_dst_boundary = 512; lpc2000_info->checksum_vector = 7; lpc2000_info->iap_max_stack = 208; @@ -533,7 +533,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors[i].is_protected = 1; } - } else if (lpc2000_info->variant == lpc800) { + } else if (lpc2000_info->variant == LPC800) { lpc2000_info->cmd51_dst_boundary = 64; lpc2000_info->checksum_vector = 7; lpc2000_info->iap_max_stack = 208; /* 148byte for LPC81x,208byte for LPC82x. */ @@ -577,7 +577,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors[i].is_protected = 1; } - } else if (lpc2000_info->variant == lpc1100) { + } else if (lpc2000_info->variant == LPC1100) { lpc2000_info->cmd51_dst_boundary = 256; lpc2000_info->checksum_vector = 7; lpc2000_info->iap_max_stack = 128; @@ -590,9 +590,9 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) unsigned int large_sectors = 0; unsigned int normal_sectors = bank->size / 4096; - if (normal_sectors > LPC11xx_REG_SECTORS) { - large_sectors = (normal_sectors - LPC11xx_REG_SECTORS) / 8; - normal_sectors = LPC11xx_REG_SECTORS; + if (normal_sectors > LPC11XX_REG_SECTORS) { + large_sectors = (normal_sectors - LPC11XX_REG_SECTORS) / 8; + normal_sectors = LPC11XX_REG_SECTORS; } bank->num_sectors = normal_sectors + large_sectors; @@ -601,13 +601,13 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) for (unsigned int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = offset; - bank->sectors[i].size = (i < LPC11xx_REG_SECTORS ? 4 : 32) * 1024; + bank->sectors[i].size = (i < LPC11XX_REG_SECTORS ? 4 : 32) * 1024; offset += bank->sectors[i].size; bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = 1; } - } else if (lpc2000_info->variant == lpc1500) { + } else if (lpc2000_info->variant == LPC1500) { lpc2000_info->cmd51_dst_boundary = 256; lpc2000_info->checksum_vector = 7; lpc2000_info->iap_max_stack = 128; @@ -638,7 +638,7 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) bank->sectors[i].is_protected = 1; } - } else if (lpc2000_info->variant == lpc54100) { + } else if (lpc2000_info->variant == LPC54100) { lpc2000_info->cmd51_dst_boundary = 256; lpc2000_info->checksum_vector = 7; lpc2000_info->iap_max_stack = 128; @@ -697,18 +697,18 @@ static int lpc2000_iap_working_area_init(struct flash_bank *bank, struct working /* write IAP code to working area */ switch (lpc2000_info->variant) { - case lpc800: - case lpc1100: - case lpc1500: - case lpc1700: - case lpc4300: - case lpc54100: - case lpc_auto: + case LPC800: + case LPC1100: + case LPC1500: + case LPC1700: + case LPC4300: + case LPC54100: + case LPC_AUTO: target_buffer_set_u32(target, jump_gate, ARMV4_5_T_BX(12)); target_buffer_set_u32(target, jump_gate + 4, ARMV5_T_BKPT(0)); break; - case lpc2000_v1: - case lpc2000_v2: + case LPC2000_V1: + case LPC2000_V2: target_buffer_set_u32(target, jump_gate, ARMV4_5_BX(12)); target_buffer_set_u32(target, jump_gate + 4, ARMV4_5_B(0xfffffe, 0)); break; @@ -740,28 +740,28 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo uint32_t iap_entry_point = 0; /* to make compiler happier */ switch (lpc2000_info->variant) { - case lpc800: - case lpc1100: - case lpc1700: - case lpc_auto: + case LPC800: + case LPC1100: + case LPC1700: + case LPC_AUTO: armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARM_MODE_THREAD; iap_entry_point = 0x1fff1ff1; break; - case lpc1500: - case lpc54100: + case LPC1500: + case LPC54100: armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARM_MODE_THREAD; iap_entry_point = 0x03000205; break; - case lpc2000_v1: - case lpc2000_v2: + case LPC2000_V1: + case LPC2000_V2: arm_algo.common_magic = ARM_COMMON_MAGIC; arm_algo.core_mode = ARM_MODE_SVC; arm_algo.core_state = ARM_STATE_ARM; iap_entry_point = 0x7ffffff1; break; - case lpc4300: + case LPC4300: armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARM_MODE_THREAD; /* read out IAP entry point from ROM driver table at 0x10400100 */ @@ -802,13 +802,13 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo buf_set_u32(reg_params[2].value, 0, 32, iap_entry_point); switch (lpc2000_info->variant) { - case lpc800: - case lpc1100: - case lpc1500: - case lpc1700: - case lpc4300: - case lpc54100: - case lpc_auto: + case LPC800: + case LPC1100: + case LPC1500: + case LPC1700: + case LPC4300: + case LPC54100: + case LPC_AUTO: /* IAP stack */ init_reg_param(®_params[3], "sp", 32, PARAM_OUT); buf_set_u32(reg_params[3].value, 0, 32, @@ -822,8 +822,8 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo target_run_algorithm(target, 2, mem_params, 5, reg_params, iap_working_area->address, 0, 10000, &armv7m_info); break; - case lpc2000_v1: - case lpc2000_v2: + case LPC2000_V1: + case LPC2000_V2: /* IAP stack */ init_reg_param(®_params[3], "sp_svc", 32, PARAM_OUT); buf_set_u32(reg_params[3].value, 0, 32, @@ -879,7 +879,7 @@ static int lpc2000_iap_blank_check(struct flash_bank *bank, unsigned int first, return retval; struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv; - if (lpc2000_info->variant == lpc4300) + if (lpc2000_info->variant == LPC4300) param_table[2] = lpc2000_info->lpc4300_bank; for (unsigned int i = first; i <= last && retval == ERROR_OK; i++) { @@ -929,23 +929,23 @@ FLASH_BANK_COMMAND_HANDLER(lpc2000_flash_bank_command) bank->driver_priv = lpc2000_info; if (strcmp(CMD_ARGV[6], "lpc2000_v1") == 0) { - lpc2000_info->variant = lpc2000_v1; + lpc2000_info->variant = LPC2000_V1; } else if (strcmp(CMD_ARGV[6], "lpc2000_v2") == 0) { - lpc2000_info->variant = lpc2000_v2; + lpc2000_info->variant = LPC2000_V2; } else if (strcmp(CMD_ARGV[6], "lpc1700") == 0 || strcmp(CMD_ARGV[6], "lpc4000") == 0) { - lpc2000_info->variant = lpc1700; + lpc2000_info->variant = LPC1700; } else if (strcmp(CMD_ARGV[6], "lpc1800") == 0 || strcmp(CMD_ARGV[6], "lpc4300") == 0) { - lpc2000_info->variant = lpc4300; + lpc2000_info->variant = LPC4300; } else if (strcmp(CMD_ARGV[6], "lpc800") == 0) { - lpc2000_info->variant = lpc800; + lpc2000_info->variant = LPC800; } else if (strcmp(CMD_ARGV[6], "lpc1100") == 0) { - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; } else if (strcmp(CMD_ARGV[6], "lpc1500") == 0) { - lpc2000_info->variant = lpc1500; + lpc2000_info->variant = LPC1500; } else if (strcmp(CMD_ARGV[6], "lpc54100") == 0) { - lpc2000_info->variant = lpc54100; + lpc2000_info->variant = LPC54100; } else if (strcmp(CMD_ARGV[6], "auto") == 0) { - lpc2000_info->variant = lpc_auto; + lpc2000_info->variant = LPC_AUTO; } else { LOG_ERROR("unknown LPC2000 variant: %s", CMD_ARGV[6]); free(lpc2000_info); @@ -993,7 +993,7 @@ static int lpc2000_erase(struct flash_bank *bank, unsigned int first, param_table[0] = first; param_table[1] = last; - if (lpc2000_info->variant == lpc4300) + if (lpc2000_info->variant == LPC4300) param_table[2] = lpc2000_info->lpc4300_bank; else param_table[2] = lpc2000_info->cclk; @@ -1006,7 +1006,7 @@ static int lpc2000_erase(struct flash_bank *bank, unsigned int first, if (retval != ERROR_OK) return retval; - if (lpc2000_info->variant == lpc4300) + if (lpc2000_info->variant == LPC4300) /* Init IAP Anyway */ lpc2000_iap_call(bank, iap_working_area, 49, param_table, result_table); @@ -1030,7 +1030,7 @@ static int lpc2000_erase(struct flash_bank *bank, unsigned int first, if (retval == ERROR_OK) { /* Erase sectors */ param_table[2] = lpc2000_info->cclk; - if (lpc2000_info->variant == lpc4300) + if (lpc2000_info->variant == LPC4300) param_table[3] = lpc2000_info->lpc4300_bank; status_code = lpc2000_iap_call(bank, iap_working_area, 52, param_table, result_table); @@ -1134,7 +1134,7 @@ static int lpc2000_write(struct flash_bank *bank, const uint8_t *buffer, uint32_ uint32_t param_table[5] = {0}; uint32_t result_table[4]; - if (lpc2000_info->variant == lpc4300) + if (lpc2000_info->variant == LPC4300) /* Init IAP Anyway */ lpc2000_iap_call(bank, iap_working_area, 49, param_table, result_table); @@ -1149,7 +1149,7 @@ static int lpc2000_write(struct flash_bank *bank, const uint8_t *buffer, uint32_ param_table[0] = first_sector; param_table[1] = last_sector; - if (lpc2000_info->variant == lpc4300) + if (lpc2000_info->variant == LPC4300) param_table[2] = lpc2000_info->lpc4300_bank; else param_table[2] = lpc2000_info->cclk; @@ -1280,7 +1280,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) switch (part_id) { case LPC1110_1: case LPC1110_2: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 4 * 1024; break; @@ -1296,7 +1296,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC11E11_101: case LPC1311: case LPC1311_1: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 8 * 1024; break; @@ -1316,7 +1316,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC11U12_201_1: case LPC11U12_201_2: case LPC1342: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 16 * 1024; break; @@ -1331,7 +1331,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC11U13_201_1: case LPC11U13_201_2: case LPC11U23_301: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 24 * 1024; break; @@ -1359,18 +1359,18 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC1343: case LPC1343_1: case LPC1345: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 32 * 1024; break; case LPC1751_1: case LPC1751_2: - lpc2000_info->variant = lpc1700; + lpc2000_info->variant = LPC1700; bank->size = 32 * 1024; break; case LPC11U34_311: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 40 * 1024; break; @@ -1378,12 +1378,12 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC11U34_421: case LPC1316: case LPC1346: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 48 * 1024; break; case LPC1114_333_1: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 56 * 1024; break; @@ -1394,19 +1394,19 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC11U66: case LPC1317: case LPC1347: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 64 * 1024; break; case LPC1752: case LPC4072: - lpc2000_info->variant = lpc1700; + lpc2000_info->variant = LPC1700; bank->size = 64 * 1024; break; case LPC11E36_501: case LPC11U36_401: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 96 * 1024; break; @@ -1419,7 +1419,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC11E68: case LPC11U67_1: case LPC11U67_2: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 128 * 1024; break; @@ -1427,13 +1427,13 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC1764: case LPC1774: case LPC4074: - lpc2000_info->variant = lpc1700; + lpc2000_info->variant = LPC1700; bank->size = 128 * 1024; break; case LPC11U68_1: case LPC11U68_2: - lpc2000_info->variant = lpc1100; + lpc2000_info->variant = LPC1100; bank->size = 256 * 1024; break; @@ -1445,7 +1445,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC1785: case LPC1786: case LPC4076: - lpc2000_info->variant = lpc1700; + lpc2000_info->variant = LPC1700; bank->size = 256 * 1024; break; @@ -1460,17 +1460,17 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC1788: case LPC4078: case LPC4088: - lpc2000_info->variant = lpc1700; + lpc2000_info->variant = LPC1700; bank->size = 512 * 1024; break; case LPC810_021: - lpc2000_info->variant = lpc800; + lpc2000_info->variant = LPC800; bank->size = 4 * 1024; break; case LPC811_001: - lpc2000_info->variant = lpc800; + lpc2000_info->variant = LPC800; bank->size = 8 * 1024; break; @@ -1480,13 +1480,13 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC812_101_3: case LPC822_101: case LPC822_101_1: - lpc2000_info->variant = lpc800; + lpc2000_info->variant = LPC800; bank->size = 16 * 1024; break; case LPC824_201: case LPC824_201_1: - lpc2000_info->variant = lpc800; + lpc2000_info->variant = LPC800; bank->size = 32 * 1024; break; @@ -1494,7 +1494,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case NHS3100: case NHS3152: case NHS3153: - lpc2000_info->variant = lpc800; + lpc2000_info->variant = LPC800; bank->size = 30 * 1024; break; @@ -1505,7 +1505,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) case LPC845_301_1: case LPC845_301_2: case LPC845_301_3: - lpc2000_info->variant = lpc800; + lpc2000_info->variant = LPC800; bank->size = 64 * 1024; break; @@ -1524,11 +1524,11 @@ static int lpc2000_probe(struct flash_bank *bank) struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv; if (!lpc2000_info->probed) { - if (lpc2000_info->variant == lpc_auto) { + if (lpc2000_info->variant == LPC_AUTO) { status = lpc2000_auto_probe_flash(bank); if (status != ERROR_OK) return status; - } else if (lpc2000_info->variant == lpc1100 || lpc2000_info->variant == lpc1700) { + } else if (lpc2000_info->variant == LPC1100 || lpc2000_info->variant == LPC1700) { status = get_lpc2000_part_id(bank, &part_id); if (status == LPC2000_CMD_SUCCESS) LOG_INFO("If auto-detection fails for this part, please email " @@ -1569,7 +1569,7 @@ COMMAND_HANDLER(lpc2000_handle_part_id_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (bank->target->state != TARGET_HALTED) { diff --git a/src/flash/nor/lpc2900.c b/src/flash/nor/lpc2900.c index 4d3d7f758..4bf52974b 100644 --- a/src/flash/nor/lpc2900.c +++ b/src/flash/nor/lpc2900.c @@ -487,7 +487,7 @@ COMMAND_HANDLER(lpc2900_handle_signature_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (bank->target->state != TARGET_HALTED) { @@ -522,7 +522,7 @@ COMMAND_HANDLER(lpc2900_handle_read_custom_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv; @@ -584,7 +584,7 @@ COMMAND_HANDLER(lpc2900_handle_password_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv; @@ -614,7 +614,7 @@ COMMAND_HANDLER(lpc2900_handle_write_custom_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv; @@ -713,7 +713,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command) /* Get the bank descriptor */ struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv; @@ -794,7 +794,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_jtag_command) /* Get the bank descriptor */ struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv; diff --git a/src/flash/nor/lpcspifi.c b/src/flash/nor/lpcspifi.c index c99ce8d4c..160e2dc67 100644 --- a/src/flash/nor/lpcspifi.c +++ b/src/flash/nor/lpcspifi.c @@ -66,7 +66,7 @@ FLASH_BANK_COMMAND_HANDLER(lpcspifi_flash_bank_command) return ERROR_COMMAND_SYNTAX_ERROR; lpcspifi_info = malloc(sizeof(struct lpcspifi_flash_bank)); - if (lpcspifi_info == NULL) { + if (!lpcspifi_info) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } @@ -894,7 +894,7 @@ static int lpcspifi_probe(struct flash_bank *bank) /* create and fill sectors array */ bank->num_sectors = lpcspifi_info->dev->size_in_bytes / sectorsize; sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - if (sectors == NULL) { + if (!sectors) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c index 33d786889..d11af9094 100644 --- a/src/flash/nor/max32xxx.c +++ b/src/flash/nor/max32xxx.c @@ -302,8 +302,6 @@ static int max32xxx_erase(struct flash_bank *bank, unsigned int first, max32xxx_flash_op_post(bank); return ERROR_FLASH_OPERATION_FAILED; } - - bank->sectors[banknr].is_erased = 1; } if (!erased) { @@ -768,16 +766,12 @@ COMMAND_HANDLER(max32xxx_handle_mass_erase_command) return ERROR_OK; } - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; - if (max32xxx_mass_erase(bank) == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - + if (max32xxx_mass_erase(bank) == ERROR_OK) command_print(CMD, "max32xxx mass erase complete"); - } else + else command_print(CMD, "max32xxx mass erase failed"); return ERROR_OK; @@ -796,12 +790,12 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command) } retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; info = bank->driver_priv; /* Convert the range to the page numbers */ - if (1 != sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr)) { + if (sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr) != 1) { LOG_WARNING("Error parsing address"); command_print(CMD, "max32xxx protection_set "); return ERROR_FAIL; @@ -809,7 +803,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command) /* Mask off the top portion on the address */ addr = (addr & 0x0FFFFFFF); - if (1 != sscanf(CMD_ARGV[2], "0x%"SCNx32, &len)) { + if (sscanf(CMD_ARGV[2], "0x%"SCNx32, &len) != 1) { LOG_WARNING("Error parsing length"); command_print(CMD, "max32xxx protection_set "); return ERROR_FAIL; @@ -852,12 +846,12 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command) } retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; info = bank->driver_priv; /* Convert the range to the page numbers */ - if (1 != sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr)) { + if (sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr) != 1) { LOG_WARNING("Error parsing address"); command_print(CMD, "max32xxx protection_clr "); return ERROR_FAIL; @@ -865,7 +859,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command) /* Mask off the top portion on the address */ addr = (addr & 0x0FFFFFFF); - if (1 != sscanf(CMD_ARGV[2], "0x%"SCNx32, &len)) { + if (sscanf(CMD_ARGV[2], "0x%"SCNx32, &len) != 1) { LOG_WARNING("Error parsing length"); command_print(CMD, "max32xxx protection_clr "); return ERROR_FAIL; @@ -907,13 +901,13 @@ COMMAND_HANDLER(max32xxx_handle_protection_check_command) } retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; info = bank->driver_priv; /* Update the protection array */ retval = max32xxx_protect_check(bank); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_WARNING("Error updating the protection array"); return retval; } diff --git a/src/flash/nor/mdr.c b/src/flash/nor/mdr.c index e8484199a..f3c85525a 100644 --- a/src/flash/nor/mdr.c +++ b/src/flash/nor/mdr.c @@ -197,7 +197,6 @@ static int mdr_erase(struct flash_bank *bank, unsigned int first, if (retval != ERROR_OK) goto reset_pg_and_lock; } - bank->sectors[i].is_erased = 1; } reset_pg_and_lock: @@ -328,7 +327,7 @@ static int mdr_write(struct flash_bank *bank, const uint8_t *buffer, int rem = count % 4; if (rem) { new_buffer = malloc(count + rem); - if (new_buffer == NULL) { + if (!new_buffer) { LOG_ERROR("odd number of bytes to write and no memory for padding buffer"); return ERROR_FAIL; } diff --git a/src/flash/nor/mrvlqspi.c b/src/flash/nor/mrvlqspi.c index 44de98907..a752f0943 100644 --- a/src/flash/nor/mrvlqspi.c +++ b/src/flash/nor/mrvlqspi.c @@ -882,7 +882,7 @@ static int mrvlqspi_probe(struct flash_bank *bank) /* create and fill sectors array */ bank->num_sectors = mrvlqspi_info->dev->size_in_bytes / sectorsize; sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - if (sectors == NULL) { + if (!sectors) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } @@ -938,7 +938,7 @@ FLASH_BANK_COMMAND_HANDLER(mrvlqspi_flash_bank_command) return ERROR_COMMAND_SYNTAX_ERROR; mrvlqspi_info = malloc(sizeof(struct mrvlqspi_flash_bank)); - if (mrvlqspi_info == NULL) { + if (!mrvlqspi_info) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } diff --git a/src/flash/nor/msp432.c b/src/flash/nor/msp432.c index 22f7c77a2..667349f28 100644 --- a/src/flash/nor/msp432.c +++ b/src/flash/nor/msp432.c @@ -63,7 +63,7 @@ static int msp432_device_type(uint32_t family_type, uint32_t device_id, { int device_type = MSP432_NO_TYPE; - if (MSP432E4 == family_type) { + if (family_type == MSP432E4) { /* MSP432E4 device family */ if (device_id == 0x180C0002) { @@ -191,7 +191,7 @@ static int msp432_exec_cmd(struct target *target, struct msp432_algo_params /* Write out parameters to target memory */ retval = target_write_buffer(target, ALGO_PARAMS_BASE_ADDR, sizeof(struct msp432_algo_params), (uint8_t *)algo_params); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Write out command to target memory */ @@ -209,9 +209,9 @@ static int msp432_wait_return_code(struct target *target) int retval = ERROR_OK; start_ms = timeval_ms(); - while ((0 == return_code) || (FLASH_BUSY == return_code)) { + while ((return_code == 0) || (return_code == FLASH_BUSY)) { retval = target_read_u32(target, ALGO_RETURN_CODE_ADDR, &return_code); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; elapsed_ms = timeval_ms() - start_ms; @@ -221,7 +221,7 @@ static int msp432_wait_return_code(struct target *target) break; }; - if (FLASH_SUCCESS != return_code) { + if (return_code != FLASH_SUCCESS) { LOG_ERROR("msp432: Flash operation failed: %s", msp432_return_text(return_code)); return ERROR_FAIL; @@ -251,9 +251,9 @@ static int msp432_wait_inactive(struct target *target, uint32_t buffer) } start_ms = timeval_ms(); - while (BUFFER_INACTIVE != status_code) { + while (status_code != BUFFER_INACTIVE) { retval = target_read_u32(target, status_addr, &status_code); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; elapsed_ms = timeval_ms() - start_ms; @@ -263,7 +263,7 @@ static int msp432_wait_inactive(struct target *target, uint32_t buffer) break; }; - if (BUFFER_INACTIVE != status_code) { + if (status_code != BUFFER_INACTIVE) { LOG_ERROR( "msp432: Flash operation failed: buffer not written to flash"); return ERROR_FAIL; @@ -286,7 +286,7 @@ static int msp432_init(struct flash_bank *bank) /* Make sure we've probed the flash to get the device and size */ retval = msp432_auto_probe(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Choose appropriate flash helper algorithm */ @@ -315,18 +315,18 @@ static int msp432_init(struct flash_bank *bank) } /* Issue warnings if this is a device we may not be able to flash */ - if (MSP432P401X_GUESS == msp432_bank->device_type || - MSP432P411X_GUESS == msp432_bank->device_type) { + if (msp432_bank->device_type == MSP432P401X_GUESS || + msp432_bank->device_type == MSP432P411X_GUESS) { /* Explicit device type check failed. Report this. */ LOG_WARNING( "msp432: Unrecognized MSP432P4 Device ID and Hardware " "Rev (%04" PRIX32 ", %02" PRIX32 ")", msp432_bank->device_id, msp432_bank->hardware_rev); - } else if (MSP432P401X_DEPR == msp432_bank->device_type) { + } else if (msp432_bank->device_type == MSP432P401X_DEPR) { LOG_WARNING( "msp432: MSP432P401x pre-production device (deprecated " "silicon)\n" SUPPORT_MESSAGE); - } else if (MSP432E4X_GUESS == msp432_bank->device_type) { + } else if (msp432_bank->device_type == MSP432E4X_GUESS) { /* Explicit device type check failed. Report this. */ LOG_WARNING( "msp432: Unrecognized MSP432E4 DID0 and DID1 values " @@ -335,21 +335,21 @@ static int msp432_init(struct flash_bank *bank) } /* Check for working area to use for flash helper algorithm */ - if (NULL != msp432_bank->working_area) + if (msp432_bank->working_area) target_free_working_area(target, msp432_bank->working_area); retval = target_alloc_working_area(target, ALGO_WORKING_SIZE, &msp432_bank->working_area); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Confirm the defined working address is the area we need to use */ - if (ALGO_BASE_ADDR != msp432_bank->working_area->address) + if (msp432_bank->working_area->address != ALGO_BASE_ADDR) return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; /* Write flash helper algorithm into target memory */ retval = target_write_buffer(target, ALGO_BASE_ADDR, loader_size, loader_code); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Initialize the ARMv7 specific info to run the algorithm */ @@ -362,7 +362,7 @@ static int msp432_init(struct flash_bank *bank) /* Write out parameters to target memory */ retval = target_write_buffer(target, ALGO_PARAMS_BASE_ADDR, sizeof(algo_params), (uint8_t *)&algo_params); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Initialize stack pointer for flash helper algorithm */ @@ -373,7 +373,7 @@ static int msp432_init(struct flash_bank *bank) retval = target_start_algorithm(target, 0, 0, 1, reg_params, algo_entry_addr, 0, &msp432_bank->armv7m_info); destroy_reg_param(®_params[0]); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("msp432: Failed to start flash helper algorithm"); return retval; } @@ -385,7 +385,7 @@ static int msp432_init(struct flash_bank *bank) /* Issue the init command to the flash helper algorithm */ retval = msp432_exec_cmd(target, &algo_params, FLASH_INIT); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = msp432_wait_return_code(target); @@ -406,7 +406,7 @@ static int msp432_quit(struct flash_bank *bank) /* Issue the exit command to the flash helper algorithm */ retval = msp432_exec_cmd(target, &algo_params, FLASH_EXIT); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; (void)msp432_wait_return_code(target); @@ -432,13 +432,13 @@ static int msp432_mass_erase(struct flash_bank *bank, bool all) int retval; - if (TARGET_HALTED != target->state) { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } retval = msp432_init(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Initialize algorithm parameters to default values */ @@ -452,19 +452,19 @@ static int msp432_mass_erase(struct flash_bank *bank, bool all) /* Issue the mass erase command to the flash helper algorithm */ retval = msp432_exec_cmd(target, &algo_params, FLASH_MASS_ERASE); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { (void)msp432_quit(bank); return retval; } retval = msp432_wait_return_code(target); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { (void)msp432_quit(bank); return retval; } retval = msp432_quit(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; return retval; @@ -489,9 +489,9 @@ COMMAND_HANDLER(msp432_mass_erase_command) all = false; } else if (2 == CMD_ARGC) { /* Check argument for how much to erase */ - if (0 == strcmp(CMD_ARGV[1], "main")) + if (strcmp(CMD_ARGV[1], "main") == 0) all = false; - else if (0 == strcmp(CMD_ARGV[1], "all")) + else if (strcmp(CMD_ARGV[1], "all") == 0) all = true; else return ERROR_COMMAND_SYNTAX_ERROR; @@ -501,16 +501,16 @@ COMMAND_HANDLER(msp432_mass_erase_command) msp432_bank = bank->driver_priv; - if (MSP432E4 == msp432_bank->family_type) { + if (msp432_bank->family_type == MSP432E4) { /* MSP432E4 does not have main vs info regions, ignore "all" */ all = false; } retval = msp432_mass_erase(bank, all); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; - if (MSP432E4 == msp432_bank->family_type) { + if (msp432_bank->family_type == MSP432E4) { /* MSP432E4 does not have main vs info regions */ LOG_INFO("msp432: Mass erase of flash is complete"); } else { @@ -537,15 +537,15 @@ COMMAND_HANDLER(msp432_bsl_command) msp432_bank = bank->driver_priv; - if (MSP432E4 == msp432_bank->family_type) { + if (msp432_bank->family_type == MSP432E4) { LOG_WARNING("msp432: MSP432E4 does not have a BSL region"); return ERROR_OK; } if (2 == CMD_ARGC) { - if (0 == strcmp(CMD_ARGV[1], "lock")) + if (strcmp(CMD_ARGV[1], "lock") == 0) msp432_bank->unlock_bsl = false; - else if (0 == strcmp(CMD_ARGV[1], "unlock")) + else if (strcmp(CMD_ARGV[1], "unlock") == 0) msp432_bank->unlock_bsl = true; else return ERROR_COMMAND_SYNTAX_ERROR; @@ -569,7 +569,7 @@ FLASH_BANK_COMMAND_HANDLER(msp432_flash_bank_command) /* Create shared private struct for flash banks */ msp432_bank = malloc(sizeof(struct msp432_bank)); - if (NULL == msp432_bank) + if (!msp432_bank) return ERROR_FAIL; /* Initialize private flash information */ @@ -597,12 +597,12 @@ static int msp432_erase(struct flash_bank *bank, unsigned int first, struct msp432_bank *msp432_bank = bank->driver_priv; struct msp432_algo_params algo_params; - bool is_main = FLASH_BASE == bank->base; - bool is_info = P4_FLASH_INFO_BASE == bank->base; + bool is_main = bank->base == FLASH_BASE; + bool is_info = bank->base == P4_FLASH_INFO_BASE; int retval; - if (TARGET_HALTED != target->state) { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -614,7 +614,7 @@ static int msp432_erase(struct flash_bank *bank, unsigned int first, } retval = msp432_init(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Initialize algorithm parameters to default values */ @@ -646,20 +646,20 @@ static int msp432_erase(struct flash_bank *bank, unsigned int first, /* Issue the sector erase command to the flash helper algorithm */ retval = msp432_exec_cmd(target, &algo_params, FLASH_SECTOR_ERASE); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { (void)msp432_quit(bank); return retval; } retval = msp432_wait_return_code(target); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { (void)msp432_quit(bank); return retval; } } retval = msp432_quit(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; return retval; @@ -676,11 +676,11 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer, long long start_ms; long long elapsed_ms; - bool is_info = P4_FLASH_INFO_BASE == bank->base; + bool is_info = bank->base == P4_FLASH_INFO_BASE; int retval; - if (TARGET_HALTED != target->state) { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -705,7 +705,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer, if (offset < start) { uint32_t start_count = MIN(start - offset, count); retval = msp432_write(bank, buffer, offset, start_count); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } /* Send a request for anything after read-only sectors */ @@ -723,7 +723,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer, } retval = msp432_init(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* Initialize algorithm parameters to default values */ @@ -742,7 +742,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer, /* Set up flash helper algorithm to continuous flash mode */ retval = msp432_exec_cmd(target, &algo_params, FLASH_CONTINUOUS); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { (void)msp432_quit(bank); return retval; } @@ -758,7 +758,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer, /* Put next block of data to flash into buffer */ retval = target_write_buffer(target, ALGO_BUFFER1_ADDR, size, buffer); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Unable to write data to target memory"); (void)msp432_quit(bank); return ERROR_FLASH_OPERATION_FAILED; @@ -767,13 +767,13 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer, /* Signal the flash helper algorithm that data is ready to flash */ retval = target_write_u32(target, ALGO_BUFFER1_STATUS_ADDR, data_ready); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { (void)msp432_quit(bank); return ERROR_FLASH_OPERATION_FAILED; } retval = msp432_wait_inactive(target, 1); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { (void)msp432_quit(bank); return retval; } @@ -788,13 +788,13 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer, /* Confirm that the flash helper algorithm is finished */ retval = msp432_wait_return_code(target); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { (void)msp432_quit(bank); return retval; } retval = msp432_quit(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; return retval; @@ -812,8 +812,8 @@ static int msp432_probe(struct flash_bank *bank) uint32_t size; unsigned int num_sectors; - bool is_main = FLASH_BASE == bank->base; - bool is_info = P4_FLASH_INFO_BASE == bank->base; + bool is_main = bank->base == FLASH_BASE; + bool is_info = bank->base == P4_FLASH_INFO_BASE; int retval; @@ -826,21 +826,21 @@ static int msp432_probe(struct flash_bank *bank) /* Read the flash size register to determine this is a P4 or not */ /* MSP432P4s will return the size of flash. MSP432E4s will return zero */ retval = target_read_u32(target, P4_FLASH_MAIN_SIZE_REG, &size); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; - if (0 == size) { + if (size == 0) { /* This is likely an MSP432E4 */ msp432_bank->family_type = MSP432E4; retval = target_read_u32(target, E4_DID0_REG, &device_id); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; msp432_bank->device_id = device_id; retval = target_read_u32(target, E4_DID1_REG, &hardware_rev); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; msp432_bank->hardware_rev = hardware_rev; @@ -849,13 +849,13 @@ static int msp432_probe(struct flash_bank *bank) msp432_bank->family_type = MSP432P4; retval = target_read_u32(target, P4_DEVICE_ID_REG, &device_id); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; msp432_bank->device_id = device_id & 0xFFFF; retval = target_read_u32(target, P4_HARDWARE_REV_REG, &hardware_rev); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; msp432_bank->hardware_rev = hardware_rev & 0xFF; @@ -864,11 +864,11 @@ static int msp432_probe(struct flash_bank *bank) msp432_bank->device_type = msp432_device_type(msp432_bank->family_type, msp432_bank->device_id, msp432_bank->hardware_rev); - if (MSP432P4 == msp432_bank->family_type) { + if (msp432_bank->family_type == MSP432P4) { /* Set up MSP432P4 specific flash parameters */ if (is_main) { retval = target_read_u32(target, P4_FLASH_MAIN_SIZE_REG, &size); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; sector_length = P4_SECTOR_LENGTH; @@ -878,7 +878,7 @@ static int msp432_probe(struct flash_bank *bank) msp432_bank->device_type == MSP432P411X_GUESS) { /* MSP432P411x has an info size register, use that for size */ retval = target_read_u32(target, P4_FLASH_INFO_SIZE_REG, &size); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } else { /* All other MSP432P401x devices have fixed info region size */ @@ -907,7 +907,7 @@ static int msp432_probe(struct flash_bank *bank) if (num_sectors > 0) { bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors); - if (NULL == bank->sectors) + if (!bank->sectors) return ERROR_FAIL; } @@ -933,7 +933,7 @@ static int msp432_probe(struct flash_bank *bank) if (is_main && MSP432P4 == msp432_bank->family_type) { /* Create the info flash bank needed by MSP432P4 variants */ struct flash_bank *info = calloc(sizeof(struct flash_bank), 1); - if (NULL == info) + if (!info) return ERROR_FAIL; /* Create a name for the info bank, append "_1" to main name */ @@ -960,8 +960,8 @@ static int msp432_auto_probe(struct flash_bank *bank) { struct msp432_bank *msp432_bank = bank->driver_priv; - bool is_main = FLASH_BASE == bank->base; - bool is_info = P4_FLASH_INFO_BASE == bank->base; + bool is_main = bank->base == FLASH_BASE; + bool is_info = bank->base == P4_FLASH_INFO_BASE; int retval = ERROR_OK; @@ -981,7 +981,7 @@ static int msp432_info(struct flash_bank *bank, struct command_invocation *cmd) switch (msp432_bank->device_type) { case MSP432P401X_DEPR: - if (0xFFFF == msp432_bank->device_id) { + if (msp432_bank->device_id == 0xFFFF) { /* Very early pre-production silicon currently deprecated */ command_print_sameline(cmd, "MSP432P401x pre-production device (deprecated silicon)\n" SUPPORT_MESSAGE); @@ -1030,7 +1030,7 @@ static int msp432_protect_check(struct flash_bank *bank) static void msp432_flash_free_driver_priv(struct flash_bank *bank) { - bool is_main = FLASH_BASE == bank->base; + bool is_main = bank->base == FLASH_BASE; /* A single private struct is shared between main and info banks */ /* Only free it on the call for main bank */ diff --git a/src/flash/nor/niietcm4.c b/src/flash/nor/niietcm4.c index d48569423..6f9a5d378 100644 --- a/src/flash/nor/niietcm4.c +++ b/src/flash/nor/niietcm4.c @@ -1206,8 +1206,6 @@ static int niietcm4_erase(struct flash_bank *bank, unsigned int first, retval = niietcm4_opstatus_check(bank); if (retval != ERROR_OK) return retval; - - bank->sectors[i].is_erased = 1; } return retval; @@ -1394,7 +1392,7 @@ static int niietcm4_write(struct flash_bank *bank, const uint8_t *buffer, int rem = count % 16; if (rem) { new_buffer = malloc(count + 16 - rem); - if (new_buffer == NULL) { + if (!new_buffer) { LOG_ERROR("Odd number of words to write and no memory for padding buffer"); return ERROR_FAIL; } diff --git a/src/flash/nor/non_cfi.c b/src/flash/nor/non_cfi.c index a817966c6..1566f3858 100644 --- a/src/flash/nor/non_cfi.c +++ b/src/flash/nor/non_cfi.c @@ -536,17 +536,17 @@ void cfi_fixup_non_cfi(struct flash_bank *bank) pri_ext->major_version = '1'; pri_ext->minor_version = '0'; - pri_ext->SiliconRevision = 0x0; - pri_ext->EraseSuspend = 0x0; - pri_ext->BlkProt = 0x0; - pri_ext->TmpBlkUnprotect = 0x0; - pri_ext->BlkProtUnprot = 0x0; - pri_ext->SimultaneousOps = 0x0; - pri_ext->BurstMode = 0x0; - pri_ext->PageMode = 0x0; - pri_ext->VppMin = 0x0; - pri_ext->VppMax = 0x0; - pri_ext->TopBottom = 0x0; + pri_ext->silicon_revision = 0x0; + pri_ext->erase_suspend = 0x0; + pri_ext->blk_prot = 0x0; + pri_ext->tmp_blk_unprotected = 0x0; + pri_ext->blk_prot_unprot = 0x0; + pri_ext->simultaneous_ops = 0x0; + pri_ext->burst_mode = 0x0; + pri_ext->page_mode = 0x0; + pri_ext->vpp_min = 0x0; + pri_ext->vpp_max = 0x0; + pri_ext->top_bottom = 0x0; pri_ext->_unlock1 = 0x5555; pri_ext->_unlock2 = 0x2AAA; diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c index 9decbea9d..8870164d2 100644 --- a/src/flash/nor/nrf5.c +++ b/src/flash/nor/nrf5.c @@ -293,7 +293,7 @@ static bool nrf5_bank_is_probed(const struct flash_bank *bank) { struct nrf5_bank *nbank = bank->driver_priv; - assert(nbank != NULL); + assert(nbank); return nbank->probed; } @@ -444,7 +444,7 @@ static int nrf5_protect_check_clenr0(struct flash_bank *bank) struct nrf5_bank *nbank = bank->driver_priv; struct nrf5_info *chip = nbank->chip; - assert(chip != NULL); + assert(chip); res = target_read_u32(chip->target, NRF51_FICR_CLENR0, &clenr0); @@ -474,7 +474,7 @@ static int nrf5_protect_check_bprot(struct flash_bank *bank) struct nrf5_bank *nbank = bank->driver_priv; struct nrf5_info *chip = nbank->chip; - assert(chip != NULL); + assert(chip); static uint32_t nrf5_bprot_offsets[4] = { 0x600, 0x604, 0x610, 0x614 }; uint32_t bprot_reg = 0; @@ -505,7 +505,7 @@ static int nrf5_protect_check(struct flash_bank *bank) struct nrf5_bank *nbank = bank->driver_priv; struct nrf5_info *chip = nbank->chip; - assert(chip != NULL); + assert(chip); if (chip->features & NRF5_FEATURE_BPROT) return nrf5_protect_check_bprot(bank); @@ -1133,7 +1133,7 @@ static void nrf5_free_driver_priv(struct flash_bank *bank) { struct nrf5_bank *nbank = bank->driver_priv; struct nrf5_info *chip = nbank->chip; - if (chip == NULL) + if (!chip) return; chip->refcount--; @@ -1197,7 +1197,7 @@ FLASH_BANK_COMMAND_HANDLER(nrf5_flash_bank_command) nbank = &chip->bank[1]; break; } - assert(nbank != NULL); + assert(nbank); chip->refcount++; nbank->chip = chip; @@ -1218,7 +1218,7 @@ COMMAND_HANDLER(nrf5_handle_mass_erase_command) if (res != ERROR_OK) return res; - assert(bank != NULL); + assert(bank); struct nrf5_info *chip; @@ -1265,7 +1265,7 @@ COMMAND_HANDLER(nrf5_handle_info_command) if (res != ERROR_OK) return res; - assert(bank != NULL); + assert(bank); struct nrf5_info *chip; diff --git a/src/flash/nor/numicro.c b/src/flash/nor/numicro.c index d9ea16d27..cb7c1df83 100644 --- a/src/flash/nor/numicro.c +++ b/src/flash/nor/numicro.c @@ -151,7 +151,7 @@ struct numicro_cpu_type { {NUMICRO_CONFIG_BASE, 1024} } -static const struct numicro_cpu_type NuMicroParts[] = { +static const struct numicro_cpu_type numicro_parts[] = { /*PART NO*/ /*PART ID*/ /*Banks*/ /* NUC100 Version B */ {"NUC100LD2BN", 0x10010004, NUMICRO_BANKS_NUC100(64*1024)}, @@ -1386,7 +1386,7 @@ static int numicro_writeblock(struct flash_bank *bank, const uint8_t *buffer, init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* number of words to program */ struct armv7m_common *armv7m = target_to_armv7m(target); - if (armv7m == NULL) { + if (!armv7m) { /* something is very wrong if armv7m is NULL */ LOG_ERROR("unable to get armv7m target"); return retval; @@ -1532,8 +1532,6 @@ static int numicro_erase(struct flash_bank *bank, unsigned int first, retval = target_write_u32(target, NUMICRO_FLASH_ISPCON, (status | ISPCON_ISPFF)); if (retval != ERROR_OK) return retval; - } else { - bank->sectors[i].is_erased = 1; } } @@ -1648,9 +1646,9 @@ static int numicro_get_cpu_type(struct target *target, const struct numicro_cpu_ LOG_INFO("Device ID: 0x%08" PRIx32 "", part_id); /* search part numbers */ - for (size_t i = 0; i < ARRAY_SIZE(NuMicroParts); i++) { - if (part_id == NuMicroParts[i].partid) { - *cpu = &NuMicroParts[i]; + for (size_t i = 0; i < ARRAY_SIZE(numicro_parts); i++) { + if (part_id == numicro_parts[i].partid) { + *cpu = &numicro_parts[i]; LOG_INFO("Device Name: %s", (*cpu)->partname); return ERROR_OK; } diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c index 6844975e2..31433e03f 100644 --- a/src/flash/nor/pic32mx.c +++ b/src/flash/nor/pic32mx.c @@ -46,11 +46,11 @@ * Note: These macros only work for KSEG0/KSEG1 addresses. */ -#define Virt2Phys(v) ((v) & 0x1FFFFFFF) +#define virt2phys(v) ((v) & 0x1FFFFFFF) /* pic32mx configuration register locations */ -#define PIC32MX_DEVCFG0_1xx_2xx 0xBFC00BFC +#define PIC32MX_DEVCFG0_1XX_2XX 0xBFC00BFC #define PIC32MX_DEVCFG0 0xBFC02FFC #define PIC32MX_DEVCFG1 0xBFC02FF8 #define PIC32MX_DEVCFG2 0xBFC02FF4 @@ -91,8 +91,8 @@ #define NVMKEY1 0xAA996655 #define NVMKEY2 0x556699AA -#define MX_1xx_2xx 1 /* PIC32mx1xx/2xx */ -#define MX_17x_27x 2 /* PIC32mx17x/27x */ +#define MX_1XX_2XX 1 /* PIC32mx1xx/2xx */ +#define MX_17X_27X 2 /* PIC32mx17x/27x */ struct pic32mx_flash_bank { bool probed; @@ -279,9 +279,9 @@ static int pic32mx_protect_check(struct flash_bank *bank) } switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: - case MX_17x_27x: - config0_address = PIC32MX_DEVCFG0_1xx_2xx; + case MX_1XX_2XX: + case MX_17X_27X: + config0_address = PIC32MX_DEVCFG0_1XX_2XX; break; default: config0_address = PIC32MX_DEVCFG0; @@ -292,7 +292,7 @@ static int pic32mx_protect_check(struct flash_bank *bank) if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */ num_pages = 0xffff; /* All pages protected */ - else if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) { + else if (virt2phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) { if (devcfg0 & (1 << 24)) num_pages = 0; /* All pages unprotected */ else @@ -300,10 +300,10 @@ static int pic32mx_protect_check(struct flash_bank *bank) } else { /* pgm flash */ switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: + case MX_1XX_2XX: num_pages = (~devcfg0 >> 10) & 0x7f; break; - case MX_17x_27x: + case MX_17X_27X: num_pages = (~devcfg0 >> 10) & 0x1ff; break; default: @@ -332,7 +332,7 @@ static int pic32mx_erase(struct flash_bank *bank, unsigned int first, } if ((first == 0) && (last == (bank->num_sectors - 1)) - && (Virt2Phys(bank->base) == PIC32MX_PHYS_PGM_FLASH)) { + && (virt2phys(bank->base) == PIC32MX_PHYS_PGM_FLASH)) { /* this will only erase the Program Flash (PFM), not the Boot Flash (BFM) * we need to use the MTAP to perform a full erase */ LOG_DEBUG("Erasing entire program flash"); @@ -345,7 +345,7 @@ static int pic32mx_erase(struct flash_bank *bank, unsigned int first, } for (unsigned int i = first; i <= last; i++) { - target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(bank->base + bank->sectors[i].offset)); + target_write_u32(target, PIC32MX_NVMADDR, virt2phys(bank->base + bank->sectors[i].offset)); status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10); @@ -353,7 +353,6 @@ static int pic32mx_erase(struct flash_bank *bank, unsigned int first, return ERROR_FLASH_OPERATION_FAILED; if (status & NVMCON_LVDERR) return ERROR_FLASH_OPERATION_FAILED; - bank->sectors[i].is_erased = 1; } return ERROR_OK; @@ -465,8 +464,8 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer, /* Change values for counters and row size, depending on variant */ switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: - case MX_17x_27x: + case MX_1XX_2XX: + case MX_17X_27X: /* 128 byte row */ pic32mx_flash_write_code[8] = 0x2CD30020; pic32mx_flash_write_code[14] = 0x24840080; @@ -515,7 +514,7 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer, uint8_t *new_buffer = NULL; if (row_offset && (count >= (row_size / 4))) { new_buffer = malloc(buffer_size); - if (new_buffer == NULL) { + if (!new_buffer) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -548,8 +547,8 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer, break; } - buf_set_u32(reg_params[0].value, 0, 32, Virt2Phys(source->address)); - buf_set_u32(reg_params[1].value, 0, 32, Virt2Phys(address)); + buf_set_u32(reg_params[0].value, 0, 32, virt2phys(source->address)); + buf_set_u32(reg_params[1].value, 0, 32, virt2phys(address)); buf_set_u32(reg_params[2].value, 0, 32, thisrun_count + row_offset / 4); retval = target_run_algorithm(target, 0, NULL, 3, reg_params, @@ -599,7 +598,7 @@ static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_ { struct target *target = bank->target; - target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(address)); + target_write_u32(target, PIC32MX_NVMADDR, virt2phys(address)); target_write_u32(target, PIC32MX_NVMDATA, word); return pic32mx_nvm_exec(bank, NVMCON_OP_WORD_PROG, 5); @@ -714,17 +713,17 @@ static int pic32mx_probe(struct flash_bank *bank) } /* Check for PIC32mx1xx/2xx */ - for (i = 0; pic32mx_devs[i].name != NULL; i++) { + for (i = 0; pic32mx_devs[i].name; i++) { if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) { if ((pic32mx_devs[i].name[0] == '1') || (pic32mx_devs[i].name[0] == '2')) - pic32mx_info->dev_type = (pic32mx_devs[i].name[1] == '7') ? MX_17x_27x : MX_1xx_2xx; + pic32mx_info->dev_type = (pic32mx_devs[i].name[1] == '7') ? MX_17X_27X : MX_1XX_2XX; break; } } switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: - case MX_17x_27x: + case MX_1XX_2XX: + case MX_17X_27X: page_size = 1024; break; default: @@ -732,7 +731,7 @@ static int pic32mx_probe(struct flash_bank *bank) break; } - if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) { + if (virt2phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) { /* 0x1FC00000: Boot flash size */ #if 0 /* for some reason this register returns 8k for the boot bank size @@ -745,8 +744,8 @@ static int pic32mx_probe(struct flash_bank *bank) #else /* fixed 12k boot bank - see comments above */ switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: - case MX_17x_27x: + case MX_1XX_2XX: + case MX_17X_27X: num_pages = (3 * 1024); break; default: @@ -758,8 +757,8 @@ static int pic32mx_probe(struct flash_bank *bank) /* read the flash size from the device */ if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) { switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: - case MX_17x_27x: + case MX_1XX_2XX: + case MX_17X_27X: LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 32k flash"); num_pages = (32 * 1024); break; @@ -819,14 +818,14 @@ static int pic32mx_info(struct flash_bank *bank, struct command_invocation *cmd) } int i; - for (i = 0; pic32mx_devs[i].name != NULL; i++) { + for (i = 0; pic32mx_devs[i].name; i++) { if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) { command_print_sameline(cmd, "PIC32MX%s", pic32mx_devs[i].name); break; } } - if (pic32mx_devs[i].name == NULL) + if (!pic32mx_devs[i].name) command_print_sameline(cmd, "Unknown"); command_print_sameline(cmd, " Ver: 0x%02x", @@ -848,7 +847,7 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 2, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (address < bank->base || address >= (bank->base + bank->size)) { @@ -885,7 +884,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; target = bank->target; diff --git a/src/flash/nor/psoc4.c b/src/flash/nor/psoc4.c index cc2521b0d..0a2702ab5 100644 --- a/src/flash/nor/psoc4.c +++ b/src/flash/nor/psoc4.c @@ -320,7 +320,7 @@ static int psoc4_sysreq(struct flash_bank *bank, uint8_t cmd, sysreq_wait_algorithm->address + sysreq_wait_algorithm->size); struct armv7m_common *armv7m = target_to_armv7m(target); - if (armv7m == NULL) { + if (!armv7m) { /* something is very wrong if armv7m is NULL */ LOG_ERROR("unable to get armv7m target"); retval = ERROR_FAIL; @@ -520,16 +520,9 @@ static int psoc4_mass_erase(struct flash_bank *bank) /* Call "Erase All" system ROM API */ uint32_t param = 0; - retval = psoc4_sysreq(bank, PSOC4_CMD_ERASE_ALL, + return psoc4_sysreq(bank, PSOC4_CMD_ERASE_ALL, 0, ¶m, sizeof(param), NULL); - - if (retval == ERROR_OK) - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - - return retval; } @@ -576,7 +569,7 @@ static int psoc4_protect(struct flash_bank *bank, int set, unsigned int first, int prot_sz = num_bits / 8; sysrq_buffer = malloc(param_sz + prot_sz); - if (sysrq_buffer == NULL) { + if (!sysrq_buffer) { LOG_ERROR("no memory for row buffer"); return ERROR_FAIL; } @@ -624,7 +617,7 @@ COMMAND_HANDLER(psoc4_handle_flash_autoerase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct psoc4_flash_bank *psoc4_info = bank->driver_priv; @@ -658,7 +651,7 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer, return retval; sysrq_buffer = malloc(param_sz + psoc4_info->row_size); - if (sysrq_buffer == NULL) { + if (!sysrq_buffer) { LOG_ERROR("no memory for row buffer"); return ERROR_FAIL; } @@ -833,7 +826,7 @@ static int psoc4_probe(struct flash_bank *bank) bank->size = num_rows * row_size; bank->num_sectors = num_rows; bank->sectors = alloc_block_array(0, row_size, num_rows); - if (bank->sectors == NULL) + if (!bank->sectors) return ERROR_FAIL; LOG_DEBUG("flash bank set %" PRIu32 " rows", num_rows); @@ -898,7 +891,7 @@ COMMAND_HANDLER(psoc4_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = psoc4_mass_erase(bank); diff --git a/src/flash/nor/psoc5lp.c b/src/flash/nor/psoc5lp.c index 1b268b53d..f383213ba 100644 --- a/src/flash/nor/psoc5lp.c +++ b/src/flash/nor/psoc5lp.c @@ -86,15 +86,15 @@ #define PM_ACT_CFG0_EN_CLK_SPC (1 << 3) -#define PHUB_CHx_BASIC_CFG_EN (1 << 0) -#define PHUB_CHx_BASIC_CFG_WORK_SEP (1 << 5) +#define PHUB_CHX_BASIC_CFG_EN (1 << 0) +#define PHUB_CHX_BASIC_CFG_WORK_SEP (1 << 5) -#define PHUB_CHx_ACTION_CPU_REQ (1 << 0) +#define PHUB_CHX_ACTION_CPU_REQ (1 << 0) -#define PHUB_CFGMEMx_CFG0 (1 << 7) +#define PHUB_CFGMEMX_CFG0 (1 << 7) -#define PHUB_TDMEMx_ORIG_TD0_NEXT_TD_PTR_LAST (0xff << 16) -#define PHUB_TDMEMx_ORIG_TD0_INC_SRC_ADDR (1 << 24) +#define PHUB_TDMEMX_ORIG_TD0_NEXT_TD_PTR_LAST (0xff << 16) +#define PHUB_TDMEMX_ORIG_TD0_INC_SRC_ADDR (1 << 24) #define NVL_3_ECCEN (1 << 3) @@ -1113,7 +1113,7 @@ static int psoc5lp_erase_check(struct flash_bank *bank) struct target_memory_check_block *block_array; block_array = malloc(num_sectors * sizeof(struct target_memory_check_block)); - if (block_array == NULL) + if (!block_array) return ERROR_FAIL; for (unsigned int i = 0; i < num_sectors; i++) { @@ -1289,13 +1289,13 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer, retval = target_write_u32(target, even_row ? PHUB_CH0_BASIC_CFG : PHUB_CH1_BASIC_CFG, - PHUB_CHx_BASIC_CFG_WORK_SEP | PHUB_CHx_BASIC_CFG_EN); + PHUB_CHX_BASIC_CFG_WORK_SEP | PHUB_CHX_BASIC_CFG_EN); if (retval != ERROR_OK) goto err_dma; retval = target_write_u32(target, even_row ? PHUB_CFGMEM0_CFG0 : PHUB_CFGMEM1_CFG0, - PHUB_CFGMEMx_CFG0); + PHUB_CFGMEMX_CFG0); if (retval != ERROR_OK) goto err_dma; @@ -1307,8 +1307,8 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer, retval = target_write_u32(target, even_row ? PHUB_TDMEM0_ORIG_TD0 : PHUB_TDMEM1_ORIG_TD0, - PHUB_TDMEMx_ORIG_TD0_INC_SRC_ADDR | - PHUB_TDMEMx_ORIG_TD0_NEXT_TD_PTR_LAST | + PHUB_TDMEMX_ORIG_TD0_INC_SRC_ADDR | + PHUB_TDMEMX_ORIG_TD0_NEXT_TD_PTR_LAST | ((SPC_OPCODE_LEN + 1 + row_size + 3 + SPC_OPCODE_LEN + 5) & 0xfff)); if (retval != ERROR_OK) goto err_dma; @@ -1325,7 +1325,7 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer, retval = target_write_u32(target, even_row ? PHUB_CH0_ACTION : PHUB_CH1_ACTION, - PHUB_CHx_ACTION_CPU_REQ); + PHUB_CHX_ACTION_CPU_REQ); if (retval != ERROR_OK) goto err_dma_action; } diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c index c65411bb9..b8b520237 100644 --- a/src/flash/nor/psoc6.c +++ b/src/flash/nor/psoc6.c @@ -744,9 +744,6 @@ static int psoc6_erase(struct flash_bank *bank, unsigned int first, if (hr != ERROR_OK) goto exit_free_wa; - for (unsigned int i = first; i < first + rows_in_sector; i++) - bank->sectors[i].is_erased = 1; - first += rows_in_sector; } else { /* Perform Row Erase otherwise */ @@ -754,7 +751,6 @@ static int psoc6_erase(struct flash_bank *bank, unsigned int first, if (hr != ERROR_OK) goto exit_free_wa; - bank->sectors[first].is_erased = 1; first += 1; } } diff --git a/src/flash/nor/sfdp.c b/src/flash/nor/sfdp.c index 2183ac1f1..88d3b96f4 100644 --- a/src/flash/nor/sfdp.c +++ b/src/flash/nor/sfdp.c @@ -99,7 +99,7 @@ int spi_sfdp(struct flash_bank *bank, struct flash_device *dev, nph = ((header.revision >> 16) & 0xFF) + 1; LOG_DEBUG("parameter headers: %d", nph); pheaders = malloc(sizeof(struct sfdp_phdr) * nph); - if (pheaders == NULL) { + if (!pheaders) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } @@ -119,7 +119,7 @@ int spi_sfdp(struct flash_bank *bank, struct flash_device *dev, /* retrieve parameter table */ ptable = malloc(words << 2); - if (ptable == NULL) { + if (!ptable) { LOG_ERROR("not enough memory"); retval = ERROR_FAIL; goto err; diff --git a/src/flash/nor/sim3x.c b/src/flash/nor/sim3x.c index b42add96e..20b5e3972 100644 --- a/src/flash/nor/sim3x.c +++ b/src/flash/nor/sim3x.c @@ -511,7 +511,7 @@ static int sim3x_flash_write(struct flash_bank *bank, const uint8_t *buffer, uin count++; new_buffer = malloc(count); - if (new_buffer == NULL) { + if (!new_buffer) { LOG_ERROR("odd number of bytes to write and no memory " "for padding buffer"); return ERROR_FAIL; @@ -935,7 +935,7 @@ COMMAND_HANDLER(sim3x_mass_erase) struct cortex_m_common *cortex_m = target_to_cm(target); struct adiv5_dap *dap = cortex_m->armv7m.arm.dap; - if (dap == NULL) { + if (!dap) { /* Used debug interface doesn't support direct DAP access */ LOG_ERROR("mass_erase can't be used by this debug interface"); return ERROR_FAIL; @@ -980,7 +980,7 @@ COMMAND_HANDLER(sim3x_lock) struct cortex_m_common *cortex_m = target_to_cm(target); struct adiv5_dap *dap = cortex_m->armv7m.arm.dap; - if (dap == NULL) { + if (!dap) { /* Used debug interface doesn't support direct DAP access */ LOG_INFO("Target can't by unlocked by this debug interface"); @@ -1039,7 +1039,7 @@ COMMAND_HANDLER(sim3x_lock) return retval; ret = sim3x_flash_write(bank, lock_word, LOCK_WORD_ADDRESS, 4); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ret; LOG_INFO("Target is successfully locked"); @@ -1052,7 +1052,7 @@ COMMAND_HANDLER(sim3x_lock) LOG_ERROR("Unexpected lock word value"); /* SIM3X_AP_ID_VALUE is not checked */ - if (dap == NULL) + if (!dap) LOG_INFO("Maybe this isn't a SiM3x MCU"); return ERROR_FAIL; diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c index b4c959f05..d2638c152 100644 --- a/src/flash/nor/stellaris.c +++ b/src/flash/nor/stellaris.c @@ -126,7 +126,7 @@ static const struct { uint8_t class; uint8_t partno; const char *partname; -} StellarisParts[] = { +} stellaris_parts[] = { {0x00, 0x01, "LM3S101"}, {0x00, 0x02, "LM3S102"}, {0x01, 0xBF, "LM3S1110"}, @@ -436,7 +436,7 @@ static const struct { {0xFF, 0x00, "Unknown Part"} }; -static const char * const StellarisClassname[] = { +static const char * const stellaris_classname[] = { "Sandstorm", "Fury", "Unknown", @@ -493,7 +493,7 @@ static int get_stellaris_info(struct flash_bank *bank, struct command_invocation "\nTI/LMI Stellaris information: Chip is " "class %i (%s) %s rev %c%i\n", stellaris_info->target_class, - StellarisClassname[stellaris_info->target_class], + stellaris_classname[stellaris_info->target_class], stellaris_info->target_name, (int)('A' + ((stellaris_info->did0 >> 8) & 0xFF)), (int)((stellaris_info->did0) & 0xFF)); @@ -743,13 +743,13 @@ static int stellaris_read_part_info(struct flash_bank *bank) LOG_WARNING("Unknown did0 class"); } - for (i = 0; StellarisParts[i].partno; i++) { - if ((StellarisParts[i].partno == ((did1 >> 16) & 0xFF)) && - (StellarisParts[i].class == stellaris_info->target_class)) + for (i = 0; stellaris_parts[i].partno; i++) { + if ((stellaris_parts[i].partno == ((did1 >> 16) & 0xFF)) && + (stellaris_parts[i].class == stellaris_info->target_class)) break; } - stellaris_info->target_name = StellarisParts[i].partname; + stellaris_info->target_name = stellaris_parts[i].partname; stellaris_info->did0 = did0; stellaris_info->did1 = did1; @@ -886,8 +886,6 @@ static int stellaris_erase(struct flash_bank *bank, unsigned int first, target_write_u32(target, FLASH_CRIS, 0); return ERROR_FLASH_OPERATION_FAILED; } - - bank->sectors[banknr].is_erased = 1; } return ERROR_OK; @@ -1315,16 +1313,12 @@ COMMAND_HANDLER(stellaris_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; - if (stellaris_mass_erase(bank) == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - + if (stellaris_mass_erase(bank) == ERROR_OK) command_print(CMD, "stellaris mass erase complete"); - } else + else command_print(CMD, "stellaris mass erase failed"); return ERROR_OK; diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c index fbcf83afb..3bda9bc20 100644 --- a/src/flash/nor/stm32f1x.c +++ b/src/flash/nor/stm32f1x.c @@ -349,7 +349,7 @@ static int stm32x_protect_check(struct flash_bank *bank) uint32_t protection; int retval = stm32x_check_operation_supported(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* medium density - each bit refers to a 4 sector protection block @@ -402,8 +402,6 @@ static int stm32x_erase(struct flash_bank *bank, unsigned int first, retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT); if (retval != ERROR_OK) return retval; - - bank->sectors[i].is_erased = 1; } retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK); @@ -561,7 +559,7 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer, * discrete accesses. */ if (count & 1) { new_buffer = malloc(count + 1); - if (new_buffer == NULL) { + if (!new_buffer) { LOG_ERROR("odd number of bytes to write and no memory for padding buffer"); return ERROR_FAIL; } @@ -1179,7 +1177,7 @@ static int get_stm32x_info(struct flash_bank *bank, struct command_invocation *c return ERROR_FAIL; } - if (rev_str != NULL) + if (rev_str) command_print_sameline(cmd, "%s - Rev: %s", device_str, rev_str); else command_print_sameline(cmd, "%s - Rev: unknown (0x%04x)", device_str, rev_id); @@ -1197,7 +1195,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; stm32x_info = bank->driver_priv; @@ -1210,7 +1208,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command) } retval = stm32x_check_operation_supported(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (stm32x_erase_options(bank) != ERROR_OK) { @@ -1240,7 +1238,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; target = bank->target; @@ -1251,7 +1249,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command) } retval = stm32x_check_operation_supported(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (stm32x_erase_options(bank) != ERROR_OK) { @@ -1282,7 +1280,7 @@ COMMAND_HANDLER(stm32x_handle_options_read_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; stm32x_info = bank->driver_priv; @@ -1295,7 +1293,7 @@ COMMAND_HANDLER(stm32x_handle_options_read_command) } retval = stm32x_check_operation_supported(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = target_read_u32(target, STM32_FLASH_OBR_B0, &optionbyte); @@ -1349,7 +1347,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; stm32x_info = bank->driver_priv; @@ -1362,11 +1360,11 @@ COMMAND_HANDLER(stm32x_handle_options_write_command) } retval = stm32x_check_operation_supported(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32x_read_options(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* start with current options */ @@ -1438,7 +1436,7 @@ COMMAND_HANDLER(stm32x_handle_options_load_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct stm32x_flash_bank *stm32x_info = bank->driver_priv; @@ -1457,7 +1455,7 @@ COMMAND_HANDLER(stm32x_handle_options_load_command) } retval = stm32x_check_operation_supported(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* unlock option flash registers */ @@ -1520,17 +1518,13 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32x_mass_erase(bank); - if (retval == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - + if (retval == ERROR_OK) command_print(CMD, "stm32x mass erase complete"); - } else + else command_print(CMD, "stm32x mass erase failed"); return retval; diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c index f718e3b98..e80928ddf 100644 --- a/src/flash/nor/stm32f2x.c +++ b/src/flash/nor/stm32f2x.c @@ -649,8 +649,6 @@ static int stm32x_erase(struct flash_bank *bank, unsigned int first, retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT); if (retval != ERROR_OK) return retval; - - bank->sectors[i].is_erased = 1; } retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK); @@ -1412,7 +1410,7 @@ static int get_stm32x_info(struct flash_bank *bank, struct command_invocation *c return ERROR_FAIL; } - if (rev_str != NULL) + if (rev_str) command_print_sameline(cmd, "%s - Rev: %s", device_str, rev_str); else command_print_sameline(cmd, "%s - Rev: unknown (0x%04" PRIx16 ")", device_str, rev_id); @@ -1430,7 +1428,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; stm32x_info = bank->driver_priv; @@ -1469,7 +1467,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; stm32x_info = bank->driver_priv; @@ -1556,15 +1554,11 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32x_mass_erase(bank); if (retval == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - command_print(CMD, "stm32x mass erase complete"); } else { command_print(CMD, "stm32x mass erase failed"); @@ -1585,11 +1579,11 @@ COMMAND_HANDLER(stm32f2x_handle_options_read_command) } retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32x_read_options(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; stm32x_info = bank->driver_priv; @@ -1631,11 +1625,11 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command) } retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32x_read_options(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; stm32x_info = bank->driver_priv; @@ -1693,7 +1687,7 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command) } retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; stm32x_info = bank->driver_priv; @@ -1707,7 +1701,7 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command) " finally unlock it. Clears PCROP and mass erases flash."); retval = stm32x_read_options(bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], optcr2_pcrop); @@ -1731,7 +1725,7 @@ COMMAND_HANDLER(stm32x_handle_otp_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (stm32x_is_otp(bank)) { if (strcmp(CMD_ARGV[1], "enable") == 0) { diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c index 4c503db38..89ba75dad 100644 --- a/src/flash/nor/stm32h7x.c +++ b/src/flash/nor/stm32h7x.c @@ -512,7 +512,6 @@ static int stm32x_erase(struct flash_bank *bank, unsigned int first, LOG_ERROR("erase time-out or operation error sector %u", i); goto flash_lock; } - bank->sectors[i].is_erased = 1; } flash_lock: @@ -879,7 +878,7 @@ static int stm32x_probe(struct flash_bank *bank) bank->sectors = alloc_block_array(0, stm32x_info->part_info->page_size_kb * 1024, bank->num_sectors); - if (bank->sectors == NULL) { + if (!bank->sectors) { LOG_ERROR("failed to allocate bank sectors"); return ERROR_FAIL; } @@ -896,7 +895,7 @@ static int stm32x_probe(struct flash_bank *bank) bank->prot_blocks = alloc_block_array(0, stm32x_info->part_info->page_size_kb * wpsn * 1024, bank->num_prot_blocks); - if (bank->prot_blocks == NULL) { + if (!bank->prot_blocks) { LOG_ERROR("failed to allocate bank prot_block"); return ERROR_FAIL; } @@ -937,7 +936,7 @@ static int stm32x_get_info(struct flash_bank *bank, struct command_invocation *c if (rev_id == info->revs[i].rev) rev_str = info->revs[i].str; - if (rev_str != NULL) { + if (rev_str) { command_print_sameline(cmd, "%s - Rev: %s", stm32x_info->part_info->device_str, rev_str); } else { @@ -1003,7 +1002,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32x_set_rdp(bank, OPT_RDP_L1); @@ -1023,7 +1022,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32x_set_rdp(bank, OPT_RDP_L0); @@ -1083,19 +1082,14 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32x_mass_erase(bank); - if (retval == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - + if (retval == ERROR_OK) command_print(CMD, "stm32h7x mass erase complete"); - } else { + else command_print(CMD, "stm32h7x mass erase failed"); - } return retval; } @@ -1109,14 +1103,14 @@ COMMAND_HANDLER(stm32x_handle_option_read_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; uint32_t reg_offset, value; COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], reg_offset); retval = stm32x_read_flash_reg(bank, reg_offset, &value); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32, @@ -1134,7 +1128,7 @@ COMMAND_HANDLER(stm32x_handle_option_write_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; uint32_t reg_offset, value, mask = 0xffffffff; diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index 9598345c6..3c055616f 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -24,9 +24,10 @@ #endif #include "imp.h" +#include #include #include -#include +#include #include "bits.h" #include "stm32l4x.h" @@ -79,6 +80,9 @@ * * RM0461 (STM32WLEx) * http://www.st.com/resource/en/reference_manual/dm00530369.pdf + * + * RM0453 (STM32WL5x) + * http://www.st.com/resource/en/reference_manual/dm00451556.pdf */ /* STM32G0xxx series for reference. @@ -115,6 +119,7 @@ /* Erase time can be as high as 25ms, 10x this and assume it's toast... */ #define FLASH_ERASE_TIMEOUT 250 +#define FLASH_WRITE_TIMEOUT 50 /* relevant STM32L4 flags ****************************************************/ @@ -126,6 +131,11 @@ #define F_USE_ALL_WRPXX BIT(1) /* this flag indicates if the device embeds a TrustZone security feature */ #define F_HAS_TZ BIT(2) +/* this flag indicates if the device has the same flash registers as STM32L5 */ +#define F_HAS_L5_FLASH_REGS BIT(3) +/* this flag indicates that programming should be done in quad-word + * the default programming word size is double-word */ +#define F_QUAD_WORD_PROG BIT(4) /* end of STM32L4 flags ******************************************************/ @@ -135,6 +145,9 @@ enum stm32l4_flash_reg_index { STM32_FLASH_OPTKEYR_INDEX, STM32_FLASH_SR_INDEX, STM32_FLASH_CR_INDEX, + /* for some devices like STM32WL5x, the CPU2 have a dedicated C2CR register w/o LOCKs, + * so it uses the C2CR for flash operations and CR for checking locks and locking */ + STM32_FLASH_CR_WLK_INDEX, /* FLASH_CR_WITH_LOCK */ STM32_FLASH_OPTR_INDEX, STM32_FLASH_WRP1AR_INDEX, STM32_FLASH_WRP1BR_INDEX, @@ -163,12 +176,37 @@ static const uint32_t stm32l4_flash_regs[STM32_FLASH_REG_INDEX_NUM] = { [STM32_FLASH_WRP2BR_INDEX] = 0x050, }; -static const uint32_t stm32l5_ns_flash_regs[STM32_FLASH_REG_INDEX_NUM] = { +static const uint32_t stm32wl_cpu2_flash_regs[STM32_FLASH_REG_INDEX_NUM] = { [STM32_FLASH_ACR_INDEX] = 0x000, [STM32_FLASH_KEYR_INDEX] = 0x008, [STM32_FLASH_OPTKEYR_INDEX] = 0x010, - [STM32_FLASH_SR_INDEX] = 0x020, - [STM32_FLASH_CR_INDEX] = 0x028, + [STM32_FLASH_SR_INDEX] = 0x060, + [STM32_FLASH_CR_INDEX] = 0x064, + [STM32_FLASH_CR_WLK_INDEX] = 0x014, + [STM32_FLASH_OPTR_INDEX] = 0x020, + [STM32_FLASH_WRP1AR_INDEX] = 0x02C, + [STM32_FLASH_WRP1BR_INDEX] = 0x030, +}; + +static const uint32_t stm32l5_ns_flash_regs[STM32_FLASH_REG_INDEX_NUM] = { + [STM32_FLASH_ACR_INDEX] = 0x000, + [STM32_FLASH_KEYR_INDEX] = 0x008, /* NSKEYR */ + [STM32_FLASH_OPTKEYR_INDEX] = 0x010, + [STM32_FLASH_SR_INDEX] = 0x020, /* NSSR */ + [STM32_FLASH_CR_INDEX] = 0x028, /* NSCR */ + [STM32_FLASH_OPTR_INDEX] = 0x040, + [STM32_FLASH_WRP1AR_INDEX] = 0x058, + [STM32_FLASH_WRP1BR_INDEX] = 0x05C, + [STM32_FLASH_WRP2AR_INDEX] = 0x068, + [STM32_FLASH_WRP2BR_INDEX] = 0x06C, +}; + +static const uint32_t stm32l5_s_flash_regs[STM32_FLASH_REG_INDEX_NUM] = { + [STM32_FLASH_ACR_INDEX] = 0x000, + [STM32_FLASH_KEYR_INDEX] = 0x00C, /* SECKEYR */ + [STM32_FLASH_OPTKEYR_INDEX] = 0x010, + [STM32_FLASH_SR_INDEX] = 0x024, /* SECSR */ + [STM32_FLASH_CR_INDEX] = 0x02C, /* SECCR */ [STM32_FLASH_OPTR_INDEX] = 0x040, [STM32_FLASH_WRP1AR_INDEX] = 0x058, [STM32_FLASH_WRP1BR_INDEX] = 0x05C, @@ -189,7 +227,6 @@ struct stm32l4_part_info { const uint16_t max_flash_size_kb; const uint32_t flags; /* one bit per feature, see STM32L4 flags: macros F_XXX */ const uint32_t flash_regs_base; - const uint32_t *default_flash_regs; const uint32_t fsize_addr; const uint32_t otp_base; const uint32_t otp_size; @@ -202,12 +239,18 @@ struct stm32l4_flash_bank { bool dual_bank_mode; int hole_sectors; uint32_t user_bank_size; + uint32_t data_width; + uint32_t cr_bker_mask; + uint32_t sr_bsy_mask; uint32_t wrpxxr_mask; const struct stm32l4_part_info *part_info; + uint32_t flash_regs_base; const uint32_t *flash_regs; bool otp_enabled; + bool use_flashloader; enum stm32l4_rdp rdp; bool tzen; + uint32_t optr; }; enum stm32_bank_id { @@ -226,7 +269,7 @@ struct stm32l4_wrp { }; /* human readable list of families this drivers supports (sorted alphabetically) */ -static const char *device_families = "STM32G0/G4/L4/L4+/L5/WB/WL"; +static const char *device_families = "STM32G0/G4/L4/L4+/L5/U5/WB/WL"; static const struct stm32l4_rev stm32_415_revs[] = { { 0x1000, "1" }, { 0x1001, "2" }, { 0x1003, "3" }, { 0x1007, "4" } @@ -256,6 +299,10 @@ static const struct stm32l4_rev stm32_466_revs[] = { { 0x1000, "A" }, { 0x1001, "Z" }, { 0x2000, "B" }, }; +static const struct stm32l4_rev stm32_467_revs[] = { + { 0x1000, "A" }, +}; + static const struct stm32l4_rev stm32_468_revs[] = { { 0x1000, "A" }, { 0x2000, "B" }, { 0x2001, "Z" }, }; @@ -280,6 +327,10 @@ static const struct stm32l4_rev stm32_479_revs[] = { { 0x1000, "A" }, }; +static const struct stm32l4_rev stm32_482_revs[] = { + { 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2000, "B" }, +}; + static const struct stm32l4_rev stm32_495_revs[] = { { 0x2001, "2.1" }, }; @@ -301,7 +352,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 1024, .flags = F_HAS_DUAL_BANK, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -314,7 +364,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 256, .flags = F_NONE, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -327,7 +376,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 128, .flags = F_NONE, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -340,7 +388,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 1024, .flags = F_HAS_DUAL_BANK, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -353,7 +400,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 512, .flags = F_NONE, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -366,7 +412,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 128, .flags = F_NONE, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -379,7 +424,18 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 64, .flags = F_NONE, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, + .fsize_addr = 0x1FFF75E0, + .otp_base = 0x1FFF7000, + .otp_size = 1024, + }, + { + .id = 0x467, + .revs = stm32_467_revs, + .num_revs = ARRAY_SIZE(stm32_467_revs), + .device_str = "STM32G0Bx/G0Cx", + .max_flash_size_kb = 512, + .flags = F_HAS_DUAL_BANK, + .flash_regs_base = 0x40022000, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -392,7 +448,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 128, .flags = F_NONE, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -405,7 +460,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 512, .flags = F_HAS_DUAL_BANK | F_USE_ALL_WRPXX, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -418,7 +472,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 2048, .flags = F_HAS_DUAL_BANK | F_USE_ALL_WRPXX, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -431,7 +484,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 1024, .flags = F_HAS_DUAL_BANK | F_USE_ALL_WRPXX, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -442,9 +494,8 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .num_revs = ARRAY_SIZE(stm32_472_revs), .device_str = "STM32L55/L56xx", .max_flash_size_kb = 512, - .flags = F_HAS_DUAL_BANK | F_USE_ALL_WRPXX | F_HAS_TZ, + .flags = F_HAS_DUAL_BANK | F_USE_ALL_WRPXX | F_HAS_TZ | F_HAS_L5_FLASH_REGS, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l5_ns_flash_regs, .fsize_addr = 0x0BFA05E0, .otp_base = 0x0BFA0000, .otp_size = 512, @@ -457,11 +508,22 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 512, .flags = F_NONE, .flash_regs_base = 0x40022000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, }, + { + .id = 0x482, + .revs = stm32_482_revs, + .num_revs = ARRAY_SIZE(stm32_482_revs), + .device_str = "STM32U57/U58xx", + .max_flash_size_kb = 2048, + .flags = F_HAS_DUAL_BANK | F_QUAD_WORD_PROG | F_HAS_TZ | F_HAS_L5_FLASH_REGS, + .flash_regs_base = 0x40022000, + .fsize_addr = 0x0BFA07A0, + .otp_base = 0x0BFA0000, + .otp_size = 512, + }, { .id = 0x495, .revs = stm32_495_revs, @@ -470,7 +532,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 1024, .flags = F_NONE, .flash_regs_base = 0x58004000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -483,7 +544,6 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .max_flash_size_kb = 512, .flags = F_NONE, .flash_regs_base = 0x58004000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -492,11 +552,10 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .id = 0x497, .revs = stm32_497_revs, .num_revs = ARRAY_SIZE(stm32_497_revs), - .device_str = "STM32WLEx", + .device_str = "STM32WLEx/WL5x", .max_flash_size_kb = 256, .flags = F_NONE, .flash_regs_base = 0x58004000, - .default_flash_regs = stm32l4_flash_regs, .fsize_addr = 0x1FFF75E0, .otp_base = 0x1FFF7000, .otp_size = 1024, @@ -520,13 +579,10 @@ FLASH_BANK_COMMAND_HANDLER(stm32l4_flash_bank_command) return ERROR_FAIL; /* Checkme: What better error to use?*/ bank->driver_priv = stm32l4_info; - /* The flash write must be aligned to a double word (8-bytes) boundary. - * Ask the flash infrastructure to ensure required alignment */ - bank->write_start_alignment = bank->write_end_alignment = 8; - stm32l4_info->probed = false; stm32l4_info->otp_enabled = false; stm32l4_info->user_bank_size = bank->size; + stm32l4_info->use_flashloader = true; return ERROR_OK; } @@ -619,16 +675,16 @@ static inline bool stm32l4_otp_is_enabled(struct flash_bank *bank) return stm32l4_info->otp_enabled; } -static void stm32l4_sync_rdp_tzen(struct flash_bank *bank, uint32_t optr_value) +static void stm32l4_sync_rdp_tzen(struct flash_bank *bank) { struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; bool tzen = false; if (stm32l4_info->part_info->flags & F_HAS_TZ) - tzen = (optr_value & FLASH_TZEN) != 0; + tzen = (stm32l4_info->optr & FLASH_TZEN) != 0; - uint32_t rdp = optr_value & FLASH_RDP_MASK; + uint32_t rdp = stm32l4_info->optr & FLASH_RDP_MASK; /* for devices without TrustZone: * RDP level 0 and 2 values are to 0xAA and 0xCC @@ -651,7 +707,7 @@ static void stm32l4_sync_rdp_tzen(struct flash_bank *bank, uint32_t optr_value) static inline uint32_t stm32l4_get_flash_reg(struct flash_bank *bank, uint32_t reg_offset) { struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; - return stm32l4_info->part_info->flash_regs_base + reg_offset; + return stm32l4_info->flash_regs_base + reg_offset; } static inline uint32_t stm32l4_get_flash_reg_by_index(struct flash_bank *bank, @@ -687,6 +743,7 @@ static inline int stm32l4_write_flash_reg_by_index(struct flash_bank *bank, static int stm32l4_wait_status_busy(struct flash_bank *bank, int timeout) { + struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; uint32_t status; int retval = ERROR_OK; @@ -696,7 +753,7 @@ static int stm32l4_wait_status_busy(struct flash_bank *bank, int timeout) if (retval != ERROR_OK) return retval; LOG_DEBUG("status: 0x%" PRIx32 "", status); - if ((status & FLASH_BSY) == 0) + if ((status & stm32l4_info->sr_bsy_mask) == 0) break; if (timeout-- <= 0) { LOG_ERROR("timed out waiting for flash"); @@ -723,14 +780,65 @@ static int stm32l4_wait_status_busy(struct flash_bank *bank, int timeout) return retval; } +/** set all FLASH_SECBB registers to the same value */ +static int stm32l4_set_secbb(struct flash_bank *bank, uint32_t value) +{ + /* This function should be used only with device with TrustZone, do just a security check */ + struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; + assert(stm32l4_info->part_info->flags & F_HAS_TZ); + + /* based on RM0438 Rev6 for STM32L5x devices: + * to modify a page block-based security attribution, it is recommended to + * 1- check that no flash operation is ongoing on the related page + * 2- add ISB instruction after modifying the page security attribute in SECBBxRy + * this step is not need in case of JTAG direct access + */ + int retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT); + if (retval != ERROR_OK) + return retval; + + /* write SECBBxRy registers */ + LOG_DEBUG("setting secure block-based areas registers (SECBBxRy) to 0x%08x", value); + + const uint8_t secbb_regs[] = { + FLASH_SECBB1(1), FLASH_SECBB1(2), FLASH_SECBB1(3), FLASH_SECBB1(4), /* bank 1 SECBB register offsets */ + FLASH_SECBB2(1), FLASH_SECBB2(2), FLASH_SECBB2(3), FLASH_SECBB2(4) /* bank 2 SECBB register offsets */ + }; + + + unsigned int num_secbb_regs = ARRAY_SIZE(secbb_regs); + + /* in single bank mode, it's useless to modify FLASH_SECBB2Rx registers + * then consider only the first half of secbb_regs + */ + if (!stm32l4_info->dual_bank_mode) + num_secbb_regs /= 2; + + for (unsigned int i = 0; i < num_secbb_regs; i++) { + retval = stm32l4_write_flash_reg(bank, secbb_regs[i], value); + if (retval != ERROR_OK) + return retval; + } + + return ERROR_OK; +} + +static inline int stm32l4_get_flash_cr_with_lock_index(struct flash_bank *bank) +{ + struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; + return (stm32l4_info->flash_regs[STM32_FLASH_CR_WLK_INDEX]) ? + STM32_FLASH_CR_WLK_INDEX : STM32_FLASH_CR_INDEX; +} + static int stm32l4_unlock_reg(struct flash_bank *bank) { + const uint32_t flash_cr_index = stm32l4_get_flash_cr_with_lock_index(bank); uint32_t ctrl; /* first check if not already unlocked * otherwise writing on STM32_FLASH_KEYR will fail */ - int retval = stm32l4_read_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, &ctrl); + int retval = stm32l4_read_flash_reg_by_index(bank, flash_cr_index, &ctrl); if (retval != ERROR_OK) return retval; @@ -746,7 +854,7 @@ static int stm32l4_unlock_reg(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - retval = stm32l4_read_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, &ctrl); + retval = stm32l4_read_flash_reg_by_index(bank, flash_cr_index, &ctrl); if (retval != ERROR_OK) return retval; @@ -760,9 +868,10 @@ static int stm32l4_unlock_reg(struct flash_bank *bank) static int stm32l4_unlock_option_reg(struct flash_bank *bank) { + const uint32_t flash_cr_index = stm32l4_get_flash_cr_with_lock_index(bank); uint32_t ctrl; - int retval = stm32l4_read_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, &ctrl); + int retval = stm32l4_read_flash_reg_by_index(bank, flash_cr_index, &ctrl); if (retval != ERROR_OK) return retval; @@ -778,7 +887,7 @@ static int stm32l4_unlock_option_reg(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - retval = stm32l4_read_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, &ctrl); + retval = stm32l4_read_flash_reg_by_index(bank, flash_cr_index, &ctrl); if (retval != ERROR_OK) return retval; @@ -790,9 +899,47 @@ static int stm32l4_unlock_option_reg(struct flash_bank *bank) return ERROR_OK; } +static int stm32l4_perform_obl_launch(struct flash_bank *bank) +{ + int retval, retval2; + + retval = stm32l4_unlock_reg(bank); + if (retval != ERROR_OK) + goto err_lock; + + retval = stm32l4_unlock_option_reg(bank); + if (retval != ERROR_OK) + goto err_lock; + + /* Set OBL_LAUNCH bit in CR -> system reset and option bytes reload, + * but the RMs explicitly do *NOT* list this as power-on reset cause, and: + * "Note: If the read protection is set while the debugger is still + * connected through JTAG/SWD, apply a POR (power-on reset) instead of a system reset." + */ + + /* "Setting OBL_LAUNCH generates a reset so the option byte loading is performed under system reset" */ + /* Due to this reset ST-Link reports an SWD_DP_ERROR, despite the write was successful, + * then just ignore the returned value */ + stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, FLASH_OBL_LAUNCH); + + /* Need to re-probe after change */ + struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; + stm32l4_info->probed = false; + +err_lock: + retval2 = stm32l4_write_flash_reg_by_index(bank, stm32l4_get_flash_cr_with_lock_index(bank), + FLASH_LOCK | FLASH_OPTLOCK); + + if (retval != ERROR_OK) + return retval; + + return retval2; +} + static int stm32l4_write_option(struct flash_bank *bank, uint32_t reg_offset, uint32_t value, uint32_t mask) { + struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; uint32_t optiondata; int retval, retval2; @@ -800,6 +947,12 @@ static int stm32l4_write_option(struct flash_bank *bank, uint32_t reg_offset, if (retval != ERROR_OK) return retval; + /* for STM32L5 and similar devices, use always non-secure + * registers for option bytes programming */ + const uint32_t *saved_flash_regs = stm32l4_info->flash_regs; + if (stm32l4_info->part_info->flags & F_HAS_L5_FLASH_REGS) + stm32l4_info->flash_regs = stm32l5_ns_flash_regs; + retval = stm32l4_unlock_reg(bank); if (retval != ERROR_OK) goto err_lock; @@ -821,7 +974,9 @@ static int stm32l4_write_option(struct flash_bank *bank, uint32_t reg_offset, retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT); err_lock: - retval2 = stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, FLASH_LOCK | FLASH_OPTLOCK); + retval2 = stm32l4_write_flash_reg_by_index(bank, stm32l4_get_flash_cr_with_lock_index(bank), + FLASH_LOCK | FLASH_OPTLOCK); + stm32l4_info->flash_regs = saved_flash_regs; if (retval != ERROR_OK) return retval; @@ -969,6 +1124,16 @@ static int stm32l4_erase(struct flash_bank *bank, unsigned int first, return ERROR_TARGET_NOT_HALTED; } + if (stm32l4_info->tzen && (stm32l4_info->rdp == RDP_LEVEL_0)) { + /* set all FLASH pages as secure */ + retval = stm32l4_set_secbb(bank, FLASH_SECBB_SECURE); + if (retval != ERROR_OK) { + /* restore all FLASH pages as non-secure */ + stm32l4_set_secbb(bank, FLASH_SECBB_NON_SECURE); /* ignore the return value */ + return retval; + } + } + retval = stm32l4_unlock_reg(bank); if (retval != ERROR_OK) goto err_lock; @@ -991,7 +1156,7 @@ static int stm32l4_erase(struct flash_bank *bank, unsigned int first, if (i >= stm32l4_info->bank1_sectors) { uint8_t snb; snb = i - stm32l4_info->bank1_sectors; - erase_flags |= snb << FLASH_PAGE_SHIFT | FLASH_CR_BKER; + erase_flags |= snb << FLASH_PAGE_SHIFT | stm32l4_info->cr_bker_mask; } else erase_flags |= i << FLASH_PAGE_SHIFT; retval = stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, erase_flags); @@ -1001,12 +1166,17 @@ static int stm32l4_erase(struct flash_bank *bank, unsigned int first, retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT); if (retval != ERROR_OK) break; - - bank->sectors[i].is_erased = 1; } err_lock: - retval2 = stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, FLASH_LOCK); + retval2 = stm32l4_write_flash_reg_by_index(bank, stm32l4_get_flash_cr_with_lock_index(bank), FLASH_LOCK); + + if (stm32l4_info->tzen && (stm32l4_info->rdp == RDP_LEVEL_0)) { + /* restore all FLASH pages as non-secure */ + int retval3 = stm32l4_set_secbb(bank, FLASH_SECBB_NON_SECURE); + if (retval3 != ERROR_OK) + return retval3; + } if (retval != ERROR_OK) return retval; @@ -1143,11 +1313,12 @@ static int stm32l4_protect(struct flash_bank *bank, int set, unsigned int first, return stm32l4_write_all_wrpxy(bank, wrpxy, n_wrp); } -/* Count is in double-words */ +/* count is the size divided by stm32l4_info->data_width */ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { struct target *target = bank->target; + struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; uint32_t buffer_size; struct working_area *write_algorithm; struct working_area *source; @@ -1174,10 +1345,15 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, return retval; } - /* memory buffer, size *must* be multiple of dword plus one dword for rp and one for wp */ + /* memory buffer, size *must* be multiple of stm32l4_info->data_width + * plus one dword for rp and one for wp */ + /* FIXME, currently only STM32U5 devices do have a different data_width, + * but STM32U5 device flash programming does not go through this function + * so temporarily continue to consider the default data_width = 8 */ buffer_size = target_get_working_area_avail(target) & ~(2 * sizeof(uint32_t) - 1); if (buffer_size < 256) { LOG_WARNING("large enough working area not available, can't do block memory writes"); + target_free_working_area(target, write_algorithm); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } else if (buffer_size > 16384) { /* probably won't benefit from more than 16k ... */ @@ -1206,7 +1382,7 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, buf_set_u32(reg_params[4].value, 0, 32, stm32l4_get_flash_reg_by_index(bank, STM32_FLASH_SR_INDEX)); buf_set_u32(reg_params[5].value, 0, 32, stm32l4_get_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX)); - retval = target_run_flash_async_algorithm(target, buffer, count, 8, + retval = target_run_flash_async_algorithm(target, buffer, count, stm32l4_info->data_width, 0, NULL, ARRAY_SIZE(reg_params), reg_params, source->address, source->size, @@ -1242,9 +1418,55 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, return retval; } +/* count is the size divided by stm32l4_info->data_width */ +static int stm32l4_write_block_without_loader(struct flash_bank *bank, const uint8_t *buffer, + uint32_t offset, uint32_t count) +{ + struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; + struct target *target = bank->target; + uint32_t address = bank->base + offset; + int retval = ERROR_OK; + + /* wait for BSY bit */ + retval = stm32l4_wait_status_busy(bank, FLASH_WRITE_TIMEOUT); + if (retval != ERROR_OK) + return retval; + + /* set PG in FLASH_CR */ + retval = stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, FLASH_PG); + if (retval != ERROR_OK) + return retval; + + + /* write directly to flash memory */ + const uint8_t *src = buffer; + const uint32_t data_width_in_words = stm32l4_info->data_width / 4; + while (count--) { + retval = target_write_memory(target, address, 4, data_width_in_words, src); + if (retval != ERROR_OK) + return retval; + + /* wait for BSY bit */ + retval = stm32l4_wait_status_busy(bank, FLASH_WRITE_TIMEOUT); + if (retval != ERROR_OK) + return retval; + + src += stm32l4_info->data_width; + address += stm32l4_info->data_width; + } + + /* reset PG in FLASH_CR */ + retval = stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, 0); + if (retval != ERROR_OK) + return retval; + + return retval; +} + static int stm32l4_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { + struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; int retval = ERROR_OK, retval2; if (stm32l4_is_otp(bank) && !stm32l4_otp_is_enabled(bank)) { @@ -1257,10 +1479,13 @@ static int stm32l4_write(struct flash_bank *bank, const uint8_t *buffer, return ERROR_TARGET_NOT_HALTED; } - /* The flash write must be aligned to a double word (8-bytes) boundary. + /* ensure that stm32l4_info->data_width is 'at least' a multiple of dword */ + assert(stm32l4_info->data_width % 8 == 0); + + /* The flash write must be aligned to the 'stm32l4_info->data_width' boundary. * The flash infrastructure ensures it, do just a security check */ - assert(offset % 8 == 0); - assert(count % 8 == 0); + assert(offset % stm32l4_info->data_width == 0); + assert(count % stm32l4_info->data_width == 0); /* STM32G4xxx Cat. 3 devices may have gaps between banks, check whether * data to be written does not go into a gap: @@ -1299,14 +1524,64 @@ static int stm32l4_write(struct flash_bank *bank, const uint8_t *buffer, if (retval != ERROR_OK) return retval; + if (stm32l4_info->tzen && (stm32l4_info->rdp == RDP_LEVEL_0)) { + /* set all FLASH pages as secure */ + retval = stm32l4_set_secbb(bank, FLASH_SECBB_SECURE); + if (retval != ERROR_OK) { + /* restore all FLASH pages as non-secure */ + stm32l4_set_secbb(bank, FLASH_SECBB_NON_SECURE); /* ignore the return value */ + return retval; + } + } + retval = stm32l4_unlock_reg(bank); if (retval != ERROR_OK) goto err_lock; - retval = stm32l4_write_block(bank, buffer, offset, count / 8); + /** + * FIXME update the flash loader to use a custom FLASH_SR_BSY mask + * Workaround for STM32G0Bx/G0Cx devices in dual bank mode, + * as the flash loader does not use the SR_BSY2 + */ + bool use_flashloader = stm32l4_info->use_flashloader; + if ((stm32l4_info->part_info->id == 0x467) && stm32l4_info->dual_bank_mode) { + LOG_INFO("Couldn't use the flash loader in dual-bank mode"); + use_flashloader = false; + } else if (stm32l4_info->part_info->id == 0x482) { + /** + * FIXME the current flashloader does not support writing in quad-words + * which is required for STM32U5 devices. + */ + use_flashloader = false; + } + + if (use_flashloader) { + /* For TrustZone enabled devices, when TZEN is set and RDP level is 0.5, + * the debug is possible only in non-secure state. + * Thus means the flashloader will run in non-secure mode, + * and the workarea need to be in non-secure RAM */ + if (stm32l4_info->tzen && (stm32l4_info->rdp == RDP_LEVEL_0_5)) + LOG_INFO("RDP level is 0.5, the work-area should reside in non-secure RAM"); + + retval = stm32l4_write_block(bank, buffer, offset, + count / stm32l4_info->data_width); + } + + if (!use_flashloader || retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { + LOG_INFO("falling back to single memory accesses"); + retval = stm32l4_write_block_without_loader(bank, buffer, offset, + count / stm32l4_info->data_width); + } err_lock: - retval2 = stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, FLASH_LOCK); + retval2 = stm32l4_write_flash_reg_by_index(bank, stm32l4_get_flash_cr_with_lock_index(bank), FLASH_LOCK); + + if (stm32l4_info->tzen && (stm32l4_info->rdp == RDP_LEVEL_0)) { + /* restore all FLASH pages as non-secure */ + int retval3 = stm32l4_set_secbb(bank, FLASH_SECBB_NON_SECURE); + if (retval3 != ERROR_OK) + return retval3; + } if (retval != ERROR_OK) { LOG_ERROR("block write failed"); @@ -1320,14 +1595,38 @@ static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id) int retval; /* try reading possible IDCODE registers, in the following order */ - uint32_t DBGMCU_IDCODE[] = {DBGMCU_IDCODE_L4_G4, DBGMCU_IDCODE_G0, DBGMCU_IDCODE_L5}; + uint32_t dbgmcu_idcode[] = {DBGMCU_IDCODE_L4_G4, DBGMCU_IDCODE_G0, DBGMCU_IDCODE_L5}; - for (unsigned int i = 0; i < ARRAY_SIZE(DBGMCU_IDCODE); i++) { - retval = target_read_u32(bank->target, DBGMCU_IDCODE[i], id); + for (unsigned int i = 0; i < ARRAY_SIZE(dbgmcu_idcode); i++) { + retval = target_read_u32(bank->target, dbgmcu_idcode[i], id); if ((retval == ERROR_OK) && ((*id & 0xfff) != 0) && ((*id & 0xfff) != 0xfff)) return ERROR_OK; } + /* Workaround for STM32WL5x devices: + * DBGMCU_IDCODE cannot be read using CPU1 (Cortex-M0+) at AP1, + * to solve this read the UID64 (IEEE 64-bit unique device ID register) */ + + struct cortex_m_common *cortex_m = target_to_cm(bank->target); + + if (cortex_m->core_info->partno == CORTEX_M0P_PARTNO && cortex_m->armv7m.debug_ap->ap_num == 1) { + uint32_t uid64_ids; + + /* UID64 is contains + * - Bits 63:32 : DEVNUM (unique device number, different for each individual device) + * - Bits 31:08 : STID (company ID) = 0x0080E1 + * - Bits 07:00 : DEVID (device ID) = 0x15 + * + * read only the fixed values {STID,DEVID} from UID64_IDS to identify the device as STM32WLx + */ + retval = target_read_u32(bank->target, UID64_IDS, &uid64_ids); + if (retval == ERROR_OK && uid64_ids == UID64_IDS_STM32WL) { + /* force the DEV_ID to 0x497 and the REV_ID to unknown */ + *id = 0x00000497; + return ERROR_OK; + } + } + LOG_ERROR("can't get the device id"); return (retval == ERROR_OK) ? ERROR_FAIL : retval; } @@ -1358,10 +1657,10 @@ static const char *get_stm32l4_bank_type_str(struct flash_bank *bank) static int stm32l4_probe(struct flash_bank *bank) { struct target *target = bank->target; + struct armv7m_common *armv7m = target_to_armv7m(target); struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; const struct stm32l4_part_info *part_info; uint16_t flash_size_kb = 0xffff; - uint32_t options; stm32l4_info->probed = false; @@ -1388,18 +1687,41 @@ static int stm32l4_probe(struct flash_bank *bank) const char *rev_str = get_stm32l4_rev_str(bank); const uint16_t rev_id = stm32l4_info->idcode >> 16; - LOG_INFO("device idcode = 0x%08" PRIx32 " (%s - Rev %s : 0x%04x - %s-bank)", - stm32l4_info->idcode, part_info->device_str, rev_str, rev_id, - get_stm32l4_bank_type_str(bank)); + LOG_INFO("device idcode = 0x%08" PRIx32 " (%s - Rev %s : 0x%04x)", + stm32l4_info->idcode, part_info->device_str, rev_str, rev_id); - stm32l4_info->flash_regs = stm32l4_info->part_info->default_flash_regs; + stm32l4_info->flash_regs_base = stm32l4_info->part_info->flash_regs_base; + stm32l4_info->data_width = (part_info->flags & F_QUAD_WORD_PROG) ? 16 : 8; + stm32l4_info->cr_bker_mask = FLASH_BKER; + stm32l4_info->sr_bsy_mask = FLASH_BSY; + + /* Set flash write alignment boundaries. + * Ask the flash infrastructure to ensure required alignment */ + bank->write_start_alignment = bank->write_end_alignment = stm32l4_info->data_width; + + /* initialise the flash registers layout */ + if (part_info->flags & F_HAS_L5_FLASH_REGS) + stm32l4_info->flash_regs = stm32l5_ns_flash_regs; + else + stm32l4_info->flash_regs = stm32l4_flash_regs; /* read flash option register */ - retval = stm32l4_read_flash_reg_by_index(bank, STM32_FLASH_OPTR_INDEX, &options); + retval = stm32l4_read_flash_reg_by_index(bank, STM32_FLASH_OPTR_INDEX, &stm32l4_info->optr); if (retval != ERROR_OK) return retval; - stm32l4_sync_rdp_tzen(bank, options); + stm32l4_sync_rdp_tzen(bank); + + /* for devices with trustzone, use flash secure registers when TZEN=1 and RDP is LEVEL_0 */ + if (stm32l4_info->tzen && (stm32l4_info->rdp == RDP_LEVEL_0)) { + if (part_info->flags & F_HAS_L5_FLASH_REGS) { + stm32l4_info->flash_regs_base |= STM32L5_REGS_SEC_OFFSET; + stm32l4_info->flash_regs = stm32l5_s_flash_regs; + } else { + LOG_ERROR("BUG: device supported incomplete"); + return ERROR_NOT_IMPLEMENTED; + } + } if (part_info->flags & F_HAS_TZ) LOG_INFO("TZEN = %d : TrustZone %s by option bytes", @@ -1427,7 +1749,7 @@ static int stm32l4_probe(struct flash_bank *bank) stm32l4_info->probed = true; return ERROR_OK; - } else if (bank->base != STM32_FLASH_BANK_BASE) { + } else if (bank->base != STM32_FLASH_BANK_BASE && bank->base != STM32_FLASH_S_BANK_BASE) { LOG_ERROR("invalid bank base address"); return ERROR_FAIL; } @@ -1481,7 +1803,7 @@ static int stm32l4_probe(struct flash_bank *bank) stm32l4_info->bank1_sectors = num_pages; /* check DUAL_BANK bit[21] if the flash is less than 1M */ - if (flash_size_kb == 1024 || (options & BIT(21))) { + if (flash_size_kb == 1024 || (stm32l4_info->optr & BIT(21))) { stm32l4_info->dual_bank_mode = true; stm32l4_info->bank1_sectors = num_pages / 2; } @@ -1493,12 +1815,25 @@ static int stm32l4_probe(struct flash_bank *bank) case 0x466: /* STM32G03/G04xx */ case 0x468: /* STM32G43/G44xx */ case 0x479: /* STM32G49/G4Axx */ - case 0x497: /* STM32WLEx */ /* single bank flash */ page_size_kb = 2; num_pages = flash_size_kb / page_size_kb; stm32l4_info->bank1_sectors = num_pages; break; + case 0x467: /* STM32G0B/G0Cxx */ + /* single/dual bank depending on bit(21) */ + page_size_kb = 2; + num_pages = flash_size_kb / page_size_kb; + stm32l4_info->bank1_sectors = num_pages; + stm32l4_info->cr_bker_mask = FLASH_BKER_G0; + + /* check DUAL_BANK bit */ + if (stm32l4_info->optr & BIT(21)) { + stm32l4_info->sr_bsy_mask = FLASH_BSY | FLASH_BSY2; + stm32l4_info->dual_bank_mode = true; + stm32l4_info->bank1_sectors = num_pages / 2; + } + break; case 0x469: /* STM32G47/G48xx */ /* STM32G47/8 can be single/dual bank: * if DUAL_BANK = 0 -> single bank @@ -1507,7 +1842,7 @@ static int stm32l4_probe(struct flash_bank *bank) page_size_kb = 4; num_pages = flash_size_kb / page_size_kb; stm32l4_info->bank1_sectors = num_pages; - if (options & BIT(22)) { + if (stm32l4_info->optr & BIT(22)) { stm32l4_info->dual_bank_mode = true; page_size_kb = 2; num_pages = flash_size_kb / page_size_kb; @@ -1531,8 +1866,8 @@ static int stm32l4_probe(struct flash_bank *bank) num_pages = flash_size_kb / page_size_kb; stm32l4_info->bank1_sectors = num_pages; use_dbank_bit = flash_size_kb == part_info->max_flash_size_kb; - if ((use_dbank_bit && (options & BIT(22))) || - (!use_dbank_bit && (options & BIT(21)))) { + if ((use_dbank_bit && (stm32l4_info->optr & BIT(22))) || + (!use_dbank_bit && (stm32l4_info->optr & BIT(21)))) { stm32l4_info->dual_bank_mode = true; page_size_kb = 4; num_pages = flash_size_kb / page_size_kb; @@ -1548,14 +1883,26 @@ static int stm32l4_probe(struct flash_bank *bank) num_pages = flash_size_kb / page_size_kb; stm32l4_info->bank1_sectors = num_pages; use_dbank_bit = flash_size_kb == part_info->max_flash_size_kb; - if ((use_dbank_bit && (options & BIT(22))) || - (!use_dbank_bit && (options & BIT(21)))) { + if ((use_dbank_bit && (stm32l4_info->optr & BIT(22))) || + (!use_dbank_bit && (stm32l4_info->optr & BIT(21)))) { stm32l4_info->dual_bank_mode = true; page_size_kb = 2; num_pages = flash_size_kb / page_size_kb; stm32l4_info->bank1_sectors = num_pages / 2; } break; + case 0x482: /* STM32U57/U58xx */ + /* if flash size is max (2M) the device is always dual bank + * otherwise check DUALBANK bit(21) + */ + page_size_kb = 8; + num_pages = flash_size_kb / page_size_kb; + stm32l4_info->bank1_sectors = num_pages; + if ((flash_size_kb == part_info->max_flash_size_kb) || (stm32l4_info->optr & BIT(21))) { + stm32l4_info->dual_bank_mode = true; + stm32l4_info->bank1_sectors = num_pages / 2; + } + break; case 0x495: /* STM32WB5x */ case 0x496: /* STM32WB3x */ /* single bank flash */ @@ -1563,6 +1910,14 @@ static int stm32l4_probe(struct flash_bank *bank) num_pages = flash_size_kb / page_size_kb; stm32l4_info->bank1_sectors = num_pages; break; + case 0x497: /* STM32WLEx/WL5x */ + /* single bank flash */ + page_size_kb = 2; + num_pages = flash_size_kb / page_size_kb; + stm32l4_info->bank1_sectors = num_pages; + if (armv7m->debug_ap->ap_num == 1) + stm32l4_info->flash_regs = stm32wl_cpu2_flash_regs; + break; default: LOG_ERROR("unsupported device"); return ERROR_FAIL; @@ -1591,7 +1946,7 @@ static int stm32l4_probe(struct flash_bank *bank) * max_flash_size is always power of two, so max_pages too */ uint32_t max_pages = stm32l4_info->part_info->max_flash_size_kb / page_size_kb; - assert((max_pages & (max_pages - 1)) == 0); + assert(IS_PWR_OF_2(max_pages)); /* in dual bank mode number of pages is doubled, but extra bit is bank selection */ stm32l4_info->wrpxxr_mask = ((max_pages >> (stm32l4_info->dual_bank_mode ? 1 : 0)) - 1); @@ -1603,7 +1958,7 @@ static int stm32l4_probe(struct flash_bank *bank) bank->size = (flash_size_kb + gap_size_kb) * 1024; bank->num_sectors = num_pages; bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - if (bank->sectors == NULL) { + if (!bank->sectors) { LOG_ERROR("failed to allocate bank sectors"); return ERROR_FAIL; } @@ -1626,8 +1981,17 @@ static int stm32l4_probe(struct flash_bank *bank) static int stm32l4_auto_probe(struct flash_bank *bank) { struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; - if (stm32l4_info->probed) - return ERROR_OK; + if (stm32l4_info->probed) { + uint32_t optr_cur; + + /* read flash option register and re-probe if optr value is changed */ + int retval = stm32l4_read_flash_reg_by_index(bank, STM32_FLASH_OPTR_INDEX, &optr_cur); + if (retval != ERROR_OK) + return retval; + + if (stm32l4_info->optr == optr_cur) + return ERROR_OK; + } return stm32l4_probe(bank); } @@ -1671,6 +2035,16 @@ static int stm32l4_mass_erase(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } + if (stm32l4_info->tzen && (stm32l4_info->rdp == RDP_LEVEL_0)) { + /* set all FLASH pages as secure */ + retval = stm32l4_set_secbb(bank, FLASH_SECBB_SECURE); + if (retval != ERROR_OK) { + /* restore all FLASH pages as non-secure */ + stm32l4_set_secbb(bank, FLASH_SECBB_NON_SECURE); /* ignore the return value */ + return retval; + } + } + retval = stm32l4_unlock_reg(bank); if (retval != ERROR_OK) goto err_lock; @@ -1691,7 +2065,14 @@ static int stm32l4_mass_erase(struct flash_bank *bank) retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT); err_lock: - retval2 = stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, FLASH_LOCK); + retval2 = stm32l4_write_flash_reg_by_index(bank, stm32l4_get_flash_cr_with_lock_index(bank), FLASH_LOCK); + + if (stm32l4_info->tzen && (stm32l4_info->rdp == RDP_LEVEL_0)) { + /* restore all FLASH pages as non-secure */ + int retval3 = stm32l4_set_secbb(bank, FLASH_SECBB_NON_SECURE); + if (retval3 != ERROR_OK) + return retval3; + } if (retval != ERROR_OK) return retval; @@ -1708,19 +2089,14 @@ COMMAND_HANDLER(stm32l4_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32l4_mass_erase(bank); - if (retval == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - + if (retval == ERROR_OK) command_print(CMD, "stm32l4x mass erase complete"); - } else { + else command_print(CMD, "stm32l4x mass erase failed"); - } return retval; } @@ -1734,17 +2110,17 @@ COMMAND_HANDLER(stm32l4_handle_option_read_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; uint32_t reg_offset, reg_addr; uint32_t value = 0; - reg_offset = strtoul(CMD_ARGV[1], NULL, 16); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], reg_offset); reg_addr = stm32l4_get_flash_reg(bank, reg_offset); retval = stm32l4_read_flash_reg(bank, reg_offset, &value); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32 "", reg_addr, value); @@ -1761,17 +2137,18 @@ COMMAND_HANDLER(stm32l4_handle_option_write_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; uint32_t reg_offset; uint32_t value = 0; uint32_t mask = 0xFFFFFFFF; - reg_offset = strtoul(CMD_ARGV[1], NULL, 16); - value = strtoul(CMD_ARGV[2], NULL, 16); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], reg_offset); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], value); + if (CMD_ARGC > 3) - mask = strtoul(CMD_ARGV[3], NULL, 16); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], mask); command_print(CMD, "%s Option written.\n" "INFO: a reset or power cycle is required " @@ -1781,6 +2158,87 @@ COMMAND_HANDLER(stm32l4_handle_option_write_command) return retval; } +COMMAND_HANDLER(stm32l4_handle_trustzone_command) +{ + if (CMD_ARGC < 1 || CMD_ARGC > 2) + return ERROR_COMMAND_SYNTAX_ERROR; + + struct flash_bank *bank; + int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); + if (retval != ERROR_OK) + return retval; + + struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; + if (!(stm32l4_info->part_info->flags & F_HAS_TZ)) { + LOG_ERROR("This device does not have a TrustZone"); + return ERROR_FAIL; + } + + retval = stm32l4_read_flash_reg_by_index(bank, STM32_FLASH_OPTR_INDEX, &stm32l4_info->optr); + if (retval != ERROR_OK) + return retval; + + stm32l4_sync_rdp_tzen(bank); + + if (CMD_ARGC == 1) { + /* only display the TZEN value */ + LOG_INFO("Global TrustZone Security is %s", stm32l4_info->tzen ? "enabled" : "disabled"); + return ERROR_OK; + } + + bool new_tzen; + COMMAND_PARSE_ENABLE(CMD_ARGV[1], new_tzen); + + if (new_tzen == stm32l4_info->tzen) { + LOG_INFO("The requested TZEN is already programmed"); + return ERROR_OK; + } + + if (new_tzen) { + if (stm32l4_info->rdp != RDP_LEVEL_0) { + LOG_ERROR("TZEN can be set only when RDP level is 0"); + return ERROR_FAIL; + } + retval = stm32l4_write_option(bank, stm32l4_info->flash_regs[STM32_FLASH_OPTR_INDEX], + FLASH_TZEN, FLASH_TZEN); + } else { + /* Deactivation of TZEN (from 1 to 0) is only possible when the RDP is + * changing to level 0 (from level 1 to level 0 or from level 0.5 to level 0). */ + if (stm32l4_info->rdp != RDP_LEVEL_1 && stm32l4_info->rdp != RDP_LEVEL_0_5) { + LOG_ERROR("Deactivation of TZEN is only possible when the RDP is changing to level 0"); + return ERROR_FAIL; + } + + retval = stm32l4_write_option(bank, stm32l4_info->flash_regs[STM32_FLASH_OPTR_INDEX], + RDP_LEVEL_0, FLASH_RDP_MASK | FLASH_TZEN); + } + + if (retval != ERROR_OK) + return retval; + + return stm32l4_perform_obl_launch(bank); +} + +COMMAND_HANDLER(stm32l4_handle_flashloader_command) +{ + if (CMD_ARGC < 1 || CMD_ARGC > 2) + return ERROR_COMMAND_SYNTAX_ERROR; + + struct flash_bank *bank; + int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); + if (retval != ERROR_OK) + return retval; + + struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; + + if (CMD_ARGC == 2) + COMMAND_PARSE_ENABLE(CMD_ARGV[1], stm32l4_info->use_flashloader); + + command_print(CMD, "FlashLoader usage is %s", stm32l4_info->use_flashloader ? "enabled" : "disabled"); + + return ERROR_OK; +} + COMMAND_HANDLER(stm32l4_handle_option_load_command) { if (CMD_ARGC != 1) @@ -1788,31 +2246,19 @@ COMMAND_HANDLER(stm32l4_handle_option_load_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; - retval = stm32l4_unlock_reg(bank); - if (ERROR_OK != retval) + retval = stm32l4_perform_obl_launch(bank); + if (retval != ERROR_OK) { + command_print(CMD, "stm32l4x option load failed"); return retval; + } - retval = stm32l4_unlock_option_reg(bank); - if (ERROR_OK != retval) - return retval; - - /* Set OBL_LAUNCH bit in CR -> system reset and option bytes reload, - * but the RMs explicitly do *NOT* list this as power-on reset cause, and: - * "Note: If the read protection is set while the debugger is still - * connected through JTAG/SWD, apply a POR (power-on reset) instead of a system reset." - */ - retval = stm32l4_write_flash_reg_by_index(bank, STM32_FLASH_CR_INDEX, FLASH_OBL_LAUNCH); command_print(CMD, "stm32l4x option load completed. Power-on reset might be required"); - /* Need to re-probe after change */ - struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv; - stm32l4_info->probed = false; - - return retval; + return ERROR_OK; } COMMAND_HANDLER(stm32l4_handle_lock_command) @@ -1824,7 +2270,7 @@ COMMAND_HANDLER(stm32l4_handle_lock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (stm32l4_is_otp(bank)) { @@ -1859,7 +2305,7 @@ COMMAND_HANDLER(stm32l4_handle_unlock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (stm32l4_is_otp(bank)) { @@ -1891,7 +2337,7 @@ COMMAND_HANDLER(stm32l4_handle_wrp_info_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (stm32l4_is_otp(bank)) { @@ -1963,7 +2409,7 @@ COMMAND_HANDLER(stm32l4_handle_otp_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (!stm32l4_is_otp(bank)) { @@ -1998,6 +2444,13 @@ static const struct command_registration stm32l4_exec_command_handlers[] = { .usage = "bank_id", .help = "Unlock entire protected flash device.", }, + { + .name = "flashloader", + .handler = stm32l4_handle_flashloader_command, + .mode = COMMAND_EXEC, + .usage = " [enable|disable]", + .help = "Configure the flashloader usage", + }, { .name = "mass_erase", .handler = stm32l4_handle_mass_erase_command, @@ -2019,6 +2472,13 @@ static const struct command_registration stm32l4_exec_command_handlers[] = { .usage = "bank_id reg_offset value mask", .help = "Write device option bit fields with provided value.", }, + { + .name = "trustzone", + .handler = stm32l4_handle_trustzone_command, + .mode = COMMAND_EXEC, + .usage = " [enable|disable]", + .help = "Configure TrustZone security", + }, { .name = "wrp_info", .handler = stm32l4_handle_wrp_info_command, diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h index 41b5ff82d..7b9162b08 100644 --- a/src/flash/nor/stm32l4x.h +++ b/src/flash/nor/stm32l4x.h @@ -19,32 +19,44 @@ #ifndef OPENOCD_FLASH_NOR_STM32L4X #define OPENOCD_FLASH_NOR_STM32L4X +/* IMPORTANT: this file is included by stm32l4x driver and flashloader, + * so please when changing this file, do not forget to check the flashloader */ + +/* FIXME: #include "helper/bits.h" cause build errors when compiling + * the flashloader, for now just redefine the needed 'BIT 'macro */ + +#ifndef BIT +#define BIT(nr) (1UL << (nr)) +#endif + /* FLASH_CR register bits */ -#define FLASH_PG (1 << 0) -#define FLASH_PER (1 << 1) -#define FLASH_MER1 (1 << 2) +#define FLASH_PG BIT(0) +#define FLASH_PER BIT(1) +#define FLASH_MER1 BIT(2) #define FLASH_PAGE_SHIFT 3 -#define FLASH_CR_BKER (1 << 11) -#define FLASH_MER2 (1 << 15) -#define FLASH_STRT (1 << 16) -#define FLASH_OPTSTRT (1 << 17) -#define FLASH_EOPIE (1 << 24) -#define FLASH_ERRIE (1 << 25) -#define FLASH_OBL_LAUNCH (1 << 27) -#define FLASH_OPTLOCK (1 << 30) -#define FLASH_LOCK (1 << 31) +#define FLASH_BKER BIT(11) +#define FLASH_BKER_G0 BIT(13) +#define FLASH_MER2 BIT(15) +#define FLASH_STRT BIT(16) +#define FLASH_OPTSTRT BIT(17) +#define FLASH_EOPIE BIT(24) +#define FLASH_ERRIE BIT(25) +#define FLASH_OBL_LAUNCH BIT(27) +#define FLASH_OPTLOCK BIT(30) +#define FLASH_LOCK BIT(31) /* FLASH_SR register bits */ -#define FLASH_BSY (1 << 16) +#define FLASH_BSY BIT(16) +#define FLASH_BSY2 BIT(17) /* Fast programming not used => related errors not used*/ -#define FLASH_PGSERR (1 << 7) /* Programming sequence error */ -#define FLASH_SIZERR (1 << 6) /* Size error */ -#define FLASH_PGAERR (1 << 5) /* Programming alignment error */ -#define FLASH_WRPERR (1 << 4) /* Write protection error */ -#define FLASH_PROGERR (1 << 3) /* Programming error */ -#define FLASH_OPERR (1 << 1) /* Operation error */ -#define FLASH_EOP (1 << 0) /* End of operation */ +#define FLASH_PGSERR BIT(7) /* Programming sequence error */ +#define FLASH_SIZERR BIT(6) /* Size error */ +#define FLASH_PGAERR BIT(5) /* Programming alignment error */ +#define FLASH_WRPERR BIT(4) /* Write protection error */ +#define FLASH_PROGERR BIT(3) /* Programming error */ +#define FLASH_OPERR BIT(1) /* Operation error */ +#define FLASH_EOP BIT(0) /* End of operation */ #define FLASH_ERROR (FLASH_PGSERR | FLASH_SIZERR | FLASH_PGAERR | \ FLASH_WRPERR | FLASH_PROGERR | FLASH_OPERR) @@ -58,13 +70,26 @@ /* FLASH_OPTR register bits */ #define FLASH_RDP_MASK 0xFF -#define FLASH_TZEN (1 << 31) +#define FLASH_TZEN BIT(31) + +/* FLASH secure block based bank 1/2 register offsets */ +#define FLASH_SECBB1(X) (0x80 + 4 * (X - 1)) +#define FLASH_SECBB2(X) (0xA0 + 4 * (X - 1)) + +#define FLASH_SECBB_SECURE 0xFFFFFFFF +#define FLASH_SECBB_NON_SECURE 0 /* other registers */ #define DBGMCU_IDCODE_G0 0x40015800 #define DBGMCU_IDCODE_L4_G4 0xE0042000 #define DBGMCU_IDCODE_L5 0xE0044000 +#define UID64_DEVNUM 0x1FFF7580 +#define UID64_IDS 0x1FFF7584 +#define UID64_IDS_STM32WL 0x0080E115 #define STM32_FLASH_BANK_BASE 0x08000000 +#define STM32_FLASH_S_BANK_BASE 0x0C000000 + +#define STM32L5_REGS_SEC_OFFSET 0x10000000 #endif diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c index 5ca424b87..488dc978a 100644 --- a/src/flash/nor/stm32lx.c +++ b/src/flash/nor/stm32lx.c @@ -290,7 +290,7 @@ FLASH_BANK_COMMAND_HANDLER(stm32lx_flash_bank_command) stm32lx_info = calloc(1, sizeof(*stm32lx_info)); /* Check allocation */ - if (stm32lx_info == NULL) { + if (!stm32lx_info) { LOG_ERROR("failed to allocate bank structure"); return ERROR_FAIL; } @@ -313,19 +313,14 @@ COMMAND_HANDLER(stm32lx_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32lx_mass_erase(bank); - if (retval == ERROR_OK) { - /* set all sectors as erased */ - for (unsigned int i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - + if (retval == ERROR_OK) command_print(CMD, "stm32lx mass erase complete"); - } else { + else command_print(CMD, "stm32lx mass erase failed"); - } return retval; } @@ -337,7 +332,7 @@ COMMAND_HANDLER(stm32lx_handle_lock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32lx_lock(bank); @@ -357,7 +352,7 @@ COMMAND_HANDLER(stm32lx_handle_unlock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = stm32lx_unlock(bank); @@ -503,7 +498,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff } struct armv7m_common *armv7m = target_to_armv7m(target); - if (armv7m == NULL) { + if (!armv7m) { /* something is very wrong if armv7m is NULL */ LOG_ERROR("unable to get armv7m target"); @@ -842,7 +837,7 @@ static int stm32lx_probe(struct flash_bank *bank) bank->base = base_address; bank->num_sectors = num_sectors; bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors); - if (bank->sectors == NULL) { + if (!bank->sectors) { LOG_ERROR("failed to allocate bank sectors"); return ERROR_FAIL; } @@ -889,7 +884,7 @@ static int stm32lx_get_info(struct flash_bank *bank, struct command_invocation * if (rev_id == info->revs[i].rev) rev_str = info->revs[i].str; - if (rev_str != NULL) { + if (rev_str) { command_print_sameline(cmd, "%s - Rev: %s", info->device_str, rev_str); } else { command_print_sameline(cmd, "%s - Rev: unknown (0x%04x)", info->device_str, rev_id); diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c index 978188ec1..0abd8449b 100644 --- a/src/flash/nor/stmqspi.c +++ b/src/flash/nor/stmqspi.c @@ -225,7 +225,7 @@ FLASH_BANK_COMMAND_HANDLER(stmqspi_flash_bank_command) COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], io_base); stmqspi_info = malloc(sizeof(struct stmqspi_flash_bank)); - if (stmqspi_info == NULL) { + if (!stmqspi_info) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } @@ -509,7 +509,7 @@ COMMAND_HANDLER(stmqspi_handle_mass_erase_command) return ERROR_COMMAND_SYNTAX_ERROR; retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; stmqspi_info = bank->driver_priv; @@ -588,18 +588,13 @@ COMMAND_HANDLER(stmqspi_handle_mass_erase_command) retval = wait_till_ready(bank, SPI_MASS_ERASE_TIMEOUT); duration_measure(&bench); - if (retval == ERROR_OK) { - /* set all sectors as erased */ - for (sector = 0; sector < bank->num_sectors; sector++) - bank->sectors[sector].is_erased = 1; - + if (retval == ERROR_OK) command_print(CMD, "stmqspi mass erase completed in %fs (%0.3f KiB/s)", duration_elapsed(&bench), duration_kbps(&bench, bank->size)); - } else { + else command_print(CMD, "stmqspi mass erase not completed even after %fs", duration_elapsed(&bench)); - } err: /* Switch to memory mapped mode before return to prompt */ @@ -638,7 +633,7 @@ COMMAND_HANDLER(stmqspi_handle_set) return ERROR_COMMAND_SYNTAX_ERROR; retval = CALL_COMMAND_HANDLER(flash_command_get_bank, index++, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; target = bank->target; @@ -754,7 +749,7 @@ COMMAND_HANDLER(stmqspi_handle_set) bank->num_sectors = stmqspi_info->dev.size_in_bytes / stmqspi_info->dev.sectorsize; sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - if (sectors == NULL) { + if (!sectors) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } @@ -808,7 +803,7 @@ COMMAND_HANDLER(stmqspi_handle_cmd) } retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; target = bank->target; @@ -2358,7 +2353,7 @@ static int stmqspi_probe(struct flash_bank *bank) /* create and fill sectors array */ bank->num_sectors = stmqspi_info->dev.size_in_bytes / stmqspi_info->dev.sectorsize; sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - if (sectors == NULL) { + if (!sectors) { LOG_ERROR("not enough memory"); retval = ERROR_FAIL; goto err; diff --git a/src/flash/nor/stmsmi.c b/src/flash/nor/stmsmi.c index 662b45953..553bf2924 100644 --- a/src/flash/nor/stmsmi.c +++ b/src/flash/nor/stmsmi.c @@ -144,7 +144,7 @@ FLASH_BANK_COMMAND_HANDLER(stmsmi_flash_bank_command) return ERROR_COMMAND_SYNTAX_ERROR; stmsmi_info = malloc(sizeof(struct stmsmi_flash_bank)); - if (stmsmi_info == NULL) { + if (!stmsmi_info) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } @@ -600,7 +600,7 @@ static int stmsmi_probe(struct flash_bank *bank) bank->num_sectors = stmsmi_info->dev->size_in_bytes / sectorsize; sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); - if (sectors == NULL) { + if (!sectors) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } diff --git a/src/flash/nor/str7x.c b/src/flash/nor/str7x.c index 958b0fa2b..9b977bf90 100644 --- a/src/flash/nor/str7x.c +++ b/src/flash/nor/str7x.c @@ -376,9 +376,6 @@ static int str7x_erase(struct flash_bank *bank, unsigned int first, if (err != ERROR_OK) return err; - for (unsigned int i = first; i <= last; i++) - bank->sectors[i].is_erased = 1; - return ERROR_OK; } @@ -720,15 +717,15 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command) struct str7x_flash_bank *str7x_info = NULL; uint32_t flash_cmd; - uint16_t ProtectionLevel = 0; - uint16_t ProtectionRegs; + uint16_t protection_level = 0; + uint16_t protection_regs; if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; str7x_info = bank->driver_priv; @@ -745,17 +742,17 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command) target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR0), ®); if (!(reg & str7x_info->disable_bit)) - ProtectionLevel = 1; + protection_level = 1; target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR1), ®); - ProtectionRegs = ~(reg >> 16); + protection_regs = ~(reg >> 16); - while (((ProtectionRegs) != 0) && (ProtectionLevel < 16)) { - ProtectionRegs >>= 1; - ProtectionLevel++; + while (((protection_regs) != 0) && (protection_level < 16)) { + protection_regs >>= 1; + protection_level++; } - if (ProtectionLevel == 0) { + if (protection_level == 0) { flash_cmd = FLASH_SPR; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFB8); @@ -767,7 +764,7 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command) target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFBC); target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), - ~(1 << (15 + ProtectionLevel))); + ~(1 << (15 + protection_level))); flash_cmd = FLASH_SPR | FLASH_WMS; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); } diff --git a/src/flash/nor/str9x.c b/src/flash/nor/str9x.c index 87ffec877..8f39d75fa 100644 --- a/src/flash/nor/str9x.c +++ b/src/flash/nor/str9x.c @@ -300,9 +300,6 @@ static int str9x_erase(struct flash_bank *bank, unsigned int first, break; } - for (unsigned int i = first; i <= last; i++) - bank->sectors[i].is_erased = 1; - return ERROR_OK; } @@ -611,7 +608,7 @@ COMMAND_HANDLER(str9x_handle_flash_config_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; uint32_t bbsr, nbbsr, bbadr, nbbadr; diff --git a/src/flash/nor/str9xpec.c b/src/flash/nor/str9xpec.c index 9946b06fb..da66a99a8 100644 --- a/src/flash/nor/str9xpec.c +++ b/src/flash/nor/str9xpec.c @@ -81,7 +81,7 @@ static int str9xpec_write_options(struct flash_bank *bank); static int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end_state) { - if (tap == NULL) + if (!tap) return ERROR_TARGET_INVALID; if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { @@ -727,7 +727,7 @@ COMMAND_HANDLER(str9xpec_handle_part_id_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; str9xpec_info = bank->driver_priv; @@ -768,7 +768,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_read_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; str9xpec_info = bank->driver_priv; @@ -877,7 +877,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_write_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; status = str9xpec_write_options(bank); @@ -901,7 +901,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_cmap_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; str9xpec_info = bank->driver_priv; @@ -923,7 +923,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdthd_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; str9xpec_info = bank->driver_priv; @@ -945,7 +945,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdsel_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; str9xpec_info = bank->driver_priv; @@ -967,7 +967,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdwarn_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; str9xpec_info = bank->driver_priv; @@ -989,7 +989,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_lock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; status = str9xpec_lock_device(bank); @@ -1009,7 +1009,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_unlock_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; status = str9xpec_unlock_device(bank); @@ -1036,26 +1036,26 @@ COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; str9xpec_info = bank->driver_priv; /* remove arm core from chain - enter turbo mode */ tap0 = str9xpec_info->tap; - if (tap0 == NULL) { + if (!tap0) { /* things are *WRONG* */ command_print(CMD, "**STR9FLASH** (tap0) invalid chain?"); return ERROR_FAIL; } tap1 = tap0->next_tap; - if (tap1 == NULL) { + if (!tap1) { /* things are *WRONG* */ command_print(CMD, "**STR9FLASH** (tap1) invalid chain?"); return ERROR_FAIL; } tap2 = tap1->next_tap; - if (tap2 == NULL) { + if (!tap2) { /* things are *WRONG* */ command_print(CMD, "**STR9FLASH** (tap2) invalid chain?"); return ERROR_FAIL; @@ -1083,13 +1083,13 @@ COMMAND_HANDLER(str9xpec_handle_flash_disable_turbo_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; str9xpec_info = bank->driver_priv; tap = str9xpec_info->tap; - if (tap == NULL) + if (!tap) return ERROR_FAIL; /* exit turbo mode via RESET */ diff --git a/src/flash/nor/swm050.c b/src/flash/nor/swm050.c index 98361eb91..be7452b81 100644 --- a/src/flash/nor/swm050.c +++ b/src/flash/nor/swm050.c @@ -142,7 +142,7 @@ COMMAND_HANDLER(swm050_handle_mass_erase_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = swm050_mass_erase(bank); diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c index ddae1f1f1..857da9e1c 100644 --- a/src/flash/nor/tcl.c +++ b/src/flash/nor/tcl.c @@ -88,7 +88,7 @@ COMMAND_HANDLER(handle_flash_info_command) if (retval != ERROR_OK) return retval; - if (p != NULL) { + if (p) { int num_blocks; struct flash_sector *block_array; @@ -99,7 +99,7 @@ COMMAND_HANDLER(handle_flash_info_command) /* If the driver does not implement protection, we show the default * state of is_protected array - usually protection state unknown */ - if (p->driver->protect_check == NULL) { + if (!p->driver->protect_check) { retval = ERROR_FLASH_OPER_UNSUPPORTED; } else { /* We must query the hardware to avoid printing stale information! */ @@ -148,7 +148,7 @@ COMMAND_HANDLER(handle_flash_info_command) protect_state); } - if (p->driver->info != NULL) { + if (p->driver->info) { /* Let the flash driver print extra custom info */ retval = p->driver->info(p, CMD); command_print_sameline(CMD, "\n"); @@ -195,7 +195,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command) struct flash_bank *p; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = p->driver->erase_check(p); @@ -286,7 +286,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command) if (retval == ERROR_OK) retval = flash_erase_address_range(target, do_pad, address, length); - if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { + if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) { command_print(CMD, "erased address " TARGET_ADDR_FMT " (length %" PRIu32 ")" " in %fs (%0.3f KiB/s)", address, length, duration_elapsed(&bench), duration_kbps(&bench, length)); @@ -334,7 +334,7 @@ COMMAND_HANDLER(handle_flash_erase_command) retval = flash_driver_erase(p, first, last); - if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { + if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) { command_print(CMD, "erased sectors %" PRIu32 " " "through %" PRIu32 " on flash bank %u " "in %fs", first, last, p->bank_number, duration_elapsed(&bench)); @@ -460,7 +460,7 @@ COMMAND_HANDLER(handle_flash_write_image_command) return retval; } - if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { + if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) { command_print(CMD, "wrote %" PRIu32 " bytes from file %s " "in %fs (%0.3f KiB/s)", written, CMD_ARGV[0], duration_elapsed(&bench), duration_kbps(&bench, written)); @@ -512,7 +512,7 @@ COMMAND_HANDLER(handle_flash_verify_image_command) return retval; } - if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { + if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) { command_print(CMD, "verified %" PRIu32 " bytes from file %s " "in %fs (%0.3f KiB/s)", verified, CMD_ARGV[0], duration_elapsed(&bench), duration_kbps(&bench, verified)); @@ -584,7 +584,7 @@ COMMAND_HANDLER(handle_flash_fill_command) uint32_t padding_at_end = aligned_end - end_addr; uint8_t *buffer = malloc(aligned_size); - if (buffer == NULL) + if (!buffer) return ERROR_FAIL; if (padding_at_start) { @@ -724,7 +724,7 @@ COMMAND_HANDLER(handle_flash_md_command) } uint8_t *buffer = calloc(count, wordsize); - if (buffer == NULL) { + if (!buffer) { command_print(CMD, "No memory for flash read buffer"); return ERROR_FAIL; } @@ -755,7 +755,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command) struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; offset = 0; @@ -800,7 +800,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command) uint32_t padding_at_end = aligned_end - end_addr; buffer = malloc(aligned_size); - if (buffer == NULL) { + if (!buffer) { fileio_close(fileio); LOG_ERROR("Out of memory"); return ERROR_FAIL; @@ -842,7 +842,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command) free(buffer); - if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { + if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) { command_print(CMD, "wrote %zu bytes from file %s to flash bank %u" " at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)", length, CMD_ARGV[1], bank->bank_number, offset, @@ -871,7 +871,7 @@ COMMAND_HANDLER(handle_flash_read_bank_command) struct flash_bank *p; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; offset = 0; @@ -897,7 +897,7 @@ COMMAND_HANDLER(handle_flash_read_bank_command) } buffer = malloc(length); - if (buffer == NULL) { + if (!buffer) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -952,7 +952,7 @@ COMMAND_HANDLER(handle_flash_verify_bank_command) struct flash_bank *p; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; offset = 0; @@ -991,7 +991,7 @@ COMMAND_HANDLER(handle_flash_verify_bank_command) "first %zu bytes of the file", length); buffer_file = malloc(length); - if (buffer_file == NULL) { + if (!buffer_file) { LOG_ERROR("Out of memory"); fileio_close(fileio); return ERROR_FAIL; @@ -1012,7 +1012,7 @@ COMMAND_HANDLER(handle_flash_verify_bank_command) } buffer_flash = malloc(length); - if (buffer_flash == NULL) { + if (!buffer_flash) { LOG_ERROR("Out of memory"); free(buffer_file); return ERROR_FAIL; @@ -1073,7 +1073,7 @@ COMMAND_HANDLER(handle_flash_padded_value_command) struct flash_bank *p; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; COMMAND_PARSE_NUMBER(u8, CMD_ARGV[1], p->default_padded_value); @@ -1263,31 +1263,31 @@ COMMAND_HANDLER(handle_flash_bank_command) CMD_ARGC--; struct target *target = get_target(CMD_ARGV[5]); - if (target == NULL) { + if (!target) { LOG_ERROR("target '%s' not defined", CMD_ARGV[5]); return ERROR_FAIL; } const char *driver_name = CMD_ARGV[0]; const struct flash_driver *driver = flash_driver_find_by_name(driver_name); - if (NULL == driver) { + if (!driver) { /* no matching flash driver found */ LOG_ERROR("flash driver '%s' not found", driver_name); return ERROR_FAIL; } /* check the flash bank name is unique */ - if (get_flash_bank_by_name_noprobe(bank_name) != NULL) { + if (get_flash_bank_by_name_noprobe(bank_name)) { /* flash bank name already exists */ LOG_ERROR("flash bank name '%s' already exists", bank_name); return ERROR_FAIL; } /* register flash specific commands */ - if (NULL != driver->commands) { + if (driver->commands) { int retval = register_commands(CMD_CTX, NULL, driver->commands); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("couldn't register '%s' commands", driver_name); return ERROR_FAIL; @@ -1307,14 +1307,14 @@ COMMAND_HANDLER(handle_flash_bank_command) int retval; retval = CALL_COMMAND_HANDLER(driver->flash_bank_command, c); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("'%s' driver rejected flash bank at " TARGET_ADDR_FMT "; usage: %s", driver_name, c->base, driver->usage); free(c); return retval; } - if (driver->usage == NULL) + if (!driver->usage) LOG_DEBUG("'%s' driver usage field missing", driver_name); flash_bank_add(c); diff --git a/src/flash/nor/tms470.c b/src/flash/nor/tms470.c index c5d74c30c..37f093396 100644 --- a/src/flash/nor/tms470.c +++ b/src/flash/nor/tms470.c @@ -39,7 +39,7 @@ struct tms470_flash_bank { }; -static const struct flash_sector TMS470R1A256_SECTORS[] = { +static const struct flash_sector tms470r1a256_sectors[] = { {0x00000000, 0x00002000, -1, -1}, {0x00002000, 0x00002000, -1, -1}, {0x00004000, 0x00002000, -1, -1}, @@ -57,9 +57,9 @@ static const struct flash_sector TMS470R1A256_SECTORS[] = { }; #define TMS470R1A256_NUM_SECTORS \ - ARRAY_SIZE(TMS470R1A256_SECTORS) + ARRAY_SIZE(tms470r1a256_sectors) -static const struct flash_sector TMS470R1A288_BANK0_SECTORS[] = { +static const struct flash_sector tms470r1a288_bank0_sectors[] = { {0x00000000, 0x00002000, -1, -1}, {0x00002000, 0x00002000, -1, -1}, {0x00004000, 0x00002000, -1, -1}, @@ -67,9 +67,9 @@ static const struct flash_sector TMS470R1A288_BANK0_SECTORS[] = { }; #define TMS470R1A288_BANK0_NUM_SECTORS \ - ARRAY_SIZE(TMS470R1A288_BANK0_SECTORS) + ARRAY_SIZE(tms470r1a288_bank0_sectors) -static const struct flash_sector TMS470R1A288_BANK1_SECTORS[] = { +static const struct flash_sector tms470r1a288_bank1_sectors[] = { {0x00040000, 0x00010000, -1, -1}, {0x00050000, 0x00010000, -1, -1}, {0x00060000, 0x00010000, -1, -1}, @@ -77,9 +77,9 @@ static const struct flash_sector TMS470R1A288_BANK1_SECTORS[] = { }; #define TMS470R1A288_BANK1_NUM_SECTORS \ - ARRAY_SIZE(TMS470R1A288_BANK1_SECTORS) + ARRAY_SIZE(tms470r1a288_bank1_sectors) -static const struct flash_sector TMS470R1A384_BANK0_SECTORS[] = { +static const struct flash_sector tms470r1a384_bank0_sectors[] = { {0x00000000, 0x00002000, -1, -1}, {0x00002000, 0x00002000, -1, -1}, {0x00004000, 0x00004000, -1, -1}, @@ -93,9 +93,9 @@ static const struct flash_sector TMS470R1A384_BANK0_SECTORS[] = { }; #define TMS470R1A384_BANK0_NUM_SECTORS \ - ARRAY_SIZE(TMS470R1A384_BANK0_SECTORS) + ARRAY_SIZE(tms470r1a384_bank0_sectors) -static const struct flash_sector TMS470R1A384_BANK1_SECTORS[] = { +static const struct flash_sector tms470r1a384_bank1_sectors[] = { {0x00020000, 0x00008000, -1, -1}, {0x00028000, 0x00008000, -1, -1}, {0x00030000, 0x00008000, -1, -1}, @@ -103,9 +103,9 @@ static const struct flash_sector TMS470R1A384_BANK1_SECTORS[] = { }; #define TMS470R1A384_BANK1_NUM_SECTORS \ - ARRAY_SIZE(TMS470R1A384_BANK1_SECTORS) + ARRAY_SIZE(tms470r1a384_bank1_sectors) -static const struct flash_sector TMS470R1A384_BANK2_SECTORS[] = { +static const struct flash_sector tms470r1a384_bank2_sectors[] = { {0x00040000, 0x00008000, -1, -1}, {0x00048000, 0x00008000, -1, -1}, {0x00050000, 0x00008000, -1, -1}, @@ -113,7 +113,7 @@ static const struct flash_sector TMS470R1A384_BANK2_SECTORS[] = { }; #define TMS470R1A384_BANK2_NUM_SECTORS \ - ARRAY_SIZE(TMS470R1A384_BANK2_SECTORS) + ARRAY_SIZE(tms470r1a384_bank2_sectors) /* ---------------------------------------------------------------------- */ @@ -173,10 +173,10 @@ static int tms470_read_part_info(struct flash_bank *bank) bank->base = 0x00000000; bank->size = 256 * 1024; bank->num_sectors = TMS470R1A256_NUM_SECTORS; - bank->sectors = malloc(sizeof(TMS470R1A256_SECTORS)); + bank->sectors = malloc(sizeof(tms470r1a256_sectors)); if (!bank->sectors) return ERROR_FLASH_OPERATION_FAILED; - (void)memcpy(bank->sectors, TMS470R1A256_SECTORS, sizeof(TMS470R1A256_SECTORS)); + (void)memcpy(bank->sectors, tms470r1a256_sectors, sizeof(tms470r1a256_sectors)); break; case 0x2b: @@ -187,21 +187,21 @@ static int tms470_read_part_info(struct flash_bank *bank) bank->base = 0x00000000; bank->size = 32 * 1024; bank->num_sectors = TMS470R1A288_BANK0_NUM_SECTORS; - bank->sectors = malloc(sizeof(TMS470R1A288_BANK0_SECTORS)); + bank->sectors = malloc(sizeof(tms470r1a288_bank0_sectors)); if (!bank->sectors) return ERROR_FLASH_OPERATION_FAILED; - (void)memcpy(bank->sectors, TMS470R1A288_BANK0_SECTORS, - sizeof(TMS470R1A288_BANK0_SECTORS)); + (void)memcpy(bank->sectors, tms470r1a288_bank0_sectors, + sizeof(tms470r1a288_bank0_sectors)); } else if ((bank->base >= 0x00040000) && (bank->base < 0x00080000)) { tms470_info->ordinal = 1; bank->base = 0x00040000; bank->size = 256 * 1024; bank->num_sectors = TMS470R1A288_BANK1_NUM_SECTORS; - bank->sectors = malloc(sizeof(TMS470R1A288_BANK1_SECTORS)); + bank->sectors = malloc(sizeof(tms470r1a288_bank1_sectors)); if (!bank->sectors) return ERROR_FLASH_OPERATION_FAILED; - (void)memcpy(bank->sectors, TMS470R1A288_BANK1_SECTORS, - sizeof(TMS470R1A288_BANK1_SECTORS)); + (void)memcpy(bank->sectors, tms470r1a288_bank1_sectors, + sizeof(tms470r1a288_bank1_sectors)); } else { LOG_ERROR("No %s flash bank contains base address " TARGET_ADDR_FMT ".", part_name, bank->base); @@ -217,31 +217,31 @@ static int tms470_read_part_info(struct flash_bank *bank) bank->base = 0x00000000; bank->size = 128 * 1024; bank->num_sectors = TMS470R1A384_BANK0_NUM_SECTORS; - bank->sectors = malloc(sizeof(TMS470R1A384_BANK0_SECTORS)); + bank->sectors = malloc(sizeof(tms470r1a384_bank0_sectors)); if (!bank->sectors) return ERROR_FLASH_OPERATION_FAILED; - (void)memcpy(bank->sectors, TMS470R1A384_BANK0_SECTORS, - sizeof(TMS470R1A384_BANK0_SECTORS)); + (void)memcpy(bank->sectors, tms470r1a384_bank0_sectors, + sizeof(tms470r1a384_bank0_sectors)); } else if ((bank->base >= 0x00020000) && (bank->base < 0x00040000)) { tms470_info->ordinal = 1; bank->base = 0x00020000; bank->size = 128 * 1024; bank->num_sectors = TMS470R1A384_BANK1_NUM_SECTORS; - bank->sectors = malloc(sizeof(TMS470R1A384_BANK1_SECTORS)); + bank->sectors = malloc(sizeof(tms470r1a384_bank1_sectors)); if (!bank->sectors) return ERROR_FLASH_OPERATION_FAILED; - (void)memcpy(bank->sectors, TMS470R1A384_BANK1_SECTORS, - sizeof(TMS470R1A384_BANK1_SECTORS)); + (void)memcpy(bank->sectors, tms470r1a384_bank1_sectors, + sizeof(tms470r1a384_bank1_sectors)); } else if ((bank->base >= 0x00040000) && (bank->base < 0x00060000)) { tms470_info->ordinal = 2; bank->base = 0x00040000; bank->size = 128 * 1024; bank->num_sectors = TMS470R1A384_BANK2_NUM_SECTORS; - bank->sectors = malloc(sizeof(TMS470R1A384_BANK2_SECTORS)); + bank->sectors = malloc(sizeof(tms470r1a384_bank2_sectors)); if (!bank->sectors) return ERROR_FLASH_OPERATION_FAILED; - (void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS, - sizeof(TMS470R1A384_BANK2_SECTORS)); + (void)memcpy(bank->sectors, tms470r1a384_bank2_sectors, + sizeof(tms470r1a384_bank2_sectors)); } else { LOG_ERROR("No %s flash bank contains base address " TARGET_ADDR_FMT ".", part_name, bank->base); @@ -285,8 +285,8 @@ static int tms470_read_part_info(struct flash_bank *bank) /* ---------------------------------------------------------------------- */ -static uint32_t keysSet; -static uint32_t flashKeys[4]; +static uint32_t keys_set; +static uint32_t flash_keys[4]; COMMAND_HANDLER(tms470_handle_flash_keyset_command) { @@ -296,9 +296,9 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command) int i; for (i = 0; i < 4; i++) { - int start = (0 == strncmp(CMD_ARGV[i], "0x", 2)) ? 2 : 0; + int start = (strncmp(CMD_ARGV[i], "0x", 2) == 0) ? 2 : 0; - if (1 != sscanf(&CMD_ARGV[i][start], "%" SCNx32 "", &flashKeys[i])) { + if (sscanf(&CMD_ARGV[i][start], "%" SCNx32 "", &flash_keys[i]) != 1) { command_print(CMD, "could not process flash key %s", CMD_ARGV[i]); LOG_ERROR("could not process flash key %s", CMD_ARGV[i]); @@ -306,56 +306,56 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command) } } - keysSet = 1; + keys_set = 1; } else if (CMD_ARGC != 0) { command_print(CMD, "tms470 flash_keyset "); return ERROR_COMMAND_SYNTAX_ERROR; } - if (keysSet) { + if (keys_set) { command_print(CMD, "using flash keys 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 "", - flashKeys[0], - flashKeys[1], - flashKeys[2], - flashKeys[3]); + flash_keys[0], + flash_keys[1], + flash_keys[2], + flash_keys[3]); } else command_print(CMD, "flash keys not set"); return ERROR_OK; } -static const uint32_t FLASH_KEYS_ALL_ONES[] = { 0xFFFFFFFF, 0xFFFFFFFF, +static const uint32_t flash_keys_all_ones[] = { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,}; -static const uint32_t FLASH_KEYS_ALL_ZEROS[] = { 0x00000000, 0x00000000, +static const uint32_t flash_keys_all_zeros[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000,}; -static const uint32_t FLASH_KEYS_MIX1[] = { 0xf0fff0ff, 0xf0fff0ff, +static const uint32_t flash_keys_mix1[] = { 0xf0fff0ff, 0xf0fff0ff, 0xf0fff0ff, 0xf0fff0ff}; -static const uint32_t FLASH_KEYS_MIX2[] = { 0x0000ffff, 0x0000ffff, +static const uint32_t flash_keys_mix2[] = { 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff}; /* ---------------------------------------------------------------------- */ -static int oscMHz = 12; +static int osc_mhz = 12; COMMAND_HANDLER(tms470_handle_osc_megahertz_command) { if (CMD_ARGC > 1) return ERROR_COMMAND_SYNTAX_ERROR; else if (CMD_ARGC == 1) - sscanf(CMD_ARGV[0], "%d", &oscMHz); + sscanf(CMD_ARGV[0], "%d", &osc_mhz); - if (oscMHz <= 0) { + if (osc_mhz <= 0) { LOG_ERROR("osc_megahertz must be positive and non-zero!"); command_print(CMD, "osc_megahertz must be positive and non-zero!"); - oscMHz = 12; + osc_mhz = 12; return ERROR_COMMAND_SYNTAX_ERROR; } - command_print(CMD, "osc_megahertz=%d", oscMHz); + command_print(CMD, "osc_megahertz=%d", osc_mhz); return ERROR_OK; } @@ -437,7 +437,7 @@ static int tms470_try_flash_keys(struct target *target, const uint32_t *key_set) target_write_u32(target, 0xFFE89C0C, key_set[i]); } - if (ERROR_OK == tms470_check_flash_unlocked(target)) { + if (tms470_check_flash_unlocked(target) == ERROR_OK) { /* * There seems to be a side-effect of reading the FMPKEY * register in that it re-enables the protection. So we @@ -471,19 +471,19 @@ static int tms470_unlock_flash(struct flash_bank *bank) const uint32_t *p_key_sets[5]; unsigned i, key_set_count; - if (keysSet) { + if (keys_set) { key_set_count = 5; - p_key_sets[0] = flashKeys; - p_key_sets[1] = FLASH_KEYS_ALL_ONES; - p_key_sets[2] = FLASH_KEYS_ALL_ZEROS; - p_key_sets[3] = FLASH_KEYS_MIX1; - p_key_sets[4] = FLASH_KEYS_MIX2; + p_key_sets[0] = flash_keys; + p_key_sets[1] = flash_keys_all_ones; + p_key_sets[2] = flash_keys_all_zeros; + p_key_sets[3] = flash_keys_mix1; + p_key_sets[4] = flash_keys_mix2; } else { key_set_count = 4; - p_key_sets[0] = FLASH_KEYS_ALL_ONES; - p_key_sets[1] = FLASH_KEYS_ALL_ZEROS; - p_key_sets[2] = FLASH_KEYS_MIX1; - p_key_sets[3] = FLASH_KEYS_MIX2; + p_key_sets[0] = flash_keys_all_ones; + p_key_sets[1] = flash_keys_all_zeros; + p_key_sets[2] = flash_keys_mix1; + p_key_sets[3] = flash_keys_mix2; } for (i = 0; i < key_set_count; i++) { @@ -573,7 +573,7 @@ static int tms470_flash_initialize_internal_state_machine(struct flash_bank *ban * the plldis global. */ target_read_u32(target, 0xFFFFFFDC, &glbctrl); - sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8) * oscMHz / (1 + (glbctrl & 7)); + sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8) * osc_mhz / (1 + (glbctrl & 7)); delay = (sysclk > 10) ? (sysclk + 1) / 2 : 5; target_write_u32(target, 0xFFE8A018, (delay << 4) | (delay << 8)); LOG_DEBUG("set fmpsetup = 0x%04" PRIx32 "", (delay << 4) | (delay << 8)); @@ -685,7 +685,7 @@ static int tms470_erase_sector(struct flash_bank *bank, int sector) { uint32_t glbctrl, orig_fmregopt, fmbsea, fmbseb, fmmstat; struct target *target = bank->target; - uint32_t flashAddr = bank->base + bank->sectors[sector].offset; + uint32_t flash_addr = bank->base + bank->sectors[sector].offset; int result = ERROR_OK; /* @@ -722,12 +722,12 @@ static int tms470_erase_sector(struct flash_bank *bank, int sector) /* * clear status register, sent erase command, kickoff erase */ - target_write_u16(target, flashAddr, 0x0040); - LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0040", flashAddr); - target_write_u16(target, flashAddr, 0x0020); - LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0020", flashAddr); - target_write_u16(target, flashAddr, 0xffff); - LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0xffff", flashAddr); + target_write_u16(target, flash_addr, 0x0040); + LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0040", flash_addr); + target_write_u16(target, flash_addr, 0x0020); + LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0020", flash_addr); + target_write_u16(target, flash_addr, 0xffff); + LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0xffff", flash_addr); /* * Monitor FMMSTAT, busy until clear, then check and other flags for diff --git a/src/flash/nor/virtual.c b/src/flash/nor/virtual.c index c9525d179..01a92478f 100644 --- a/src/flash/nor/virtual.c +++ b/src/flash/nor/virtual.c @@ -27,7 +27,7 @@ static struct flash_bank *virtual_get_master_bank(struct flash_bank *bank) struct flash_bank *master_bank; master_bank = get_flash_bank_by_name_noprobe(bank->driver_priv); - if (master_bank == NULL) + if (!master_bank) LOG_ERROR("master flash bank '%s' does not exist", (char *)bank->driver_priv); return master_bank; @@ -37,7 +37,7 @@ static void virtual_update_bank_info(struct flash_bank *bank) { struct flash_bank *master_bank = virtual_get_master_bank(bank); - if (master_bank == NULL) + if (!master_bank) return; /* update the info we do not have */ @@ -64,7 +64,7 @@ FLASH_BANK_COMMAND_HANDLER(virtual_flash_bank_command) const char *bank_name = CMD_ARGV[6]; struct flash_bank *master_bank = get_flash_bank_by_name_noprobe(bank_name); - if (master_bank == NULL) { + if (!master_bank) { LOG_ERROR("master flash bank '%s' does not exist", bank_name); return ERROR_FLASH_OPERATION_FAILED; } @@ -80,7 +80,7 @@ static int virtual_protect(struct flash_bank *bank, int set, unsigned int first, { struct flash_bank *master_bank = virtual_get_master_bank(bank); - if (master_bank == NULL) + if (!master_bank) return ERROR_FLASH_OPERATION_FAILED; return flash_driver_protect(master_bank, set, first, last); @@ -90,10 +90,10 @@ static int virtual_protect_check(struct flash_bank *bank) { struct flash_bank *master_bank = virtual_get_master_bank(bank); - if (master_bank == NULL) + if (!master_bank) return ERROR_FLASH_OPERATION_FAILED; - if (master_bank->driver->protect_check == NULL) + if (!master_bank->driver->protect_check) return ERROR_FLASH_OPER_UNSUPPORTED; /* call master handler */ @@ -106,7 +106,7 @@ static int virtual_erase(struct flash_bank *bank, unsigned int first, struct flash_bank *master_bank = virtual_get_master_bank(bank); int retval; - if (master_bank == NULL) + if (!master_bank) return ERROR_FLASH_OPERATION_FAILED; /* call master handler */ @@ -123,7 +123,7 @@ static int virtual_write(struct flash_bank *bank, const uint8_t *buffer, struct flash_bank *master_bank = virtual_get_master_bank(bank); int retval; - if (master_bank == NULL) + if (!master_bank) return ERROR_FLASH_OPERATION_FAILED; /* call master handler */ @@ -139,7 +139,7 @@ static int virtual_probe(struct flash_bank *bank) struct flash_bank *master_bank = virtual_get_master_bank(bank); int retval; - if (master_bank == NULL) + if (!master_bank) return ERROR_FLASH_OPERATION_FAILED; /* call master handler */ @@ -158,7 +158,7 @@ static int virtual_auto_probe(struct flash_bank *bank) struct flash_bank *master_bank = virtual_get_master_bank(bank); int retval; - if (master_bank == NULL) + if (!master_bank) return ERROR_FLASH_OPERATION_FAILED; /* call master handler */ @@ -176,7 +176,7 @@ static int virtual_info(struct flash_bank *bank, struct command_invocation *cmd) { struct flash_bank *master_bank = virtual_get_master_bank(bank); - if (master_bank == NULL) + if (!master_bank) return ERROR_FLASH_OPERATION_FAILED; command_print_sameline(cmd, "%s driver for flash bank %s at " TARGET_ADDR_FMT, @@ -190,7 +190,7 @@ static int virtual_blank_check(struct flash_bank *bank) struct flash_bank *master_bank = virtual_get_master_bank(bank); int retval; - if (master_bank == NULL) + if (!master_bank) return ERROR_FLASH_OPERATION_FAILED; /* call master handler */ @@ -207,7 +207,7 @@ static int virtual_flash_read(struct flash_bank *bank, struct flash_bank *master_bank = virtual_get_master_bank(bank); int retval; - if (master_bank == NULL) + if (!master_bank) return ERROR_FLASH_OPERATION_FAILED; /* call master handler */ diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c index 33f79f510..c6de1aca1 100644 --- a/src/flash/nor/xcf.c +++ b/src/flash/nor/xcf.c @@ -68,25 +68,25 @@ struct xcf_status { * GLOBAL VARIABLES ****************************************************************************** */ -static const uint8_t CMD_BYPASS[2] = {0xFF, 0xFF}; +static const uint8_t cmd_bypass[2] = {0xFF, 0xFF}; -static const uint8_t CMD_ISC_ADDRESS_SHIFT[2] = {0xEB, 0x00}; -static const uint8_t CMD_ISC_DATA_SHIFT[2] = {0xED, 0x00}; -static const uint8_t CMD_ISC_DISABLE[2] = {0xF0, 0x00}; -static const uint8_t CMD_ISC_ENABLE[2] = {0xE8, 0x00}; -static const uint8_t CMD_ISC_ERASE[2] = {0xEC, 0x00}; -static const uint8_t CMD_ISC_PROGRAM[2] = {0xEA, 0x00}; +static const uint8_t cmd_isc_address_shift[2] = {0xEB, 0x00}; +static const uint8_t cmd_isc_data_shift[2] = {0xED, 0x00}; +static const uint8_t cmd_isc_disable[2] = {0xF0, 0x00}; +static const uint8_t cmd_isc_enable[2] = {0xE8, 0x00}; +static const uint8_t cmd_isc_erase[2] = {0xEC, 0x00}; +static const uint8_t cmd_isc_program[2] = {0xEA, 0x00}; -static const uint8_t CMD_XSC_BLANK_CHECK[2] = {0x0D, 0x00}; -static const uint8_t CMD_XSC_CONFIG[2] = {0xEE, 0x00}; -static const uint8_t CMD_XSC_DATA_BTC[2] = {0xF2, 0x00}; -static const uint8_t CMD_XSC_DATA_CCB[2] = {0x0C, 0x00}; -static const uint8_t CMD_XSC_DATA_DONE[2] = {0x09, 0x00}; -static const uint8_t CMD_XSC_DATA_SUCR[2] = {0x0E, 0x00}; -static const uint8_t CMD_XSC_DATA_WRPT[2] = {0xF7, 0x00}; -static const uint8_t CMD_XSC_OP_STATUS[2] = {0xE3, 0x00}; -static const uint8_t CMD_XSC_READ[2] = {0xEF, 0x00}; -static const uint8_t CMD_XSC_UNLOCK[2] = {0x55, 0xAA}; +static const uint8_t cmd_xsc_blank_check[2] = {0x0D, 0x00}; +static const uint8_t cmd_xsc_config[2] = {0xEE, 0x00}; +static const uint8_t cmd_xsc_data_btc[2] = {0xF2, 0x00}; +static const uint8_t cmd_xsc_data_ccb[2] = {0x0C, 0x00}; +static const uint8_t cmd_xsc_data_done[2] = {0x09, 0x00}; +static const uint8_t cmd_xsc_data_sucr[2] = {0x0E, 0x00}; +static const uint8_t cmd_xsc_data_wrpt[2] = {0xF7, 0x00}; +static const uint8_t cmd_xsc_op_status[2] = {0xE3, 0x00}; +static const uint8_t cmd_xsc_read[2] = {0xEF, 0x00}; +static const uint8_t cmd_xsc_unlock[2] = {0x55, 0xAA}; /* ****************************************************************************** @@ -135,7 +135,7 @@ static struct xcf_status read_status(struct flash_bank *bank) scan.check_mask = NULL; scan.check_value = NULL; scan.num_bits = 16; - scan.out_value = CMD_BYPASS; + scan.out_value = cmd_bypass; scan.in_value = irdata; jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); @@ -162,7 +162,7 @@ static int isc_enter(struct flash_bank *bank) scan.check_mask = NULL; scan.check_value = NULL; scan.num_bits = 16; - scan.out_value = CMD_ISC_ENABLE; + scan.out_value = cmd_isc_enable; scan.in_value = NULL; jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); @@ -191,7 +191,7 @@ static int isc_leave(struct flash_bank *bank) scan.check_mask = NULL; scan.check_value = NULL; scan.num_bits = 16; - scan.out_value = CMD_ISC_DISABLE; + scan.out_value = cmd_isc_disable; scan.in_value = NULL; jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); @@ -252,7 +252,7 @@ static int isc_wait_erase_program(struct flash_bank *bank, int64_t timeout_ms) int64_t dt; do { - isc_read_register(bank, CMD_XSC_OP_STATUS, &isc_default, 8); + isc_read_register(bank, cmd_xsc_op_status, &isc_default, 8); if (((isc_default >> 2) & 1) == 1) return ERROR_OK; dt = timeval_ms() - t0; @@ -307,7 +307,7 @@ static int isc_program_register(struct flash_bank *bank, const uint8_t *cmd, jtag_add_dr_scan(bank->target->tap, 1, &scan, TAP_IRSHIFT); scan.num_bits = 16; - scan.out_value = CMD_ISC_PROGRAM; + scan.out_value = cmd_isc_program; scan.in_value = NULL; jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); @@ -322,7 +322,7 @@ static int isc_clear_protect(struct flash_bank *bank, unsigned int first, { uint8_t select_block[3] = {0x0, 0x0, 0x0}; select_block[0] = fill_select_block(first, last); - return isc_set_register(bank, CMD_XSC_UNLOCK, select_block, 24, 0); + return isc_set_register(bank, cmd_xsc_unlock, select_block, 24, 0); } static int isc_set_protect(struct flash_bank *bank, unsigned int first, @@ -332,7 +332,7 @@ static int isc_set_protect(struct flash_bank *bank, unsigned int first, for (unsigned int i = first; i <= last; i++) wrpt[0] &= ~(1 << i); - return isc_program_register(bank, CMD_XSC_DATA_WRPT, wrpt, 16, 0); + return isc_program_register(bank, cmd_xsc_data_wrpt, wrpt, 16, 0); } static int isc_erase_sectors(struct flash_bank *bank, unsigned int first, @@ -341,19 +341,19 @@ static int isc_erase_sectors(struct flash_bank *bank, unsigned int first, uint8_t select_block[3] = {0, 0, 0}; select_block[0] = fill_select_block(first, last); int64_t timeout = SECTOR_ERASE_TIMEOUT_MS * (last - first + 1); - return isc_set_register(bank, CMD_ISC_ERASE, select_block, 24, timeout); + return isc_set_register(bank, cmd_isc_erase, select_block, 24, timeout); } static int isc_adr_shift(struct flash_bank *bank, int adr) { uint8_t adr_buf[3]; h_u24_to_le(adr_buf, adr); - return isc_set_register(bank, CMD_ISC_ADDRESS_SHIFT, adr_buf, 24, 0); + return isc_set_register(bank, cmd_isc_address_shift, adr_buf, 24, 0); } static int isc_program_data_page(struct flash_bank *bank, const uint8_t *page_buf) { - return isc_program_register(bank, CMD_ISC_DATA_SHIFT, page_buf, 8 * XCF_PAGE_SIZE, 100); + return isc_program_register(bank, cmd_isc_data_shift, page_buf, 8 * XCF_PAGE_SIZE, 100); } static void isc_data_read_out(struct flash_bank *bank, uint8_t *buffer, uint32_t count) @@ -366,7 +366,7 @@ static void isc_data_read_out(struct flash_bank *bank, uint8_t *buffer, uint32_t scan.check_mask = NULL; scan.check_value = NULL; scan.num_bits = 16; - scan.out_value = CMD_XSC_READ; + scan.out_value = cmd_xsc_read; scan.in_value = NULL; jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); @@ -382,7 +382,7 @@ static int isc_set_data_done(struct flash_bank *bank, int sector) { uint8_t done = 0xFF; done &= ~(1 << sector); - return isc_program_register(bank, CMD_XSC_DATA_DONE, &done, 8, 100); + return isc_program_register(bank, cmd_xsc_data_done, &done, 8, 100); } static void flip_u8(uint8_t *out, const uint8_t *in, int len) @@ -475,7 +475,7 @@ static int read_write_data(struct flash_bank *bank, const uint8_t *w_buffer, w_buffer += len; sector_bytes -= len; ret = isc_program_data_page(bank, page_buf); - if (ERROR_OK != ret) + if (ret != ERROR_OK) goto EXIT; else { LOG_DEBUG("written %d bytes from %d", dbg_written, dbg_count); @@ -494,7 +494,7 @@ static int read_write_data(struct flash_bank *bank, const uint8_t *w_buffer, if (write_flag) { for (unsigned int i = 0; i < bank->num_sectors; i++) { ret = isc_set_data_done(bank, i); - if (ERROR_OK != ret) + if (ret != ERROR_OK) goto EXIT; } } @@ -508,7 +508,7 @@ EXIT: static uint16_t isc_read_ccb(struct flash_bank *bank) { uint8_t ccb[2]; - isc_read_register(bank, CMD_XSC_DATA_CCB, ccb, 16); + isc_read_register(bank, cmd_xsc_data_ccb, ccb, 16); return le_to_h_u16(ccb); } @@ -526,13 +526,13 @@ static int isc_program_ccb(struct flash_bank *bank, uint16_t ccb) { uint8_t buf[2]; h_u16_to_le(buf, ccb); - return isc_program_register(bank, CMD_XSC_DATA_CCB, buf, 16, 100); + return isc_program_register(bank, cmd_xsc_data_ccb, buf, 16, 100); } static int isc_program_singe_revision_sucr(struct flash_bank *bank) { uint8_t sucr[2] = {0xFC, 0xFF}; - return isc_program_register(bank, CMD_XSC_DATA_SUCR, sucr, 16, 100); + return isc_program_register(bank, cmd_xsc_data_sucr, sucr, 16, 100); } static int isc_program_single_revision_btc(struct flash_bank *bank) @@ -543,7 +543,7 @@ static int isc_program_single_revision_btc(struct flash_bank *bank) btc |= ((bank->num_sectors - 1) << 2); btc &= ~(1 << 4); h_u32_to_le(buf, btc); - return isc_program_register(bank, CMD_XSC_DATA_BTC, buf, 32, 100); + return isc_program_register(bank, cmd_xsc_data_btc, buf, 32, 100); } static int fpga_configure(struct flash_bank *bank) @@ -553,7 +553,7 @@ static int fpga_configure(struct flash_bank *bank) scan.check_mask = NULL; scan.check_value = NULL; scan.num_bits = 16; - scan.out_value = CMD_XSC_CONFIG; + scan.out_value = cmd_xsc_config; scan.in_value = NULL; jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); jtag_execute_queue(); @@ -572,7 +572,7 @@ FLASH_BANK_COMMAND_HANDLER(xcf_flash_bank_command) struct xcf_priv *priv; priv = malloc(sizeof(struct xcf_priv)); - if (priv == NULL) { + if (!priv) { LOG_ERROR("no memory for flash bank info"); return ERROR_FAIL; } @@ -602,7 +602,7 @@ static int xcf_probe(struct flash_bank *bank) free(bank->sectors); priv->probed = false; - if (bank->target->tap == NULL) { + if (!bank->target->tap) { LOG_ERROR("Target has no JTAG tap"); return ERROR_FAIL; } @@ -629,7 +629,7 @@ static int xcf_probe(struct flash_bank *bank) } bank->sectors = malloc(bank->num_sectors * sizeof(struct flash_sector)); - if (bank->sectors == NULL) { + if (!bank->sectors) { LOG_ERROR("No memory for sector table"); return ERROR_FAIL; } @@ -663,7 +663,7 @@ static int xcf_protect_check(struct flash_bank *bank) uint8_t wrpt[2]; isc_enter(bank); - isc_read_register(bank, CMD_XSC_DATA_WRPT, wrpt, 16); + isc_read_register(bank, cmd_xsc_data_wrpt, wrpt, 16); isc_leave(bank); for (unsigned int i = 0; i < bank->num_sectors; i++) @@ -684,7 +684,7 @@ static int xcf_erase_check(struct flash_bank *bank) scan.check_mask = NULL; scan.check_value = NULL; scan.num_bits = 16; - scan.out_value = CMD_XSC_BLANK_CHECK; + scan.out_value = cmd_xsc_blank_check; scan.in_value = NULL; jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE); jtag_execute_queue(); @@ -755,7 +755,7 @@ COMMAND_HANDLER(xcf_handle_ccb_command) { struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; uint16_t ccb = 0xFFFF; @@ -800,29 +800,29 @@ COMMAND_HANDLER(xcf_handle_ccb_command) { sector = gucr_num(bank); isc_clear_protect(bank, sector, sector); int ret = isc_erase_sectors(bank, sector, sector); - if (ERROR_OK != ret) + if (ret != ERROR_OK) goto EXIT; ret = isc_program_ccb(bank, ccb); - if (ERROR_OK != ret) + if (ret != ERROR_OK) goto EXIT; ret = isc_program_single_revision_btc(bank); - if (ERROR_OK != ret) + if (ret != ERROR_OK) goto EXIT; ret = isc_set_data_done(bank, sector); - if (ERROR_OK != ret) + if (ret != ERROR_OK) goto EXIT; /* SUCR sector */ sector = sucr_num(bank); isc_clear_protect(bank, sector, sector); ret = isc_erase_sectors(bank, sector, sector); - if (ERROR_OK != ret) + if (ret != ERROR_OK) goto EXIT; ret = isc_program_singe_revision_sucr(bank); - if (ERROR_OK != ret) + if (ret != ERROR_OK) goto EXIT; ret = isc_set_data_done(bank, sector); - if (ERROR_OK != ret) + if (ret != ERROR_OK) goto EXIT; EXIT: @@ -838,7 +838,7 @@ COMMAND_HANDLER(xcf_handle_configure_command) { struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; return fpga_configure(bank); diff --git a/src/flash/nor/xmc1xxx.c b/src/flash/nor/xmc1xxx.c index 11542ac5b..9e5f0a3dd 100644 --- a/src/flash/nor/xmc1xxx.c +++ b/src/flash/nor/xmc1xxx.c @@ -11,6 +11,7 @@ #endif #include "imp.h" +#include #include #include #include @@ -140,9 +141,6 @@ static int xmc1xxx_erase(struct flash_bank *bank, unsigned int first, goto err_run; } - for (unsigned int sector = first; sector <= last; sector++) - bank->sectors[sector].is_erased = 1; - err_run: for (i = 0; i < ARRAY_SIZE(reg_params); i++) destroy_reg_param(®_params[i]); @@ -256,12 +254,12 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer, LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRIu32 " bytes)", offset, byte_count); - if (offset & (NVM_BLOCK_SIZE - 1)) { + if (!IS_ALIGNED(offset, NVM_BLOCK_SIZE)) { LOG_ERROR("offset 0x%" PRIx32 " breaks required block alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } - if (byte_count & (NVM_BLOCK_SIZE - 1)) { + if (!IS_ALIGNED(byte_count, NVM_BLOCK_SIZE)) { LOG_WARNING("length %" PRIu32 " is not block aligned, rounding up", byte_count); } diff --git a/src/flash/nor/xmc4xxx.c b/src/flash/nor/xmc4xxx.c index a2cf6a0b1..1668e8993 100644 --- a/src/flash/nor/xmc4xxx.c +++ b/src/flash/nor/xmc4xxx.c @@ -577,8 +577,6 @@ static int xmc4xxx_erase(struct flash_bank *bank, unsigned int first, if (res != ERROR_OK) goto clear_status_and_exit; - - bank->sectors[i].is_erased = 1; } clear_status_and_exit: @@ -941,7 +939,7 @@ static int xmc4xxx_get_info_command(struct flash_bank *bank, struct command_invo } } - if (rev_str != NULL) + if (rev_str) command_print_sameline(cmd, "%s - Rev: %s%s", dev_str, rev_str, prot_str); else command_print_sameline(cmd, "%s - Rev: unknown (0x%01x)%s", dev_str, rev_id, prot_str); @@ -1270,12 +1268,12 @@ COMMAND_HANDLER(xmc4xxx_handle_flash_password_command) errno = 0; /* We skip over the flash bank */ - fb->pw1 = strtol(CMD_ARGV[1], NULL, 16); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], fb->pw1); if (errno) return ERROR_COMMAND_SYNTAX_ERROR; - fb->pw2 = strtol(CMD_ARGV[2], NULL, 16); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], fb->pw2); if (errno) return ERROR_COMMAND_SYNTAX_ERROR; diff --git a/src/flash/startup.tcl b/src/flash/startup.tcl index 0a26da08b..93ef82ce6 100644 --- a/src/flash/startup.tcl +++ b/src/flash/startup.tcl @@ -114,9 +114,10 @@ proc stm32f7x args { eval stm32f2x $args } proc stm32l0x args { eval stm32lx $args } proc stm32l1x args { eval stm32lx $args } -# stm32[g0|g4|wb|wl] uses the same flash driver as the stm32l4x +# stm32[g0|g4|l5|u5|wb|wl] uses the same flash driver as the stm32l4x proc stm32g0x args { eval stm32l4x $args } proc stm32g4x args { eval stm32l4x $args } proc stm32l5x args { eval stm32l4x $args } +proc stm32u5x args { eval stm32l4x $args } proc stm32wbx args { eval stm32l4x $args } proc stm32wlx args { eval stm32l4x $args } diff --git a/src/hello.c b/src/hello.c index a1c00c0dd..9d078c0e7 100644 --- a/src/hello.c +++ b/src/hello.c @@ -88,7 +88,7 @@ COMMAND_HANDLER(handle_hello_command) { const char *sep, *name; int retval = CALL_COMMAND_HANDLER(handle_hello_args, &sep, &name); - if (ERROR_OK == retval) + if (retval == ERROR_OK) command_print(CMD, "Greetings%s%s!", sep, name); return retval; } diff --git a/src/helper/Makefile.am b/src/helper/Makefile.am index f54d9de5e..822578a76 100644 --- a/src/helper/Makefile.am +++ b/src/helper/Makefile.am @@ -1,7 +1,5 @@ noinst_LTLIBRARIES += %D%/libhelper.la -%C%_libhelper_la_CPPFLAGS = $(AM_CPPFLAGS) $(LIBUSB1_CFLAGS) - %C%_libhelper_la_SOURCES = \ %D%/binarybuffer.c \ %D%/options.c \ @@ -15,6 +13,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la %D%/util.c \ %D%/jep106.c \ %D%/jim-nvp.c \ + %D%/align.h \ %D%/binarybuffer.h \ %D%/bits.h \ %D%/configuration.h \ @@ -33,12 +32,6 @@ noinst_LTLIBRARIES += %D%/libhelper.la %D%/base64.c \ %D%/base64.h -%C%_libhelper_la_CFLAGS = $(AM_CFLAGS) -if IS_MINGW -# FD_* macros are sloppy with their signs on MinGW32 platform -%C%_libhelper_la_CFLAGS += -Wno-sign-compare -endif - STARTUP_TCL_SRCS += %D%/startup.tcl EXTRA_DIST += \ %D%/bin2char.sh \ diff --git a/src/helper/align.h b/src/helper/align.h new file mode 100644 index 000000000..935a6a3b2 --- /dev/null +++ b/src/helper/align.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/* + * The content of this file is mainly copied/inspired from Linux kernel + * code in include/linux/align.h and include/uapi/linux/const.h + * + * Macro name 'ALIGN' conflicts with macOS/BSD file param.h + */ + +#ifndef OPENOCD_HELPER_ALIGN_H +#define OPENOCD_HELPER_ALIGN_H + +#define ALIGN_MASK(x, mask) \ +({ \ + typeof(mask) _mask = (mask); \ + ((x) + _mask) & ~_mask; \ +}) + +/* @a is a power of 2 value */ +#define ALIGN_UP(x, a) ALIGN_MASK(x, (typeof(x))(a) - 1) +#define ALIGN_DOWN(x, a) ((x) & ~((typeof(x))(a) - 1)) +#define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0) + +#define IS_PWR_OF_2(x) \ +({ \ + typeof(x) _x = (x); \ + _x == 0 || (_x & (_x - 1)) == 0; \ +}) + +#endif /* OPENOCD_HELPER_ALIGN_H */ diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c index 3d35702ac..e2dfa87b6 100644 --- a/src/helper/binarybuffer.c +++ b/src/helper/binarybuffer.c @@ -53,7 +53,7 @@ static const char hex_digits[] = { void *buf_cpy(const void *from, void *_to, unsigned size) { - if (NULL == from || NULL == _to) + if (!from || !_to) return NULL; /* copy entire buffer */ @@ -222,7 +222,7 @@ static void str_radix_guess(const char **_str, unsigned *_str_len, unsigned *_radix) { unsigned radix = *_radix; - if (0 != radix) + if (radix != 0) return; const char *str = *_str; unsigned str_len = *_str_len; diff --git a/src/helper/command.c b/src/helper/command.c index 593847040..0430dc895 100644 --- a/src/helper/command.c +++ b/src/helper/command.c @@ -118,7 +118,7 @@ static struct log_capture_state *command_log_capture_start(Jim_Interp *interp) */ static void command_log_capture_finish(struct log_capture_state *state) { - if (NULL == state) + if (!state) return; log_remove_callback(tcl_output, state); @@ -175,7 +175,7 @@ static int workaround_createcommand(Jim_Interp *interp, const char *cmdName, static int command_retval_set(Jim_Interp *interp, int retval) { int *return_retval = Jim_GetAssocData(interp, "retval"); - if (return_retval != NULL) + if (return_retval) *return_retval = retval; return (retval == ERROR_OK) ? JIM_OK : retval; @@ -213,7 +213,7 @@ static char **script_command_args_alloc( unsigned argc, Jim_Obj * const *argv, unsigned *nwords) { char **words = malloc(argc * sizeof(char *)); - if (NULL == words) + if (!words) return NULL; unsigned i; @@ -221,7 +221,7 @@ static char **script_command_args_alloc( int len; const char *w = Jim_GetString(argv[i], &len); words[i] = strdup(w); - if (words[i] == NULL) { + if (!words[i]) { script_command_args_free(words, i); return NULL; } @@ -234,7 +234,7 @@ struct command_context *current_command_context(Jim_Interp *interp) { /* grab the command context from the associated data */ struct command_context *cmd_ctx = Jim_GetAssocData(interp, "context"); - if (NULL == cmd_ctx) { + if (!cmd_ctx) { /* Tcl can invoke commands directly instead of via command_run_line(). This would * happen when the Jim Tcl interpreter is provided by eCos or if we are running * commands in a startup script. @@ -285,7 +285,7 @@ static struct command *command_new(struct command_context *cmd_ctx, full_name); struct command *c = calloc(1, sizeof(struct command)); - if (NULL == c) + if (!c) return NULL; c->name = strdup(cr->name); @@ -369,16 +369,16 @@ int __register_commands(struct command_context *cmd_ctx, const char *cmd_prefix, const struct command_registration *cr = cmds + i; struct command *c = NULL; - if (NULL != cr->name) { + if (cr->name) { c = register_command(cmd_ctx, cmd_prefix, cr); - if (NULL == c) { + if (!c) { retval = ERROR_FAIL; break; } c->jim_handler_data = data; c->jim_override_target = override_target; } - if (NULL != cr->chain) { + if (cr->chain) { if (cr->name) { if (cmd_prefix) { char *new_prefix = alloc_printf("%s %s", cmd_prefix, cr->name); @@ -394,11 +394,11 @@ int __register_commands(struct command_context *cmd_ctx, const char *cmd_prefix, } else { retval = __register_commands(cmd_ctx, cmd_prefix, cr->chain, data, override_target); } - if (ERROR_OK != retval) + if (retval != ERROR_OK) break; } } - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { for (unsigned j = 0; j < i; j++) unregister_command(cmd_ctx, cmd_prefix, cmds[j].name); } @@ -501,7 +501,7 @@ void command_print_sameline(struct command_invocation *cmd, const char *format, va_start(ap, format); string = alloc_vprintf(format, ap); - if (string != NULL && cmd) { + if (string && cmd) { /* we want this collected in the log + we also want to pick it up as a tcl return * value. * @@ -524,7 +524,7 @@ void command_print(struct command_invocation *cmd, const char *format, ...) va_start(ap, format); string = alloc_vprintf(format, ap); - if (string != NULL && cmd) { + if (string && cmd) { strcat(string, "\n"); /* alloc_vprintf guaranteed the buffer to be at least one *char longer */ /* we want this collected in the log + we also want to pick it up as a tcl return @@ -670,7 +670,7 @@ int command_run_linef(struct command_context *context, const char *format, ...) va_list ap; va_start(ap, format); string = alloc_vprintf(format, ap); - if (string != NULL) { + if (string) { retval = command_run_line(context, string); free(string); } @@ -696,7 +696,7 @@ struct command_context *copy_command_context(struct command_context *context) void command_done(struct command_context *cmd_ctx) { - if (NULL == cmd_ctx) + if (!cmd_ctx) return; free(cmd_ctx); @@ -709,7 +709,7 @@ static int jim_find(Jim_Interp *interp, int argc, Jim_Obj *const *argv) return JIM_ERR; const char *file = Jim_GetString(argv[1], NULL); char *full_path = find_file(file); - if (full_path == NULL) + if (!full_path) return JIM_ERR; Jim_Obj *result = Jim_NewStringObj(interp, full_path, strlen(full_path)); free(full_path); @@ -815,9 +815,9 @@ static COMMAND_HELPER(command_help_show, struct help_entry *c, /* If the match string occurs anywhere, we print out * stuff for this command. */ - bool is_match = (strstr(c->cmd_name, cmd_match) != NULL) || - ((c->usage != NULL) && (strstr(c->usage, cmd_match) != NULL)) || - ((c->help != NULL) && (strstr(c->help, cmd_match) != NULL)); + bool is_match = strstr(c->cmd_name, cmd_match) || + (c->usage && strstr(c->usage, cmd_match)) || + (c->help && strstr(c->help, cmd_match)); if (is_match) { if (c->usage && strlen(c->usage) > 0) { @@ -870,7 +870,7 @@ static COMMAND_HELPER(command_help_show, struct help_entry *c, } else msg = alloc_printf("%s", c->help ? c->help : ""); - if (NULL != msg) { + if (msg) { command_help_show_wrap(msg, n + 3, n + 3); free(msg); } else @@ -899,7 +899,7 @@ COMMAND_HANDLER(handle_help_command) } } - if (cmd_match == NULL) { + if (!cmd_match) { LOG_ERROR("unable to build search string"); return -ENOMEM; } @@ -954,8 +954,6 @@ static int exec_command(Jim_Interp *interp, struct command_context *cmd_ctx, static int jim_command_dispatch(Jim_Interp *interp, int argc, Jim_Obj * const *argv) { - script_debug(interp, argc, argv); - /* check subcommands */ if (argc > 1) { char *s = alloc_printf("%s %s", Jim_GetString(argv[0], NULL), Jim_GetString(argv[1], NULL)); @@ -971,6 +969,8 @@ static int jim_command_dispatch(Jim_Interp *interp, int argc, Jim_Obj * const *a Jim_DecrRefCount(interp, js); } + script_debug(interp, argc, argv); + struct command *c = jim_to_command(interp); if (!c->jim_handler && !c->handler) { Jim_EvalObjPrefix(interp, Jim_NewStringObj(interp, "usage", -1), 1, argv); @@ -1171,7 +1171,7 @@ COMMAND_HANDLER(handle_sleep_command) unsigned long duration = 0; int retval = parse_ulong(CMD_ARGV[0], &duration); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (!busy) { @@ -1286,7 +1286,7 @@ struct command_context *command_init(const char *startup_tcl, Jim_Interp *interp INIT_LIST_HEAD(context->help_list); /* Create a jim interpreter if we were not handed one */ - if (interp == NULL) { + if (!interp) { /* Create an interpreter */ interp = Jim_CreateInterp(); /* Add all the Jim core commands */ @@ -1354,11 +1354,11 @@ void process_jim_events(struct command_context *cmd_ctx) LOG_ERROR("Invalid command argument"); \ return ERROR_COMMAND_ARGUMENT_INVALID; \ } \ - if ((max == *ul) && (ERANGE == errno)) { \ + if ((max == *ul) && (errno == ERANGE)) { \ LOG_ERROR("Argument overflow"); \ return ERROR_COMMAND_ARGUMENT_OVERFLOW; \ } \ - if (min && (min == *ul) && (ERANGE == errno)) { \ + if (min && (min == *ul) && (errno == ERANGE)) { \ LOG_ERROR("Argument underflow"); \ return ERROR_COMMAND_ARGUMENT_UNDERFLOW; \ } \ @@ -1374,7 +1374,7 @@ DEFINE_PARSE_NUM_TYPE(_llong, long long, strtoll, LLONG_MIN, LLONG_MAX) { \ functype n; \ int retval = parse ## funcname(str, &n); \ - if (ERROR_OK != retval) \ + if (retval != ERROR_OK) \ return retval; \ if (n > max) \ return ERROR_COMMAND_ARGUMENT_OVERFLOW; \ diff --git a/src/helper/command.h b/src/helper/command.h index 719c94b6b..f38701983 100644 --- a/src/helper/command.h +++ b/src/helper/command.h @@ -427,7 +427,7 @@ DECLARE_PARSE_WRAPPER(_target_addr, target_addr_t); #define COMMAND_PARSE_NUMBER(type, in, out) \ do { \ int retval_macro_tmp = parse_ ## type(in, &(out)); \ - if (ERROR_OK != retval_macro_tmp) { \ + if (retval_macro_tmp != ERROR_OK) { \ command_print(CMD, stringify(out) \ " option value ('%s') is not valid", in); \ return retval_macro_tmp; \ @@ -489,7 +489,7 @@ DECLARE_PARSE_WRAPPER(_target_addr, target_addr_t); do { \ bool value; \ int retval_macro_tmp = command_parse_bool_arg(in, &value); \ - if (ERROR_OK != retval_macro_tmp) { \ + if (retval_macro_tmp != ERROR_OK) { \ command_print(CMD, stringify(out) \ " option value ('%s') is not valid", in); \ command_print(CMD, " choices are '%s' or '%s'", \ diff --git a/src/helper/configuration.c b/src/helper/configuration.c index 8f4f11833..7e791d084 100644 --- a/src/helper/configuration.c +++ b/src/helper/configuration.c @@ -111,7 +111,7 @@ FILE *open_file_from_path(const char *file, const char *mode) return fopen(file, mode); else { char *full_path = find_file(file); - if (full_path == NULL) + if (!full_path) return NULL; FILE *fp = NULL; fp = fopen(full_path, mode); @@ -150,12 +150,12 @@ char *get_home_dir(const char *append_path) { char *home = getenv("HOME"); - if (home == NULL) { + if (!home) { #ifdef _WIN32 home = getenv("USERPROFILE"); - if (home == NULL) { + if (!home) { char homepath[MAX_PATH]; char *drive = getenv("HOMEDRIVE"); @@ -173,7 +173,7 @@ char *get_home_dir(const char *append_path) #endif } - if (home == NULL) + if (!home) return home; char *home_path; diff --git a/src/helper/fileio.c b/src/helper/fileio.c index b6f1f4e2c..cec7dec52 100644 --- a/src/helper/fileio.c +++ b/src/helper/fileio.c @@ -198,9 +198,9 @@ int fileio_read_u32(struct fileio *fileio, uint32_t *data) retval = fileio_local_read(fileio, sizeof(uint32_t), buf, &size_read); - if (ERROR_OK == retval && sizeof(uint32_t) != size_read) + if (retval == ERROR_OK && sizeof(uint32_t) != size_read) retval = -EIO; - if (ERROR_OK == retval) + if (retval == ERROR_OK) *data = be_to_h_u32(buf); return retval; @@ -208,7 +208,7 @@ int fileio_read_u32(struct fileio *fileio, uint32_t *data) static int fileio_local_fgets(struct fileio *fileio, size_t size, void *buffer) { - if (fgets(buffer, size, fileio->file) == NULL) + if (!fgets(buffer, size, fileio->file)) return ERROR_FILEIO_OPERATION_FAILED; return ERROR_OK; @@ -252,7 +252,7 @@ int fileio_write_u32(struct fileio *fileio, uint32_t data) retval = fileio_write(fileio, 4, buf, &size_written); - if (ERROR_OK == retval && size_written != sizeof(uint32_t)) + if (retval == ERROR_OK && size_written != sizeof(uint32_t)) retval = -EIO; return retval; diff --git a/src/helper/jep106.c b/src/helper/jep106.c index 33dc61c91..5cf769aab 100644 --- a/src/helper/jep106.c +++ b/src/helper/jep106.c @@ -27,7 +27,7 @@ static const char * const jep106[][126] = { #include "jep106.inc" }; -const char *jep106_manufacturer(unsigned bank, unsigned id) +const char *jep106_table_manufacturer(unsigned int bank, unsigned int id) { if (id < 1 || id > 126) { LOG_DEBUG("BUG: Caller passed out-of-range JEP106 ID!"); diff --git a/src/helper/jep106.h b/src/helper/jep106.h index 08445803e..61b177a2f 100644 --- a/src/helper/jep106.h +++ b/src/helper/jep106.h @@ -27,6 +27,11 @@ * manufacturer associated with bank and id, or one of the strings * "" and "". */ -const char *jep106_manufacturer(unsigned bank, unsigned id); +const char *jep106_table_manufacturer(unsigned int bank, unsigned int id); + +static inline const char *jep106_manufacturer(unsigned int manufacturer) +{ + return jep106_table_manufacturer(manufacturer >> 7, manufacturer & 0x7f); +} #endif /* OPENOCD_HELPER_JEP106_H */ diff --git a/src/helper/jim-nvp.c b/src/helper/jim-nvp.c index 746af8e4c..e21bc680d 100644 --- a/src/helper/jim-nvp.c +++ b/src/helper/jim-nvp.c @@ -66,7 +66,7 @@ int jim_get_nvp(Jim_Interp *interp, struct jim_nvp *jim_nvp_name2value_simple(const struct jim_nvp *p, const char *name) { while (p->name) { - if (0 == strcmp(name, p->name)) + if (strcmp(name, p->name) == 0) break; p++; } @@ -76,7 +76,7 @@ struct jim_nvp *jim_nvp_name2value_simple(const struct jim_nvp *p, const char *n struct jim_nvp *jim_nvp_name2value_nocase_simple(const struct jim_nvp *p, const char *name) { while (p->name) { - if (0 == strcasecmp(name, p->name)) + if (strcasecmp(name, p->name) == 0) break; p++; } @@ -199,7 +199,7 @@ int jim_getopt_obj(struct jim_getopt_info *goi, Jim_Obj **puthere) } if (puthere) *puthere = o; - if (o != NULL) + if (o) return JIM_OK; else return JIM_ERR; @@ -227,7 +227,7 @@ int jim_getopt_double(struct jim_getopt_info *goi, double *puthere) Jim_Obj *o; double _safe; - if (puthere == NULL) + if (!puthere) puthere = &_safe; r = jim_getopt_obj(goi, &o); @@ -245,7 +245,7 @@ int jim_getopt_wide(struct jim_getopt_info *goi, jim_wide *puthere) Jim_Obj *o; jim_wide _safe; - if (puthere == NULL) + if (!puthere) puthere = &_safe; r = jim_getopt_obj(goi, &o); @@ -260,7 +260,7 @@ int jim_getopt_nvp(struct jim_getopt_info *goi, const struct jim_nvp *nvp, struc Jim_Obj *o; int e; - if (puthere == NULL) + if (!puthere) puthere = &_safe; e = jim_getopt_obj(goi, &o); @@ -284,7 +284,7 @@ int jim_getopt_enum(struct jim_getopt_info *goi, const char *const *lookup, int Jim_Obj *o; int e; - if (puthere == NULL) + if (!puthere) puthere = &_safe; e = jim_getopt_obj(goi, &o); if (e == JIM_OK) diff --git a/src/helper/log.c b/src/helper/log.c index 36b59fe77..caa0a66bf 100644 --- a/src/helper/log.c +++ b/src/helper/log.c @@ -108,7 +108,7 @@ static void log_puts(enum log_levels level, } f = strrchr(file, '/'); - if (f != NULL) + if (f) file = f + 1; if (strlen(string) > 0) { @@ -163,7 +163,7 @@ void log_printf(enum log_levels level, va_start(ap, format); string = alloc_vprintf(format, ap); - if (string != NULL) { + if (string) { log_puts(level, file, line, function, string); free(string); } @@ -230,7 +230,7 @@ COMMAND_HANDLER(handle_debug_level_command) COMMAND_HANDLER(handle_log_output_command) { if (CMD_ARGC == 0 || (CMD_ARGC == 1 && strcmp(CMD_ARGV[0], "default") == 0)) { - if (log_output != stderr && log_output != NULL) { + if (log_output != stderr && log_output) { /* Close previous log file, if it was open and wasn't stderr. */ fclose(log_output); } @@ -240,11 +240,11 @@ COMMAND_HANDLER(handle_log_output_command) } if (CMD_ARGC == 1) { FILE *file = fopen(CMD_ARGV[0], "w"); - if (file == NULL) { + if (!file) { LOG_ERROR("failed to open output log '%s'", CMD_ARGV[0]); return ERROR_FAIL; } - if (log_output != stderr && log_output != NULL) { + if (log_output != stderr && log_output) { /* Close previous log file, if it was open and wasn't stderr. */ fclose(log_output); } @@ -287,16 +287,16 @@ void log_init(void) /* set defaults for daemon configuration, * if not set by cmdline or cfgfile */ char *debug_env = getenv("OPENOCD_DEBUG_LEVEL"); - if (NULL != debug_env) { + if (debug_env) { int value; int retval = parse_int(debug_env, &value); - if (ERROR_OK == retval && + if (retval == ERROR_OK && debug_level >= LOG_LVL_SILENT && debug_level <= LOG_LVL_DEBUG_IO) debug_level = value; } - if (log_output == NULL) + if (!log_output) log_output = stderr; start = last_time = timeval_ms(); @@ -322,7 +322,7 @@ int log_add_callback(log_callback_fn fn, void *priv) /* alloc memory, it is safe just to return in case of an error, no need for the caller to *check this */ cb = malloc(sizeof(struct log_callback)); - if (cb == NULL) + if (!cb) return ERROR_BUF_TOO_SMALL; /* add item to the beginning of the linked list */ @@ -367,7 +367,7 @@ char *alloc_vprintf(const char *fmt, va_list ap) * other code depend on that. They should be probably be fixed, but for * now reserve the extra byte. */ string = malloc(len + 2); - if (string == NULL) + if (!string) return NULL; /* do the real work */ @@ -473,11 +473,11 @@ void kept_alive(void) /* if we sleep for extended periods of time, we must invoke keep_alive() intermittently */ void alive_sleep(uint64_t ms) { - uint64_t napTime = 10; - for (uint64_t i = 0; i < ms; i += napTime) { + uint64_t nap_time = 10; + for (uint64_t i = 0; i < ms; i += nap_time) { uint64_t sleep_a_bit = ms - i; - if (sleep_a_bit > napTime) - sleep_a_bit = napTime; + if (sleep_a_bit > nap_time) + sleep_a_bit = nap_time; usleep(sleep_a_bit * 1000); keep_alive(); diff --git a/src/helper/options.c b/src/helper/options.c index f996749ea..199672789 100644 --- a/src/helper/options.c +++ b/src/helper/options.c @@ -75,7 +75,7 @@ static char *find_exe_path(void) do { #if IS_WIN32 && !IS_CYGWIN exepath = malloc(MAX_PATH); - if (exepath == NULL) + if (!exepath) break; GetModuleFileName(NULL, exepath, MAX_PATH); @@ -87,7 +87,7 @@ static char *find_exe_path(void) #elif IS_DARWIN exepath = malloc(PROC_PIDPATHINFO_MAXSIZE); - if (exepath == NULL) + if (!exepath) break; if (proc_pidpath(getpid(), exepath, PROC_PIDPATHINFO_MAXSIZE) <= 0) { free(exepath); @@ -99,7 +99,7 @@ static char *find_exe_path(void) #define PATH_MAX 1024 #endif char *path = malloc(PATH_MAX); - if (path == NULL) + if (!path) break; int mib[] = { CTL_KERN, KERN_PROC, KERN_PROC_PATHNAME, -1 }; size_t size = PATH_MAX; @@ -117,14 +117,14 @@ static char *find_exe_path(void) #elif defined(HAVE_REALPATH) /* Assume POSIX.1-2008 */ /* Try Unices in order of likelihood. */ exepath = realpath("/proc/self/exe", NULL); /* Linux/Cygwin */ - if (exepath == NULL) + if (!exepath) exepath = realpath("/proc/self/path/a.out", NULL); /* Solaris */ - if (exepath == NULL) + if (!exepath) exepath = realpath("/proc/curproc/file", NULL); /* FreeBSD (Should be covered above) */ #endif } while (0); - if (exepath != NULL) { + if (exepath) { /* Strip executable file name, leaving path */ *strrchr(exepath, '/') = '\0'; } else { @@ -163,7 +163,7 @@ static char *find_relative_path(const char *from, const char *to) if (from[0] != '/') i++; char *next = strchr(from, '/'); - if (next == NULL) + if (!next) break; from = next + 1; } diff --git a/src/helper/replacements.c b/src/helper/replacements.c index f4ecb8dfc..c34b17ec5 100644 --- a/src/helper/replacements.c +++ b/src/helper/replacements.c @@ -33,7 +33,7 @@ void *clear_malloc(size_t size) { void *t = malloc(size); - if (t != NULL) + if (t) memset(t, 0x00, size); return t; } @@ -41,7 +41,7 @@ void *clear_malloc(size_t size) void *fill_malloc(size_t size) { void *t = malloc(size); - if (t != NULL) { + if (t) { /* We want to initialize memory to some known bad state. * 0 and 0xff yields 0 and -1 as integers, which often * have meaningful values. 0x5555... is not often a valid @@ -124,7 +124,7 @@ char *strndup(const char *s, size_t n) size_t len = strnlen(s, n); char *new = malloc(len + 1); - if (new == NULL) + if (!new) return NULL; new[len] = '\0'; @@ -145,10 +145,10 @@ int win_select(int max_fd, fd_set *rfds, fd_set *wfds, fd_set *efds, struct time struct timeval tvslice; int retcode; -#define SAFE_FD_ISSET(fd, set) (set != NULL && FD_ISSET(fd, set)) +#define SAFE_FD_ISSET(fd, set) (set && FD_ISSET(fd, set)) /* calculate how long we need to wait in milliseconds */ - if (tv == NULL) + if (!tv) ms_total = INFINITE; else { ms_total = tv->tv_sec * 1000; @@ -233,16 +233,16 @@ int win_select(int max_fd, fd_set *rfds, fd_set *wfds, fd_set *efds, struct time if (retcode < 0) retcode = 0; for (i = 0; i < n_handles; i++) { - if (WAIT_OBJECT_0 == WaitForSingleObject(handles[i], 0)) { + if (WaitForSingleObject(handles[i], 0) == WAIT_OBJECT_0) { if (SAFE_FD_ISSET(handle_slot_to_fd[i], rfds)) { - DWORD dwBytes; + DWORD bytes; intptr_t handle = (intptr_t) _get_osfhandle( handle_slot_to_fd[i]); if (PeekNamedPipe((HANDLE)handle, NULL, 0, - NULL, &dwBytes, NULL)) { + NULL, &bytes, NULL)) { /* check to see if gdb pipe has data available */ - if (dwBytes) { + if (bytes) { FD_SET(handle_slot_to_fd[i], &aread); retcode++; } @@ -275,45 +275,3 @@ int win_select(int max_fd, fd_set *rfds, fd_set *wfds, fd_set *efds, struct time return retcode; } #endif - -#if defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME -#include -/* Verbatim from git://git.libusb.org/libusb.git tag 1.0.9 - * The libusb_error enum is compatible down to v0.9.1 - */ -const char *libusb_error_name(int error_code) -{ - enum libusb_error error = error_code; - switch (error) { - case LIBUSB_SUCCESS: - return "LIBUSB_SUCCESS"; - case LIBUSB_ERROR_IO: - return "LIBUSB_ERROR_IO"; - case LIBUSB_ERROR_INVALID_PARAM: - return "LIBUSB_ERROR_INVALID_PARAM"; - case LIBUSB_ERROR_ACCESS: - return "LIBUSB_ERROR_ACCESS"; - case LIBUSB_ERROR_NO_DEVICE: - return "LIBUSB_ERROR_NO_DEVICE"; - case LIBUSB_ERROR_NOT_FOUND: - return "LIBUSB_ERROR_NOT_FOUND"; - case LIBUSB_ERROR_BUSY: - return "LIBUSB_ERROR_BUSY"; - case LIBUSB_ERROR_TIMEOUT: - return "LIBUSB_ERROR_TIMEOUT"; - case LIBUSB_ERROR_OVERFLOW: - return "LIBUSB_ERROR_OVERFLOW"; - case LIBUSB_ERROR_PIPE: - return "LIBUSB_ERROR_PIPE"; - case LIBUSB_ERROR_INTERRUPTED: - return "LIBUSB_ERROR_INTERRUPTED"; - case LIBUSB_ERROR_NO_MEM: - return "LIBUSB_ERROR_NO_MEM"; - case LIBUSB_ERROR_NOT_SUPPORTED: - return "LIBUSB_ERROR_NOT_SUPPORTED"; - case LIBUSB_ERROR_OTHER: - return "LIBUSB_ERROR_OTHER"; - } - return "**UNKNOWN**"; -} -#endif diff --git a/src/helper/replacements.h b/src/helper/replacements.h index 5aecf4182..4d70d9cf3 100644 --- a/src/helper/replacements.h +++ b/src/helper/replacements.h @@ -328,8 +328,4 @@ typedef struct { #endif /* HAVE_ELF64 */ -#if defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME -const char *libusb_error_name(int error_code); -#endif /* defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME */ - #endif /* OPENOCD_HELPER_REPLACEMENTS_H */ diff --git a/src/helper/time_support.c b/src/helper/time_support.c index 05eaf0a9d..861889ec6 100644 --- a/src/helper/time_support.c +++ b/src/helper/time_support.c @@ -86,7 +86,7 @@ int duration_measure(struct duration *duration) { struct timeval end; int retval = gettimeofday(&end, NULL); - if (0 == retval) + if (retval == 0) timeval_subtract(&duration->elapsed, &end, &duration->start); return retval; } diff --git a/src/helper/util.c b/src/helper/util.c index dcd59e6ea..be163b26d 100644 --- a/src/helper/util.c +++ b/src/helper/util.c @@ -24,7 +24,7 @@ #include "log.h" #include "time_support.h" -static int util_Jim_Command_ms(Jim_Interp *interp, +static int jim_util_ms(Jim_Interp *interp, int argc, Jim_Obj * const *argv) { @@ -45,7 +45,7 @@ static const struct command_registration util_command_handlers[] = { { .name = "ms", .mode = COMMAND_ANY, - .jim_handler = util_Jim_Command_ms, + .jim_handler = jim_util_ms, .help = "Returns ever increasing milliseconds. Used to calculate differences in time.", .usage = "", diff --git a/src/jtag/adapter.c b/src/jtag/adapter.c index b1b5fe52f..578160106 100644 --- a/src/jtag/adapter.c +++ b/src/jtag/adapter.c @@ -87,7 +87,7 @@ COMMAND_HANDLER(handle_adapter_list_command) return ERROR_COMMAND_SYNTAX_ERROR; command_print(CMD, "The following debug adapters are available:"); - for (unsigned i = 0; NULL != adapter_drivers[i]; i++) { + for (unsigned i = 0; adapter_drivers[i]; i++) { const char *name = adapter_drivers[i]->name; command_print(CMD, "%u: %s", i + 1, name); } @@ -109,14 +109,14 @@ COMMAND_HANDLER(handle_adapter_driver_command) if (CMD_ARGC != 1 || CMD_ARGV[0][0] == '\0') return ERROR_COMMAND_SYNTAX_ERROR; - for (unsigned i = 0; NULL != adapter_drivers[i]; i++) { + for (unsigned i = 0; adapter_drivers[i]; i++) { if (strcmp(CMD_ARGV[0], adapter_drivers[i]->name) != 0) continue; - if (NULL != adapter_drivers[i]->commands) { + if (adapter_drivers[i]->commands) { retval = register_commands(CMD_CTX, NULL, adapter_drivers[i]->commands); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } @@ -390,13 +390,13 @@ COMMAND_HANDLER(handle_adapter_speed_command) COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], khz); retval = jtag_config_khz(khz); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } int cur_speed = jtag_get_speed_khz(); retval = jtag_get_speed_readable(&cur_speed); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (cur_speed) diff --git a/src/jtag/aice/aice_interface.c b/src/jtag/aice/aice_interface.c index 86e9d16c1..c7556c018 100644 --- a/src/jtag/aice/aice_interface.c +++ b/src/jtag/aice/aice_interface.c @@ -121,7 +121,7 @@ int aice_init_targets(void) */ static int aice_init(void) { - if (ERROR_OK != aice_port->api->open(¶m)) { + if (aice_port->api->open(¶m) != ERROR_OK) { LOG_ERROR("Cannot find AICE Interface! Please check " "connection and permissions."); return ERROR_JTAG_INIT_FAILED; @@ -217,7 +217,7 @@ static int aice_khz(int khz, int *jtag_speed) int i; for (i = 0 ; i < AICE_KHZ_TO_SPEED_MAP_SIZE ; i++) { if (khz == aice_khz_to_speed_map[i]) { - if (8 <= i) + if (i >= 8) *jtag_speed = i | AICE_TCK_CONTROL_TCK3048; else *jtag_speed = i; diff --git a/src/jtag/aice/aice_transport.c b/src/jtag/aice/aice_transport.c index 322d8ae5c..3e9d94219 100644 --- a/src/jtag/aice/aice_transport.c +++ b/src/jtag/aice/aice_transport.c @@ -31,7 +31,7 @@ /* */ static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi, - struct jtag_tap *pTap) + struct jtag_tap *tap) { jim_wide w; int e = jim_getopt_wide(goi, &w); @@ -41,21 +41,21 @@ static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi return e; } - unsigned expected_len = sizeof(uint32_t) * pTap->expected_ids_cnt; + unsigned expected_len = sizeof(uint32_t) * tap->expected_ids_cnt; uint32_t *new_expected_ids = malloc(expected_len + sizeof(uint32_t)); - if (new_expected_ids == NULL) { + if (!new_expected_ids) { Jim_SetResultFormatted(goi->interp, "no memory"); return JIM_ERR; } - assert(pTap->expected_ids); - memcpy(new_expected_ids, pTap->expected_ids, expected_len); + assert(tap->expected_ids); + memcpy(new_expected_ids, tap->expected_ids, expected_len); - new_expected_ids[pTap->expected_ids_cnt] = w; + new_expected_ids[tap->expected_ids_cnt] = w; - free(pTap->expected_ids); - pTap->expected_ids = new_expected_ids; - pTap->expected_ids_cnt++; + free(tap->expected_ids); + tap->expected_ids = new_expected_ids; + tap->expected_ids_cnt++; return JIM_OK; } @@ -65,7 +65,7 @@ static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi /* */ static int jim_aice_newtap_cmd(struct jim_getopt_info *goi) { - struct jtag_tap *pTap; + struct jtag_tap *tap; int x; int e; struct jim_nvp *n; @@ -75,8 +75,8 @@ static int jim_aice_newtap_cmd(struct jim_getopt_info *goi) {.name = NULL, .value = -1}, }; - pTap = calloc(1, sizeof(struct jtag_tap)); - if (!pTap) { + tap = calloc(1, sizeof(struct jtag_tap)); + if (!tap) { Jim_SetResultFormatted(goi->interp, "no memory"); return JIM_ERR; } @@ -87,41 +87,41 @@ static int jim_aice_newtap_cmd(struct jim_getopt_info *goi) if (goi->argc < 3) { Jim_SetResultFormatted(goi->interp, "Missing CHIP TAP OPTIONS ...."); - free(pTap); + free(tap); return JIM_ERR; } const char *tmp; jim_getopt_string(goi, &tmp, NULL); - pTap->chip = strdup(tmp); + tap->chip = strdup(tmp); jim_getopt_string(goi, &tmp, NULL); - pTap->tapname = strdup(tmp); + tap->tapname = strdup(tmp); /* name + dot + name + null */ - x = strlen(pTap->chip) + 1 + strlen(pTap->tapname) + 1; + x = strlen(tap->chip) + 1 + strlen(tap->tapname) + 1; cp = malloc(x); - sprintf(cp, "%s.%s", pTap->chip, pTap->tapname); - pTap->dotted_name = cp; + sprintf(cp, "%s.%s", tap->chip, tap->tapname); + tap->dotted_name = cp; LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params", - pTap->chip, pTap->tapname, pTap->dotted_name, goi->argc); + tap->chip, tap->tapname, tap->dotted_name, goi->argc); while (goi->argc) { e = jim_getopt_nvp(goi, opts, &n); if (e != JIM_OK) { jim_getopt_nvp_unknown(goi, opts, 0); free(cp); - free(pTap); + free(tap); return e; } LOG_DEBUG("Processing option: %s", n->name); switch (n->value) { case NTAP_OPT_EXPECTED_ID: - e = jim_newtap_expected_id(n, goi, pTap); - if (JIM_OK != e) { + e = jim_newtap_expected_id(n, goi, tap); + if (e != JIM_OK) { free(cp); - free(pTap); + free(tap); return e; } break; @@ -129,9 +129,9 @@ static int jim_aice_newtap_cmd(struct jim_getopt_info *goi) } /* while (goi->argc) */ /* default is enabled-after-reset */ - pTap->enabled = !pTap->disabled_after_reset; + tap->enabled = !tap->disabled_after_reset; - jtag_tap_init(pTap); + jtag_tap_init(tap); return JIM_OK; } diff --git a/src/jtag/aice/aice_usb.c b/src/jtag/aice/aice_usb.c index b97033137..491406afa 100644 --- a/src/jtag/aice/aice_usb.c +++ b/src/jtag/aice/aice_usb.c @@ -54,29 +54,29 @@ static enum aice_target_endian data_endian; #define AICE_FORMAT_DTHMB (4) /* Constants for AICE command */ -static const uint8_t AICE_CMD_SCAN_CHAIN = 0x00; -static const uint8_t AICE_CMD_T_READ_MISC = 0x20; -static const uint8_t AICE_CMD_T_READ_EDMSR = 0x21; -static const uint8_t AICE_CMD_T_READ_DTR = 0x22; -static const uint8_t AICE_CMD_T_READ_MEM_B = 0x24; -static const uint8_t AICE_CMD_T_READ_MEM_H = 0x25; -static const uint8_t AICE_CMD_T_READ_MEM = 0x26; -static const uint8_t AICE_CMD_T_FASTREAD_MEM = 0x27; -static const uint8_t AICE_CMD_T_WRITE_MISC = 0x28; -static const uint8_t AICE_CMD_T_WRITE_EDMSR = 0x29; -static const uint8_t AICE_CMD_T_WRITE_DTR = 0x2A; -static const uint8_t AICE_CMD_T_WRITE_DIM = 0x2B; -static const uint8_t AICE_CMD_T_WRITE_MEM_B = 0x2C; -static const uint8_t AICE_CMD_T_WRITE_MEM_H = 0x2D; -static const uint8_t AICE_CMD_T_WRITE_MEM = 0x2E; -static const uint8_t AICE_CMD_T_FASTWRITE_MEM = 0x2F; -static const uint8_t AICE_CMD_T_EXECUTE = 0x3E; -static const uint8_t AICE_CMD_READ_CTRL = 0x50; -static const uint8_t AICE_CMD_WRITE_CTRL = 0x51; -static const uint8_t AICE_CMD_BATCH_BUFFER_READ = 0x60; -static const uint8_t AICE_CMD_READ_DTR_TO_BUFFER = 0x61; -static const uint8_t AICE_CMD_BATCH_BUFFER_WRITE = 0x68; -static const uint8_t AICE_CMD_WRITE_DTR_FROM_BUFFER = 0x69; +#define AICE_CMD_SCAN_CHAIN 0x00 +#define AICE_CMD_T_READ_MISC 0x20 +#define AICE_CMD_T_READ_EDMSR 0x21 +#define AICE_CMD_T_READ_DTR 0x22 +#define AICE_CMD_T_READ_MEM_B 0x24 +#define AICE_CMD_T_READ_MEM_H 0x25 +#define AICE_CMD_T_READ_MEM 0x26 +#define AICE_CMD_T_FASTREAD_MEM 0x27 +#define AICE_CMD_T_WRITE_MISC 0x28 +#define AICE_CMD_T_WRITE_EDMSR 0x29 +#define AICE_CMD_T_WRITE_DTR 0x2A +#define AICE_CMD_T_WRITE_DIM 0x2B +#define AICE_CMD_T_WRITE_MEM_B 0x2C +#define AICE_CMD_T_WRITE_MEM_H 0x2D +#define AICE_CMD_T_WRITE_MEM 0x2E +#define AICE_CMD_T_FASTWRITE_MEM 0x2F +#define AICE_CMD_T_EXECUTE 0x3E +#define AICE_CMD_READ_CTRL 0x50 +#define AICE_CMD_WRITE_CTRL 0x51 +#define AICE_CMD_BATCH_BUFFER_READ 0x60 +#define AICE_CMD_READ_DTR_TO_BUFFER 0x61 +#define AICE_CMD_BATCH_BUFFER_WRITE 0x68 +#define AICE_CMD_WRITE_DTR_FROM_BUFFER 0x69 /***************************************************************************/ /* AICE commands' pack/unpack functions */ @@ -361,9 +361,9 @@ static int usb_bulk_with_retries( int result, ret; ret = f(dev, ep, bytes + count, size - count, timeout, &result); - if (ERROR_OK == ret) + if (ret == ERROR_OK) count += result; - else if ((ERROR_TIMEOUT_REACHED != ret) || !--tries) + else if ((ret != ERROR_TIMEOUT_REACHED) || !--tries) return ret; } @@ -445,7 +445,7 @@ static int aice_usb_packet_flush(void) if (usb_out_packets_buffer_length == 0) return 0; - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { LOG_DEBUG("Flush usb packets (AICE_COMMAND_MODE_PACK)"); if (aice_usb_write(usb_out_packets_buffer, @@ -459,7 +459,7 @@ static int aice_usb_packet_flush(void) usb_out_packets_buffer_length = 0; usb_in_packets_buffer_length = 0; - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { LOG_DEBUG("Flush usb packets (AICE_COMMAND_MODE_BATCH)"); /* use BATCH_BUFFER_WRITE to fill command-batch-buffer */ @@ -509,9 +509,9 @@ static int aice_usb_packet_append(uint8_t *out_buffer, int out_length, int in_le { uint32_t max_packet_size = AICE_OUT_PACKETS_BUFFER_SIZE; - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { max_packet_size = AICE_OUT_PACK_COMMAND_SIZE; - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { max_packet_size = AICE_OUT_BATCH_COMMAND_SIZE; } else { /* AICE_COMMAND_MODE_NORMAL */ @@ -558,8 +558,8 @@ static int aice_scan_chain(uint32_t *id_codes, uint8_t *num_of_ids) { int retry_times = 0; - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) aice_usb_packet_flush(); do { @@ -571,7 +571,7 @@ static int aice_scan_chain(uint32_t *id_codes, uint8_t *num_of_ids) /** TODO: modify receive length */ int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHA); - if (AICE_FORMAT_DTHA != result) { + if (result != AICE_FORMAT_DTHA) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHA, result); return ERROR_FAIL; @@ -584,7 +584,7 @@ static int aice_scan_chain(uint32_t *id_codes, uint8_t *num_of_ids) if (cmd_ack_code != AICE_CMD_SCAN_CHAIN) { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_SCAN_CHAIN, cmd_ack_code); return ERROR_FAIL; } @@ -615,8 +615,8 @@ static int aice_scan_chain(uint32_t *id_codes, uint8_t *num_of_ids) int aice_read_ctrl(uint32_t address, uint32_t *data) { - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) aice_usb_packet_flush(); aice_pack_htda(AICE_CMD_READ_CTRL, 0, address); @@ -626,7 +626,7 @@ int aice_read_ctrl(uint32_t address, uint32_t *data) LOG_DEBUG("READ_CTRL, address: 0x%" PRIx32, address); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHA); - if (AICE_FORMAT_DTHA != result) { + if (result != AICE_FORMAT_DTHA) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHA, result); return ERROR_FAIL; @@ -639,8 +639,8 @@ int aice_read_ctrl(uint32_t address, uint32_t *data) LOG_DEBUG("READ_CTRL response, data: 0x%" PRIx32, *data); if (cmd_ack_code != AICE_CMD_READ_CTRL) { - LOG_ERROR("aice command error (command=0x%" PRIx32 ", response=0x%" PRIx8 ")", - (uint32_t)AICE_CMD_READ_CTRL, cmd_ack_code); + LOG_ERROR("aice command error (command=0x%x, response=0x%" PRIx8 ")", + AICE_CMD_READ_CTRL, cmd_ack_code); return ERROR_FAIL; } @@ -649,9 +649,9 @@ int aice_read_ctrl(uint32_t address, uint32_t *data) int aice_write_ctrl(uint32_t address, uint32_t data) { - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { aice_usb_packet_flush(); - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { aice_pack_htdc(AICE_CMD_WRITE_CTRL, 0, address, data, AICE_LITTLE_ENDIAN); return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDC, AICE_FORMAT_DTHB); @@ -664,7 +664,7 @@ int aice_write_ctrl(uint32_t address, uint32_t data) LOG_DEBUG("WRITE_CTRL, address: 0x%" PRIx32 ", data: 0x%" PRIx32, address, data); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHB); - if (AICE_FORMAT_DTHB != result) { + if (result != AICE_FORMAT_DTHB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHB, result); return ERROR_FAIL; @@ -677,7 +677,7 @@ int aice_write_ctrl(uint32_t address, uint32_t data) LOG_DEBUG("WRITE_CTRL response"); if (cmd_ack_code != AICE_CMD_WRITE_CTRL) { - LOG_ERROR("aice command error (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command error (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_WRITE_CTRL, cmd_ack_code); return ERROR_FAIL; } @@ -689,8 +689,8 @@ static int aice_read_dtr(uint8_t target_id, uint32_t *data) { int retry_times = 0; - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) aice_usb_packet_flush(); do { @@ -701,7 +701,7 @@ static int aice_read_dtr(uint8_t target_id, uint32_t *data) LOG_DEBUG("READ_DTR, COREID: %" PRIu8, target_id); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); - if (AICE_FORMAT_DTHMA != result) { + if (result != AICE_FORMAT_DTHMA) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_FAIL; @@ -719,7 +719,7 @@ static int aice_read_dtr(uint8_t target_id, uint32_t *data) } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_READ_DTR, cmd_ack_code); return ERROR_FAIL; } @@ -739,9 +739,9 @@ static int aice_read_dtr_to_buffer(uint8_t target_id, uint32_t buffer_idx) { int retry_times = 0; - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { aice_usb_packet_flush(); - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { aice_pack_htdma(AICE_CMD_READ_DTR_TO_BUFFER, target_id, 0, buffer_idx); return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMA, AICE_FORMAT_DTHMB); @@ -755,7 +755,7 @@ static int aice_read_dtr_to_buffer(uint8_t target_id, uint32_t buffer_idx) LOG_DEBUG("READ_DTR_TO_BUFFER, COREID: %" PRIu8, target_id); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -769,7 +769,7 @@ static int aice_read_dtr_to_buffer(uint8_t target_id, uint32_t buffer_idx) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_READ_DTR_TO_BUFFER, cmd_ack_code); return ERROR_FAIL; @@ -790,9 +790,9 @@ static int aice_write_dtr(uint8_t target_id, uint32_t data) { int retry_times = 0; - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { aice_usb_packet_flush(); - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { aice_pack_htdmc(AICE_CMD_T_WRITE_DTR, target_id, 0, 0, data, AICE_LITTLE_ENDIAN); return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMC, AICE_FORMAT_DTHMB); @@ -806,7 +806,7 @@ static int aice_write_dtr(uint8_t target_id, uint32_t data) LOG_DEBUG("WRITE_DTR, COREID: %" PRIu8 ", data: 0x%" PRIx32, target_id, data); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -821,7 +821,7 @@ static int aice_write_dtr(uint8_t target_id, uint32_t data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_WRITE_DTR, cmd_ack_code); return ERROR_FAIL; @@ -842,9 +842,9 @@ static int aice_write_dtr_from_buffer(uint8_t target_id, uint32_t buffer_idx) { int retry_times = 0; - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { aice_usb_packet_flush(); - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { aice_pack_htdma(AICE_CMD_WRITE_DTR_FROM_BUFFER, target_id, 0, buffer_idx); return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMA, AICE_FORMAT_DTHMB); @@ -858,7 +858,7 @@ static int aice_write_dtr_from_buffer(uint8_t target_id, uint32_t buffer_idx) LOG_DEBUG("WRITE_DTR_FROM_BUFFER, COREID: %" PRIu8 "", target_id); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -872,7 +872,7 @@ static int aice_write_dtr_from_buffer(uint8_t target_id, uint32_t buffer_idx) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_WRITE_DTR_FROM_BUFFER, cmd_ack_code); return ERROR_FAIL; @@ -893,8 +893,8 @@ static int aice_read_misc(uint8_t target_id, uint32_t address, uint32_t *data) { int retry_times = 0; - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) aice_usb_packet_flush(); do { @@ -905,7 +905,7 @@ static int aice_read_misc(uint8_t target_id, uint32_t address, uint32_t *data) LOG_DEBUG("READ_MISC, COREID: %" PRIu8 ", address: 0x%" PRIx32, target_id, address); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); - if (AICE_FORMAT_DTHMA != result) { + if (result != AICE_FORMAT_DTHMA) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_AICE_DISCONNECT; @@ -922,7 +922,7 @@ static int aice_read_misc(uint8_t target_id, uint32_t address, uint32_t *data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_READ_MISC, cmd_ack_code); return ERROR_FAIL; } @@ -942,9 +942,9 @@ static int aice_write_misc(uint8_t target_id, uint32_t address, uint32_t data) { int retry_times = 0; - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { aice_usb_packet_flush(); - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { aice_pack_htdmc(AICE_CMD_T_WRITE_MISC, target_id, 0, address, data, AICE_LITTLE_ENDIAN); return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMC, @@ -961,7 +961,7 @@ static int aice_write_misc(uint8_t target_id, uint32_t address, uint32_t data) target_id, address, data); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; @@ -977,7 +977,7 @@ static int aice_write_misc(uint8_t target_id, uint32_t address, uint32_t data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_WRITE_MISC, cmd_ack_code); return ERROR_FAIL; @@ -998,8 +998,8 @@ static int aice_read_edmsr(uint8_t target_id, uint32_t address, uint32_t *data) { int retry_times = 0; - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) aice_usb_packet_flush(); do { @@ -1010,7 +1010,7 @@ static int aice_read_edmsr(uint8_t target_id, uint32_t address, uint32_t *data) LOG_DEBUG("READ_EDMSR, COREID: %" PRIu8 ", address: 0x%" PRIx32, target_id, address); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); - if (AICE_FORMAT_DTHMA != result) { + if (result != AICE_FORMAT_DTHMA) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_FAIL; @@ -1027,7 +1027,7 @@ static int aice_read_edmsr(uint8_t target_id, uint32_t address, uint32_t *data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_READ_EDMSR, cmd_ack_code); return ERROR_FAIL; @@ -1048,9 +1048,9 @@ static int aice_write_edmsr(uint8_t target_id, uint32_t address, uint32_t data) { int retry_times = 0; - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { aice_usb_packet_flush(); - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { aice_pack_htdmc(AICE_CMD_T_WRITE_EDMSR, target_id, 0, address, data, AICE_LITTLE_ENDIAN); return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMC, @@ -1067,7 +1067,7 @@ static int aice_write_edmsr(uint8_t target_id, uint32_t address, uint32_t data) target_id, address, data); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; @@ -1083,7 +1083,7 @@ static int aice_write_edmsr(uint8_t target_id, uint32_t address, uint32_t data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_WRITE_EDMSR, cmd_ack_code); return ERROR_FAIL; @@ -1124,9 +1124,9 @@ static int aice_write_dim(uint8_t target_id, uint32_t *word, uint8_t num_of_word memcpy(big_endian_word, word, sizeof(big_endian_word)); aice_switch_to_big_endian(big_endian_word, num_of_words); - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { aice_usb_packet_flush(); - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { aice_pack_htdmc_multiple_data(AICE_CMD_T_WRITE_DIM, target_id, num_of_words - 1, 0, big_endian_word, num_of_words, AICE_LITTLE_ENDIAN); @@ -1150,7 +1150,7 @@ static int aice_write_dim(uint8_t target_id, uint32_t *word, uint8_t num_of_word big_endian_word[3]); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -1166,8 +1166,7 @@ static int aice_write_dim(uint8_t target_id, uint32_t *word, uint8_t num_of_word break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 - ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_WRITE_DIM, cmd_ack_code); return ERROR_FAIL; @@ -1188,9 +1187,9 @@ static int aice_do_execute(uint8_t target_id) { int retry_times = 0; - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { aice_usb_packet_flush(); - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { aice_pack_htdmc(AICE_CMD_T_EXECUTE, target_id, 0, 0, 0, AICE_LITTLE_ENDIAN); return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMC, @@ -1205,7 +1204,7 @@ static int aice_do_execute(uint8_t target_id) LOG_DEBUG("EXECUTE, COREID: %" PRIu8 "", target_id); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; @@ -1221,7 +1220,7 @@ static int aice_do_execute(uint8_t target_id) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_EXECUTE, cmd_ack_code); return ERROR_FAIL; @@ -1247,8 +1246,8 @@ static int aice_write_mem_b(uint8_t target_id, uint32_t address, uint32_t data) address, data); - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) { + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) { aice_pack_htdmd(AICE_CMD_T_WRITE_MEM_B, target_id, 0, address, data & 0x000000FF, data_endian); return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMD, @@ -1260,7 +1259,7 @@ static int aice_write_mem_b(uint8_t target_id, uint32_t address, uint32_t data) aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMD); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; } @@ -1274,7 +1273,7 @@ static int aice_write_mem_b(uint8_t target_id, uint32_t address, uint32_t data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_WRITE_MEM_B, cmd_ack_code); return ERROR_FAIL; @@ -1301,8 +1300,8 @@ static int aice_write_mem_h(uint8_t target_id, uint32_t address, uint32_t data) address, data); - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) { + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) { aice_pack_htdmd(AICE_CMD_T_WRITE_MEM_H, target_id, 0, (address >> 1) & 0x7FFFFFFF, data & 0x0000FFFF, data_endian); return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMD, @@ -1314,7 +1313,7 @@ static int aice_write_mem_h(uint8_t target_id, uint32_t address, uint32_t data) aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMD); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; @@ -1329,7 +1328,7 @@ static int aice_write_mem_h(uint8_t target_id, uint32_t address, uint32_t data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_WRITE_MEM_H, cmd_ack_code); return ERROR_FAIL; @@ -1356,8 +1355,8 @@ static int aice_write_mem(uint8_t target_id, uint32_t address, uint32_t data) address, data); - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) { + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) { aice_pack_htdmd(AICE_CMD_T_WRITE_MEM, target_id, 0, (address >> 2) & 0x3FFFFFFF, data, data_endian); return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMD, @@ -1369,7 +1368,7 @@ static int aice_write_mem(uint8_t target_id, uint32_t address, uint32_t data) aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMD); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; @@ -1384,7 +1383,7 @@ static int aice_write_mem(uint8_t target_id, uint32_t address, uint32_t data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_WRITE_MEM, cmd_ack_code); return ERROR_FAIL; @@ -1406,8 +1405,8 @@ static int aice_fastread_mem(uint8_t target_id, uint8_t *word, uint32_t num_of_w { int retry_times = 0; - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) aice_usb_packet_flush(); do { @@ -1435,7 +1434,7 @@ static int aice_fastread_mem(uint8_t target_id, uint8_t *word, uint32_t num_of_w break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_FASTREAD_MEM, cmd_ack_code); return ERROR_FAIL; @@ -1456,9 +1455,9 @@ static int aice_fastwrite_mem(uint8_t target_id, const uint8_t *word, uint32_t n { int retry_times = 0; - if (AICE_COMMAND_MODE_PACK == aice_command_mode) { + if (aice_command_mode == AICE_COMMAND_MODE_PACK) { aice_usb_packet_flush(); - } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) { + } else if (aice_command_mode == AICE_COMMAND_MODE_BATCH) { aice_pack_htdmd_multiple_data(AICE_CMD_T_FASTWRITE_MEM, target_id, num_of_words - 1, 0, word, data_endian); return aice_usb_packet_append(usb_out_buffer, @@ -1476,7 +1475,7 @@ static int aice_fastwrite_mem(uint8_t target_id, const uint8_t *word, uint32_t n target_id, num_of_words); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; @@ -1491,7 +1490,7 @@ static int aice_fastwrite_mem(uint8_t target_id, const uint8_t *word, uint32_t n break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_FASTWRITE_MEM, cmd_ack_code); return ERROR_FAIL; @@ -1512,8 +1511,8 @@ static int aice_read_mem_b(uint8_t target_id, uint32_t address, uint32_t *data) { int retry_times = 0; - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) aice_usb_packet_flush(); do { @@ -1524,7 +1523,7 @@ static int aice_read_mem_b(uint8_t target_id, uint32_t address, uint32_t *data) LOG_DEBUG("READ_MEM_B, COREID: %" PRIu8 "", target_id); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); - if (AICE_FORMAT_DTHMA != result) { + if (result != AICE_FORMAT_DTHMA) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_FAIL; @@ -1541,7 +1540,7 @@ static int aice_read_mem_b(uint8_t target_id, uint32_t address, uint32_t *data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_READ_MEM_B, cmd_ack_code); return ERROR_FAIL; @@ -1562,8 +1561,8 @@ static int aice_read_mem_h(uint8_t target_id, uint32_t address, uint32_t *data) { int retry_times = 0; - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) aice_usb_packet_flush(); do { @@ -1574,7 +1573,7 @@ static int aice_read_mem_h(uint8_t target_id, uint32_t address, uint32_t *data) LOG_DEBUG("READ_MEM_H, CORE_ID: %" PRIu8 "", target_id); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); - if (AICE_FORMAT_DTHMA != result) { + if (result != AICE_FORMAT_DTHMA) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_FAIL; @@ -1591,7 +1590,7 @@ static int aice_read_mem_h(uint8_t target_id, uint32_t address, uint32_t *data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_READ_MEM_H, cmd_ack_code); return ERROR_FAIL; @@ -1612,8 +1611,8 @@ static int aice_read_mem(uint8_t target_id, uint32_t address, uint32_t *data) { int retry_times = 0; - if ((AICE_COMMAND_MODE_PACK == aice_command_mode) || - (AICE_COMMAND_MODE_BATCH == aice_command_mode)) + if ((aice_command_mode == AICE_COMMAND_MODE_PACK) || + (aice_command_mode == AICE_COMMAND_MODE_BATCH)) aice_usb_packet_flush(); do { @@ -1625,7 +1624,7 @@ static int aice_read_mem(uint8_t target_id, uint32_t address, uint32_t *data) LOG_DEBUG("READ_MEM, COREID: %" PRIu8 "", target_id); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA); - if (AICE_FORMAT_DTHMA != result) { + if (result != AICE_FORMAT_DTHMA) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMA, result); return ERROR_FAIL; @@ -1642,7 +1641,7 @@ static int aice_read_mem(uint8_t target_id, uint32_t address, uint32_t *data) break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_T_READ_MEM, cmd_ack_code); return ERROR_FAIL; @@ -1687,7 +1686,7 @@ static int aice_batch_buffer_read(uint8_t buf_index, uint32_t *word, uint32_t nu break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_BATCH_BUFFER_READ, cmd_ack_code); return ERROR_FAIL; @@ -1724,7 +1723,7 @@ int aice_batch_buffer_write(uint8_t buf_index, const uint8_t *word, uint32_t num LOG_DEBUG("BATCH_BUFFER_WRITE, # of DATA %08" PRIx32, num_of_words); int result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB); - if (AICE_FORMAT_DTHMB != result) { + if (result != AICE_FORMAT_DTHMB) { LOG_ERROR("aice_usb_read failed (requested=%d, result=%d)", AICE_FORMAT_DTHMB, result); return ERROR_FAIL; @@ -1739,7 +1738,7 @@ int aice_batch_buffer_write(uint8_t buf_index, const uint8_t *word, uint32_t num break; } else { if (retry_times > aice_max_retry_times) { - LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")", + LOG_ERROR("aice command timeout (command=0x%x, response=0x%" PRIx8 ")", AICE_CMD_BATCH_BUFFER_WRITE, cmd_ack_code); return ERROR_FAIL; @@ -1836,9 +1835,9 @@ static int aice_check_dbger(uint32_t coreid, uint32_t expect_status) aice_read_misc(coreid, NDS_EDM_MISC_DBGER, &value_dbger); if ((value_dbger & expect_status) == expect_status) { - if (ERROR_OK != check_suppressed_exception(coreid, value_dbger)) + if (check_suppressed_exception(coreid, value_dbger) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != check_privilege(coreid, value_dbger)) + if (check_privilege(coreid, value_dbger) != ERROR_OK) return ERROR_FAIL; return ERROR_OK; } @@ -1896,18 +1895,18 @@ static int aice_read_reg(uint32_t coreid, uint32_t num, uint32_t *val) uint32_t instructions[4]; /** execute instructions in DIM */ - if (NDS32_REG_TYPE_GPR == nds32_reg_type(num)) { /* general registers */ + if (nds32_reg_type(num) == NDS32_REG_TYPE_GPR) { /* general registers */ instructions[0] = MTSR_DTR(num); instructions[1] = DSB; instructions[2] = NOP; instructions[3] = BEQ_MINUS_12; - } else if (NDS32_REG_TYPE_SPR == nds32_reg_type(num)) { /* user special registers */ + } else if (nds32_reg_type(num) == NDS32_REG_TYPE_SPR) { /* user special registers */ instructions[0] = MFUSR_G0(0, nds32_reg_sr_index(num)); instructions[1] = MTSR_DTR(0); instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; - } else if (NDS32_REG_TYPE_AUMR == nds32_reg_type(num)) { /* audio registers */ - if ((CB_CTL <= num) && (num <= CBE3)) { + } else if (nds32_reg_type(num) == NDS32_REG_TYPE_AUMR) { /* audio registers */ + if ((num >= CB_CTL) && (num <= CBE3)) { instructions[0] = AMFAR2(0, nds32_reg_sr_index(num)); instructions[1] = MTSR_DTR(0); instructions[2] = DSB; @@ -1918,24 +1917,24 @@ static int aice_read_reg(uint32_t coreid, uint32_t num, uint32_t *val) instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; } - } else if (NDS32_REG_TYPE_FPU == nds32_reg_type(num)) { /* fpu registers */ - if (FPCSR == num) { + } else if (nds32_reg_type(num) == NDS32_REG_TYPE_FPU) { /* fpu registers */ + if (num == FPCSR) { instructions[0] = FMFCSR; instructions[1] = MTSR_DTR(0); instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; - } else if (FPCFG == num) { + } else if (num == FPCFG) { instructions[0] = FMFCFG; instructions[1] = MTSR_DTR(0); instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; } else { - if (FS0 <= num && num <= FS31) { /* single precision */ + if (num >= FS0 && num <= FS31) { /* single precision */ instructions[0] = FMFSR(0, nds32_reg_sr_index(num)); instructions[1] = MTSR_DTR(0); instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; - } else if (FD0 <= num && num <= FD31) { /* double precision */ + } else if (num >= FD0 && num <= FD31) { /* double precision */ instructions[0] = FMFDR(0, nds32_reg_sr_index(num)); instructions[1] = MTSR_DTR(0); instructions[2] = DSB; @@ -1984,7 +1983,7 @@ static int aice_usb_read_reg(uint32_t coreid, uint32_t num, uint32_t *val) } else if ((core_info[coreid].target_dtr_valid == true) && (num == DR43)) { *val = core_info[coreid].target_dtr_backup; } else { - if (ERROR_OK != aice_read_reg(coreid, num, val)) + if (aice_read_reg(coreid, num, val) != ERROR_OK) *val = 0xBBADBEEF; } @@ -2005,18 +2004,18 @@ static int aice_write_reg(uint32_t coreid, uint32_t num, uint32_t val) return ERROR_FAIL; } - if (NDS32_REG_TYPE_GPR == nds32_reg_type(num)) { /* general registers */ + if (nds32_reg_type(num) == NDS32_REG_TYPE_GPR) { /* general registers */ instructions[0] = MFSR_DTR(num); instructions[1] = DSB; instructions[2] = NOP; instructions[3] = BEQ_MINUS_12; - } else if (NDS32_REG_TYPE_SPR == nds32_reg_type(num)) { /* user special registers */ + } else if (nds32_reg_type(num) == NDS32_REG_TYPE_SPR) { /* user special registers */ instructions[0] = MFSR_DTR(0); instructions[1] = MTUSR_G0(0, nds32_reg_sr_index(num)); instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; - } else if (NDS32_REG_TYPE_AUMR == nds32_reg_type(num)) { /* audio registers */ - if ((CB_CTL <= num) && (num <= CBE3)) { + } else if (nds32_reg_type(num) == NDS32_REG_TYPE_AUMR) { /* audio registers */ + if ((num >= CB_CTL) && (num <= CBE3)) { instructions[0] = MFSR_DTR(0); instructions[1] = AMTAR2(0, nds32_reg_sr_index(num)); instructions[2] = DSB; @@ -2027,21 +2026,21 @@ static int aice_write_reg(uint32_t coreid, uint32_t num, uint32_t val) instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; } - } else if (NDS32_REG_TYPE_FPU == nds32_reg_type(num)) { /* fpu registers */ - if (FPCSR == num) { + } else if (nds32_reg_type(num) == NDS32_REG_TYPE_FPU) { /* fpu registers */ + if (num == FPCSR) { instructions[0] = MFSR_DTR(0); instructions[1] = FMTCSR; instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; - } else if (FPCFG == num) { + } else if (num == FPCFG) { /* FPCFG is readonly */ } else { - if (FS0 <= num && num <= FS31) { /* single precision */ + if (num >= FS0 && num <= FS31) { /* single precision */ instructions[0] = MFSR_DTR(0); instructions[1] = FMTSR(0, nds32_reg_sr_index(num)); instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; - } else if (FD0 <= num && num <= FD31) { /* double precision */ + } else if (num >= FD0 && num <= FD31) { /* double precision */ instructions[0] = MFSR_DTR(0); instructions[1] = FMTDR(0, nds32_reg_sr_index(num)); instructions[2] = DSB; @@ -2117,7 +2116,7 @@ static int aice_usb_open(struct aice_port_param_s *param) if (!timeout) break; } - if (ERROR_OK != retval) + if (retval != ERROR_OK) return ERROR_FAIL; #endif @@ -2147,7 +2146,7 @@ static int aice_usb_read_reg_64(uint32_t coreid, uint32_t num, uint64_t *val) uint32_t value; uint32_t high_value; - if (ERROR_OK != aice_read_reg(coreid, num, &value)) + if (aice_read_reg(coreid, num, &value) != ERROR_OK) value = 0xBBADBEEF; aice_read_reg(coreid, R1, &high_value); @@ -2216,24 +2215,24 @@ static int aice_execute_custom_script(const char *script) bool set_op; script_fd = fopen(script, "r"); - if (script_fd == NULL) { + if (!script_fd) { return ERROR_FAIL; } else { - while (fgets(line_buffer, LINE_BUFFER_SIZE, script_fd) != NULL) { + while (fgets(line_buffer, LINE_BUFFER_SIZE, script_fd)) { /* execute operations */ set_op = false; op_str = strstr(line_buffer, "set"); - if (op_str != NULL) { + if (op_str) { set_op = true; goto get_reset_type; } op_str = strstr(line_buffer, "clear"); - if (op_str == NULL) + if (!op_str) continue; get_reset_type: reset_str = strstr(op_str, "srst"); - if (reset_str != NULL) { + if (reset_str) { if (set_op) write_ctrl_value = AICE_CUSTOM_DELAY_SET_SRST; else @@ -2241,7 +2240,7 @@ get_reset_type: goto get_delay; } reset_str = strstr(op_str, "dbgi"); - if (reset_str != NULL) { + if (reset_str) { if (set_op) write_ctrl_value = AICE_CUSTOM_DELAY_SET_DBGI; else @@ -2249,7 +2248,7 @@ get_reset_type: goto get_delay; } reset_str = strstr(op_str, "trst"); - if (reset_str != NULL) { + if (reset_str) { if (set_op) write_ctrl_value = AICE_CUSTOM_DELAY_SET_TRST; else @@ -2504,10 +2503,10 @@ static int aice_restore_tmp_registers(uint32_t coreid) static int aice_open_device(struct aice_port_param_s *param) { - if (ERROR_OK != aice_usb_open(param)) + if (aice_usb_open(param) != ERROR_OK) return ERROR_FAIL; - if (ERROR_FAIL == aice_get_version_info()) { + if (aice_get_version_info() == ERROR_FAIL) { LOG_ERROR("Cannot get AICE version!"); return ERROR_FAIL; } @@ -2515,7 +2514,7 @@ static int aice_open_device(struct aice_port_param_s *param) LOG_INFO("AICE initialization started"); /* attempt to reset Andes EDM */ - if (ERROR_FAIL == aice_reset_box()) { + if (aice_reset_box() == ERROR_FAIL) { LOG_ERROR("Cannot initial AICE box!"); return ERROR_FAIL; } @@ -2527,7 +2526,7 @@ static int aice_usb_set_jtag_clock(uint32_t a_clock) { jtag_clock = a_clock; - if (ERROR_OK != aice_usb_set_clock(a_clock)) { + if (aice_usb_set_clock(a_clock) != ERROR_OK) { LOG_ERROR("Cannot set AICE JTAG clock!"); return ERROR_FAIL; } @@ -2559,7 +2558,7 @@ static int aice_usb_idcode(uint32_t *idcode, uint8_t *num_of_idcode) int retval; retval = aice_scan_chain(idcode, num_of_idcode); - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { for (int i = 0; i < *num_of_idcode; i++) { aice_core_init(i); aice_edm_init(i); @@ -2660,7 +2659,7 @@ static int aice_usb_state(uint32_t coreid, enum aice_target_state_s *state) int result = aice_read_misc(coreid, NDS_EDM_MISC_DBGER, &dbger_value); - if (ERROR_AICE_TIMEOUT == result) { + if (result == ERROR_AICE_TIMEOUT) { if (aice_read_ctrl(AICE_READ_CTRL_GET_ICE_STATE, &ice_state) != ERROR_OK) { LOG_ERROR("<-- AICE ERROR! AICE is unplugged. -->"); return ERROR_FAIL; @@ -2672,7 +2671,7 @@ static int aice_usb_state(uint32_t coreid, enum aice_target_state_s *state) } else { return ERROR_FAIL; } - } else if (ERROR_AICE_DISCONNECT == result) { + } else if (result == ERROR_AICE_DISCONNECT) { LOG_ERROR("<-- AICE ERROR! AICE is unplugged. -->"); return ERROR_FAIL; } @@ -2706,7 +2705,7 @@ static int aice_usb_state(uint32_t coreid, enum aice_target_state_s *state) /* Clear CRST */ aice_write_misc(coreid, NDS_EDM_MISC_DBGER, NDS_DBGER_CRST); } else if ((dbger_value & NDS_DBGER_DEX) == NDS_DBGER_DEX) { - if (AICE_TARGET_RUNNING == core_info[coreid].core_state) { + if (core_info[coreid].core_state == AICE_TARGET_RUNNING) { /* enter debug mode, init EDM registers */ /* backup EDM registers */ aice_backup_edm_registers(coreid); @@ -2714,7 +2713,7 @@ static int aice_usb_state(uint32_t coreid, enum aice_target_state_s *state) aice_init_edm_registers(coreid, true); aice_backup_tmp_registers(coreid); core_info[coreid].core_state = AICE_TARGET_HALTED; - } else if (AICE_TARGET_UNKNOWN == core_info[coreid].core_state) { + } else if (core_info[coreid].core_state == AICE_TARGET_UNKNOWN) { /* debug 'debug mode', use force debug to halt core */ aice_usb_halt(coreid); } @@ -2733,7 +2732,7 @@ static int aice_usb_reset(void) return ERROR_FAIL; /* issue TRST */ - if (custom_trst_script == NULL) { + if (!custom_trst_script) { if (aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_CONTROL, AICE_JTAG_PIN_CONTROL_TRST) != ERROR_OK) return ERROR_FAIL; @@ -2756,7 +2755,7 @@ static int aice_issue_srst(uint32_t coreid) /* After issuing srst, target will be running. So we need to restore EDM_CTL. */ aice_restore_edm_registers(coreid); - if (custom_srst_script == NULL) { + if (!custom_srst_script) { if (aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_CONTROL, AICE_JTAG_PIN_CONTROL_SRST) != ERROR_OK) return ERROR_FAIL; @@ -2800,7 +2799,7 @@ static int aice_issue_reset_hold(uint32_t coreid) aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_STATUS, pin_status & (~0x4)); /* issue restart */ - if (custom_restart_script == NULL) { + if (!custom_restart_script) { if (aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_CONTROL, AICE_JTAG_PIN_CONTROL_RESTART) != ERROR_OK) return ERROR_FAIL; @@ -2820,7 +2819,7 @@ static int aice_issue_reset_hold(uint32_t coreid) aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_STATUS, pin_status | 0x4); /* issue restart again */ - if (custom_restart_script == NULL) { + if (!custom_restart_script) { if (aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_CONTROL, AICE_JTAG_PIN_CONTROL_RESTART) != ERROR_OK) return ERROR_FAIL; @@ -2878,7 +2877,7 @@ static int aice_issue_reset_hold_multi(void) static int aice_usb_assert_srst(uint32_t coreid, enum aice_srst_type_s srst) { - if ((AICE_SRST != srst) && (AICE_RESET_HOLD != srst)) + if ((srst != AICE_SRST) && (srst != AICE_RESET_HOLD)) return ERROR_FAIL; /* clear DBGER */ @@ -2887,10 +2886,10 @@ static int aice_usb_assert_srst(uint32_t coreid, enum aice_srst_type_s srst) return ERROR_FAIL; int result = ERROR_OK; - if (AICE_SRST == srst) + if (srst == AICE_SRST) result = aice_issue_srst(coreid); else { - if (1 == total_num_of_core) + if (total_num_of_core == 1) result = aice_issue_reset_hold(coreid); else result = aice_issue_reset_hold_multi(); @@ -2973,7 +2972,7 @@ static int aice_usb_step(uint32_t coreid) aice_write_reg(coreid, ir0_reg_num, ir0_value); } - if (ERROR_FAIL == aice_usb_run(coreid)) + if (aice_usb_run(coreid) == ERROR_FAIL) return ERROR_FAIL; int i = 0; @@ -2983,7 +2982,7 @@ static int aice_usb_step(uint32_t coreid) if (aice_usb_state(coreid, &state) != ERROR_OK) return ERROR_FAIL; - if (AICE_TARGET_HALTED == state) + if (state == AICE_TARGET_HALTED) break; int64_t then = 0; @@ -3093,7 +3092,7 @@ static int aice_usb_read_memory_unit(uint32_t coreid, uint32_t addr, uint32_t si ", size: %" PRIu32 ", count: %" PRIu32 "", addr, size, count); - if (NDS_MEMORY_ACC_CPU == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_CPU) aice_usb_set_address_dim(coreid, addr); uint32_t value; @@ -3102,7 +3101,7 @@ static int aice_usb_read_memory_unit(uint32_t coreid, uint32_t addr, uint32_t si switch (size) { case 1: - if (NDS_MEMORY_ACC_BUS == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_BUS) read_mem_func = aice_usb_read_mem_b_bus; else read_mem_func = aice_usb_read_mem_b_dim; @@ -3114,7 +3113,7 @@ static int aice_usb_read_memory_unit(uint32_t coreid, uint32_t addr, uint32_t si } break; case 2: - if (NDS_MEMORY_ACC_BUS == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_BUS) read_mem_func = aice_usb_read_mem_h_bus; else read_mem_func = aice_usb_read_mem_h_dim; @@ -3128,7 +3127,7 @@ static int aice_usb_read_memory_unit(uint32_t coreid, uint32_t addr, uint32_t si } break; case 4: - if (NDS_MEMORY_ACC_BUS == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_BUS) read_mem_func = aice_usb_read_mem_w_bus; else read_mem_func = aice_usb_read_mem_w_dim; @@ -3212,7 +3211,7 @@ static int aice_usb_write_memory_unit(uint32_t coreid, uint32_t addr, uint32_t s ", size: %" PRIu32 ", count: %" PRIu32 "", addr, size, count); - if (NDS_MEMORY_ACC_CPU == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_CPU) aice_usb_set_address_dim(coreid, addr); size_t i; @@ -3220,7 +3219,7 @@ static int aice_usb_write_memory_unit(uint32_t coreid, uint32_t addr, uint32_t s switch (size) { case 1: - if (NDS_MEMORY_ACC_BUS == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_BUS) write_mem_func = aice_usb_write_mem_b_bus; else write_mem_func = aice_usb_write_mem_b_dim; @@ -3232,7 +3231,7 @@ static int aice_usb_write_memory_unit(uint32_t coreid, uint32_t addr, uint32_t s } break; case 2: - if (NDS_MEMORY_ACC_BUS == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_BUS) write_mem_func = aice_usb_write_mem_h_bus; else write_mem_func = aice_usb_write_mem_h_dim; @@ -3247,7 +3246,7 @@ static int aice_usb_write_memory_unit(uint32_t coreid, uint32_t addr, uint32_t s } break; case 4: - if (NDS_MEMORY_ACC_BUS == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_BUS) write_mem_func = aice_usb_write_mem_w_bus; else write_mem_func = aice_usb_write_mem_w_dim; @@ -3323,10 +3322,10 @@ static int aice_usb_bulk_read_mem(uint32_t coreid, uint32_t addr, int retval; - if (NDS_MEMORY_ACC_CPU == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_CPU) aice_usb_set_address_dim(coreid, addr); - if (NDS_MEMORY_ACC_CPU == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_CPU) retval = aice_usb_read_memory_unit(coreid, addr, 4, length / 4, buffer); else retval = aice_bulk_read_mem(coreid, addr, length / 4, buffer); @@ -3341,10 +3340,10 @@ static int aice_usb_bulk_write_mem(uint32_t coreid, uint32_t addr, int retval; - if (NDS_MEMORY_ACC_CPU == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_CPU) aice_usb_set_address_dim(coreid, addr); - if (NDS_MEMORY_ACC_CPU == core_info[coreid].access_channel) + if (core_info[coreid].access_channel == NDS_MEMORY_ACC_CPU) retval = aice_usb_write_memory_unit(coreid, addr, 4, length / 4, buffer); else retval = aice_bulk_write_mem(coreid, addr, length / 4, buffer); @@ -3354,10 +3353,10 @@ static int aice_usb_bulk_write_mem(uint32_t coreid, uint32_t addr, static int aice_usb_read_debug_reg(uint32_t coreid, uint32_t addr, uint32_t *val) { - if (AICE_TARGET_HALTED == core_info[coreid].core_state) { - if (NDS_EDM_SR_EDMSW == addr) { + if (core_info[coreid].core_state == AICE_TARGET_HALTED) { + if (addr == NDS_EDM_SR_EDMSW) { *val = core_info[coreid].edmsw_backup; - } else if (NDS_EDM_SR_EDM_DTR == addr) { + } else if (addr == NDS_EDM_SR_EDM_DTR) { if (core_info[coreid].target_dtr_valid) { /* if EDM_DTR has read out, clear it. */ *val = core_info[coreid].target_dtr_backup; @@ -3374,8 +3373,8 @@ static int aice_usb_read_debug_reg(uint32_t coreid, uint32_t addr, uint32_t *val static int aice_usb_write_debug_reg(uint32_t coreid, uint32_t addr, const uint32_t val) { - if (AICE_TARGET_HALTED == core_info[coreid].core_state) { - if (NDS_EDM_SR_EDM_DTR == addr) { + if (core_info[coreid].core_state == AICE_TARGET_HALTED) { + if (addr == NDS_EDM_SR_EDM_DTR) { core_info[coreid].host_dtr_backup = val; core_info[coreid].edmsw_backup |= 0x2; core_info[coreid].host_dtr_valid = true; @@ -3403,7 +3402,7 @@ static int aice_usb_memory_mode(uint32_t coreid, enum nds_memory_select mem_sele core_info[coreid].memory_select = mem_select; - if (NDS_MEMORY_SELECT_AUTO != core_info[coreid].memory_select) + if (core_info[coreid].memory_select != NDS_MEMORY_SELECT_AUTO) aice_write_misc(coreid, NDS_EDM_MISC_ACC_CTL, core_info[coreid].memory_select - 1); else @@ -3455,13 +3454,13 @@ static int aice_usb_read_tlb(uint32_t coreid, target_addr_t virtual_address, aice_read_reg(coreid, MR4, &value_mr4); access_page_size = value_mr4 & 0xF; - if (0 == access_page_size) { /* 4K page */ + if (access_page_size == 0) { /* 4K page */ virtual_offset = virtual_address & 0x00000FFF; physical_page_number = value_mr3 & 0xFFFFF000; - } else if (1 == access_page_size) { /* 8K page */ + } else if (access_page_size == 1) { /* 8K page */ virtual_offset = virtual_address & 0x00001FFF; physical_page_number = value_mr3 & 0xFFFFE000; - } else if (5 == access_page_size) { /* 1M page */ + } else if (access_page_size == 5) { /* 1M page */ virtual_offset = virtual_address & 0x000FFFFF; physical_page_number = value_mr3 & 0xFFF00000; } else { @@ -3547,10 +3546,10 @@ static int aice_usb_dcache_inval_all(uint32_t coreid) cache_index = (way_index << (dcache->log2_set + dcache->log2_line_size)) | (set_index << dcache->log2_line_size); - if (ERROR_OK != aice_write_dtr(coreid, cache_index)) + if (aice_write_dtr(coreid, cache_index) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != aice_execute_dim(coreid, instructions, 4)) + if (aice_execute_dim(coreid, instructions, 4) != ERROR_OK) return ERROR_FAIL; } } @@ -3595,10 +3594,10 @@ static int aice_usb_dcache_wb_all(uint32_t coreid) cache_index = (way_index << (dcache->log2_set + dcache->log2_line_size)) | (set_index << dcache->log2_line_size); - if (ERROR_OK != aice_write_dtr(coreid, cache_index)) + if (aice_write_dtr(coreid, cache_index) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != aice_execute_dim(coreid, instructions, 4)) + if (aice_execute_dim(coreid, instructions, 4) != ERROR_OK) return ERROR_FAIL; } } @@ -3643,10 +3642,10 @@ static int aice_usb_icache_inval_all(uint32_t coreid) cache_index = (way_index << (icache->log2_set + icache->log2_line_size)) | (set_index << icache->log2_line_size); - if (ERROR_OK != aice_write_dtr(coreid, cache_index)) + if (aice_write_dtr(coreid, cache_index) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != aice_execute_dim(coreid, instructions, 4)) + if (aice_execute_dim(coreid, instructions, 4) != ERROR_OK) return ERROR_FAIL; } } @@ -3722,7 +3721,7 @@ static int aice_usb_program_edm(uint32_t coreid, char *command_sequence) /* init strtok() */ command_str = strtok(command_sequence, ";"); - if (command_str == NULL) + if (!command_str) return ERROR_OK; do { @@ -3741,14 +3740,14 @@ static int aice_usb_program_edm(uint32_t coreid, char *command_sequence) reg_name_0 = strstr(command_str, "gen_port0"); reg_name_1 = strstr(command_str, "gen_port1"); - if (reg_name_0 != NULL) { + if (reg_name_0) { data_value = strtoul(reg_name_0 + 9, NULL, 0); if (aice_write_misc(coreid, NDS_EDM_MISC_GEN_PORT0, data_value) != ERROR_OK) return ERROR_FAIL; - } else if (reg_name_1 != NULL) { + } else if (reg_name_1) { data_value = strtoul(reg_name_1 + 9, NULL, 0); if (aice_write_misc(coreid, @@ -3764,7 +3763,7 @@ static int aice_usb_program_edm(uint32_t coreid, char *command_sequence) /* update command_str */ command_str = strtok(NULL, ";"); - } while (command_str != NULL); + } while (command_str); return ERROR_OK; } @@ -3776,7 +3775,7 @@ static int aice_usb_set_command_mode(enum aice_command_mode command_mode) /* flush usb_packets_buffer as users change mode */ retval = aice_usb_packet_flush(); - if (AICE_COMMAND_MODE_BATCH == command_mode) { + if (command_mode == AICE_COMMAND_MODE_BATCH) { /* reset batch buffer */ aice_command_mode = AICE_COMMAND_MODE_NORMAL; retval = aice_write_ctrl(AICE_WRITE_CTRL_BATCH_CMD_BUF0_CTRL, 0x40000); @@ -3897,13 +3896,13 @@ static int fill_profiling_batch_commands(uint32_t coreid, uint32_t reg_no) aice_read_dtr_to_buffer(coreid, AICE_BATCH_DATA_BUFFER_0); /* get samples */ - if (NDS32_REG_TYPE_GPR == nds32_reg_type(reg_no)) { + if (nds32_reg_type(reg_no) == NDS32_REG_TYPE_GPR) { /* general registers */ dim_instructions[0] = MTSR_DTR(reg_no); dim_instructions[1] = DSB; dim_instructions[2] = NOP; dim_instructions[3] = BEQ_MINUS_12; - } else if (NDS32_REG_TYPE_SPR == nds32_reg_type(reg_no)) { + } else if (nds32_reg_type(reg_no) == NDS32_REG_TYPE_SPR) { /* user special registers */ dim_instructions[0] = MFUSR_G0(0, nds32_reg_sr_index(reg_no)); dim_instructions[1] = MTSR_DTR(0); diff --git a/src/jtag/commands.c b/src/jtag/commands.c index cafb05b5b..206c5e8f5 100644 --- a/src/jtag/commands.c +++ b/src/jtag/commands.c @@ -66,8 +66,8 @@ void jtag_queue_command(struct jtag_command *cmd) cmd->next = NULL; struct jtag_command **last_cmd = next_command_pointer; - assert(NULL != last_cmd); - assert(NULL == *last_cmd); + assert(last_cmd); + assert(!*last_cmd); *last_cmd = cmd; /* store location where the next command pointer will be stored */ diff --git a/src/jtag/core.c b/src/jtag/core.c index 456faf7a9..7da2a6c35 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -218,7 +218,7 @@ static void jtag_tap_add(struct jtag_tap *t) unsigned jtag_num_taps = 0; struct jtag_tap **tap = &__jtag_all_taps; - while (*tap != NULL) { + while (*tap) { jtag_num_taps++; tap = &(*tap)->next_tap; } @@ -243,7 +243,7 @@ struct jtag_tap *jtag_tap_by_string(const char *s) struct jtag_tap *t = jtag_all_taps(); while (t) { - if (0 == strcmp(t->dotted_name, s)) + if (strcmp(t->dotted_name, s) == 0) return t; t = t->next_tap; } @@ -278,7 +278,7 @@ struct jtag_tap *jtag_tap_next_enabled(struct jtag_tap *p) const char *jtag_tap_name(const struct jtag_tap *tap) { - return (tap == NULL) ? "(unknown)" : tap->dotted_name; + return (!tap) ? "(unknown)" : tap->dotted_name; } @@ -286,7 +286,7 @@ int jtag_register_event_callback(jtag_event_handler_t callback, void *priv) { struct jtag_event_callback **callbacks_p = &jtag_event_callbacks; - if (callback == NULL) + if (!callback) return ERROR_COMMAND_SYNTAX_ERROR; if (*callbacks_p) { @@ -307,7 +307,7 @@ int jtag_unregister_event_callback(jtag_event_handler_t callback, void *priv) { struct jtag_event_callback **p = &jtag_event_callbacks, *temp; - if (callback == NULL) + if (!callback) return ERROR_COMMAND_SYNTAX_ERROR; while (*p) { @@ -395,7 +395,7 @@ void jtag_add_ir_scan(struct jtag_tap *active, struct scan_field *in_fields, tap void jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state) { - assert(out_bits != NULL); + assert(out_bits); assert(state != TAP_RESET); jtag_prelude(state); @@ -429,7 +429,7 @@ static void jtag_add_scan_check(struct jtag_tap *active, void (*jtag_add_scan)( jtag_add_scan(active, in_num_fields, in_fields, state); for (int i = 0; i < in_num_fields; i++) { - if ((in_fields[i].check_value != NULL) && (in_fields[i].in_value != NULL)) { + if ((in_fields[i].check_value) && (in_fields[i].in_value)) { jtag_add_callback4(jtag_check_value_mask_callback, (jtag_callback_data_t)in_fields[i].in_value, (jtag_callback_data_t)in_fields[i].check_value, @@ -468,7 +468,7 @@ void jtag_add_dr_scan(struct jtag_tap *active, void jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state) { - assert(out_bits != NULL); + assert(out_bits); assert(state != TAP_RESET); jtag_prelude(state); @@ -919,9 +919,9 @@ static int jtag_check_value_inner(uint8_t *captured, uint8_t *in_check_value, void jtag_check_value_mask(struct scan_field *field, uint8_t *value, uint8_t *mask) { - assert(field->in_value != NULL); + assert(field->in_value); - if (value == NULL) { + if (!value) { /* no checking to do */ return; } @@ -934,7 +934,7 @@ void jtag_check_value_mask(struct scan_field *field, uint8_t *value, uint8_t *ma int default_interface_jtag_execute_queue(void) { - if (NULL == jtag) { + if (!jtag) { LOG_ERROR("No JTAG interface configured yet. " "Issue 'init' command in startup scripts " "before communicating with targets."); @@ -1072,8 +1072,6 @@ void jtag_sleep(uint32_t us) #define JTAG_MAX_AUTO_TAPS 20 -#define EXTRACT_JEP106_BANK(X) (((X) & 0xf00) >> 8) -#define EXTRACT_JEP106_ID(X) (((X) & 0xfe) >> 1) #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1) #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12) #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28) @@ -1141,7 +1139,7 @@ static void jtag_examine_chain_display(enum log_levels level, const char *msg, name, msg, (unsigned int)idcode, (unsigned int)EXTRACT_MFG(idcode), - jep106_manufacturer(EXTRACT_JEP106_BANK(idcode), EXTRACT_JEP106_ID(idcode)), + jep106_manufacturer(EXTRACT_MFG(idcode)), (unsigned int)EXTRACT_PART(idcode), (unsigned int)EXTRACT_VER(idcode)); } @@ -1197,7 +1195,7 @@ static bool jtag_examine_chain_match_tap(const struct jtag_tap *tap) return true; /* treat "-expected-id 0" as a "don't-warn" wildcard */ - if (0 == tap->expected_ids[ii]) + if (tap->expected_ids[ii] == 0) return true; } @@ -1230,7 +1228,7 @@ static int jtag_examine_chain(void) max_taps++; uint8_t *idcode_buffer = calloc(4, max_taps); - if (idcode_buffer == NULL) + if (!idcode_buffer) return ERROR_JTAG_INIT_FAILED; /* DR scan to collect BYPASS or IDCODE register contents. @@ -1255,7 +1253,7 @@ static int jtag_examine_chain(void) uint32_t idcode = buf_get_u32(idcode_buffer, bit_count, 32); /* No predefined TAP? Auto-probe. */ - if (tap == NULL) { + if (!tap) { /* Is there another TAP? */ if (jtag_idcode_is_final(idcode)) break; @@ -1336,7 +1334,6 @@ out: static int jtag_validate_ircapture(void) { struct jtag_tap *tap; - int total_ir_length = 0; uint8_t *ir_test = NULL; struct scan_field field; uint64_t val; @@ -1344,18 +1341,19 @@ static int jtag_validate_ircapture(void) int retval; /* when autoprobing, accommodate huge IR lengths */ - for (tap = NULL, total_ir_length = 0; - (tap = jtag_tap_next_enabled(tap)) != NULL; - total_ir_length += tap->ir_length) { + int total_ir_length = 0; + for (tap = jtag_tap_next_enabled(NULL); tap; tap = jtag_tap_next_enabled(tap)) { if (tap->ir_length == 0) total_ir_length += JTAG_IRLEN_MAX; + else + total_ir_length += tap->ir_length; } /* increase length to add 2 bit sentinel after scan */ total_ir_length += 2; ir_test = malloc(DIV_ROUND_UP(total_ir_length, 8)); - if (ir_test == NULL) + if (!ir_test) return ERROR_FAIL; /* after this scan, all TAPs will capture BYPASS instructions */ @@ -1377,7 +1375,7 @@ static int jtag_validate_ircapture(void) for (;; ) { tap = jtag_tap_next_enabled(tap); - if (tap == NULL) + if (!tap) break; /* If we're autoprobing, guess IR lengths. They must be at @@ -1528,12 +1526,12 @@ int adapter_init(struct command_context *cmd_ctx) return retval; jtag = adapter_driver; - if (jtag->speed == NULL) { + if (!jtag->speed) { LOG_INFO("This adapter doesn't support configurable speed"); return ERROR_OK; } - if (CLOCK_MODE_UNSELECTED == clock_mode) { + if (clock_mode == CLOCK_MODE_UNSELECTED) { LOG_ERROR("An adapter speed is not selected in the init script." " Insert a call to \"adapter speed\" or \"jtag_rclk\" to proceed."); return ERROR_JTAG_INIT_FAILED; @@ -1549,12 +1547,12 @@ int adapter_init(struct command_context *cmd_ctx) if (retval != ERROR_OK) return retval; retval = jtag_get_speed_readable(&actual_khz); - if (ERROR_OK != retval) + if (retval != ERROR_OK) LOG_INFO("adapter-specific clock speed value %d", jtag_speed_var); else if (actual_khz) { /* Adaptive clocking -- JTAG-specific */ - if ((CLOCK_MODE_RCLK == clock_mode) - || ((CLOCK_MODE_KHZ == clock_mode) && !requested_khz)) { + if ((clock_mode == CLOCK_MODE_RCLK) + || ((clock_mode == CLOCK_MODE_KHZ) && !requested_khz)) { LOG_INFO("RCLK (adaptive clock speed) not supported - fallback to %d kHz" , actual_khz); } else @@ -1574,7 +1572,7 @@ int jtag_init_inner(struct command_context *cmd_ctx) LOG_DEBUG("Init JTAG chain"); tap = jtag_tap_next_enabled(NULL); - if (tap == NULL) { + if (!tap) { /* Once JTAG itself is properly set up, and the scan chain * isn't absurdly large, IDCODE autoprobe should work fine. * @@ -1650,7 +1648,7 @@ int adapter_quit(void) if (jtag && jtag->quit) { /* close the JTAG interface */ int result = jtag->quit(); - if (ERROR_OK != result) + if (result != ERROR_OK) LOG_ERROR("failed: %d", result); } @@ -1789,7 +1787,7 @@ static int adapter_khz_to_speed(unsigned khz, int *speed) } int speed_div1; int retval = jtag->khz(jtag_get_speed_khz(), &speed_div1); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; *speed = speed_div1; return ERROR_OK; @@ -1798,7 +1796,7 @@ static int adapter_khz_to_speed(unsigned khz, int *speed) static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int *speed) { int retval = adapter_khz_to_speed(0, speed); - if ((ERROR_OK != retval) && fallback_speed_khz) { + if ((retval != ERROR_OK) && fallback_speed_khz) { LOG_DEBUG("trying fallback speed..."); retval = adapter_khz_to_speed(fallback_speed_khz, speed); } @@ -1819,7 +1817,7 @@ int jtag_config_khz(unsigned khz) clock_mode = CLOCK_MODE_KHZ; int speed = 0; int retval = adapter_khz_to_speed(khz, &speed); - return (ERROR_OK != retval) ? retval : jtag_set_speed(speed); + return (retval != ERROR_OK) ? retval : jtag_set_speed(speed); } int jtag_config_rclk(unsigned fallback_speed_khz) @@ -1829,7 +1827,7 @@ int jtag_config_rclk(unsigned fallback_speed_khz) rclk_fallback_speed_khz = fallback_speed_khz; int speed = 0; int retval = jtag_rclk_to_speed(fallback_speed_khz, &speed); - return (ERROR_OK != retval) ? retval : jtag_set_speed(speed); + return (retval != ERROR_OK) ? retval : jtag_set_speed(speed); } int jtag_get_speed(int *speed) @@ -1885,7 +1883,7 @@ bool jtag_will_verify_capture_ir(void) int jtag_power_dropout(int *dropout) { - if (jtag == NULL) { + if (!jtag) { /* TODO: as the jtag interface is not valid all * we can do at the moment is exit OpenOCD */ LOG_ERROR("No Valid JTAG Interface Configured."); @@ -2008,7 +2006,7 @@ bool transport_is_jtag(void) int adapter_resets(int trst, int srst) { - if (get_current_transport() == NULL) { + if (!get_current_transport()) { LOG_ERROR("transport is not selected"); return ERROR_FAIL; } @@ -2065,7 +2063,7 @@ int adapter_assert_reset(void) transport_is_dapdirect_jtag() || transport_is_dapdirect_swd() || transport_is_swim()) return adapter_system_reset(1); - else if (get_current_transport() != NULL) + else if (get_current_transport()) LOG_ERROR("reset is not supported on %s", get_current_transport()->name); else @@ -2082,7 +2080,7 @@ int adapter_deassert_reset(void) transport_is_dapdirect_jtag() || transport_is_dapdirect_swd() || transport_is_swim()) return adapter_system_reset(0); - else if (get_current_transport() != NULL) + else if (get_current_transport()) LOG_ERROR("reset is not supported on %s", get_current_transport()->name); else diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c index 62d863191..5b5a9669e 100644 --- a/src/jtag/drivers/arm-jtag-ew.c +++ b/src/jtag/drivers/arm-jtag-ew.c @@ -103,7 +103,7 @@ static int armjtagew_execute_queue(void) enum scan_type type; uint8_t *buffer; - while (cmd != NULL) { + while (cmd) { switch (cmd->type) { case JTAG_RUNTEST: LOG_DEBUG_IO("runtest %i cycles, end in %i", diff --git a/src/jtag/drivers/at91rm9200.c b/src/jtag/drivers/at91rm9200.c index bccb9bb23..7bb5d8553 100644 --- a/src/jtag/drivers/at91rm9200.c +++ b/src/jtag/drivers/at91rm9200.c @@ -209,7 +209,7 @@ static int at91rm9200_init(void) cur_device = devices; - if (at91rm9200_device == NULL || at91rm9200_device[0] == 0) { + if (!at91rm9200_device || at91rm9200_device[0] == 0) { at91rm9200_device = "rea_ecr"; LOG_WARNING("No at91rm9200 device specified, using default 'rea_ecr'"); } diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c index 40cb5aa0b..95e077c33 100644 --- a/src/jtag/drivers/bcm2835gpio.c +++ b/src/jtag/drivers/bcm2835gpio.c @@ -86,6 +86,8 @@ static int swclk_gpio = -1; static int swclk_gpio_mode; static int swdio_gpio = -1; static int swdio_gpio_mode; +static int swdio_dir_gpio = -1; +static int swdio_dir_gpio_mode; /* Transition delay coefficients */ static int speed_coeff = 113714; @@ -149,10 +151,20 @@ static int bcm2835gpio_reset(int trst, int srst) static void bcm2835_swdio_drive(bool is_output) { - if (is_output) - OUT_GPIO(swdio_gpio); - else - INP_GPIO(swdio_gpio); + if (swdio_dir_gpio > 0) { + if (is_output) { + GPIO_SET = 1 << swdio_dir_gpio; + OUT_GPIO(swdio_gpio); + } else { + INP_GPIO(swdio_gpio); + GPIO_CLR = 1 << swdio_dir_gpio; + } + } else { + if (is_output) + OUT_GPIO(swdio_gpio); + else + INP_GPIO(swdio_gpio); + } } static int bcm2835_swdio_read(void) @@ -295,6 +307,15 @@ COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swdio) return ERROR_OK; } +COMMAND_HANDLER(bcm2835gpio_handle_swd_dir_gpionum_swdio) +{ + if (CMD_ARGC == 1) + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_dir_gpio); + + command_print(CMD, "BCM2835 num: swdio_dir = %d", swdio_dir_gpio); + return ERROR_OK; +} + COMMAND_HANDLER(bcm2835gpio_handle_speed_coeffs) { if (CMD_ARGC == 2) { @@ -317,86 +338,93 @@ COMMAND_HANDLER(bcm2835gpio_handle_peripheral_base) return ERROR_OK; } -static const struct command_registration bcm2835gpio_command_handlers[] = { +static const struct command_registration bcm2835gpio_subcommand_handlers[] = { { - .name = "bcm2835gpio_jtag_nums", + .name = "jtag_nums", .handler = &bcm2835gpio_handle_jtag_gpionums, .mode = COMMAND_CONFIG, .help = "gpio numbers for tck, tms, tdi, tdo. (in that order)", .usage = "[tck tms tdi tdo]", }, { - .name = "bcm2835gpio_tck_num", + .name = "tck_num", .handler = &bcm2835gpio_handle_jtag_gpionum_tck, .mode = COMMAND_CONFIG, .help = "gpio number for tck.", .usage = "[tck]", }, { - .name = "bcm2835gpio_tms_num", + .name = "tms_num", .handler = &bcm2835gpio_handle_jtag_gpionum_tms, .mode = COMMAND_CONFIG, .help = "gpio number for tms.", .usage = "[tms]", }, { - .name = "bcm2835gpio_tdo_num", + .name = "tdo_num", .handler = &bcm2835gpio_handle_jtag_gpionum_tdo, .mode = COMMAND_CONFIG, .help = "gpio number for tdo.", .usage = "[tdo]", }, { - .name = "bcm2835gpio_tdi_num", + .name = "tdi_num", .handler = &bcm2835gpio_handle_jtag_gpionum_tdi, .mode = COMMAND_CONFIG, .help = "gpio number for tdi.", .usage = "[tdi]", }, { - .name = "bcm2835gpio_swd_nums", + .name = "swd_nums", .handler = &bcm2835gpio_handle_swd_gpionums, .mode = COMMAND_CONFIG, .help = "gpio numbers for swclk, swdio. (in that order)", .usage = "[swclk swdio]", }, { - .name = "bcm2835gpio_swclk_num", + .name = "swclk_num", .handler = &bcm2835gpio_handle_swd_gpionum_swclk, .mode = COMMAND_CONFIG, .help = "gpio number for swclk.", .usage = "[swclk]", }, { - .name = "bcm2835gpio_swdio_num", + .name = "swdio_num", .handler = &bcm2835gpio_handle_swd_gpionum_swdio, .mode = COMMAND_CONFIG, .help = "gpio number for swdio.", .usage = "[swdio]", }, { - .name = "bcm2835gpio_srst_num", + .name = "swdio_dir_num", + .handler = &bcm2835gpio_handle_swd_dir_gpionum_swdio, + .mode = COMMAND_CONFIG, + .help = "gpio number for swdio direction control pin (set=output mode, clear=input mode)", + .usage = "[swdio_dir]", + }, + { + .name = "srst_num", .handler = &bcm2835gpio_handle_jtag_gpionum_srst, .mode = COMMAND_CONFIG, .help = "gpio number for srst.", .usage = "[srst]", }, { - .name = "bcm2835gpio_trst_num", + .name = "trst_num", .handler = &bcm2835gpio_handle_jtag_gpionum_trst, .mode = COMMAND_CONFIG, .help = "gpio number for trst.", .usage = "[trst]", }, { - .name = "bcm2835gpio_speed_coeffs", + .name = "speed_coeffs", .handler = &bcm2835gpio_handle_speed_coeffs, .mode = COMMAND_CONFIG, .help = "SPEED_COEFF and SPEED_OFFSET for delay calculations.", .usage = "[SPEED_COEFF SPEED_OFFSET]", }, { - .name = "bcm2835gpio_peripheral_base", + .name = "peripheral_base", .handler = &bcm2835gpio_handle_peripheral_base, .mode = COMMAND_CONFIG, .help = "peripheral base to access GPIOs (RPi1 0x20000000, RPi2 0x3F000000).", @@ -406,6 +434,17 @@ static const struct command_registration bcm2835gpio_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration bcm2835gpio_command_handlers[] = { + { + .name = "bcm2835gpio", + .mode = COMMAND_ANY, + .help = "perform bcm2835gpio management", + .chain = bcm2835gpio_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static const char * const bcm2835_transports[] = { "jtag", "swd", NULL }; static struct jtag_interface bcm2835gpio_interface = { @@ -541,6 +580,12 @@ static int bcm2835gpio_init(void) OUT_GPIO(srst_gpio); } + if (swdio_dir_gpio != -1) { + swdio_dir_gpio_mode = MODE_GPIO(swdio_dir_gpio); + GPIO_SET = 1 << swdio_dir_gpio; + OUT_GPIO(swdio_dir_gpio); + } + LOG_DEBUG("saved pinmux settings: tck %d tms %d tdi %d " "tdo %d trst %d srst %d", tck_gpio_mode, tms_gpio_mode, tdi_gpio_mode, tdo_gpio_mode, trst_gpio_mode, srst_gpio_mode); @@ -567,5 +612,8 @@ static int bcm2835gpio_quit(void) if (srst_gpio != -1) SET_MODE_GPIO(srst_gpio, srst_gpio_mode); + if (swdio_dir_gpio != -1) + SET_MODE_GPIO(swdio_dir_gpio, swdio_dir_gpio_mode); + return ERROR_OK; } diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c index df1d601b8..5c4febb20 100644 --- a/src/jtag/drivers/bitbang.c +++ b/src/jtag/drivers/bitbang.c @@ -455,7 +455,7 @@ static void swd_clear_sticky_errors(void) static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk) { LOG_DEBUG("bitbang_swd_read_reg"); - assert(cmd & SWD_CMD_RnW); + assert(cmd & SWD_CMD_RNW); if (queued_retval != ERROR_OK) { LOG_DEBUG("Skip bitbang_swd_read_reg because queued_retval=%d", queued_retval); @@ -478,8 +478,8 @@ static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", - cmd & SWD_CMD_APnDP ? "AP" : "DP", - cmd & SWD_CMD_RnW ? "read" : "write", + cmd & SWD_CMD_APNDP ? "AP" : "DP", + cmd & SWD_CMD_RNW ? "read" : "write", (cmd & SWD_CMD_A32) >> 1, data); @@ -492,7 +492,7 @@ static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay } if (value) *value = data; - if (cmd & SWD_CMD_APnDP) + if (cmd & SWD_CMD_APNDP) bitbang_swd_exchange(true, NULL, 0, ap_delay_clk); return; case SWD_ACK_WAIT: @@ -514,7 +514,7 @@ static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk) { LOG_DEBUG("bitbang_swd_write_reg"); - assert(!(cmd & SWD_CMD_RnW)); + assert(!(cmd & SWD_CMD_RNW)); if (queued_retval != ERROR_OK) { LOG_DEBUG("Skip bitbang_swd_write_reg because queued_retval=%d", queued_retval); @@ -537,14 +537,14 @@ static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3); LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", - cmd & SWD_CMD_APnDP ? "AP" : "DP", - cmd & SWD_CMD_RnW ? "read" : "write", + cmd & SWD_CMD_APNDP ? "AP" : "DP", + cmd & SWD_CMD_RNW ? "read" : "write", (cmd & SWD_CMD_A32) >> 1, buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32)); switch (ack) { case SWD_ACK_OK: - if (cmd & SWD_CMD_APnDP) + if (cmd & SWD_CMD_APNDP) bitbang_swd_exchange(true, NULL, 0, ap_delay_clk); return; case SWD_ACK_WAIT: diff --git a/src/jtag/drivers/bitq.c b/src/jtag/drivers/bitq.c index 97734a92e..04fc78b58 100644 --- a/src/jtag/drivers/bitq.c +++ b/src/jtag/drivers/bitq.c @@ -168,7 +168,7 @@ static void bitq_scan_field(struct scan_field *field, int do_pause) else tdo_req = 0; - if (field->out_value == NULL) { + if (!field->out_value) { /* just send zeros and request data from TDO */ for (bit_cnt = field->num_bits; bit_cnt > 1; bit_cnt--) bitq_io(0, 0, tdo_req); diff --git a/src/jtag/drivers/buspirate.c b/src/jtag/drivers/buspirate.c index 12bb81e39..51ace615f 100644 --- a/src/jtag/drivers/buspirate.c +++ b/src/jtag/drivers/buspirate.c @@ -58,6 +58,8 @@ static void buspirate_stableclocks(int num_cycles); #define CMD_RAW_SPEED 0x60 #define CMD_RAW_MODE 0x80 +#define CMD_TAP_SHIFT_HEADER_LEN 3 + /* raw-wire mode configuration */ #define CMD_RAW_CONFIG_HIZ 0x00 #define CMD_RAW_CONFIG_3V3 0x08 @@ -71,6 +73,9 @@ static void buspirate_stableclocks(int num_cycles); #define B1000000 0010010 #endif +#define SHORT_TIMEOUT 1 /* Must be at least 1. */ +#define NORMAL_TIMEOUT 10 + enum { MODE_HIZ = 0, MODE_JTAG = 1, /* push-pull outputs */ @@ -107,9 +112,6 @@ static bool swd_mode; static int queued_retval; static char swd_features; -static const cc_t SHORT_TIMEOUT = 1; /* Must be at least 1. */ -static const cc_t NORMAL_TIMEOUT = 10; - static int buspirate_fd = -1; static int buspirate_pinmode = MODE_JTAG_OD; static int buspirate_baudrate = SERIAL_NORMAL; @@ -283,7 +285,7 @@ static bool read_and_discard_all_data(const int fd) static int buspirate_init(void) { - if (buspirate_port == NULL) { + if (!buspirate_port) { LOG_ERROR("You need to specify the serial port!"); return ERROR_JTAG_INIT_FAILED; } @@ -464,58 +466,58 @@ COMMAND_HANDLER(buspirate_handle_port_command) if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; - if (buspirate_port == NULL) + if (!buspirate_port) buspirate_port = strdup(CMD_ARGV[0]); return ERROR_OK; } -static const struct command_registration buspirate_command_handlers[] = { +static const struct command_registration buspirate_subcommand_handlers[] = { { - .name = "buspirate_adc", + .name = "adc", .handler = &buspirate_handle_adc_command, .mode = COMMAND_EXEC, .help = "reads voltages on adc pins", .usage = "", }, { - .name = "buspirate_vreg", + .name = "vreg", .usage = "<1|0>", .handler = &buspirate_handle_vreg_command, .mode = COMMAND_CONFIG, .help = "changes the state of voltage regulators", }, { - .name = "buspirate_pullup", + .name = "pullup", .usage = "<1|0>", .handler = &buspirate_handle_pullup_command, .mode = COMMAND_CONFIG, .help = "changes the state of pullup", }, { - .name = "buspirate_led", + .name = "led", .usage = "<1|0>", .handler = &buspirate_handle_led_command, .mode = COMMAND_EXEC, .help = "changes the state of led", }, { - .name = "buspirate_speed", + .name = "speed", .usage = "", .handler = &buspirate_handle_speed_command, .mode = COMMAND_CONFIG, .help = "speed of the interface", }, { - .name = "buspirate_mode", + .name = "mode", .usage = "", .handler = &buspirate_handle_mode_command, .mode = COMMAND_CONFIG, .help = "pin mode of the interface", }, { - .name = "buspirate_port", + .name = "port", .usage = "/dev/ttyUSB0", .handler = &buspirate_handle_port_command, .mode = COMMAND_CONFIG, @@ -524,6 +526,17 @@ static const struct command_registration buspirate_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration buspirate_command_handlers[] = { + { + .name = "buspirate", + .mode = COMMAND_ANY, + .help = "perform buspirate management", + .chain = buspirate_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static const struct swd_driver buspirate_swd = { .init = buspirate_swd_init, .switch_seq = buspirate_swd_switch_seq, @@ -708,8 +721,6 @@ static void buspirate_tap_init(void) static int buspirate_tap_execute(void) { - static const int CMD_TAP_SHIFT_HEADER_LEN = 3; - uint8_t tmp[4096]; uint8_t *in_buf; int i; @@ -800,7 +811,7 @@ static void buspirate_tap_append(int tms, int tdi) int bit_index = tap_chain_index % 8; uint8_t bit = 1 << bit_index; - if (0 == bit_index) { + if (bit_index == 0) { /* Let's say that the TAP shift operation wants to shift 9 bits, so we will be sending to the Bus Pirate a bit count of 9 but still full 16 bits (2 bytes) of shift data. @@ -1178,13 +1189,13 @@ static int buspirate_serial_setspeed(int fd, char speed, cc_t timeout) /* set the serial port parameters */ fcntl(fd, F_SETFL, 0); - if (0 != tcgetattr(fd, &t_opt)) + if (tcgetattr(fd, &t_opt) != 0) return -1; - if (0 != cfsetispeed(&t_opt, baud)) + if (cfsetispeed(&t_opt, baud) != 0) return -1; - if (0 != cfsetospeed(&t_opt, baud)) + if (cfsetospeed(&t_opt, baud) != 0) return -1; t_opt.c_cflag |= (CLOCAL | CREAD); @@ -1206,7 +1217,7 @@ static int buspirate_serial_setspeed(int fd, char speed, cc_t timeout) /* Note that, in the past, TCSANOW was used below instead of TCSADRAIN, and CMD_UART_SPEED did not work properly then, at least with the Bus Pirate v3.5 (USB). */ - if (0 != tcsetattr(fd, TCSADRAIN, &t_opt)) { + if (tcsetattr(fd, TCSADRAIN, &t_opt) != 0) { /* According to the Linux documentation, this is actually not enough to detect errors, you need to call tcgetattr() and check that all changes have been performed successfully. */ @@ -1365,7 +1376,7 @@ static uint8_t buspirate_swd_write_header(uint8_t cmd) tmp[5] = 0x07; /* write mode trn_1 */ tmp[6] = 0x07; /* write mode trn_2 */ - to_send = ((cmd & SWD_CMD_RnW) == 0) ? 7 : 5; + to_send = ((cmd & SWD_CMD_RNW) == 0) ? 7 : 5; buspirate_serial_write(buspirate_fd, tmp, to_send); /* read ack */ @@ -1411,7 +1422,7 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del uint8_t tmp[16]; LOG_DEBUG("buspirate_swd_read_reg"); - assert(cmd & SWD_CMD_RnW); + assert(cmd & SWD_CMD_RNW); if (queued_retval != ERROR_OK) { LOG_DEBUG("Skip buspirate_swd_read_reg because queued_retval=%d", queued_retval); @@ -1441,8 +1452,8 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", - cmd & SWD_CMD_APnDP ? "AP" : "DP", - cmd & SWD_CMD_RnW ? "read" : "write", + cmd & SWD_CMD_APNDP ? "AP" : "DP", + cmd & SWD_CMD_RNW ? "read" : "write", (cmd & SWD_CMD_A32) >> 1, data); @@ -1455,7 +1466,7 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del } if (value) *value = data; - if (cmd & SWD_CMD_APnDP) + if (cmd & SWD_CMD_APNDP) buspirate_swd_idle_clocks(ap_delay_clk); return; case SWD_ACK_WAIT: @@ -1478,7 +1489,7 @@ static void buspirate_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_del uint8_t tmp[16]; LOG_DEBUG("buspirate_swd_write_reg"); - assert(!(cmd & SWD_CMD_RnW)); + assert(!(cmd & SWD_CMD_RNW)); if (queued_retval != ERROR_OK) { LOG_DEBUG("Skip buspirate_swd_write_reg because queued_retval=%d", queued_retval); @@ -1499,14 +1510,14 @@ static void buspirate_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_del LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", - cmd & SWD_CMD_APnDP ? "AP" : "DP", - cmd & SWD_CMD_RnW ? "read" : "write", + cmd & SWD_CMD_APNDP ? "AP" : "DP", + cmd & SWD_CMD_RNW ? "read" : "write", (cmd & SWD_CMD_A32) >> 1, value); switch (ack) { case SWD_ACK_OK: - if (cmd & SWD_CMD_APnDP) + if (cmd & SWD_CMD_APNDP) buspirate_swd_idle_clocks(ap_delay_clk); return; case SWD_ACK_WAIT: diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c index 4062ace23..9bd4cb73a 100644 --- a/src/jtag/drivers/cmsis_dap.c +++ b/src/jtag/drivers/cmsis_dap.c @@ -102,10 +102,16 @@ static bool swd_mode; #define INFO_ID_PKT_SZ 0xff /* short */ #define INFO_ID_SWO_BUF_SZ 0xfd /* word */ -#define INFO_CAPS_SWD BIT(0) -#define INFO_CAPS_JTAG BIT(1) -#define INFO_CAPS_SWO_UART BIT(2) -#define INFO_CAPS_SWO_MANCHESTER BIT(3) +#define INFO_CAPS_SWD BIT(0) +#define INFO_CAPS_JTAG BIT(1) +#define INFO_CAPS_SWO_UART BIT(2) +#define INFO_CAPS_SWO_MANCHESTER BIT(3) +#define INFO_CAPS_ATOMIC_CMDS BIT(4) +#define INFO_CAPS_TEST_DOMAIN_TIMER BIT(5) +#define INFO_CAPS_SWO_STREAMING_TRACE BIT(6) +#define INFO_CAPS_UART_PORT BIT(7) +#define INFO_CAPS_USB_COM_PORT BIT(8) +#define INFO_CAPS__NUM_CAPS 9 /* CMD_LED */ #define LED_ID_CONNECT 0x00 @@ -203,11 +209,16 @@ static bool swd_mode; /* CMSIS-DAP Vendor Commands * None as yet... */ -static const char * const info_caps_str[] = { - "SWD Supported", - "JTAG Supported", - "SWO-UART Supported", - "SWO-MANCHESTER Supported" +static const char * const info_caps_str[INFO_CAPS__NUM_CAPS] = { + "SWD supported", + "JTAG supported", + "SWO-UART supported", + "SWO-MANCHESTER supported", + "Atomic commands supported", + "Test domain timer supported", + "SWO streaming trace supported", + "UART communication port supported", + "UART via USB COM port supported", }; struct pending_transfer_result { @@ -269,7 +280,7 @@ static int cmsis_dap_open(void) const struct cmsis_dap_backend *backend = NULL; struct cmsis_dap *dap = calloc(1, sizeof(struct cmsis_dap)); - if (dap == NULL) { + if (!dap) { LOG_ERROR("unable to allocate memory"); return ERROR_FAIL; } @@ -290,7 +301,7 @@ static int cmsis_dap_open(void) } } - if (backend == NULL) { + if (!backend) { LOG_ERROR("unable to find a matching CMSIS-DAP device"); free(dap); return ERROR_FAIL; @@ -787,8 +798,8 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap) uint32_t data = transfer->data; LOG_DEBUG_IO("%s %s reg %x %"PRIx32, - cmd & SWD_CMD_APnDP ? "AP" : "DP", - cmd & SWD_CMD_RnW ? "read" : "write", + cmd & SWD_CMD_APNDP ? "AP" : "DP", + cmd & SWD_CMD_RNW ? "read" : "write", (cmd & SWD_CMD_A32) >> 1, data); /* When proper WAIT handling is implemented in the @@ -802,8 +813,8 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap) * cmsis_dap_cmd_dap_swd_configure() in * cmsis_dap_init(). */ - if (!(cmd & SWD_CMD_RnW) && - !(cmd & SWD_CMD_APnDP) && + if (!(cmd & SWD_CMD_RNW) && + !(cmd & SWD_CMD_APNDP) && (cmd & SWD_CMD_A32) >> 1 == DP_CTRL_STAT && (data & CORUNDETECT)) { LOG_DEBUG("refusing to enable sticky overrun detection"); @@ -811,7 +822,7 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap) } command[idx++] = (cmd >> 1) & 0x0f; - if (!(cmd & SWD_CMD_RnW)) { + if (!(cmd & SWD_CMD_RNW)) { h_u32_to_le(&command[idx], data); idx += 4; } @@ -886,7 +897,7 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms) size_t idx = 3; for (int i = 0; i < transfer_count; i++) { struct pending_transfer_result *transfer = &(block->transfers[i]); - if (transfer->cmd & SWD_CMD_RnW) { + if (transfer->cmd & SWD_CMD_RNW) { static uint32_t last_read; uint32_t data = le_to_h_u32(&resp[idx]); uint32_t tmp = data; @@ -895,7 +906,7 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms) LOG_DEBUG_IO("Read result: %"PRIx32, data); /* Imitate posted AP reads */ - if ((transfer->cmd & SWD_CMD_APnDP) || + if ((transfer->cmd & SWD_CMD_APNDP) || ((transfer->cmd & SWD_CMD_A32) >> 1 == DP_RDBUFF)) { tmp = last_read; last_read = data; @@ -959,7 +970,7 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data) struct pending_transfer_result *transfer = &(block->transfers[block->transfer_count]); transfer->data = data; transfer->cmd = cmd; - if (cmd & SWD_CMD_RnW) { + if (cmd & SWD_CMD_RNW) { /* Queue a read transaction */ transfer->buffer = dst; } @@ -968,13 +979,13 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data) static void cmsis_dap_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk) { - assert(!(cmd & SWD_CMD_RnW)); + assert(!(cmd & SWD_CMD_RNW)); cmsis_dap_swd_queue_cmd(cmd, NULL, value); } static void cmsis_dap_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk) { - assert(cmd & SWD_CMD_RnW); + assert(cmd & SWD_CMD_RNW); cmsis_dap_swd_queue_cmd(cmd, value, 0); } @@ -1016,19 +1027,17 @@ static int cmsis_dap_get_caps_info(void) if (retval != ERROR_OK) return retval; - if (data[0] == 1) { - uint8_t caps = data[1]; + if (data[0] == 1 || data[0] == 2) { + uint16_t caps = data[1]; + if (data[0] == 2) + caps |= (uint16_t)data[2] << 8; cmsis_dap_handle->caps = caps; - if (caps & INFO_CAPS_SWD) - LOG_INFO("CMSIS-DAP: %s", info_caps_str[0]); - if (caps & INFO_CAPS_JTAG) - LOG_INFO("CMSIS-DAP: %s", info_caps_str[1]); - if (caps & INFO_CAPS_SWO_UART) - LOG_INFO("CMSIS-DAP: %s", info_caps_str[2]); - if (caps & INFO_CAPS_SWO_MANCHESTER) - LOG_INFO("CMSIS-DAP: %s", info_caps_str[3]); + for (int i = 0; i < INFO_CAPS__NUM_CAPS; ++i) { + if (caps & BIT(i)) + LOG_INFO("CMSIS-DAP: %s", info_caps_str[i]); + } } return ERROR_OK; @@ -1513,7 +1522,7 @@ static void cmsis_dap_add_jtag_sequence(int s_len, const uint8_t *sequence, int s_offset + offset, tms, tdo_buffer, - tdo_buffer == NULL ? 0 : (tdo_buffer_offset + offset) + !tdo_buffer ? 0 : (tdo_buffer_offset + offset) ); } LOG_DEBUG_IO("END JTAG SEQ SPLIT"); @@ -1530,17 +1539,17 @@ static void cmsis_dap_add_jtag_sequence(int s_len, const uint8_t *sequence, int /* control byte */ queued_seq_buf[queued_seq_buf_end] = (tms ? DAP_JTAG_SEQ_TMS : 0) | - (tdo_buffer != NULL ? DAP_JTAG_SEQ_TDO : 0) | + (tdo_buffer ? DAP_JTAG_SEQ_TDO : 0) | (s_len == 64 ? 0 : s_len); - if (sequence != NULL) + if (sequence) bit_copy(&queued_seq_buf[queued_seq_buf_end + 1], 0, sequence, s_offset, s_len); else memset(&queued_seq_buf[queued_seq_buf_end + 1], 0, DIV_ROUND_UP(s_len, 8)); queued_seq_buf_end += cmd_len; - if (tdo_buffer != NULL) { + if (tdo_buffer) { struct pending_scan_result *scan = &pending_scan_results[pending_scan_result_count++]; scan->first = queued_seq_tdo_ptr; queued_seq_tdo_ptr += DIV_ROUND_UP(s_len, 8); @@ -1799,7 +1808,7 @@ static int cmsis_dap_execute_queue(void) { struct jtag_command *cmd = jtag_command_queue; - while (cmd != NULL) { + while (cmd) { cmsis_dap_execute_command(cmd); cmd = cmd->next; } @@ -1995,7 +2004,7 @@ COMMAND_HANDLER(cmsis_dap_handle_cmd_command) uint8_t *command = cmsis_dap_handle->command; for (unsigned i = 0; i < CMD_ARGC; i++) - command[i] = strtoul(CMD_ARGV[i], NULL, 16); + COMMAND_PARSE_NUMBER(u8, CMD_ARGV[i], command[i]); int retval = cmsis_dap_xfer(cmsis_dap_handle, CMD_ARGC); diff --git a/src/jtag/drivers/cmsis_dap.h b/src/jtag/drivers/cmsis_dap.h index 634a62c8f..f6d9df21b 100644 --- a/src/jtag/drivers/cmsis_dap.h +++ b/src/jtag/drivers/cmsis_dap.h @@ -16,7 +16,7 @@ struct cmsis_dap { uint16_t packet_buffer_size; uint8_t *command; uint8_t *response; - uint8_t caps; + uint16_t caps; uint8_t mode; uint32_t swo_buf_sz; bool trace_enabled; diff --git a/src/jtag/drivers/cmsis_dap_usb_bulk.c b/src/jtag/drivers/cmsis_dap_usb_bulk.c index c42bab28f..26c6784f9 100644 --- a/src/jtag/drivers/cmsis_dap_usb_bulk.c +++ b/src/jtag/drivers/cmsis_dap_usb_bulk.c @@ -353,7 +353,7 @@ static int cmsis_dap_usb_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p LOG_WARNING("could not claim interface: %s", libusb_strerror(err)); dap->bdata = malloc(sizeof(struct cmsis_dap_backend_data)); - if (dap->bdata == NULL) { + if (!dap->bdata) { LOG_ERROR("unable to allocate memory"); libusb_release_interface(dev_handle, interface_num); libusb_close(dev_handle); @@ -370,7 +370,7 @@ static int cmsis_dap_usb_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p dap->bdata->interface = interface_num; dap->packet_buffer = malloc(dap->packet_buffer_size); - if (dap->packet_buffer == NULL) { + if (!dap->packet_buffer) { LOG_ERROR("unable to allocate memory"); cmsis_dap_usb_close(dap); return ERROR_FAIL; @@ -446,7 +446,7 @@ static int cmsis_dap_usb_write(struct cmsis_dap *dap, int txlen, int timeout_ms) static int cmsis_dap_usb_alloc(struct cmsis_dap *dap, unsigned int pkt_sz) { uint8_t *buf = malloc(pkt_sz); - if (buf == NULL) { + if (!buf) { LOG_ERROR("unable to allocate CMSIS-DAP packet buffer"); return ERROR_FAIL; } @@ -464,7 +464,7 @@ static int cmsis_dap_usb_alloc(struct cmsis_dap *dap, unsigned int pkt_sz) COMMAND_HANDLER(cmsis_dap_handle_usb_interface_command) { if (CMD_ARGC == 1) - cmsis_dap_usb_interface = strtoul(CMD_ARGV[0], NULL, 10); + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], cmsis_dap_usb_interface); else LOG_ERROR("expected exactly one argument to cmsis_dap_usb_interface "); diff --git a/src/jtag/drivers/cmsis_dap_usb_hid.c b/src/jtag/drivers/cmsis_dap_usb_hid.c index 38069f840..5bb8ee8b1 100644 --- a/src/jtag/drivers/cmsis_dap_usb_hid.c +++ b/src/jtag/drivers/cmsis_dap_usb_hid.c @@ -70,11 +70,11 @@ static int cmsis_dap_hid_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p */ devs = hid_enumerate(0x0, 0x0); cur_dev = devs; - while (NULL != cur_dev) { + while (cur_dev) { bool found = false; - if (0 == vids[0]) { - if (NULL == cur_dev->product_string) { + if (vids[0] == 0) { + if (!cur_dev->product_string) { LOG_DEBUG("Cannot read product string of device 0x%x:0x%x", cur_dev->vendor_id, cur_dev->product_id); } else if (wcsstr(cur_dev->product_string, L"CMSIS-DAP")) { @@ -97,10 +97,10 @@ static int cmsis_dap_hid_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p if (found) { /* check serial number matches if given */ - if (serial == NULL) + if (!serial) break; - if (cur_dev->serial_number != NULL) { + if (cur_dev->serial_number) { size_t len = (strlen(serial) + 1) * sizeof(wchar_t); wchar_t *wserial = malloc(len); mbstowcs(wserial, serial, len); @@ -118,7 +118,7 @@ static int cmsis_dap_hid_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p cur_dev = cur_dev->next; } - if (NULL != cur_dev) { + if (cur_dev) { target_vid = cur_dev->vendor_id; target_pid = cur_dev->product_id; } @@ -129,7 +129,7 @@ static int cmsis_dap_hid_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p } dap->bdata = malloc(sizeof(struct cmsis_dap_backend_data)); - if (dap->bdata == NULL) { + if (!dap->bdata) { LOG_ERROR("unable to allocate memory"); return ERROR_FAIL; } @@ -137,7 +137,7 @@ static int cmsis_dap_hid_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p dev = hid_open_path(cur_dev->path); hid_free_enumeration(devs); - if (dev == NULL) { + if (!dev) { LOG_ERROR("unable to open CMSIS-DAP device 0x%x:0x%x", target_vid, target_pid); return ERROR_FAIL; } @@ -217,7 +217,7 @@ static int cmsis_dap_hid_alloc(struct cmsis_dap *dap, unsigned int pkt_sz) { unsigned int packet_buffer_size = pkt_sz + REPORT_ID_SIZE; uint8_t *buf = malloc(packet_buffer_size); - if (buf == NULL) { + if (!buf) { LOG_ERROR("unable to allocate CMSIS-DAP packet buffer"); return ERROR_FAIL; } diff --git a/src/jtag/drivers/driver.c b/src/jtag/drivers/driver.c index 4923f96eb..dbe3b0819 100644 --- a/src/jtag/drivers/driver.c +++ b/src/jtag/drivers/driver.c @@ -82,7 +82,7 @@ int interface_jtag_add_ir_scan(struct jtag_tap *active, /* loop over all enabled TAPs */ - for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap != NULL; tap = jtag_tap_next_enabled(tap)) { + for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap; tap = jtag_tap_next_enabled(tap)) { /* search the input field list for fields for the current TAP */ if (tap == active) { @@ -122,7 +122,7 @@ int interface_jtag_add_dr_scan(struct jtag_tap *active, int in_num_fields, size_t bypass_devices = 0; - for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap != NULL; tap = jtag_tap_next_enabled(tap)) { + for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap; tap = jtag_tap_next_enabled(tap)) { if (tap->bypass) bypass_devices++; } @@ -145,7 +145,7 @@ int interface_jtag_add_dr_scan(struct jtag_tap *active, int in_num_fields, /* loop over all enabled TAPs */ - for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap != NULL; tap = jtag_tap_next_enabled(tap)) { + for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap; tap = jtag_tap_next_enabled(tap)) { /* if TAP is not bypassed insert matching input fields */ if (!tap->bypass) { @@ -235,7 +235,7 @@ int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state struct jtag_command *cmd; cmd = cmd_queue_alloc(sizeof(struct jtag_command)); - if (cmd == NULL) + if (!cmd) return ERROR_FAIL; cmd->type = JTAG_TMS; @@ -350,7 +350,7 @@ void interface_jtag_add_callback4(jtag_callback_t callback, entry->data2 = data2; entry->data3 = data3; - if (jtag_callback_queue_head == NULL) { + if (!jtag_callback_queue_head) { jtag_callback_queue_head = entry; jtag_callback_queue_tail = entry; } else { @@ -369,7 +369,7 @@ int interface_jtag_execute_queue(void) int retval = default_interface_jtag_execute_queue(); if (retval == ERROR_OK) { struct jtag_callback_entry *entry; - for (entry = jtag_callback_queue_head; entry != NULL; entry = entry->next) { + for (entry = jtag_callback_queue_head; entry; entry = entry->next) { retval = entry->callback(entry->data0, entry->data1, entry->data2, entry->data3); if (retval != ERROR_OK) break; diff --git a/src/jtag/drivers/ft232r.c b/src/jtag/drivers/ft232r.c index a63480c6e..22c0fe5dd 100644 --- a/src/jtag/drivers/ft232r.c +++ b/src/jtag/drivers/ft232r.c @@ -176,7 +176,7 @@ static void ft232r_increase_buf_size(size_t new_buf_size) if (new_buf_size >= ft232r_buf_size) { new_buf_size += FT232R_BUF_SIZE_EXTRA; new_buf_ptr = realloc(ft232r_output, new_buf_size); - if (new_buf_ptr != NULL) { + if (new_buf_ptr) { ft232r_output = new_buf_ptr; ft232r_buf_size = new_buf_size; } @@ -259,7 +259,7 @@ static int ft232r_init(void) uint16_t apids[] = {ft232r_pid, 0}; if (jtag_libusb_open(avids, apids, ft232r_serial_desc, &adapter, NULL)) { LOG_ERROR("ft232r not found: vid=%04x, pid=%04x, serial=%s\n", - ft232r_vid, ft232r_pid, (ft232r_serial_desc == NULL) ? "[any]" : ft232r_serial_desc); + ft232r_vid, ft232r_pid, (!ft232r_serial_desc) ? "[any]" : ft232r_serial_desc); return ERROR_JTAG_INIT_FAILED; } @@ -310,7 +310,7 @@ static int ft232r_init(void) } ft232r_output = malloc(ft232r_buf_size); - if (ft232r_output == NULL) { + if (!ft232r_output) { LOG_ERROR("Unable to allocate memory for the buffer"); return ERROR_JTAG_INIT_FAILED; } @@ -560,72 +560,72 @@ COMMAND_HANDLER(ft232r_handle_restore_serial_command) return ERROR_OK; } -static const struct command_registration ft232r_command_handlers[] = { +static const struct command_registration ft232r_subcommand_handlers[] = { { - .name = "ft232r_serial_desc", + .name = "serial_desc", .handler = ft232r_handle_serial_desc_command, .mode = COMMAND_CONFIG, .help = "USB serial descriptor of the adapter", .usage = "serial string", }, { - .name = "ft232r_vid_pid", + .name = "vid_pid", .handler = ft232r_handle_vid_pid_command, .mode = COMMAND_CONFIG, .help = "USB VID and PID of the adapter", .usage = "vid pid", }, { - .name = "ft232r_jtag_nums", + .name = "jtag_nums", .handler = ft232r_handle_jtag_nums_command, .mode = COMMAND_CONFIG, .help = "gpio numbers for tck, tms, tdi, tdo. (in that order)", .usage = "<0-7|TXD-RI> <0-7|TXD-RI> <0-7|TXD-RI> <0-7|TXD-RI>", }, { - .name = "ft232r_tck_num", + .name = "tck_num", .handler = ft232r_handle_tck_num_command, .mode = COMMAND_CONFIG, .help = "gpio number for tck.", .usage = "<0-7|TXD|RXD|RTS|CTS|DTR|DSR|DCD|RI>", }, { - .name = "ft232r_tms_num", + .name = "tms_num", .handler = ft232r_handle_tms_num_command, .mode = COMMAND_CONFIG, .help = "gpio number for tms.", .usage = "<0-7|TXD|RXD|RTS|CTS|DTR|DSR|DCD|RI>", }, { - .name = "ft232r_tdo_num", + .name = "tdo_num", .handler = ft232r_handle_tdo_num_command, .mode = COMMAND_CONFIG, .help = "gpio number for tdo.", .usage = "<0-7|TXD|RXD|RTS|CTS|DTR|DSR|DCD|RI>", }, { - .name = "ft232r_tdi_num", + .name = "tdi_num", .handler = ft232r_handle_tdi_num_command, .mode = COMMAND_CONFIG, .help = "gpio number for tdi.", .usage = "<0-7|TXD|RXD|RTS|CTS|DTR|DSR|DCD|RI>", }, { - .name = "ft232r_srst_num", + .name = "srst_num", .handler = ft232r_handle_srst_num_command, .mode = COMMAND_CONFIG, .help = "gpio number for srst.", .usage = "<0-7|TXD|RXD|RTS|CTS|DTR|DSR|DCD|RI>", }, { - .name = "ft232r_trst_num", + .name = "trst_num", .handler = ft232r_handle_trst_num_command, .mode = COMMAND_CONFIG, .help = "gpio number for trst.", .usage = "<0-7|TXD|RXD|RTS|CTS|DTR|DSR|DCD|RI>", }, { - .name = "ft232r_restore_serial", + .name = "restore_serial", .handler = ft232r_handle_restore_serial_command, .mode = COMMAND_CONFIG, .help = "bitmode control word that restores serial port.", @@ -634,6 +634,17 @@ static const struct command_registration ft232r_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration ft232r_command_handlers[] = { + { + .name = "ft232r", + .mode = COMMAND_ANY, + .help = "perform ft232r management", + .chain = ft232r_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + /* * Synchronous bitbang protocol implementation. */ diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c index 682f27fdd..88b36169d 100644 --- a/src/jtag/drivers/ftdi.c +++ b/src/jtag/drivers/ftdi.c @@ -185,11 +185,11 @@ static struct signal *create_signal(const char *name) psig = &(*psig)->next; *psig = calloc(1, sizeof(**psig)); - if (*psig == NULL) + if (!*psig) return NULL; (*psig)->name = strdup(name); - if ((*psig)->name == NULL) { + if (!(*psig)->name) { free(*psig); *psig = NULL; } @@ -353,7 +353,7 @@ static int ftdi_speed(int speed) if (!swd_mode && speed >= 10000000 && ftdi_jtag_mode != JTAG_MODE_ALT) LOG_INFO("ftdi: if you experience problems at higher adapter clocks, try " - "the command \"ftdi_tdo_sample_edge falling\""); + "the command \"ftdi tdo_sample_edge falling\""); return ERROR_OK; } @@ -734,7 +734,7 @@ static int ftdi_initialize(void) LOG_DEBUG("ftdi interface using shortest path jtag state transitions"); if (!ftdi_vid[0] && !ftdi_pid[0]) { - LOG_ERROR("Please specify ftdi_vid_pid"); + LOG_ERROR("Please specify ftdi vid_pid"); return ERROR_JTAG_INIT_FAILED; } @@ -1057,7 +1057,7 @@ COMMAND_HANDLER(ftdi_handle_device_desc_command) free(ftdi_device_desc); ftdi_device_desc = strdup(CMD_ARGV[0]); } else { - LOG_ERROR("expected exactly one argument to ftdi_device_desc "); + LOG_ERROR("expected exactly one argument to ftdi device_desc "); } return ERROR_OK; @@ -1224,12 +1224,12 @@ COMMAND_HANDLER(ftdi_handle_get_signal_command) COMMAND_HANDLER(ftdi_handle_vid_pid_command) { if (CMD_ARGC > MAX_USB_IDS * 2) { - LOG_WARNING("ignoring extra IDs in ftdi_vid_pid " + LOG_WARNING("ignoring extra IDs in ftdi vid_pid " "(maximum is %d pairs)", MAX_USB_IDS); CMD_ARGC = MAX_USB_IDS * 2; } if (CMD_ARGC < 2 || (CMD_ARGC & 1)) { - LOG_WARNING("incomplete ftdi_vid_pid configuration directive"); + LOG_WARNING("incomplete ftdi vid_pid configuration directive"); if (CMD_ARGC < 2) return ERROR_COMMAND_SYNTAX_ERROR; /* remove the incomplete trailing id */ @@ -1244,7 +1244,7 @@ COMMAND_HANDLER(ftdi_handle_vid_pid_command) /* * Explicitly terminate, in case there are multiples instances of - * ftdi_vid_pid. + * ftdi vid_pid. */ ftdi_vid[i >> 1] = ftdi_pid[i >> 1] = 0; @@ -1262,7 +1262,7 @@ COMMAND_HANDLER(ftdi_handle_tdo_sample_edge_command) if (CMD_ARGC > 0) { n = jim_nvp_name2value_simple(nvp_ftdi_jtag_modes, CMD_ARGV[0]); - if (n->name == NULL) + if (!n->name) return ERROR_COMMAND_SYNTAX_ERROR; ftdi_jtag_mode = n->value; @@ -1288,30 +1288,30 @@ COMMAND_HANDLER(ftdi_handle_oscan1_mode_command) } #endif -static const struct command_registration ftdi_command_handlers[] = { +static const struct command_registration ftdi_subcommand_handlers[] = { { - .name = "ftdi_device_desc", + .name = "device_desc", .handler = &ftdi_handle_device_desc_command, .mode = COMMAND_CONFIG, .help = "set the USB device description of the FTDI device", .usage = "description_string", }, { - .name = "ftdi_serial", + .name = "serial", .handler = &ftdi_handle_serial_command, .mode = COMMAND_CONFIG, .help = "set the serial number of the FTDI device", .usage = "serial_string", }, { - .name = "ftdi_channel", + .name = "channel", .handler = &ftdi_handle_channel_command, .mode = COMMAND_CONFIG, .help = "set the channel of the FTDI device that is used as JTAG", .usage = "(0-3)", }, { - .name = "ftdi_layout_init", + .name = "layout_init", .handler = &ftdi_handle_layout_init_command, .mode = COMMAND_CONFIG, .help = "initialize the FTDI GPIO signals used " @@ -1319,7 +1319,7 @@ static const struct command_registration ftdi_command_handlers[] = { .usage = "data direction", }, { - .name = "ftdi_layout_signal", + .name = "layout_signal", .handler = &ftdi_handle_layout_signal_command, .mode = COMMAND_ANY, .help = "define a signal controlled by one or more FTDI GPIO as data " @@ -1327,28 +1327,28 @@ static const struct command_registration ftdi_command_handlers[] = { .usage = "name [-data mask|-ndata mask] [-oe mask|-noe mask] [-alias|-nalias name]", }, { - .name = "ftdi_set_signal", + .name = "set_signal", .handler = &ftdi_handle_set_signal_command, .mode = COMMAND_EXEC, .help = "control a layout-specific signal", .usage = "name (1|0|z)", }, { - .name = "ftdi_get_signal", + .name = "get_signal", .handler = &ftdi_handle_get_signal_command, .mode = COMMAND_EXEC, .help = "read the value of a layout-specific signal", .usage = "name", }, { - .name = "ftdi_vid_pid", + .name = "vid_pid", .handler = &ftdi_handle_vid_pid_command, .mode = COMMAND_CONFIG, .help = "the vendor ID and product ID of the FTDI device", .usage = "(vid pid)*", }, { - .name = "ftdi_tdo_sample_edge", + .name = "tdo_sample_edge", .handler = &ftdi_handle_tdo_sample_edge_command, .mode = COMMAND_ANY, .help = "set which TCK clock edge is used for sampling TDO " @@ -1368,6 +1368,17 @@ static const struct command_registration ftdi_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration ftdi_command_handlers[] = { + { + .name = "ftdi", + .mode = COMMAND_ANY, + .help = "perform ftdi management", + .chain = ftdi_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static int create_default_signal(const char *name, uint16_t data_mask) { struct signal *sig = create_signal(name); @@ -1407,7 +1418,7 @@ static int ftdi_swd_init(void) swd_cmd_queue_alloced = 10; swd_cmd_queue = malloc(swd_cmd_queue_alloced * sizeof(*swd_cmd_queue)); - return swd_cmd_queue != NULL ? ERROR_OK : ERROR_FAIL; + return swd_cmd_queue ? ERROR_OK : ERROR_FAIL; } static void ftdi_swd_swdio_en(bool enable) @@ -1462,17 +1473,17 @@ static int ftdi_swd_run_queue(void) LOG_DEBUG_IO("%s %s %s reg %X = %08"PRIx32, ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", - swd_cmd_queue[i].cmd & SWD_CMD_APnDP ? "AP" : "DP", - swd_cmd_queue[i].cmd & SWD_CMD_RnW ? "read" : "write", + swd_cmd_queue[i].cmd & SWD_CMD_APNDP ? "AP" : "DP", + swd_cmd_queue[i].cmd & SWD_CMD_RNW ? "read" : "write", (swd_cmd_queue[i].cmd & SWD_CMD_A32) >> 1, buf_get_u32(swd_cmd_queue[i].trn_ack_data_parity_trn, - 1 + 3 + (swd_cmd_queue[i].cmd & SWD_CMD_RnW ? 0 : 1), 32)); + 1 + 3 + (swd_cmd_queue[i].cmd & SWD_CMD_RNW ? 0 : 1), 32)); if (ack != SWD_ACK_OK) { queued_retval = ack == SWD_ACK_WAIT ? ERROR_WAIT : ERROR_FAIL; goto skip; - } else if (swd_cmd_queue[i].cmd & SWD_CMD_RnW) { + } else if (swd_cmd_queue[i].cmd & SWD_CMD_RNW) { uint32_t data = buf_get_u32(swd_cmd_queue[i].trn_ack_data_parity_trn, 1 + 3, 32); int parity = buf_get_u32(swd_cmd_queue[i].trn_ack_data_parity_trn, 1 + 3 + 32, 1); @@ -1482,7 +1493,7 @@ static int ftdi_swd_run_queue(void) goto skip; } - if (swd_cmd_queue[i].dst != NULL) + if (swd_cmd_queue[i].dst) *swd_cmd_queue[i].dst = data; } } @@ -1507,7 +1518,7 @@ static void ftdi_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint32 * pointers into the queue which may be invalid after the realloc. */ queued_retval = ftdi_swd_run_queue(); struct swd_cmd_queue_entry *q = realloc(swd_cmd_queue, swd_cmd_queue_alloced * 2 * sizeof(*swd_cmd_queue)); - if (q != NULL) { + if (q) { swd_cmd_queue = q; swd_cmd_queue_alloced *= 2; LOG_DEBUG("Increased SWD command queue to %zu elements", swd_cmd_queue_alloced); @@ -1522,7 +1533,7 @@ static void ftdi_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint32 mpsse_clock_data_out(mpsse_ctx, &swd_cmd_queue[i].cmd, 0, 8, SWD_MODE); - if (swd_cmd_queue[i].cmd & SWD_CMD_RnW) { + if (swd_cmd_queue[i].cmd & SWD_CMD_RNW) { /* Queue a read transaction */ swd_cmd_queue[i].dst = dst; @@ -1547,20 +1558,20 @@ static void ftdi_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint32 } /* Insert idle cycles after AP accesses to avoid WAIT */ - if (cmd & SWD_CMD_APnDP) + if (cmd & SWD_CMD_APNDP) mpsse_clock_data_out(mpsse_ctx, NULL, 0, ap_delay_clk, SWD_MODE); } static void ftdi_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk) { - assert(cmd & SWD_CMD_RnW); + assert(cmd & SWD_CMD_RNW); ftdi_swd_queue_cmd(cmd, value, 0, ap_delay_clk); } static void ftdi_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk) { - assert(!(cmd & SWD_CMD_RnW)); + assert(!(cmd & SWD_CMD_RNW)); ftdi_swd_queue_cmd(cmd, NULL, value, ap_delay_clk); } diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c index 6781e14ff..63bcda1f4 100644 --- a/src/jtag/drivers/jlink.c +++ b/src/jtag/drivers/jlink.c @@ -294,7 +294,7 @@ static int jlink_execute_queue(void) int ret; struct jtag_command *cmd = jtag_command_queue; - while (cmd != NULL) { + while (cmd) { ret = jlink_execute_command(cmd); if (ret != ERROR_OK) @@ -1978,13 +1978,13 @@ static int jlink_swd_init(void) static void jlink_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk) { - assert(!(cmd & SWD_CMD_RnW)); + assert(!(cmd & SWD_CMD_RNW)); jlink_swd_queue_cmd(cmd, NULL, value, ap_delay_clk); } static void jlink_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk) { - assert(cmd & SWD_CMD_RnW); + assert(cmd & SWD_CMD_RNW); jlink_swd_queue_cmd(cmd, value, 0, ap_delay_clk); } @@ -2237,7 +2237,7 @@ static void jlink_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint3 pending_scan_results_buffer[pending_scan_results_length].first = tap_length; - if (cmd & SWD_CMD_RnW) { + if (cmd & SWD_CMD_RNW) { /* Queue a read transaction. */ pending_scan_results_buffer[pending_scan_results_length].length = 32; pending_scan_results_buffer[pending_scan_results_length].buffer = dst; @@ -2257,7 +2257,7 @@ static void jlink_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint3 pending_scan_results_length++; /* Insert idle cycles after AP accesses to avoid WAIT. */ - if (cmd & SWD_CMD_APnDP) + if (cmd & SWD_CMD_APNDP) jlink_queue_data_out(NULL, ap_delay_clk); } diff --git a/src/jtag/drivers/jtag_dpi.c b/src/jtag/drivers/jtag_dpi.c index f5a67dd11..016ff5536 100644 --- a/src/jtag/drivers/jtag_dpi.c +++ b/src/jtag/drivers/jtag_dpi.c @@ -49,7 +49,7 @@ static int last_ir_num_bits; static int write_sock(char *buf, size_t len) { - if (buf == NULL) { + if (!buf) { LOG_ERROR("%s: NULL 'buf' argument, file %s, line %d", __func__, __FILE__, __LINE__); return ERROR_FAIL; @@ -64,7 +64,7 @@ static int write_sock(char *buf, size_t len) static int read_sock(char *buf, size_t len) { - if (buf == NULL) { + if (!buf) { LOG_ERROR("%s: NULL 'buf' argument, file %s, line %d", __func__, __FILE__, __LINE__); return ERROR_FAIL; @@ -123,7 +123,7 @@ static int jtag_dpi_scan(struct scan_command *cmd) int ret = ERROR_OK; num_bits = jtag_build_buffer(cmd, &data_buf); - if (data_buf == NULL) { + if (!data_buf) { LOG_ERROR("jtag_build_buffer call failed, data_buf == NULL, " "file %s, line %d", __FILE__, __LINE__); return ERROR_FAIL; @@ -133,7 +133,7 @@ static int jtag_dpi_scan(struct scan_command *cmd) if (cmd->ir_scan) { free(last_ir_buf); last_ir_buf = (uint8_t *)malloc(bytes * sizeof(uint8_t)); - if (last_ir_buf == NULL) { + if (!last_ir_buf) { LOG_ERROR("%s: malloc fail, file %s, line %d", __func__, __FILE__, __LINE__); ret = ERROR_FAIL; @@ -181,7 +181,7 @@ static int jtag_dpi_runtest(int cycles) int num_bits = last_ir_num_bits, bytes; int ret = ERROR_OK; - if (data_buf == NULL) { + if (!data_buf) { LOG_ERROR("%s: NULL 'data_buf' argument, file %s, line %d", __func__, __FILE__, __LINE__); return ERROR_FAIL; @@ -194,7 +194,7 @@ static int jtag_dpi_runtest(int cycles) bytes = DIV_ROUND_UP(num_bits, 8); read_scan = (uint8_t *)malloc(bytes * sizeof(uint8_t)); - if (read_scan == NULL) { + if (!read_scan) { LOG_ERROR("%s: malloc fail, file %s, line %d", __func__, __FILE__, __LINE__); return ERROR_FAIL; @@ -238,7 +238,7 @@ static int jtag_dpi_execute_queue(void) struct jtag_command *cmd; int ret = ERROR_OK; - for (cmd = jtag_command_queue; ret == ERROR_OK && cmd != NULL; + for (cmd = jtag_command_queue; ret == ERROR_OK && cmd; cmd = cmd->next) { switch (cmd->type) { case JTAG_RUNTEST: @@ -289,9 +289,9 @@ static int jtag_dpi_init(void) serv_addr.sin_family = AF_INET; serv_addr.sin_port = htons(server_port); - if (server_address == NULL) { + if (!server_address) { server_address = strdup(SERVER_ADDRESS); - if (server_address == NULL) { + if (!server_address) { LOG_ERROR("%s: strdup fail, file %s, line %d", __func__, __FILE__, __LINE__); return ERROR_FAIL; @@ -350,9 +350,9 @@ COMMAND_HANDLER(jtag_dpi_set_address) if (CMD_ARGC > 1) return ERROR_COMMAND_SYNTAX_ERROR; else if (CMD_ARGC == 0) { - if (server_address == NULL) { + if (!server_address) { server_address = strdup(SERVER_ADDRESS); - if (server_address == NULL) { + if (!server_address) { LOG_ERROR("%s: strdup fail, file %s, line %d", __func__, __FILE__, __LINE__); return ERROR_FAIL; @@ -362,7 +362,7 @@ COMMAND_HANDLER(jtag_dpi_set_address) } else { free(server_address); server_address = strdup(CMD_ARGV[0]); - if (server_address == NULL) { + if (!server_address) { LOG_ERROR("%s: strdup fail, file %s, line %d", __func__, __FILE__, __LINE__); return ERROR_FAIL; @@ -373,16 +373,16 @@ COMMAND_HANDLER(jtag_dpi_set_address) return ERROR_OK; } -static const struct command_registration jtag_dpi_command_handlers[] = { +static const struct command_registration jtag_dpi_subcommand_handlers[] = { { - .name = "jtag_dpi_set_port", + .name = "set_port", .handler = &jtag_dpi_set_port, .mode = COMMAND_CONFIG, .help = "set the port of the DPI server", .usage = "[port]", }, { - .name = "jtag_dpi_set_address", + .name = "set_address", .handler = &jtag_dpi_set_address, .mode = COMMAND_CONFIG, .help = "set the address of the DPI server", @@ -391,6 +391,17 @@ static const struct command_registration jtag_dpi_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration jtag_dpi_command_handlers[] = { + { + .name = "jtag_dpi", + .mode = COMMAND_ANY, + .help = "perform jtag_dpi management", + .chain = jtag_dpi_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static struct jtag_interface jtag_dpi_interface = { .supported = DEBUG_CAP_TMS_SEQ, .execute_queue = jtag_dpi_execute_queue, diff --git a/src/jtag/drivers/jtag_usb_common.c b/src/jtag/drivers/jtag_usb_common.c index fdd713783..94cd7e74d 100644 --- a/src/jtag/drivers/jtag_usb_common.c +++ b/src/jtag/drivers/jtag_usb_common.c @@ -46,7 +46,7 @@ bool jtag_usb_location_equal(uint8_t dev_bus, uint8_t *port_path, string_length = strnlen(loc, JTAG_USB_MAX_LOCATION_LENGTH); ptr = strtok(loc, "-"); - if (ptr == NULL) { + if (!ptr) { LOG_WARNING("no '-' in usb path\n"); goto done; } @@ -61,7 +61,7 @@ bool jtag_usb_location_equal(uint8_t dev_bus, uint8_t *port_path, ptr = strtok(NULL, "."); /* no more tokens in path */ - if (ptr == NULL) + if (!ptr) break; /* path mismatch at some step */ diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c index aeed6a56c..a0138f840 100644 --- a/src/jtag/drivers/jtag_vpi.c +++ b/src/jtag/drivers/jtag_vpi.c @@ -496,7 +496,7 @@ static int jtag_vpi_execute_queue(void) struct jtag_command *cmd; int retval = ERROR_OK; - for (cmd = jtag_command_queue; retval == ERROR_OK && cmd != NULL; + for (cmd = jtag_command_queue; retval == ERROR_OK && cmd; cmd = cmd->next) { switch (cmd->type) { case JTAG_RESET: @@ -640,23 +640,23 @@ COMMAND_HANDLER(jtag_vpi_stop_sim_on_exit_handler) return ERROR_OK; } -static const struct command_registration jtag_vpi_command_handlers[] = { +static const struct command_registration jtag_vpi_subcommand_handlers[] = { { - .name = "jtag_vpi_set_port", + .name = "set_port", .handler = &jtag_vpi_set_port, .mode = COMMAND_CONFIG, .help = "set the port of the VPI server", .usage = "tcp_port_num", }, { - .name = "jtag_vpi_set_address", + .name = "set_address", .handler = &jtag_vpi_set_address, .mode = COMMAND_CONFIG, .help = "set the address of the VPI server", .usage = "ipv4_addr", }, { - .name = "jtag_vpi_stop_sim_on_exit", + .name = "stop_sim_on_exit", .handler = &jtag_vpi_stop_sim_on_exit_handler, .mode = COMMAND_CONFIG, .help = "Configure if simulation stop command shall be sent " @@ -666,6 +666,17 @@ static const struct command_registration jtag_vpi_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration jtag_vpi_command_handlers[] = { + { + .name = "jtag_vpi", + .mode = COMMAND_ANY, + .help = "perform jtag_vpi management", + .chain = jtag_vpi_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static struct jtag_interface jtag_vpi_interface = { .supported = DEBUG_CAP_TMS_SEQ, .execute_queue = jtag_vpi_execute_queue, diff --git a/src/jtag/drivers/kitprog.c b/src/jtag/drivers/kitprog.c index 5538bcd73..327bb572d 100644 --- a/src/jtag/drivers/kitprog.c +++ b/src/jtag/drivers/kitprog.c @@ -158,7 +158,7 @@ static int kitprog_init(void) int retval; kitprog_handle = malloc(sizeof(struct kitprog)); - if (kitprog_handle == NULL) { + if (!kitprog_handle) { LOG_ERROR("Failed to allocate memory"); return ERROR_FAIL; } @@ -208,14 +208,14 @@ static int kitprog_init(void) /* Allocate packet buffers and queues */ kitprog_handle->packet_size = SWD_MAX_BUFFER_LENGTH; kitprog_handle->packet_buffer = malloc(SWD_MAX_BUFFER_LENGTH); - if (kitprog_handle->packet_buffer == NULL) { + if (!kitprog_handle->packet_buffer) { LOG_ERROR("Failed to allocate memory for the packet buffer"); return ERROR_FAIL; } pending_queue_len = SWD_MAX_BUFFER_LENGTH / 5; pending_transfers = malloc(pending_queue_len * sizeof(*pending_transfers)); - if (pending_transfers == NULL) { + if (!pending_transfers) { LOG_ERROR("Failed to allocate memory for the SWD transfer queue"); return ERROR_FAIL; } @@ -256,7 +256,7 @@ static int kitprog_get_usb_serial(void) /* Allocate memory for the serial number */ kitprog_handle->serial = calloc(retval + 1, sizeof(char)); - if (kitprog_handle->serial == NULL) { + if (!kitprog_handle->serial) { LOG_ERROR("Failed to allocate memory for the serial number"); return ERROR_FAIL; } @@ -285,7 +285,7 @@ static int kitprog_usb_open(void) /* Convert the ASCII serial number into a (wchar_t *) */ size_t len = strlen(kitprog_handle->serial); wchar_t *hid_serial = calloc(len + 1, sizeof(wchar_t)); - if (hid_serial == NULL) { + if (!hid_serial) { LOG_ERROR("Failed to allocate memory for the serial number"); return ERROR_FAIL; } @@ -298,7 +298,7 @@ static int kitprog_usb_open(void) /* Use HID for the KitBridge interface */ kitprog_handle->hid_handle = hid_open(VID, PID, hid_serial); free(hid_serial); - if (kitprog_handle->hid_handle == NULL) { + if (!kitprog_handle->hid_handle) { LOG_ERROR("Failed to open KitBridge (HID) interface"); return ERROR_FAIL; } @@ -314,7 +314,7 @@ static int kitprog_usb_open(void) static void kitprog_usb_close(void) { - if (kitprog_handle->hid_handle != NULL) { + if (kitprog_handle->hid_handle) { hid_close(kitprog_handle->hid_handle); hid_exit(); } @@ -625,13 +625,13 @@ static int kitprog_swd_init(void) static void kitprog_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk) { - assert(!(cmd & SWD_CMD_RnW)); + assert(!(cmd & SWD_CMD_RNW)); kitprog_swd_queue_cmd(cmd, NULL, value); } static void kitprog_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk) { - assert(cmd & SWD_CMD_RnW); + assert(cmd & SWD_CMD_RNW); kitprog_swd_queue_cmd(cmd, value, 0); } @@ -699,8 +699,8 @@ static int kitprog_swd_run_queue(void) * cmsis_dap_cmd_DAP_SWD_Configure() in * cmsis_dap_init(). */ - if (!(cmd & SWD_CMD_RnW) && - !(cmd & SWD_CMD_APnDP) && + if (!(cmd & SWD_CMD_RNW) && + !(cmd & SWD_CMD_APNDP) && (cmd & SWD_CMD_A32) >> 1 == DP_CTRL_STAT && (data & CORUNDETECT)) { LOG_DEBUG("refusing to enable sticky overrun detection"); @@ -708,13 +708,13 @@ static int kitprog_swd_run_queue(void) } LOG_DEBUG_IO("%s %s reg %x %"PRIx32, - cmd & SWD_CMD_APnDP ? "AP" : "DP", - cmd & SWD_CMD_RnW ? "read" : "write", + cmd & SWD_CMD_APNDP ? "AP" : "DP", + cmd & SWD_CMD_RNW ? "read" : "write", (cmd & SWD_CMD_A32) >> 1, data); buffer[write_count++] = (cmd | SWD_CMD_START | SWD_CMD_PARK) & ~SWD_CMD_STOP; read_count++; - if (!(cmd & SWD_CMD_RnW)) { + if (!(cmd & SWD_CMD_RNW)) { buffer[write_count++] = (data) & 0xff; buffer[write_count++] = (data >> 8) & 0xff; buffer[write_count++] = (data >> 16) & 0xff; @@ -761,7 +761,7 @@ static int kitprog_swd_run_queue(void) } for (int i = 0; i < pending_transfer_count; i++) { - if (pending_transfers[i].cmd & SWD_CMD_RnW) { + if (pending_transfers[i].cmd & SWD_CMD_RNW) { uint32_t data = le_to_h_u32(&buffer[read_index]); LOG_DEBUG_IO("Read result: %"PRIx32, data); @@ -802,7 +802,7 @@ static void kitprog_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data) pending_transfers[pending_transfer_count].data = data; pending_transfers[pending_transfer_count].cmd = cmd; - if (cmd & SWD_CMD_RnW) { + if (cmd & SWD_CMD_RNW) { /* Queue a read transaction */ pending_transfers[pending_transfer_count].buffer = dst; } @@ -855,7 +855,7 @@ COMMAND_HANDLER(kitprog_handle_serial_command) { if (CMD_ARGC == 1) { kitprog_serial = strdup(CMD_ARGV[0]); - if (kitprog_serial == NULL) { + if (!kitprog_serial) { LOG_ERROR("Failed to allocate memory for the serial number"); return ERROR_FAIL; } diff --git a/src/jtag/drivers/libusb_helper.c b/src/jtag/drivers/libusb_helper.c index 18fe4bad4..f285bdcac 100644 --- a/src/jtag/drivers/libusb_helper.c +++ b/src/jtag/drivers/libusb_helper.c @@ -138,7 +138,7 @@ static bool jtag_libusb_match_serial(struct libusb_device_handle *device, char *alternate_serial = adapter_get_alternate_serial(device, dev_desc); /* check possible failures */ - if (alternate_serial == NULL) + if (!alternate_serial) return false; /* then compare and free the alternate serial */ @@ -158,7 +158,7 @@ int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[], struct libusb_device_handle **out, adapter_get_alternate_serial_fn adapter_get_alternate_serial) { - int cnt, idx, errCode; + int cnt, idx, err_code; int retval = ERROR_FAIL; bool serial_mismatch = false; struct libusb_device_handle *libusb_handle = NULL; @@ -180,16 +180,16 @@ int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[], if (jtag_usb_get_location() && !jtag_libusb_location_equal(devs[idx])) continue; - errCode = libusb_open(devs[idx], &libusb_handle); + err_code = libusb_open(devs[idx], &libusb_handle); - if (errCode) { + if (err_code) { LOG_ERROR("libusb_open() failed with %s", - libusb_error_name(errCode)); + libusb_error_name(err_code)); continue; } /* Device must be open to use libusb_get_string_descriptor_ascii. */ - if (serial != NULL && + if (serial && !jtag_libusb_match_serial(libusb_handle, &dev_desc, serial, adapter_get_alternate_serial)) { serial_mismatch = true; libusb_close(libusb_handle); @@ -222,13 +222,13 @@ void jtag_libusb_close(struct libusb_device_handle *dev) libusb_exit(jtag_libusb_context); } -int jtag_libusb_control_transfer(struct libusb_device_handle *dev, uint8_t requestType, - uint8_t request, uint16_t wValue, uint16_t wIndex, char *bytes, +int jtag_libusb_control_transfer(struct libusb_device_handle *dev, uint8_t request_type, + uint8_t request, uint16_t value, uint16_t index, char *bytes, uint16_t size, unsigned int timeout) { int transferred = 0; - transferred = libusb_control_transfer(dev, requestType, request, wValue, wIndex, + transferred = libusb_control_transfer(dev, request_type, request, value, index, (unsigned char *)bytes, size, timeout); if (transferred < 0) @@ -275,28 +275,28 @@ int jtag_libusb_set_configuration(struct libusb_device_handle *devh, int configuration) { struct libusb_device *udev = libusb_get_device(devh); - int retCode = -99; + int retval = -99; struct libusb_config_descriptor *config = NULL; int current_config = -1; - retCode = libusb_get_configuration(devh, ¤t_config); - if (retCode != 0) - return retCode; + retval = libusb_get_configuration(devh, ¤t_config); + if (retval != 0) + return retval; - retCode = libusb_get_config_descriptor(udev, configuration, &config); - if (retCode != 0 || config == NULL) - return retCode; + retval = libusb_get_config_descriptor(udev, configuration, &config); + if (retval != 0 || !config) + return retval; /* Only change the configuration if it is not already set to the same one. Otherwise this issues a lightweight reset and hangs LPC-Link2 with JLink firmware. */ if (current_config != config->bConfigurationValue) - retCode = libusb_set_configuration(devh, config->bConfigurationValue); + retval = libusb_set_configuration(devh, config->bConfigurationValue); libusb_free_config_descriptor(config); - return retCode; + return retval; } int jtag_libusb_choose_interface(struct libusb_device_handle *devh, diff --git a/src/jtag/drivers/libusb_helper.h b/src/jtag/drivers/libusb_helper.h index 3e77865d6..6087128d2 100644 --- a/src/jtag/drivers/libusb_helper.h +++ b/src/jtag/drivers/libusb_helper.h @@ -33,8 +33,8 @@ int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[], adapter_get_alternate_serial_fn adapter_get_alternate_serial); void jtag_libusb_close(struct libusb_device_handle *dev); int jtag_libusb_control_transfer(struct libusb_device_handle *dev, - uint8_t requestType, uint8_t request, uint16_t wValue, - uint16_t wIndex, char *bytes, uint16_t size, unsigned int timeout); + uint8_t request_type, uint8_t request, uint16_t value, + uint16_t index, char *bytes, uint16_t size, unsigned int timeout); int jtag_libusb_bulk_write(struct libusb_device_handle *dev, int ep, char *bytes, int size, int timeout, int *transferred); int jtag_libusb_bulk_read(struct libusb_device_handle *dev, int ep, diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c index 99422a116..42c8a3140 100644 --- a/src/jtag/drivers/linuxgpiod.c +++ b/src/jtag/drivers/linuxgpiod.c @@ -207,14 +207,14 @@ static int linuxgpiod_reset(int trst, int srst) LOG_DEBUG("linuxgpiod_reset"); /* assume active low */ - if (gpiod_srst != NULL) { + if (gpiod_srst) { retval1 = gpiod_line_set_value(gpiod_srst, srst ? 0 : 1); if (retval1 < 0) LOG_WARNING("set srst value failed"); } /* assume active low */ - if (gpiod_trst != NULL) { + if (gpiod_trst) { retval2 = gpiod_line_set_value(gpiod_trst, trst ? 0 : 1); if (retval2 < 0) LOG_WARNING("set trst value failed"); @@ -284,7 +284,7 @@ static struct gpiod_line *helper_get_input_line(const char *label, unsigned int int retval; line = gpiod_chip_get_line(gpiod_chip, offset); - if (line == NULL) { + if (!line) { LOG_ERROR("Error get line %s", label); return NULL; } @@ -304,7 +304,7 @@ static struct gpiod_line *helper_get_output_line(const char *label, unsigned int int retval; line = gpiod_chip_get_line(gpiod_chip, offset); - if (line == NULL) { + if (!line) { LOG_ERROR("Error get line %s", label); return NULL; } @@ -325,7 +325,7 @@ static int linuxgpiod_init(void) bitbang_interface = &linuxgpiod_bitbang; gpiod_chip = gpiod_chip_open_by_number(gpiochip); - if (gpiod_chip == NULL) { + if (!gpiod_chip) { LOG_ERROR("Cannot open LinuxGPIOD gpiochip %d", gpiochip); return ERROR_JTAG_INIT_FAILED; } @@ -343,24 +343,24 @@ static int linuxgpiod_init(void) } gpiod_tdo = helper_get_input_line("tdo", tdo_gpio); - if (gpiod_tdo == NULL) + if (!gpiod_tdo) goto out_error; gpiod_tdi = helper_get_output_line("tdi", tdi_gpio, 0); - if (gpiod_tdi == NULL) + if (!gpiod_tdi) goto out_error; gpiod_tck = helper_get_output_line("tck", tck_gpio, 0); - if (gpiod_tck == NULL) + if (!gpiod_tck) goto out_error; gpiod_tms = helper_get_output_line("tms", tms_gpio, 1); - if (gpiod_tms == NULL) + if (!gpiod_tms) goto out_error; if (is_gpio_valid(trst_gpio)) { gpiod_trst = helper_get_output_line("trst", trst_gpio, 1); - if (gpiod_trst == NULL) + if (!gpiod_trst) goto out_error; } } @@ -372,23 +372,23 @@ static int linuxgpiod_init(void) } gpiod_swclk = helper_get_output_line("swclk", swclk_gpio, 1); - if (gpiod_swclk == NULL) + if (!gpiod_swclk) goto out_error; gpiod_swdio = helper_get_output_line("swdio", swdio_gpio, 1); - if (gpiod_swdio == NULL) + if (!gpiod_swdio) goto out_error; } if (is_gpio_valid(srst_gpio)) { gpiod_srst = helper_get_output_line("srst", srst_gpio, 1); - if (gpiod_srst == NULL) + if (!gpiod_srst) goto out_error; } if (is_gpio_valid(led_gpio)) { gpiod_led = helper_get_output_line("led", led_gpio, 0); - if (gpiod_led == NULL) + if (!gpiod_led) goto out_error; } @@ -524,86 +524,86 @@ COMMAND_HANDLER(linuxgpiod_handle_gpiochip) return ERROR_OK; } -static const struct command_registration linuxgpiod_command_handlers[] = { +static const struct command_registration linuxgpiod_subcommand_handlers[] = { { - .name = "linuxgpiod_jtag_nums", + .name = "jtag_nums", .handler = linuxgpiod_handle_jtag_gpionums, .mode = COMMAND_CONFIG, .help = "gpio numbers for tck, tms, tdi, tdo. (in that order)", .usage = "tck tms tdi tdo", }, { - .name = "linuxgpiod_tck_num", + .name = "tck_num", .handler = linuxgpiod_handle_jtag_gpionum_tck, .mode = COMMAND_CONFIG, .help = "gpio number for tck.", .usage = "tck", }, { - .name = "linuxgpiod_tms_num", + .name = "tms_num", .handler = linuxgpiod_handle_jtag_gpionum_tms, .mode = COMMAND_CONFIG, .help = "gpio number for tms.", .usage = "tms", }, { - .name = "linuxgpiod_tdo_num", + .name = "tdo_num", .handler = linuxgpiod_handle_jtag_gpionum_tdo, .mode = COMMAND_CONFIG, .help = "gpio number for tdo.", .usage = "tdo", }, { - .name = "linuxgpiod_tdi_num", + .name = "tdi_num", .handler = linuxgpiod_handle_jtag_gpionum_tdi, .mode = COMMAND_CONFIG, .help = "gpio number for tdi.", .usage = "tdi", }, { - .name = "linuxgpiod_srst_num", + .name = "srst_num", .handler = linuxgpiod_handle_jtag_gpionum_srst, .mode = COMMAND_CONFIG, .help = "gpio number for srst.", .usage = "srst", }, { - .name = "linuxgpiod_trst_num", + .name = "trst_num", .handler = linuxgpiod_handle_jtag_gpionum_trst, .mode = COMMAND_CONFIG, .help = "gpio number for trst.", .usage = "trst", }, { - .name = "linuxgpiod_swd_nums", + .name = "swd_nums", .handler = linuxgpiod_handle_swd_gpionums, .mode = COMMAND_CONFIG, .help = "gpio numbers for swclk, swdio. (in that order)", .usage = "swclk swdio", }, { - .name = "linuxgpiod_swclk_num", + .name = "swclk_num", .handler = linuxgpiod_handle_swd_gpionum_swclk, .mode = COMMAND_CONFIG, .help = "gpio number for swclk.", .usage = "swclk", }, { - .name = "linuxgpiod_swdio_num", + .name = "swdio_num", .handler = linuxgpiod_handle_swd_gpionum_swdio, .mode = COMMAND_CONFIG, .help = "gpio number for swdio.", .usage = "swdio", }, { - .name = "linuxgpiod_led_num", + .name = "led_num", .handler = linuxgpiod_handle_gpionum_led, .mode = COMMAND_CONFIG, .help = "gpio number for LED.", .usage = "led", }, { - .name = "linuxgpiod_gpiochip", + .name = "gpiochip", .handler = linuxgpiod_handle_gpiochip, .mode = COMMAND_CONFIG, .help = "number of the gpiochip.", @@ -612,6 +612,17 @@ static const struct command_registration linuxgpiod_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration linuxgpiod_command_handlers[] = { + { + .name = "linuxgpiod", + .mode = COMMAND_ANY, + .help = "perform linuxgpiod management", + .chain = linuxgpiod_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static const char *const linuxgpiod_transport[] = { "swd", "jtag", NULL }; static struct jtag_interface linuxgpiod_interface = { diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c index 9ba1e2502..0e3d2be0e 100644 --- a/src/jtag/drivers/mpsse.c +++ b/src/jtag/drivers/mpsse.c @@ -119,7 +119,7 @@ static bool device_location_equal(struct libusb_device *device, const char *loca LOG_DEBUG("device path has %i steps", path_len); ptr = strtok(loc, "-:"); - if (ptr == NULL) { + if (!ptr) { LOG_DEBUG("no ':' in path"); goto done; } @@ -131,7 +131,7 @@ static bool device_location_equal(struct libusb_device *device, const char *loca path_step = 0; while (path_step < 7) { ptr = strtok(NULL, ".,"); - if (ptr == NULL) { + if (!ptr) { LOG_DEBUG("no more tokens in path at step %i", path_step); break; } @@ -945,12 +945,12 @@ error_check: retval = ERROR_OK; } + if (retval != ERROR_OK) + mpsse_purge(ctx); + libusb_free_transfer(write_transfer); if (read_transfer) libusb_free_transfer(read_transfer); - if (retval != ERROR_OK) - mpsse_purge(ctx); - return retval; } diff --git a/src/jtag/drivers/opendous.c b/src/jtag/drivers/opendous.c index 82fcbc119..6881959c3 100644 --- a/src/jtag/drivers/opendous.c +++ b/src/jtag/drivers/opendous.c @@ -161,7 +161,7 @@ COMMAND_HANDLER(opendous_handle_opendous_type_command) return ERROR_OK; /* only if the cable name wasn't overwritten by cmdline */ - if (opendous_type == NULL) { + if (!opendous_type) { /* REVISIT first verify that it's listed in cables[] ... */ opendous_type = strdup(CMD_ARGV[0]); } @@ -256,7 +256,7 @@ static int opendous_execute_queue(void) enum scan_type type; uint8_t *buffer; - while (cmd != NULL) { + while (cmd) { switch (cmd->type) { case JTAG_RUNTEST: LOG_DEBUG_IO("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, @@ -331,7 +331,7 @@ static int opendous_init(void) cur_opendous_probe = opendous_probes; - if (opendous_type == NULL) { + if (!opendous_type) { opendous_type = strdup("opendous"); LOG_WARNING("No opendous_type specified, using default 'opendous'"); } diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c index 6940c8870..123134f51 100644 --- a/src/jtag/drivers/openjtag.c +++ b/src/jtag/drivers/openjtag.c @@ -397,7 +397,7 @@ static int openjtag_init_standard(void) uint8_t latency_timer; /* Open by device description */ - if (openjtag_device_desc == NULL) { + if (!openjtag_device_desc) { LOG_WARNING("no openjtag device description specified, " "using default 'Open JTAG Project'"); openjtag_device_desc = "Open JTAG Project"; @@ -475,7 +475,7 @@ static int openjtag_init_cy7c65215(void) return ERROR_OK; err: - if (usbh != NULL) + if (usbh) jtag_libusb_close(usbh); return ERROR_JTAG_INIT_FAILED; } @@ -803,7 +803,7 @@ static int openjtag_execute_queue(void) { struct jtag_command *cmd = jtag_command_queue; - while (cmd != NULL) { + while (cmd) { openjtag_execute_command(cmd); cmd = cmd->next; } @@ -870,16 +870,16 @@ COMMAND_HANDLER(openjtag_handle_variant_command) return ERROR_OK; } -static const struct command_registration openjtag_command_handlers[] = { +static const struct command_registration openjtag_subcommand_handlers[] = { { - .name = "openjtag_device_desc", + .name = "device_desc", .handler = openjtag_handle_device_desc_command, .mode = COMMAND_CONFIG, .help = "set the USB device description of the OpenJTAG", .usage = "description-string", }, { - .name = "openjtag_variant", + .name = "variant", .handler = openjtag_handle_variant_command, .mode = COMMAND_CONFIG, .help = "set the OpenJTAG variant", @@ -888,6 +888,17 @@ static const struct command_registration openjtag_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration openjtag_command_handlers[] = { + { + .name = "openjtag", + .mode = COMMAND_ANY, + .help = "perform openjtag management", + .chain = openjtag_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static struct jtag_interface openjtag_interface = { .execute_queue = openjtag_execute_queue, }; diff --git a/src/jtag/drivers/parport.c b/src/jtag/drivers/parport.c index b203c828b..d50d306d3 100644 --- a/src/jtag/drivers/parport.c +++ b/src/jtag/drivers/parport.c @@ -272,7 +272,7 @@ static int parport_init(void) cur_cable = cables; - if (parport_cable == NULL) { + if (!parport_cable) { parport_cable = strdup("wiggler"); LOG_WARNING("No parport cable specified, using default 'wiggler'"); } @@ -448,7 +448,7 @@ COMMAND_HANDLER(parport_handle_parport_toggling_time_command) uint32_t ns; int retval = parse_u32(CMD_ARGV[0], &ns); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (ns == 0) { @@ -473,9 +473,9 @@ COMMAND_HANDLER(parport_handle_parport_toggling_time_command) return ERROR_OK; } -static const struct command_registration parport_command_handlers[] = { +static const struct command_registration parport_subcommand_handlers[] = { { - .name = "parport_port", + .name = "port", .handler = parport_handle_parport_port_command, .mode = COMMAND_CONFIG, .help = "Display the address of the I/O port (e.g. 0x378) " @@ -484,7 +484,7 @@ static const struct command_registration parport_command_handlers[] = { .usage = "[port_number]", }, { - .name = "parport_cable", + .name = "cable", .handler = parport_handle_parport_cable_command, .mode = COMMAND_CONFIG, .help = "Set the layout of the parallel port cable " @@ -493,7 +493,7 @@ static const struct command_registration parport_command_handlers[] = { .usage = "[layout]", }, { - .name = "parport_write_on_exit", + .name = "write_on_exit", .handler = parport_handle_write_on_exit_command, .mode = COMMAND_CONFIG, .help = "Configure the parallel driver to write " @@ -501,7 +501,7 @@ static const struct command_registration parport_command_handlers[] = { .usage = "('on'|'off')", }, { - .name = "parport_toggling_time", + .name = "toggling_time", .handler = parport_handle_parport_toggling_time_command, .mode = COMMAND_CONFIG, .help = "Displays or assigns how many nanoseconds it " @@ -511,6 +511,17 @@ static const struct command_registration parport_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration parport_command_handlers[] = { + { + .name = "parport", + .mode = COMMAND_ANY, + .help = "perform parport management", + .chain = parport_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static struct jtag_interface parport_interface = { .supported = DEBUG_CAP_TMS_SEQ, .execute_queue = bitbang_execute_queue, diff --git a/src/jtag/drivers/presto.c b/src/jtag/drivers/presto.c index 43d669e3e..61de42630 100644 --- a/src/jtag/drivers/presto.c +++ b/src/jtag/drivers/presto.c @@ -519,9 +519,9 @@ COMMAND_HANDLER(presto_handle_serial_command) return ERROR_OK; } -static const struct command_registration presto_command_handlers[] = { +static const struct command_registration presto_subcommand_handlers[] = { { - .name = "presto_serial", + .name = "serial", .handler = presto_handle_serial_command, .mode = COMMAND_CONFIG, .help = "Configure USB serial number of Presto device.", @@ -530,11 +530,22 @@ static const struct command_registration presto_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration presto_command_handlers[] = { + { + .name = "presto", + .mode = COMMAND_ANY, + .help = "perform presto management", + .chain = presto_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static int presto_jtag_init(void) { if (presto_open(presto_serial) != ERROR_OK) { presto_close(); - if (presto_serial != NULL) + if (presto_serial) LOG_ERROR("Cannot open PRESTO, serial number '%s'", presto_serial); else LOG_ERROR("Cannot open PRESTO"); diff --git a/src/jtag/drivers/remote_bitbang.c b/src/jtag/drivers/remote_bitbang.c index d6c3eef9e..0b5b8fcf7 100644 --- a/src/jtag/drivers/remote_bitbang.c +++ b/src/jtag/drivers/remote_bitbang.c @@ -261,7 +261,7 @@ static int remote_bitbang_init_tcp(void) If socket(2) (or connect(2)) fails, we (close the socket and) try the next address. */ - for (rp = result; rp != NULL ; rp = rp->ai_next) { + for (rp = result; rp ; rp = rp->ai_next) { fd = socket(rp->ai_family, rp->ai_socktype, rp->ai_protocol); if (fd == -1) continue; @@ -281,7 +281,7 @@ static int remote_bitbang_init_tcp(void) freeaddrinfo(result); /* No longer needed */ - if (rp == NULL) { /* No address succeeded */ + if (!rp) { /* No address succeeded */ log_socket_error("Failed to connect"); return ERROR_FAIL; } @@ -291,7 +291,7 @@ static int remote_bitbang_init_tcp(void) static int remote_bitbang_init_unix(void) { - if (remote_bitbang_host == NULL) { + if (!remote_bitbang_host) { LOG_ERROR("host/socket not specified"); return ERROR_FAIL; } @@ -324,7 +324,7 @@ static int remote_bitbang_init(void) remote_bitbang_recv_buf_end = 0; LOG_INFO("Initializing remote_bitbang driver"); - if (remote_bitbang_port == NULL) + if (!remote_bitbang_port) remote_bitbang_fd = remote_bitbang_init_unix(); else remote_bitbang_fd = remote_bitbang_init_tcp(); @@ -360,9 +360,9 @@ COMMAND_HANDLER(remote_bitbang_handle_remote_bitbang_host_command) return ERROR_COMMAND_SYNTAX_ERROR; } -static const struct command_registration remote_bitbang_command_handlers[] = { +static const struct command_registration remote_bitbang_subcommand_handlers[] = { { - .name = "remote_bitbang_port", + .name = "port", .handler = remote_bitbang_handle_remote_bitbang_port_command, .mode = COMMAND_CONFIG, .help = "Set the port to use to connect to the remote jtag.\n" @@ -370,7 +370,7 @@ static const struct command_registration remote_bitbang_command_handlers[] = { .usage = "port_number", }, { - .name = "remote_bitbang_host", + .name = "host", .handler = remote_bitbang_handle_remote_bitbang_host_command, .mode = COMMAND_CONFIG, .help = "Set the host to use to connect to the remote jtag.\n" @@ -380,6 +380,17 @@ static const struct command_registration remote_bitbang_command_handlers[] = { COMMAND_REGISTRATION_DONE, }; +static const struct command_registration remote_bitbang_command_handlers[] = { + { + .name = "remote_bitbang", + .mode = COMMAND_ANY, + .help = "perform remote_bitbang management", + .chain = remote_bitbang_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static int remote_bitbang_execute_queue(void) { /* safety: the send buffer must be empty, no leftover characters from diff --git a/src/jtag/drivers/rlink.c b/src/jtag/drivers/rlink.c index a88731f4a..f75a38b5d 100644 --- a/src/jtag/drivers/rlink.c +++ b/src/jtag/drivers/rlink.c @@ -97,14 +97,14 @@ #define ST7_PC_TDO ST7_PC_IO9 #define ST7_PA_DBGACK ST7_PA_IO10 -static struct libusb_device_handle *pHDev; +static struct libusb_device_handle *hdev; /* * ep1 commands are up to USB_EP1OUT_SIZE bytes in length. * This function takes care of zeroing the unused bytes before sending the packet. * Any reply packet is not handled by this function. */ -static int ep1_generic_commandl(struct libusb_device_handle *pHDev_param, size_t length, ...) +static int ep1_generic_commandl(struct libusb_device_handle *hdev_param, size_t length, ...) { uint8_t usb_buffer[USB_EP1OUT_SIZE]; uint8_t *usb_buffer_p; @@ -130,7 +130,7 @@ static int ep1_generic_commandl(struct libusb_device_handle *pHDev_param, size_t ); usb_ret = jtag_libusb_bulk_write( - pHDev_param, + hdev_param, USB_EP1OUT_ADDR, (char *)usb_buffer, sizeof(usb_buffer), USB_TIMEOUT_MS, @@ -144,7 +144,7 @@ static int ep1_generic_commandl(struct libusb_device_handle *pHDev_param, size_t #if 0 static ssize_t ep1_memory_read( - struct libusb_device_handle *pHDev_param, uint16_t addr, + struct libusb_device_handle *hdev_param, uint16_t addr, size_t length, uint8_t *buffer) { uint8_t usb_buffer[USB_EP1OUT_SIZE]; @@ -174,7 +174,7 @@ static ssize_t ep1_memory_read( usb_buffer[3] = length; usb_ret = jtag_libusb_bulk_write( - pHDev_param, USB_EP1OUT_ADDR, + hdev_param, USB_EP1OUT_ADDR, (char *)usb_buffer, sizeof(usb_buffer), USB_TIMEOUT_MS, &transferred @@ -184,7 +184,7 @@ static ssize_t ep1_memory_read( break; usb_ret = jtag_libusb_bulk_read( - pHDev_param, USB_EP1IN_ADDR, + hdev_param, USB_EP1IN_ADDR, (char *)buffer, length, USB_TIMEOUT_MS, &transferred @@ -203,7 +203,7 @@ static ssize_t ep1_memory_read( } #endif -static ssize_t ep1_memory_write(struct libusb_device_handle *pHDev_param, uint16_t addr, +static ssize_t ep1_memory_write(struct libusb_device_handle *hdev_param, uint16_t addr, size_t length, uint8_t const *buffer) { uint8_t usb_buffer[USB_EP1OUT_SIZE]; @@ -239,7 +239,7 @@ static ssize_t ep1_memory_write(struct libusb_device_handle *pHDev_param, uint16 int transferred; usb_ret = jtag_libusb_bulk_write( - pHDev_param, USB_EP1OUT_ADDR, + hdev_param, USB_EP1OUT_ADDR, (char *)usb_buffer, sizeof(usb_buffer), USB_TIMEOUT_MS, &transferred @@ -259,7 +259,7 @@ static ssize_t ep1_memory_write(struct libusb_device_handle *pHDev_param, uint16 #if 0 -static ssize_t ep1_memory_writel(struct libusb_device_handle *pHDev_param, uint16_t addr, +static ssize_t ep1_memory_writel(struct libusb_device_handle *hdev_param, uint16_t addr, size_t length, ...) { uint8_t buffer[USB_EP1OUT_SIZE - 4]; @@ -279,7 +279,7 @@ static ssize_t ep1_memory_writel(struct libusb_device_handle *pHDev_param, uint1 remain--; } - return ep1_memory_write(pHDev_param, addr, length, buffer); + return ep1_memory_write(hdev_param, addr, length, buffer); } #endif @@ -296,7 +296,7 @@ static ssize_t ep1_memory_writel(struct libusb_device_handle *pHDev_param, uint1 static uint8_t dtc_entry_download; /* The buffer is specially formatted to represent a valid image to load into the DTC. */ -static int dtc_load_from_buffer(struct libusb_device_handle *pHDev_param, const uint8_t *buffer, +static int dtc_load_from_buffer(struct libusb_device_handle *hdev_param, const uint8_t *buffer, size_t length) { struct header_s { @@ -312,7 +312,7 @@ static int dtc_load_from_buffer(struct libusb_device_handle *pHDev_param, const /* Stop the DTC before loading anything. */ usb_err = ep1_generic_commandl( - pHDev_param, 1, + hdev_param, 1, EP1_CMD_DTC_STOP ); if (usb_err < 0) @@ -346,7 +346,7 @@ static int dtc_load_from_buffer(struct libusb_device_handle *pHDev_param, const case DTCLOAD_LOAD: /* Send the DTC program to ST7 RAM. */ usb_err = ep1_memory_write( - pHDev_param, + hdev_param, DTC_LOAD_BUFFER, header->length + 1, buffer ); @@ -355,7 +355,7 @@ static int dtc_load_from_buffer(struct libusb_device_handle *pHDev_param, const /* Load it into the DTC. */ usb_err = ep1_generic_commandl( - pHDev_param, 3, + hdev_param, 3, EP1_CMD_DTC_LOAD, (DTC_LOAD_BUFFER >> 8), DTC_LOAD_BUFFER @@ -367,7 +367,7 @@ static int dtc_load_from_buffer(struct libusb_device_handle *pHDev_param, const case DTCLOAD_RUN: usb_err = ep1_generic_commandl( - pHDev_param, 3, + hdev_param, 3, EP1_CMD_DTC_CALL, buffer[0], EP1_CMD_DTC_WAIT @@ -383,7 +383,7 @@ static int dtc_load_from_buffer(struct libusb_device_handle *pHDev_param, const case DTCLOAD_LUT: usb_err = ep1_memory_write( - pHDev_param, + hdev_param, ST7_USB_BUF_EP0OUT + lut_start, header->length + 1, buffer ); @@ -415,7 +415,7 @@ static int dtc_start_download(void) /* set up for download mode and make sure EP2 is set up to transmit */ usb_err = ep1_generic_commandl( - pHDev, 7, + hdev, 7, EP1_CMD_DTC_STOP, EP1_CMD_SET_UPLOAD, @@ -430,7 +430,7 @@ static int dtc_start_download(void) /* read back ep2txr */ usb_err = jtag_libusb_bulk_read( - pHDev, USB_EP1IN_ADDR, + hdev, USB_EP1IN_ADDR, (char *)&ep2txr, 1, USB_TIMEOUT_MS, &transferred @@ -439,7 +439,7 @@ static int dtc_start_download(void) return usb_err; usb_err = ep1_generic_commandl( - pHDev, 13, + hdev, 13, EP1_CMD_MEMORY_WRITE, /* preinitialize poll byte */ DTC_STATUS_POLL_BYTE >> 8, @@ -460,7 +460,7 @@ static int dtc_start_download(void) /* wait for completion */ usb_err = jtag_libusb_bulk_read( - pHDev, USB_EP1IN_ADDR, + hdev, USB_EP1IN_ADDR, (char *)&ep2txr, 1, USB_TIMEOUT_MS, &transferred @@ -470,7 +470,7 @@ static int dtc_start_download(void) } static int dtc_run_download( - struct libusb_device_handle *pHDev_param, + struct libusb_device_handle *hdev_param, uint8_t *command_buffer, int command_buffer_size, uint8_t *reply_buffer, @@ -485,7 +485,7 @@ static int dtc_run_download( LOG_DEBUG("%d/%d", command_buffer_size, reply_buffer_size); usb_err = jtag_libusb_bulk_write( - pHDev_param, + hdev_param, USB_EP2OUT_ADDR, (char *)command_buffer, USB_EP2BANK_SIZE, USB_TIMEOUT_MS, @@ -498,7 +498,7 @@ static int dtc_run_download( /* Wait for DTC to finish running command buffer */ for (i = 50;; ) { usb_err = ep1_generic_commandl( - pHDev_param, 4, + hdev_param, 4, EP1_CMD_MEMORY_READ, DTC_STATUS_POLL_BYTE >> 8, @@ -509,7 +509,7 @@ static int dtc_run_download( return usb_err; usb_err = jtag_libusb_bulk_read( - pHDev_param, + hdev_param, USB_EP1IN_ADDR, &dtc_status, 1, USB_TIMEOUT_MS, @@ -530,7 +530,7 @@ static int dtc_run_download( if (reply_buffer && reply_buffer_size) { usb_err = jtag_libusb_bulk_read( - pHDev_param, + hdev_param, USB_EP2IN_ADDR, (char *)reply_buffer, reply_buffer_size, USB_TIMEOUT_MS, @@ -608,7 +608,7 @@ static inline struct dtc_reply_queue_entry *dtc_queue_enqueue_reply( struct dtc_reply_queue_entry *rq_entry; rq_entry = malloc(sizeof(struct dtc_reply_queue_entry)); - if (rq_entry != NULL) { + if (rq_entry) { rq_entry->scan.type = type; rq_entry->scan.buffer = buffer; rq_entry->scan.size = size; @@ -617,7 +617,7 @@ static inline struct dtc_reply_queue_entry *dtc_queue_enqueue_reply( rq_entry->cmd = cmd; rq_entry->next = NULL; - if (dtc_queue.rq_head == NULL) + if (!dtc_queue.rq_head) dtc_queue.rq_head = rq_entry; else dtc_queue.rq_tail->next = rq_entry; @@ -656,7 +656,7 @@ static int dtc_queue_run(void) dtc_queue.cmd_buffer[dtc_queue.cmd_index++] = DTC_CMD_STOP; - usb_err = dtc_run_download(pHDev, + usb_err = dtc_run_download(hdev, dtc_queue.cmd_buffer, dtc_queue.cmd_index, reply_buffer, sizeof(reply_buffer) ); @@ -665,7 +665,7 @@ static int dtc_queue_run(void) exit(1); } - if (dtc_queue.rq_head != NULL) { + if (dtc_queue.rq_head) { /* process the reply, which empties the reply queue and frees its entries */ dtc_p = reply_buffer; @@ -677,7 +677,7 @@ static int dtc_queue_run(void) for ( rq_p = dtc_queue.rq_head; - rq_p != NULL; + rq_p; rq_p = rq_next ) { tdo_p = rq_p->scan.buffer + (rq_p->scan.offset / 8); @@ -940,7 +940,7 @@ static void rlink_reset(int trst, int srst) /* Read port A for bit op */ usb_err = ep1_generic_commandl( - pHDev, 4, + hdev, 4, EP1_CMD_MEMORY_READ, ST7_PADR >> 8, ST7_PADR, @@ -952,7 +952,7 @@ static void rlink_reset(int trst, int srst) } usb_err = jtag_libusb_bulk_read( - pHDev, USB_EP1IN_ADDR, + hdev, USB_EP1IN_ADDR, (char *)&bitmap, 1, USB_TIMEOUT_MS, &transferred @@ -971,7 +971,7 @@ static void rlink_reset(int trst, int srst) * port B has no OR, and we want to emulate open drain on NSRST, so we initialize DR to 0 *and assert NSRST by setting DDR to 1. */ usb_err = ep1_generic_commandl( - pHDev, 9, + hdev, 9, EP1_CMD_MEMORY_WRITE, ST7_PADR >> 8, ST7_PADR, @@ -988,7 +988,7 @@ static void rlink_reset(int trst, int srst) } usb_err = jtag_libusb_bulk_read( - pHDev, USB_EP1IN_ADDR, + hdev, USB_EP1IN_ADDR, (char *)&bitmap, 1, USB_TIMEOUT_MS, &transferred @@ -1005,7 +1005,7 @@ static void rlink_reset(int trst, int srst) /* write port B and read dummy to ensure completion before returning */ usb_err = ep1_generic_commandl( - pHDev, 6, + hdev, 6, EP1_CMD_MEMORY_WRITE, ST7_PBDDR >> 8, ST7_PBDDR, @@ -1019,7 +1019,7 @@ static void rlink_reset(int trst, int srst) } usb_err = jtag_libusb_bulk_read( - pHDev, USB_EP1IN_ADDR, + hdev, USB_EP1IN_ADDR, (char *)&bitmap, 1, USB_TIMEOUT_MS, &transferred @@ -1148,11 +1148,8 @@ static int rlink_scan(struct jtag_command *cmd, enum scan_type type, byte_bits -= chunk_bits; if (type != SCAN_OUT) { - if (dtc_queue_enqueue_reply( - type, buffer, scan_size, tdi_bit_offset, - chunk_bits, - cmd - ) == NULL) { + if (!dtc_queue_enqueue_reply(type, buffer, scan_size, tdi_bit_offset, + chunk_bits, cmd)) { LOG_ERROR("enqueuing DTC reply entry: %s", strerror(errno)); exit(1); } @@ -1208,11 +1205,8 @@ static int rlink_scan(struct jtag_command *cmd, enum scan_type type, * and one reply byte */ dtc_queue_run_if_full(type == SCAN_IN ? 1 : 2, 1); - if (dtc_queue_enqueue_reply( - type, buffer, scan_size, tdi_bit_offset, - extra_bits, - cmd - ) == NULL) { + if (!dtc_queue_enqueue_reply(type, buffer, scan_size, tdi_bit_offset, + extra_bits, cmd)) { LOG_ERROR("enqueuing DTC reply entry: %s", strerror(errno)); exit(1); } @@ -1260,11 +1254,8 @@ static int rlink_scan(struct jtag_command *cmd, enum scan_type type, DTC_CMD_SHIFT_TMS_TDI_BIT_PAIR(1, (*tdi_p & tdi_mask), 0); } else { - if (dtc_queue_enqueue_reply( - type, buffer, scan_size, tdi_bit_offset, - 1, - cmd - ) == NULL) { + if (!dtc_queue_enqueue_reply(type, buffer, scan_size, tdi_bit_offset, + 1, cmd)) { LOG_ERROR("enqueuing DTC reply entry: %s", strerror(errno)); exit(1); } @@ -1297,7 +1288,7 @@ static int rlink_execute_queue(void) #ifndef AUTOMATIC_BUSY_LED /* turn LED on */ - ep1_generic_commandl(pHDev, 2, + ep1_generic_commandl(hdev, 2, EP1_CMD_SET_PORTD_LEDS, ~(ST7_PD_NBUSY_LED) ); @@ -1381,7 +1372,7 @@ static int rlink_execute_queue(void) #ifndef AUTOMATIC_BUSY_LED /* turn LED off */ - ep1_generic_commandl(pHDev, 2, + ep1_generic_commandl(hdev, 2, EP1_CMD_SET_PORTD_LEDS, ~0 ); @@ -1404,7 +1395,7 @@ static int rlink_speed(int speed) for (i = rlink_speed_table_size; i--; ) { if (rlink_speed_table[i].prescaler == speed) { - if (dtc_load_from_buffer(pHDev, rlink_speed_table[i].dtc, + if (dtc_load_from_buffer(hdev, rlink_speed_table[i].dtc, rlink_speed_table[i].dtc_size) != 0) { LOG_ERROR( "An error occurred while trying to load DTC code for speed \"%d\".", @@ -1470,11 +1461,11 @@ static int rlink_init(void) const uint16_t vids[] = { USB_IDVENDOR, 0 }; const uint16_t pids[] = { USB_IDPRODUCT, 0 }; - if (jtag_libusb_open(vids, pids, NULL, &pHDev, NULL) != ERROR_OK) + if (jtag_libusb_open(vids, pids, NULL, &hdev, NULL) != ERROR_OK) return ERROR_FAIL; struct libusb_device_descriptor descriptor; - struct libusb_device *usb_dev = libusb_get_device(pHDev); + struct libusb_device *usb_dev = libusb_get_device(hdev); int r = libusb_get_device_descriptor(usb_dev, &descriptor); if (r < 0) { LOG_ERROR("error %d getting device descriptor", r); @@ -1492,17 +1483,17 @@ static int rlink_init(void) return ERROR_FAIL; } - LOG_DEBUG("Opened device, pHDev = %p", pHDev); + LOG_DEBUG("Opened device, hdev = %p", hdev); /* usb_set_configuration required under win32 */ - libusb_set_configuration(pHDev, config->bConfigurationValue); + libusb_set_configuration(hdev, config->bConfigurationValue); retries = 3; do { - i = libusb_claim_interface(pHDev, 0); + i = libusb_claim_interface(hdev, 0); if (i != LIBUSB_SUCCESS) { LOG_ERROR("usb_claim_interface: %s", libusb_error_name(i)); - j = libusb_detach_kernel_driver(pHDev, 0); + j = libusb_detach_kernel_driver(hdev, 0); if (j != LIBUSB_SUCCESS) LOG_ERROR("detach kernel driver: %s", libusb_error_name(j)); } else { @@ -1515,7 +1506,7 @@ static int rlink_init(void) LOG_ERROR("Initialisation failed."); return ERROR_FAIL; } - if (libusb_set_interface_alt_setting(pHDev, 0, 0) != LIBUSB_SUCCESS) { + if (libusb_set_interface_alt_setting(hdev, 0, 0) != LIBUSB_SUCCESS) { LOG_ERROR("Failed to set interface."); return ERROR_FAIL; } @@ -1531,7 +1522,7 @@ static int rlink_init(void) */ for (i = 0; i < 5; i++) { j = ep1_generic_commandl( - pHDev, 1, + hdev, 1, EP1_CMD_GET_FWREV ); if (j < USB_EP1OUT_SIZE) { @@ -1539,7 +1530,7 @@ static int rlink_init(void) return ERROR_FAIL; } j = jtag_libusb_bulk_read( - pHDev, USB_EP1IN_ADDR, + hdev, USB_EP1IN_ADDR, (char *)reply_buffer, sizeof(reply_buffer), 200, &transferred @@ -1563,7 +1554,7 @@ static int rlink_init(void) /* Probe port E for adapter presence */ ep1_generic_commandl( - pHDev, 16, + hdev, 16, EP1_CMD_MEMORY_WRITE, /* Drive sense pin with 0 */ ST7_PEDR >> 8, ST7_PEDR, @@ -1583,7 +1574,7 @@ static int rlink_init(void) ); jtag_libusb_bulk_read( - pHDev, USB_EP1IN_ADDR, + hdev, USB_EP1IN_ADDR, (char *)reply_buffer, 1, USB_TIMEOUT_MS, &transferred @@ -1593,7 +1584,7 @@ static int rlink_init(void) LOG_WARNING("target detection problem"); ep1_generic_commandl( - pHDev, 11, + hdev, 11, EP1_CMD_MEMORY_READ, /* Read back */ ST7_PEDR >> 8, ST7_PEDR, @@ -1608,7 +1599,7 @@ static int rlink_init(void) ); jtag_libusb_bulk_read( - pHDev, USB_EP1IN_ADDR, + hdev, USB_EP1IN_ADDR, (char *)reply_buffer, 1, USB_TIMEOUT_MS, &transferred @@ -1620,7 +1611,7 @@ static int rlink_init(void) /* float ports A and B */ ep1_generic_commandl( - pHDev, 11, + hdev, 11, EP1_CMD_MEMORY_WRITE, ST7_PADDR >> 8, ST7_PADDR, @@ -1636,7 +1627,7 @@ static int rlink_init(void) /* make sure DTC is stopped, set VPP control, set up ports A and B */ ep1_generic_commandl( - pHDev, 14, + hdev, 14, EP1_CMD_DTC_STOP, EP1_CMD_SET_PORTD_VPP, ~(ST7_PD_VPP_SHDN), @@ -1657,7 +1648,7 @@ static int rlink_init(void) /* set LED updating mode and make sure they're unlit */ ep1_generic_commandl( - pHDev, 3, + hdev, 3, #ifdef AUTOMATIC_BUSY_LED EP1_CMD_LEDUE_BUSY, #else @@ -1678,7 +1669,7 @@ static int rlink_quit(void) { /* stop DTC and make sure LEDs are off */ ep1_generic_commandl( - pHDev, 6, + hdev, 6, EP1_CMD_DTC_STOP, EP1_CMD_LEDUE_NONE, EP1_CMD_SET_PORTD_LEDS, @@ -1687,8 +1678,8 @@ static int rlink_quit(void) ~0 ); - libusb_release_interface(pHDev, 0); - libusb_close(pHDev); + libusb_release_interface(hdev, 0); + libusb_close(hdev); return ERROR_OK; } diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 7b1932b9f..2bbd03b6a 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -475,7 +475,7 @@ static unsigned int stlink_usb_block(void *handle) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->version.flags & STLINK_F_HAS_RW8_512BYTES) return STLINKV3_MAX_RW8; @@ -568,7 +568,7 @@ static int jtag_libusb_bulk_transfer_n( transfers[i].transfer_size = 0; transfers[i].transfer = libusb_alloc_transfer(0); - if (transfers[i].transfer == NULL) { + if (!transfers[i].transfer) { for (size_t j = 0; j < i; ++j) libusb_free_transfer(transfers[j].transfer); @@ -636,7 +636,7 @@ static int stlink_usb_xfer_v1_get_status(void *handle) struct stlink_usb_handle_s *h = handle; int tr, ret; - assert(handle != NULL); + assert(handle); /* read status */ memset(h->cmdbuf, 0, STLINK_SG_SIZE); @@ -670,7 +670,7 @@ static int stlink_usb_xfer_rw(void *handle, int cmdsize, const uint8_t *buf, int { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); size_t n_transfers = 0; struct jtag_xfer transfers[2]; @@ -709,7 +709,7 @@ static int stlink_usb_xfer_rw(void *handle, int cmdsize, const uint8_t *buf, int struct stlink_usb_handle_s *h = handle; int tr, ret; - assert(handle != NULL); + assert(handle); ret = jtag_libusb_bulk_write(h->usb_backend_priv.fd, h->tx_ep, (char *)h->cmdbuf, cmdsize, STLINK_WRITE_TIMEOUT, &tr); @@ -742,7 +742,7 @@ static int stlink_usb_xfer_v1_get_sense(void *handle) int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); stlink_usb_init_buffer(handle, h->rx_ep, 16); @@ -790,7 +790,7 @@ static int stlink_usb_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, int int err, cmdsize = STLINK_CMD_SIZE_V2; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->version.stlink == 1) { cmdsize = STLINK_SG_SIZE; @@ -823,7 +823,7 @@ static int stlink_tcp_send_cmd(void *handle, int send_size, int recv_size, bool { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); /* send the TCP command */ int sent_size = send(h->tcp_backend_priv.fd, (void *)h->tcp_backend_priv.send_buf, send_size, 0); @@ -868,7 +868,7 @@ static int stlink_tcp_xfer_noerrcheck(void *handle, const uint8_t *buf, int size int send_size = STLINK_TCP_USB_CMD_SIZE; int recv_size = STLINK_TCP_SS_SIZE; - assert(handle != NULL); + assert(handle); /* prepare the TCP command */ h->tcp_backend_priv.send_buf[0] = STLINK_TCP_CMD_SEND_USB_CMD; @@ -937,7 +937,7 @@ static int stlink_usb_error_check(void *handle) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->st_mode == STLINK_MODE_DEBUG_SWIM) { switch (h->databuf[0]) { @@ -1076,7 +1076,7 @@ static int stlink_usb_read_trace(void *handle, const uint8_t *buf, int size) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); assert(h->version.flags & STLINK_F_HAS_TRACE); @@ -1141,7 +1141,7 @@ static int stlink_usb_version(void *handle) char *p; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); stlink_usb_init_buffer(handle, h->rx_ep, 6); @@ -1355,7 +1355,7 @@ static int stlink_usb_set_swdclk(void *handle, uint16_t clk_divisor) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_SWD_SET_FREQ)) return ERROR_COMMAND_NOTFOUND; @@ -1379,7 +1379,7 @@ static int stlink_usb_set_jtagclk(void *handle, uint16_t clk_divisor) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_JTAG_SET_FREQ)) return ERROR_COMMAND_NOTFOUND; @@ -1405,7 +1405,7 @@ static int stlink_usb_current_mode(void *handle, uint8_t *mode) int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); stlink_usb_init_buffer(handle, h->rx_ep, 2); @@ -1427,7 +1427,7 @@ static int stlink_usb_mode_enter(void *handle, enum stlink_mode type) int rx_size = 0; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); /* on api V2 we are able the read the latest command * status @@ -1475,7 +1475,7 @@ static int stlink_usb_mode_leave(void *handle, enum stlink_mode type) int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); /* command with no reply, use a valid endpoint but zero size */ stlink_usb_init_buffer(handle, h->rx_ep, 0); @@ -1528,7 +1528,7 @@ static int stlink_usb_exit_mode(void *handle) uint8_t mode; enum stlink_mode emode; - assert(handle != NULL); + assert(handle); res = stlink_usb_current_mode(handle, &mode); @@ -1569,7 +1569,7 @@ static int stlink_usb_init_mode(void *handle, bool connect_under_reset, int init enum stlink_mode emode; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); res = stlink_usb_exit_mode(handle); if (res != ERROR_OK) @@ -1626,7 +1626,8 @@ static int stlink_usb_init_mode(void *handle, bool connect_under_reset, int init } } - if (h->version.jtag_api == STLINK_JTAG_API_V3) { + if (h->version.jtag_api == STLINK_JTAG_API_V3 && + (emode == STLINK_MODE_DEBUG_JTAG || emode == STLINK_MODE_DEBUG_SWD)) { struct speed_map map[STLINK_V3_MAX_FREQ_NB]; stlink_get_com_freq(h, (emode == STLINK_MODE_DEBUG_JTAG), map); @@ -1867,7 +1868,7 @@ static int stlink_usb_idcode(void *handle, uint32_t *idcode) int res, offset; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); /* there is no swim read core id cmd */ if (h->st_mode == STLINK_MODE_DEBUG_SWIM) { @@ -1905,7 +1906,7 @@ static int stlink_usb_v2_read_debug_reg(void *handle, uint32_t addr, uint32_t *v struct stlink_usb_handle_s *h = handle; int res; - assert(handle != NULL); + assert(handle); stlink_usb_init_buffer(handle, h->rx_ep, 8); @@ -1926,7 +1927,7 @@ static int stlink_usb_write_debug_reg(void *handle, uint32_t addr, uint32_t val) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); stlink_usb_init_buffer(handle, h->rx_ep, 2); @@ -1948,7 +1949,7 @@ static int stlink_usb_trace_read(void *handle, uint8_t *buf, size_t *size) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->trace.enabled && (h->version.flags & STLINK_F_HAS_TRACE)) { int res; @@ -1999,7 +2000,7 @@ static enum target_state stlink_usb_state(void *handle) int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->reconnect_pending) { LOG_INFO("Previous state query failed, trying to reconnect"); @@ -2041,7 +2042,7 @@ static int stlink_usb_assert_srst(void *handle, int srst) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->st_mode == STLINK_MODE_DEBUG_SWIM) return stlink_swim_assert_reset(handle, srst); @@ -2064,7 +2065,7 @@ static void stlink_usb_trace_disable(void *handle) int res = ERROR_OK; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); assert(h->version.flags & STLINK_F_HAS_TRACE); @@ -2086,7 +2087,7 @@ static int stlink_usb_trace_enable(void *handle) int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->version.flags & STLINK_F_HAS_TRACE) { stlink_usb_init_buffer(handle, h->rx_ep, 10); @@ -2118,7 +2119,7 @@ static int stlink_usb_reset(void *handle) struct stlink_usb_handle_s *h = handle; int retval; - assert(handle != NULL); + assert(handle); stlink_usb_init_buffer(handle, h->rx_ep, 2); @@ -2147,7 +2148,7 @@ static int stlink_usb_run(void *handle) int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->version.jtag_api != STLINK_JTAG_API_V1) { res = stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_DEBUGEN); @@ -2169,7 +2170,7 @@ static int stlink_usb_halt(void *handle) int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->version.jtag_api != STLINK_JTAG_API_V1) { res = stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_HALT|C_DEBUGEN); @@ -2190,7 +2191,7 @@ static int stlink_usb_step(void *handle) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->version.jtag_api != STLINK_JTAG_API_V1) { /* TODO: this emulates the v1 api, it should really use a similar auto mask isr @@ -2214,7 +2215,7 @@ static int stlink_usb_read_regs(void *handle) int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); stlink_usb_init_buffer(handle, h->rx_ep, 88); @@ -2239,7 +2240,7 @@ static int stlink_usb_read_reg(void *handle, unsigned int regsel, uint32_t *val) int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (STLINK_REGSEL_IS_FPU(regsel) && !(h->version.flags & STLINK_F_HAS_FPU_REG)) { res = stlink_usb_write_debug_reg(h, DCB_DCRSR, regsel & 0x7f); @@ -2279,14 +2280,14 @@ static int stlink_usb_write_reg(void *handle, unsigned int regsel, uint32_t val) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (STLINK_REGSEL_IS_FPU(regsel) && !(h->version.flags & STLINK_F_HAS_FPU_REG)) { int res = stlink_usb_write_debug_reg(h, DCB_DCRDR, val); if (res != ERROR_OK) return res; - return stlink_usb_write_debug_reg(h, DCB_DCRSR, DCRSR_WnR | (regsel & 0x7f)); + return stlink_usb_write_debug_reg(h, DCB_DCRSR, DCRSR_WNR | (regsel & 0x7f)); /* FIXME: poll DHCSR.S_REGRDY after write DCRSR */ } @@ -2308,7 +2309,7 @@ static int stlink_usb_get_rw_status(void *handle) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (h->version.jtag_api == STLINK_JTAG_API_V1) return ERROR_OK; @@ -2333,7 +2334,7 @@ static int stlink_usb_read_mem8(void *handle, uint32_t addr, uint16_t len, uint16_t read_len = len; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); /* max 8 bit read/write is 64 bytes or 512 bytes for v3 */ if (len > stlink_usb_block(h)) { @@ -2371,7 +2372,7 @@ static int stlink_usb_write_mem8(void *handle, uint32_t addr, uint16_t len, int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); /* max 8 bit read/write is 64 bytes or 512 bytes for v3 */ if (len > stlink_usb_block(h)) { @@ -2403,7 +2404,7 @@ static int stlink_usb_read_mem16(void *handle, uint32_t addr, uint16_t len, int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_MEM_16BIT)) return ERROR_COMMAND_NOTFOUND; @@ -2440,7 +2441,7 @@ static int stlink_usb_write_mem16(void *handle, uint32_t addr, uint16_t len, int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_MEM_16BIT)) return ERROR_COMMAND_NOTFOUND; @@ -2475,7 +2476,7 @@ static int stlink_usb_read_mem32(void *handle, uint32_t addr, uint16_t len, int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); /* data must be a multiple of 4 and word aligned */ if (len % 4 || addr % 4) { @@ -2509,7 +2510,7 @@ static int stlink_usb_write_mem32(void *handle, uint32_t addr, uint16_t len, int res; struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); /* data must be a multiple of 4 and word aligned */ if (len % 4 || addr % 4) { @@ -2985,7 +2986,7 @@ static int stlink_tcp_close(void *handle) /** */ static int stlink_close(void *handle) { - if (handle != NULL) { + if (handle) { struct stlink_usb_handle_s *h = handle; stlink_usb_close(handle); @@ -3064,7 +3065,7 @@ static char *stlink_usb_get_alternate_serial(struct libusb_device_handle *device /* else (len == 26) => buggy ST-Link */ char *alternate_serial = malloc((STLINK_SERIAL_LEN + 1) * sizeof(char)); - if (alternate_serial == NULL) + if (!alternate_serial) return NULL; for (unsigned int i = 0; i < STLINK_SERIAL_LEN; i += 2) @@ -3084,7 +3085,7 @@ static int stlink_usb_usb_open(void *handle, struct hl_interface_param_s *param) h->cmdbuf = malloc(STLINK_SG_SIZE); h->databuf = malloc(STLINK_DATA_SIZE); - if (h->cmdbuf == NULL || h->databuf == NULL) + if (!h->cmdbuf || !h->databuf) return ERROR_FAIL; /* @@ -3198,7 +3199,7 @@ static int stlink_tcp_open(void *handle, struct hl_interface_param_s *param) h->tcp_backend_priv.send_buf = malloc(STLINK_TCP_SEND_BUFFER_SIZE); h->tcp_backend_priv.recv_buf = malloc(STLINK_TCP_RECV_BUFFER_SIZE); - if (h->tcp_backend_priv.send_buf == NULL || h->tcp_backend_priv.recv_buf == NULL) + if (!h->tcp_backend_priv.send_buf || !h->tcp_backend_priv.recv_buf) return ERROR_FAIL; h->cmdbuf = &h->tcp_backend_priv.send_buf[8]; @@ -3307,7 +3308,7 @@ static int stlink_tcp_open(void *handle, struct hl_interface_param_s *param) char serial[STLINK_TCP_SERIAL_SIZE + 1] = {0}; uint8_t stlink_used; bool stlink_id_matched = false; - bool stlink_serial_matched = (param->serial == NULL); + bool stlink_serial_matched = (!param->serial); for (uint32_t stlink_id = 0; stlink_id < connected_stlinks; stlink_id++) { /* get the stlink info */ @@ -3534,8 +3535,8 @@ static int stlink_config_trace(void *handle, bool enabled, return ERROR_OK; } - assert(trace_freq != NULL); - assert(prescaler != NULL); + assert(trace_freq); + assert(prescaler); if (pin_protocol != TPIU_PIN_PROTOCOL_ASYNC_UART) { LOG_ERROR("The attached ST-LINK version doesn't support this trace mode"); @@ -3585,7 +3586,7 @@ static int stlink_usb_init_access_port(void *handle, unsigned char ap_num) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_AP_INIT)) return ERROR_COMMAND_NOTFOUND; @@ -3604,7 +3605,7 @@ static int stlink_usb_close_access_port(void *handle, unsigned char ap_num) { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_AP_INIT)) return ERROR_COMMAND_NOTFOUND; @@ -3630,7 +3631,7 @@ static int stlink_read_dap_register(void *handle, unsigned short dap_port, struct stlink_usb_handle_s *h = handle; int retval; - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_DAP_REG)) return ERROR_COMMAND_NOTFOUND; @@ -3653,7 +3654,7 @@ static int stlink_write_dap_register(void *handle, unsigned short dap_port, { struct stlink_usb_handle_s *h = handle; - assert(handle != NULL); + assert(handle); if (!(h->version.flags & STLINK_F_HAS_DAP_REG)) return ERROR_COMMAND_NOTFOUND; diff --git a/src/jtag/drivers/sysfsgpio.c b/src/jtag/drivers/sysfsgpio.c index 78a4c5b77..103b81009 100644 --- a/src/jtag/drivers/sysfsgpio.c +++ b/src/jtag/drivers/sysfsgpio.c @@ -468,72 +468,72 @@ COMMAND_HANDLER(sysfsgpio_handle_swd_gpionum_swdio) return ERROR_OK; } -static const struct command_registration sysfsgpio_command_handlers[] = { +static const struct command_registration sysfsgpio_subcommand_handlers[] = { { - .name = "sysfsgpio_jtag_nums", + .name = "jtag_nums", .handler = &sysfsgpio_handle_jtag_gpionums, .mode = COMMAND_CONFIG, .help = "gpio numbers for tck, tms, tdi, tdo. (in that order)", .usage = "[tck tms tdi tdo]", }, { - .name = "sysfsgpio_tck_num", + .name = "tck_num", .handler = &sysfsgpio_handle_jtag_gpionum_tck, .mode = COMMAND_CONFIG, .help = "gpio number for tck.", .usage = "[tck]", }, { - .name = "sysfsgpio_tms_num", + .name = "tms_num", .handler = &sysfsgpio_handle_jtag_gpionum_tms, .mode = COMMAND_CONFIG, .help = "gpio number for tms.", .usage = "[tms]", }, { - .name = "sysfsgpio_tdo_num", + .name = "tdo_num", .handler = &sysfsgpio_handle_jtag_gpionum_tdo, .mode = COMMAND_CONFIG, .help = "gpio number for tdo.", .usage = "[tdo]", }, { - .name = "sysfsgpio_tdi_num", + .name = "tdi_num", .handler = &sysfsgpio_handle_jtag_gpionum_tdi, .mode = COMMAND_CONFIG, .help = "gpio number for tdi.", .usage = "[tdi]", }, { - .name = "sysfsgpio_srst_num", + .name = "srst_num", .handler = &sysfsgpio_handle_jtag_gpionum_srst, .mode = COMMAND_CONFIG, .help = "gpio number for srst.", .usage = "[srst]", }, { - .name = "sysfsgpio_trst_num", + .name = "trst_num", .handler = &sysfsgpio_handle_jtag_gpionum_trst, .mode = COMMAND_CONFIG, .help = "gpio number for trst.", .usage = "[trst]", }, { - .name = "sysfsgpio_swd_nums", + .name = "swd_nums", .handler = &sysfsgpio_handle_swd_gpionums, .mode = COMMAND_CONFIG, .help = "gpio numbers for swclk, swdio. (in that order)", .usage = "[swclk swdio]", }, { - .name = "sysfsgpio_swclk_num", + .name = "swclk_num", .handler = &sysfsgpio_handle_swd_gpionum_swclk, .mode = COMMAND_CONFIG, .help = "gpio number for swclk.", .usage = "[swclk]", }, { - .name = "sysfsgpio_swdio_num", + .name = "swdio_num", .handler = &sysfsgpio_handle_swd_gpionum_swdio, .mode = COMMAND_CONFIG, .help = "gpio number for swdio.", @@ -542,6 +542,17 @@ static const struct command_registration sysfsgpio_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration sysfsgpio_command_handlers[] = { + { + .name = "sysfsgpio", + .mode = COMMAND_ANY, + .help = "perform sysfsgpio management", + .chain = sysfsgpio_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static int sysfsgpio_init(void); static int sysfsgpio_quit(void); diff --git a/src/jtag/drivers/ti_icdi_usb.c b/src/jtag/drivers/ti_icdi_usb.c index 00b2f9675..d911fdacb 100644 --- a/src/jtag/drivers/ti_icdi_usb.c +++ b/src/jtag/drivers/ti_icdi_usb.c @@ -122,7 +122,7 @@ static int icdi_send_packet(void *handle, int len) int result, retry = 0; int transferred = 0; - assert(handle != NULL); + assert(handle); /* check we have a large enough buffer for checksum "#00" */ if (len + 3 > h->max_packet) { @@ -253,7 +253,7 @@ static int icdi_get_cmd_result(void *handle) int offset = 0; char ch; - assert(handle != NULL); + assert(handle); do { ch = h->read_buffer[offset++]; diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c index fe95e7d18..3ae5cac62 100644 --- a/src/jtag/drivers/ulink.c +++ b/src/jtag/drivers/ulink.c @@ -531,14 +531,14 @@ static int ulink_allocate_payload(struct ulink_cmd *ulink_cmd, int size, payload = calloc(size, sizeof(uint8_t)); - if (payload == NULL) { + if (!payload) { LOG_ERROR("Could not allocate OpenULINK command payload: out of memory"); return ERROR_FAIL; } switch (direction) { case PAYLOAD_DIRECTION_OUT: - if (ulink_cmd->payload_out != NULL) { + if (ulink_cmd->payload_out) { LOG_ERROR("BUG: Duplicate payload allocation for OpenULINK command"); free(payload); return ERROR_FAIL; @@ -548,7 +548,7 @@ static int ulink_allocate_payload(struct ulink_cmd *ulink_cmd, int size, } break; case PAYLOAD_DIRECTION_IN: - if (ulink_cmd->payload_in_start != NULL) { + if (ulink_cmd->payload_in_start) { LOG_ERROR("BUG: Duplicate payload allocation for OpenULINK command"); free(payload); return ERROR_FAIL; @@ -584,7 +584,7 @@ static int ulink_get_queue_size(struct ulink *device, struct ulink_cmd *current = device->queue_start; int sum = 0; - while (current != NULL) { + while (current) { switch (direction) { case PAYLOAD_DIRECTION_OUT: sum += current->payload_out_size + 1; /* + 1 byte for Command ID */ @@ -612,7 +612,7 @@ static void ulink_clear_queue(struct ulink *device) struct ulink_cmd *current = device->queue_start; struct ulink_cmd *next = NULL; - while (current != NULL) { + while (current) { /* Save pointer to next element */ next = current->next; @@ -673,7 +673,7 @@ static int ulink_append_queue(struct ulink *device, struct ulink_cmd *ulink_cmd) ulink_clear_queue(device); } - if (device->queue_start == NULL) { + if (!device->queue_start) { /* Queue was empty */ device->commands_in_queue = 1; @@ -877,7 +877,7 @@ static int ulink_append_scan_cmd(struct ulink *device, enum scan_type scan_type, int ret, i, scan_size_bytes; uint8_t bits_last_byte; - if (cmd == NULL) + if (!cmd) return ERROR_FAIL; /* Check size of command. USB buffer can hold 64 bytes, 1 byte is command ID, @@ -975,7 +975,7 @@ static int ulink_append_clock_tms_cmd(struct ulink *device, uint8_t count, struct ulink_cmd *cmd = calloc(1, sizeof(struct ulink_cmd)); int ret; - if (cmd == NULL) + if (!cmd) return ERROR_FAIL; if (device->delay_clock_tms < 0) @@ -1011,7 +1011,7 @@ static int ulink_append_clock_tck_cmd(struct ulink *device, uint16_t count) struct ulink_cmd *cmd = calloc(1, sizeof(struct ulink_cmd)); int ret; - if (cmd == NULL) + if (!cmd) return ERROR_FAIL; if (device->delay_clock_tck < 0) @@ -1044,7 +1044,7 @@ static int ulink_append_get_signals_cmd(struct ulink *device) struct ulink_cmd *cmd = calloc(1, sizeof(struct ulink_cmd)); int ret; - if (cmd == NULL) + if (!cmd) return ERROR_FAIL; cmd->id = CMD_GET_SIGNALS; @@ -1084,7 +1084,7 @@ static int ulink_append_set_signals_cmd(struct ulink *device, uint8_t low, struct ulink_cmd *cmd = calloc(1, sizeof(struct ulink_cmd)); int ret; - if (cmd == NULL) + if (!cmd) return ERROR_FAIL; cmd->id = CMD_SET_SIGNALS; @@ -1116,7 +1116,7 @@ static int ulink_append_sleep_cmd(struct ulink *device, uint32_t us) struct ulink_cmd *cmd = calloc(1, sizeof(struct ulink_cmd)); int ret; - if (cmd == NULL) + if (!cmd) return ERROR_FAIL; cmd->id = CMD_SLEEP_US; @@ -1153,7 +1153,7 @@ static int ulink_append_configure_tck_cmd(struct ulink *device, int delay_scan_i struct ulink_cmd *cmd = calloc(1, sizeof(struct ulink_cmd)); int ret; - if (cmd == NULL) + if (!cmd) return ERROR_FAIL; cmd->id = CMD_CONFIGURE_TCK_FREQ; @@ -1214,7 +1214,7 @@ static int ulink_append_led_cmd(struct ulink *device, uint8_t led_state) struct ulink_cmd *cmd = calloc(1, sizeof(struct ulink_cmd)); int ret; - if (cmd == NULL) + if (!cmd) return ERROR_FAIL; cmd->id = CMD_SET_LEDS; @@ -1244,7 +1244,7 @@ static int ulink_append_test_cmd(struct ulink *device) struct ulink_cmd *cmd = calloc(1, sizeof(struct ulink_cmd)); int ret; - if (cmd == NULL) + if (!cmd) return ERROR_FAIL; cmd->id = CMD_TEST; @@ -1491,7 +1491,7 @@ static int ulink_queue_scan(struct ulink *device, struct jtag_command *cmd) if ((type == SCAN_IN) || (type == SCAN_IO)) { tdo_buffer_start = calloc(sizeof(uint8_t), scan_size_bytes); - if (tdo_buffer_start == NULL) + if (!tdo_buffer_start) return ERROR_FAIL; tdo_buffer = tdo_buffer_start; @@ -1569,9 +1569,9 @@ static int ulink_queue_scan(struct ulink *device, struct jtag_command *cmd) bytecount -= 58; /* Update TDI and TDO buffer pointers */ - if (tdi_buffer_start != NULL) + if (tdi_buffer_start) tdi_buffer += 58; - if (tdo_buffer_start != NULL) + if (tdo_buffer_start) tdo_buffer += 58; } else if (bytecount == 58) { /* Full scan, no further scans */ tms_count_end = last_tms_count; @@ -1871,12 +1871,12 @@ static int ulink_post_process_queue(struct ulink *device) current = device->queue_start; - while (current != NULL) { + while (current) { openocd_cmd = current->cmd_origin; /* Check if a corresponding OpenOCD command is stored for this * OpenULINK command */ - if ((current->needs_postprocessing == true) && (openocd_cmd != NULL)) { + if ((current->needs_postprocessing == true) && (openocd_cmd)) { switch (openocd_cmd->type) { case JTAG_SCAN: ret = ulink_post_process_scan(current); @@ -2122,7 +2122,7 @@ static int ulink_init(void) uint8_t input_signals, output_signals; ulink_handle = calloc(1, sizeof(struct ulink)); - if (ulink_handle == NULL) + if (!ulink_handle) return ERROR_FAIL; libusb_init(&ulink_handle->libusb_ctx); @@ -2258,9 +2258,9 @@ COMMAND_HANDLER(ulink_download_firmware_handler) /*************************** Command Registration **************************/ -static const struct command_registration ulink_command_handlers[] = { +static const struct command_registration ulink_subcommand_handlers[] = { { - .name = "ulink_download_firmware", + .name = "download_firmware", .handler = &ulink_download_firmware_handler, .mode = COMMAND_EXEC, .help = "download firmware image to ULINK device", @@ -2269,6 +2269,17 @@ static const struct command_registration ulink_command_handlers[] = { COMMAND_REGISTRATION_DONE, }; +static const struct command_registration ulink_command_handlers[] = { + { + .name = "ulink", + .mode = COMMAND_ANY, + .help = "perform ulink management", + .chain = ulink_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static struct jtag_interface ulink_interface = { .execute_queue = ulink_execute_queue, }; diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c index aa7c240ee..cc1d4758f 100644 --- a/src/jtag/drivers/usb_blaster/usb_blaster.c +++ b/src/jtag/drivers/usb_blaster/usb_blaster.c @@ -788,7 +788,7 @@ static int ublast_execute_queue(void) ublast_initial_wipeout(); } - for (cmd = jtag_command_queue; ret == ERROR_OK && cmd != NULL; + for (cmd = jtag_command_queue; ret == ERROR_OK && cmd; cmd = cmd->next) { switch (cmd->type) { case JTAG_RESET: @@ -1030,16 +1030,16 @@ COMMAND_HANDLER(ublast_firmware_command) } -static const struct command_registration ublast_command_handlers[] = { +static const struct command_registration ublast_subcommand_handlers[] = { { - .name = "usb_blaster_device_desc", + .name = "device_desc", .handler = ublast_handle_device_desc_command, .mode = COMMAND_CONFIG, .help = "set the USB device description of the USB-Blaster", .usage = "description-string", }, { - .name = "usb_blaster_vid_pid", + .name = "vid_pid", .handler = ublast_handle_vid_pid_command, .mode = COMMAND_CONFIG, .help = "the vendor ID and product ID of the USB-Blaster and " @@ -1048,21 +1048,21 @@ static const struct command_registration ublast_command_handlers[] = { .usage = "vid pid vid_uninit pid_uninit", }, { - .name = "usb_blaster_lowlevel_driver", + .name = "lowlevel_driver", .handler = ublast_handle_lowlevel_drv_command, .mode = COMMAND_CONFIG, .help = "set the lowlevel access for the USB Blaster (ftdi, ublast2)", .usage = "(ftdi|ublast2)", }, { - .name = "usb_blaster_pin", + .name = "pin", .handler = ublast_handle_pin_command, .mode = COMMAND_ANY, .help = "show or set pin state for the unused GPIO pins", .usage = "(pin6|pin8) (0|1|s|t)", }, { - .name = "usb_blaster_firmware", + .name = "firmware", .handler = &ublast_firmware_command, .mode = COMMAND_CONFIG, .help = "configure the USB-Blaster II firmware location", @@ -1071,6 +1071,17 @@ static const struct command_registration ublast_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration ublast_command_handlers[] = { + { + .name = "usb_blaster", + .mode = COMMAND_ANY, + .help = "perform usb_blaster management", + .chain = ublast_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static struct jtag_interface usb_blaster_interface = { .supported = DEBUG_CAP_TMS_SEQ, .execute_queue = ublast_execute_queue, diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtojtagraw.c b/src/jtag/drivers/versaloon/usbtoxxx/usbtojtagraw.c index f2ea175ad..bd6104935 100644 --- a/src/jtag/drivers/versaloon/usbtoxxx/usbtojtagraw.c +++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtojtagraw.c @@ -37,7 +37,7 @@ RESULT usbtojtagraw_fini(uint8_t interface_index) return usbtoxxx_fini_command(USB_TO_JTAG_RAW, interface_index); } -RESULT usbtojtagraw_config(uint8_t interface_index, uint32_t kHz) +RESULT usbtojtagraw_config(uint8_t interface_index, uint32_t khz) { uint8_t cfg_buf[4]; @@ -48,7 +48,7 @@ RESULT usbtojtagraw_config(uint8_t interface_index, uint32_t kHz) } #endif - SET_LE_U32(&cfg_buf[0], kHz); + SET_LE_U32(&cfg_buf[0], khz); return usbtoxxx_conf_command(USB_TO_JTAG_RAW, interface_index, cfg_buf, 4); } diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtopwr.c b/src/jtag/drivers/versaloon/usbtoxxx/usbtopwr.c index 16433aff5..e7568171c 100644 --- a/src/jtag/drivers/versaloon/usbtoxxx/usbtopwr.c +++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtopwr.c @@ -49,7 +49,7 @@ RESULT usbtopwr_config(uint8_t interface_index) return usbtoxxx_conf_command(USB_TO_POWER, interface_index, NULL, 0); } -RESULT usbtopwr_output(uint8_t interface_index, uint16_t mV) +RESULT usbtopwr_output(uint8_t interface_index, uint16_t millivolt) { #if PARAM_CHECK if (interface_index > 7) { @@ -58,6 +58,6 @@ RESULT usbtopwr_output(uint8_t interface_index, uint16_t mV) } #endif - return usbtoxxx_out_command(USB_TO_POWER, interface_index, (uint8_t *)&mV, + return usbtoxxx_out_command(USB_TO_POWER, interface_index, (uint8_t *)&millivolt, 2, 0); } diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtoswd.c b/src/jtag/drivers/versaloon/usbtoxxx/usbtoswd.c index cb4862fbf..23a5097c2 100644 --- a/src/jtag/drivers/versaloon/usbtoxxx/usbtoswd.c +++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtoswd.c @@ -32,7 +32,7 @@ static RESULT usbtoswd_read_callback(void *p, uint8_t *src, uint8_t *processed) { struct versaloon_pending_t *pending = (struct versaloon_pending_t *)p; - if (pending->extra_data != NULL) + if (pending->extra_data) *((uint8_t *)pending->extra_data) = src[0]; return ERROR_OK; @@ -42,7 +42,7 @@ static RESULT usbtoswd_write_callback(void *p, uint8_t *src, uint8_t *processed) { struct versaloon_pending_t *pending = (struct versaloon_pending_t *)p; - if (pending->extra_data != NULL) + if (pending->extra_data) *((uint8_t *)pending->extra_data) = src[0]; /* mark it processed to ignore other input data */ @@ -135,7 +135,7 @@ RESULT usbtoswd_transact(uint8_t interface_index, uint8_t request, parity += (request >> 4) & 1; parity &= 1; buff[0] = (request | 0x81 | (parity << 5)) & ~0x40; - if (data != NULL) + if (data) SET_LE_U32(&buff[1], *data); else memset(buff + 1, 0, 4); diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.c b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.c index b46bbe0e0..f701bb052 100644 --- a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.c +++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.c @@ -90,7 +90,7 @@ static RESULT usbtoxxx_validate_current_command_type(void) { if (type_pre > 0) { /* not the first command */ - if (NULL == usbtoxxx_buffer) { + if (!usbtoxxx_buffer) { LOG_BUG(ERRMSG_INVALID_BUFFER, TO_STR(usbtoxxx_buffer)); return ERRCODE_INVALID_BUFFER; } @@ -126,12 +126,12 @@ RESULT usbtoxxx_execute_command(void) return ERROR_FAIL; } - if (ERROR_OK != usbtoxxx_validate_current_command_type()) { + if (usbtoxxx_validate_current_command_type() != ERROR_OK) { LOG_BUG(ERRMSG_FAILURE_OPERATION, "validate previous commands"); versaloon_free_want_pos(); return ERRCODE_FAILURE_OPERATION; } - if (3 == usbtoxxx_buffer_index) { + if (usbtoxxx_buffer_index == 3) { versaloon_free_want_pos(); return ERROR_OK; } @@ -139,7 +139,7 @@ RESULT usbtoxxx_execute_command(void) versaloon_buf[0] = USB_TO_ALL; SET_LE_U16(&versaloon_buf[1], usbtoxxx_buffer_index); - if (ERROR_OK != versaloon_send_command(usbtoxxx_buffer_index, &inlen)) { + if (versaloon_send_command(usbtoxxx_buffer_index, &inlen) != ERROR_OK) { versaloon_free_want_pos(); return ERROR_FAIL; } @@ -148,7 +148,7 @@ RESULT usbtoxxx_execute_command(void) usbtoxxx_buffer_index = 0; for (i = 0; i < versaloon_pending_idx; i++) { /* check result */ - if ((0 == i) || !((versaloon_pending[i].collect) + if ((i == 0) || !((versaloon_pending[i].collect) && (versaloon_pending[i - 1].collect) && (versaloon_pending[i].cmd == versaloon_pending[i - 1].cmd))) { @@ -159,7 +159,7 @@ RESULT usbtoxxx_execute_command(void) "current dongle"); result = ERROR_FAIL; break; - } else if (USB_TO_XXX_OK != versaloon_buf[usbtoxxx_buffer_index]) { + } else if (versaloon_buf[usbtoxxx_buffer_index] != USB_TO_XXX_OK) { LOG_ERROR("%s command 0x%02x failed with 0x%02x", usbtoxxx_get_type_name(versaloon_pending[i].type), versaloon_pending[i].cmd, @@ -171,10 +171,10 @@ RESULT usbtoxxx_execute_command(void) } /* get result data */ - if (versaloon_pending[i].pos != NULL) { + if (versaloon_pending[i].pos) { uint8_t processed = 0; - if (versaloon_pending[i].callback != NULL) { + if (versaloon_pending[i].callback) { versaloon_pending[i].callback(&versaloon_pending[i], versaloon_buf + usbtoxxx_buffer_index, &processed); } @@ -182,8 +182,8 @@ RESULT usbtoxxx_execute_command(void) struct versaloon_want_pos_t *tmp; tmp = versaloon_pending[i].pos; - while (tmp != NULL) { - if ((tmp->buff != NULL) && (tmp->size > 0)) { + while (tmp) { + if ((tmp->buff) && (tmp->size > 0)) { memcpy(tmp->buff, versaloon_buf + usbtoxxx_buffer_index + tmp->offset, @@ -197,10 +197,10 @@ RESULT usbtoxxx_execute_command(void) versaloon_pending[i].pos = NULL; } } else if ((versaloon_pending[i].want_data_size > 0) - && (versaloon_pending[i].data_buffer != NULL)) { + && (versaloon_pending[i].data_buffer)) { uint8_t processed = 0; - if (versaloon_pending[i].callback != NULL) { + if (versaloon_pending[i].callback) { versaloon_pending[i].callback(&versaloon_pending[i], versaloon_buf + usbtoxxx_buffer_index, &processed); } @@ -245,8 +245,8 @@ RESULT usbtoxxx_init(void) { versaloon_pending_idx = 0; - if ((ERROR_OK != usbtoinfo_get_abilities(usbtoxxx_abilities)) || - (ERROR_OK != usbtoxxx_execute_command())) + if ((usbtoinfo_get_abilities(usbtoxxx_abilities) != ERROR_OK) || + (usbtoxxx_execute_command() != ERROR_OK)) return ERROR_FAIL; LOG_INFO("USB_TO_XXX abilities: 0x%08X:0x%08X:0x%08X", GET_LE_U32(&usbtoxxx_abilities[0]), @@ -283,7 +283,7 @@ static RESULT usbtoxxx_ensure_buffer_size(uint16_t cmdlen) memset(&context_tmp, 0, sizeof(context_tmp)); if (poll_nesting) { - if (0 == poll_context.type_pre) { + if (poll_context.type_pre == 0) { LOG_BUG("USB_TO_POLL toooooo long"); return ERROR_OK; } @@ -329,18 +329,18 @@ RESULT usbtoxxx_add_command(uint8_t type, uint8_t cmd, uint8_t *cmdbuf, /* 3 more bytes by usbtoxxx_validate_current_command_type */ /* 3 more bytes when ((0 == collect_index) || (collect_cmd != cmd)) */ - if (ERROR_OK != usbtoxxx_ensure_buffer_size(cmdlen + 6)) + if (usbtoxxx_ensure_buffer_size(cmdlen + 6) != ERROR_OK) return ERROR_FAIL; - if ((type_pre != type) || (NULL == usbtoxxx_buffer)) { - if (ERROR_OK != usbtoxxx_validate_current_command_type()) { + if ((type_pre != type) || (!usbtoxxx_buffer)) { + if (usbtoxxx_validate_current_command_type() != ERROR_OK) { LOG_BUG(ERRMSG_FAILURE_OPERATION, "validate previous commands"); return ERRCODE_FAILURE_OPERATION; } type_pre = type; } - if ((0 == collect_index) || (collect_cmd != cmd)) { + if ((collect_index == 0) || (collect_cmd != cmd)) { usbtoxxx_buffer[usbtoxxx_current_cmd_index++] = cmd; if (collect) { @@ -357,7 +357,7 @@ RESULT usbtoxxx_add_command(uint8_t type, uint8_t cmd, uint8_t *cmdbuf, SET_LE_U16(&usbtoxxx_buffer[collect_index], len_tmp); } - if (cmdbuf != NULL) { + if (cmdbuf) { memcpy(usbtoxxx_buffer + usbtoxxx_current_cmd_index, cmdbuf, cmdlen); usbtoxxx_current_cmd_index += cmdlen; } @@ -368,10 +368,10 @@ RESULT usbtoxxx_add_command(uint8_t type, uint8_t cmd, uint8_t *cmdbuf, RESULT usbtoinfo_get_abilities(uint8_t abilities[USB_TO_XXX_ABILITIES_LEN]) { - if (ERROR_OK != usbtoxxx_ensure_buffer_size(3)) + if (usbtoxxx_ensure_buffer_size(3) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != usbtoxxx_validate_current_command_type()) { + if (usbtoxxx_validate_current_command_type() != ERROR_OK) { LOG_BUG(ERRMSG_FAILURE_OPERATION, "validate previous commands"); return ERRCODE_FAILURE_OPERATION; } @@ -383,12 +383,12 @@ RESULT usbtoinfo_get_abilities(uint8_t abilities[USB_TO_XXX_ABILITIES_LEN]) RESULT usbtopoll_start(uint16_t retry_cnt, uint16_t interval_us) { - if (ERROR_OK != usbtoxxx_ensure_buffer_size(3 + 5)) + if (usbtoxxx_ensure_buffer_size(3 + 5) != ERROR_OK) return ERROR_FAIL; if (!poll_nesting) usbtoxxx_save_context(&poll_context); - if (ERROR_OK != usbtoxxx_validate_current_command_type()) { + if (usbtoxxx_validate_current_command_type() != ERROR_OK) { LOG_BUG(ERRMSG_FAILURE_OPERATION, "validate previous commands"); return ERRCODE_FAILURE_OPERATION; } @@ -410,10 +410,10 @@ RESULT usbtopoll_end(void) LOG_BUG(ERRMSG_FAILURE_OPERATION, "check poll nesting"); return ERRCODE_FAILURE_OPERATION; } - if (ERROR_OK != usbtoxxx_ensure_buffer_size(3 + 1)) + if (usbtoxxx_ensure_buffer_size(3 + 1) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != usbtoxxx_validate_current_command_type()) { + if (usbtoxxx_validate_current_command_type() != ERROR_OK) { LOG_BUG(ERRMSG_FAILURE_OPERATION, "validate previous commands"); return ERRCODE_FAILURE_OPERATION; } @@ -439,10 +439,10 @@ RESULT usbtopoll_checkok(uint8_t equ, uint16_t offset, uint8_t size, LOG_BUG(ERRMSG_FAILURE_OPERATION, "check poll nesting"); return ERRCODE_FAILURE_OPERATION; } - if (ERROR_OK != usbtoxxx_ensure_buffer_size(3 + 4 + 2 * size)) + if (usbtoxxx_ensure_buffer_size(3 + 4 + 2 * size) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != usbtoxxx_validate_current_command_type()) { + if (usbtoxxx_validate_current_command_type() != ERROR_OK) { LOG_BUG(ERRMSG_FAILURE_OPERATION, "validate previous commands"); return ERRCODE_FAILURE_OPERATION; } @@ -475,10 +475,10 @@ RESULT usbtopoll_checkfail(uint8_t equ, uint16_t offset, uint8_t size, LOG_BUG(ERRMSG_FAILURE_OPERATION, "check poll nesting"); return ERRCODE_FAILURE_OPERATION; } - if (ERROR_OK != usbtoxxx_ensure_buffer_size(3 + 4 + 2 * size)) + if (usbtoxxx_ensure_buffer_size(3 + 4 + 2 * size) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != usbtoxxx_validate_current_command_type()) { + if (usbtoxxx_validate_current_command_type() != ERROR_OK) { LOG_BUG(ERRMSG_FAILURE_OPERATION, "validate previous commands"); return ERRCODE_FAILURE_OPERATION; } @@ -504,10 +504,10 @@ RESULT usbtopoll_verifybuff(uint16_t offset, uint16_t size, uint8_t *buff) LOG_BUG(ERRMSG_FAILURE_OPERATION, "check poll nesting"); return ERRCODE_FAILURE_OPERATION; } - if (ERROR_OK != usbtoxxx_ensure_buffer_size(3 + 5 + size)) + if (usbtoxxx_ensure_buffer_size(3 + 5 + size) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != usbtoxxx_validate_current_command_type()) { + if (usbtoxxx_validate_current_command_type() != ERROR_OK) { LOG_BUG(ERRMSG_FAILURE_OPERATION, "validate previous commands"); return ERRCODE_FAILURE_OPERATION; } @@ -527,10 +527,10 @@ RESULT usbtopoll_verifybuff(uint16_t offset, uint16_t size, uint8_t *buff) RESULT usbtodelay_delay(uint16_t dly) { - if (ERROR_OK != usbtoxxx_ensure_buffer_size(3 + 2)) + if (usbtoxxx_ensure_buffer_size(3 + 2) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != usbtoxxx_validate_current_command_type()) { + if (usbtoxxx_validate_current_command_type() != ERROR_OK) { LOG_BUG(ERRMSG_FAILURE_OPERATION, "validate previous commands"); return ERRCODE_FAILURE_OPERATION; } diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h index 98a056a8b..0ae3c0353 100644 --- a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h +++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h @@ -47,7 +47,7 @@ RESULT usbtousart_status(uint8_t interface_index, /* USB_TO_SPI */ RESULT usbtospi_init(uint8_t interface_index); RESULT usbtospi_fini(uint8_t interface_index); -RESULT usbtospi_config(uint8_t interface_index, uint32_t kHz, uint8_t mode); +RESULT usbtospi_config(uint8_t interface_index, uint32_t khz, uint8_t mode); RESULT usbtospi_io(uint8_t interface_index, uint8_t *out, uint8_t *in, uint16_t bytelen); @@ -82,7 +82,7 @@ RESULT usbtolpcicp_poll_ready(uint8_t interface_index, uint8_t data, /* USB_TO_JTAG_LL */ RESULT usbtojtagll_init(uint8_t interface_index); RESULT usbtojtagll_fini(uint8_t interface_index); -RESULT usbtojtagll_config(uint8_t interface_index, uint32_t kHz); +RESULT usbtojtagll_config(uint8_t interface_index, uint32_t khz); RESULT usbtojtagll_tms(uint8_t interface_index, uint8_t *tms, uint8_t bytelen); RESULT usbtojtagll_tms_clocks(uint8_t interface_index, uint32_t bytelen, uint8_t tms); @@ -94,7 +94,7 @@ RESULT usbtojtagll_scan(uint8_t interface_index, uint8_t *data, /* USB_TO_JTAG_HL */ RESULT usbtojtaghl_init(uint8_t interface_index); RESULT usbtojtaghl_fini(uint8_t interface_index); -RESULT usbtojtaghl_config(uint8_t interface_index, uint32_t kHz, uint8_t ub, +RESULT usbtojtaghl_config(uint8_t interface_index, uint32_t khz, uint8_t ub, uint8_t ua, uint16_t bb, uint16_t ba); RESULT usbtojtaghl_ir(uint8_t interface_index, uint8_t *ir, uint16_t bitlen, uint8_t idle, uint8_t want_ret); @@ -108,7 +108,7 @@ RESULT usbtojtaghl_register_callback(uint8_t index, jtag_callback_t send_callbac /* USB_TO_JTAG_RAW */ RESULT usbtojtagraw_init(uint8_t interface_index); RESULT usbtojtagraw_fini(uint8_t interface_index); -RESULT usbtojtagraw_config(uint8_t interface_index, uint32_t kHz); +RESULT usbtojtagraw_config(uint8_t interface_index, uint32_t khz); RESULT usbtojtagraw_execute(uint8_t interface_index, uint8_t *tdi, uint8_t *tms, uint8_t *tdo, uint32_t bitlen); @@ -123,7 +123,7 @@ RESULT usbtoc2_readdata(uint8_t interface_index, uint8_t *buf, uint8_t len); /* USB_TO_I2C */ RESULT usbtoi2c_init(uint8_t interface_index); RESULT usbtoi2c_fini(uint8_t interface_index); -RESULT usbtoi2c_config(uint8_t interface_index, uint16_t kHz, +RESULT usbtoi2c_config(uint8_t interface_index, uint16_t khz, uint16_t byte_interval, uint16_t max_dly); RESULT usbtoi2c_read(uint8_t interface_index, uint16_t chip_addr, uint8_t *data, uint16_t data_len, uint8_t stop, @@ -165,7 +165,7 @@ RESULT usbtomsp430sbw_poll(uint8_t interface_index, uint32_t dr, uint32_t mask, RESULT usbtopwr_init(uint8_t interface_index); RESULT usbtopwr_fini(uint8_t interface_index); RESULT usbtopwr_config(uint8_t interface_index); -RESULT usbtopwr_output(uint8_t interface_index, uint16_t mV); +RESULT usbtopwr_output(uint8_t interface_index, uint16_t millivolt); /* USB_TO_POLL */ RESULT usbtopoll_start(uint16_t retry_cnt, uint16_t interval_us); @@ -190,14 +190,14 @@ RESULT usbtoswd_transact(uint8_t interface_index, uint8_t request, /* USB_TO_SWIM */ RESULT usbtoswim_init(uint8_t interface_index); RESULT usbtoswim_fini(uint8_t interface_index); -RESULT usbtoswim_config(uint8_t interface_index, uint8_t mHz, uint8_t cnt0, +RESULT usbtoswim_config(uint8_t interface_index, uint8_t mhz, uint8_t cnt0, uint8_t cnt1); RESULT usbtoswim_srst(uint8_t interface_index); RESULT usbtoswim_wotf(uint8_t interface_index, uint8_t *data, uint16_t bytelen, uint32_t addr); RESULT usbtoswim_rotf(uint8_t interface_index, uint8_t *data, uint16_t bytelen, uint32_t addr); -RESULT usbtoswim_sync(uint8_t interface_index, uint8_t mHz); +RESULT usbtoswim_sync(uint8_t interface_index, uint8_t mhz); RESULT usbtoswim_enable(uint8_t interface_index); /* USB_TO_BDM */ @@ -210,14 +210,14 @@ RESULT usbtobdm_transact(uint8_t interface_index, uint8_t *out, /* USB_TO_DUSI */ RESULT usbtodusi_init(uint8_t interface_index); RESULT usbtodusi_fini(uint8_t interface_index); -RESULT usbtodusi_config(uint8_t interface_index, uint32_t kHz, uint8_t mode); +RESULT usbtodusi_config(uint8_t interface_index, uint32_t khz, uint8_t mode); RESULT usbtodusi_io(uint8_t interface_index, uint8_t *mo, uint8_t *mi, uint8_t *so, uint8_t *si, uint32_t bitlen); /* USB_TO_MICROWIRE */ RESULT usbtomicrowire_init(uint8_t interface_index); RESULT usbtomicrowire_fini(uint8_t interface_index); -RESULT usbtomicrowire_config(uint8_t interface_index, uint16_t kHz, +RESULT usbtomicrowire_config(uint8_t interface_index, uint16_t khz, uint8_t sel_polarity); RESULT usbtomicrowire_transport(uint8_t interface_index, uint32_t opcode, uint8_t opcode_bitlen, @@ -230,7 +230,7 @@ RESULT usbtomicrowire_poll(uint8_t interface_index, uint16_t interval_us, /* USB_TO_PWM */ RESULT usbtopwm_init(uint8_t interface_index); RESULT usbtopwm_fini(uint8_t interface_index); -RESULT usbtopwm_config(uint8_t interface_index, uint16_t kHz, uint8_t mode); +RESULT usbtopwm_config(uint8_t interface_index, uint16_t khz, uint8_t mode); RESULT usbtopwm_out(uint8_t interface_index, uint16_t count, uint16_t *rate); RESULT usbtopwm_in(uint8_t interface_index, uint16_t count, uint16_t *rate); diff --git a/src/jtag/drivers/versaloon/versaloon.c b/src/jtag/drivers/versaloon/versaloon.c index e564d8b46..b17c1d49b 100644 --- a/src/jtag/drivers/versaloon/versaloon.c +++ b/src/jtag/drivers/versaloon/versaloon.c @@ -117,7 +117,7 @@ void versaloon_free_want_pos(void) struct versaloon_want_pos_t *tmp, *free_tmp; tmp = versaloon_want_pos; - while (tmp != NULL) { + while (tmp) { free_tmp = tmp; tmp = tmp->next; free(free_tmp); @@ -126,7 +126,7 @@ void versaloon_free_want_pos(void) for (i = 0; i < ARRAY_SIZE(versaloon_pending); i++) { tmp = versaloon_pending[i].pos; - while (tmp != NULL) { + while (tmp) { free_tmp = tmp; tmp = tmp->next; free(free_tmp); @@ -140,7 +140,7 @@ RESULT versaloon_add_want_pos(uint16_t offset, uint16_t size, uint8_t *buff) struct versaloon_want_pos_t *new_pos = NULL; new_pos = malloc(sizeof(*new_pos)); - if (NULL == new_pos) { + if (!new_pos) { LOG_ERROR(ERRMSG_NOT_ENOUGH_MEMORY); return ERRCODE_NOT_ENOUGH_MEMORY; } @@ -149,12 +149,12 @@ RESULT versaloon_add_want_pos(uint16_t offset, uint16_t size, uint8_t *buff) new_pos->buff = buff; new_pos->next = NULL; - if (NULL == versaloon_want_pos) + if (!versaloon_want_pos) versaloon_want_pos = new_pos; else { struct versaloon_want_pos_t *tmp = versaloon_want_pos; - while (tmp->next != NULL) + while (tmp->next) tmp = tmp->next; tmp->next = new_pos; } @@ -199,11 +199,11 @@ RESULT versaloon_send_command(uint16_t out_len, uint16_t *inlen) int transferred; #if PARAM_CHECK - if (NULL == versaloon_buf) { + if (!versaloon_buf) { LOG_BUG(ERRMSG_INVALID_BUFFER, TO_STR(versaloon_buf)); return ERRCODE_INVALID_BUFFER; } - if ((0 == out_len) || (out_len > versaloon_interface.usb_setting.buf_size)) { + if ((out_len == 0) || (out_len > versaloon_interface.usb_setting.buf_size)) { LOG_BUG(ERRMSG_INVALID_PARAMETER, __func__); return ERRCODE_INVALID_PARAMETER; } @@ -212,17 +212,17 @@ RESULT versaloon_send_command(uint16_t out_len, uint16_t *inlen) ret = libusb_bulk_transfer(versaloon_usb_device_handle, versaloon_interface.usb_setting.ep_out, versaloon_buf, out_len, &transferred, versaloon_usb_to); - if (0 != ret || transferred != out_len) { + if (ret != 0 || transferred != out_len) { LOG_ERROR(ERRMSG_FAILURE_OPERATION, "send usb data"); return ERRCODE_FAILURE_OPERATION; } - if (inlen != NULL) { + if (inlen) { ret = libusb_bulk_transfer(versaloon_usb_device_handle, versaloon_interface.usb_setting.ep_in, versaloon_buf, versaloon_interface.usb_setting.buf_size, &transferred, versaloon_usb_to); - if (0 == ret) { + if (ret == 0) { *inlen = (uint16_t)transferred; return ERROR_OK; } else { @@ -242,7 +242,7 @@ static RESULT versaloon_init(void) /* malloc temporary buffer */ versaloon_buf = malloc(versaloon_interface.usb_setting.buf_size); - if (NULL == versaloon_buf) { + if (!versaloon_buf) { LOG_ERROR(ERRMSG_NOT_ENOUGH_MEMORY); return ERRCODE_NOT_ENOUGH_MEMORY; } @@ -254,11 +254,11 @@ static RESULT versaloon_init(void) versaloon_usb_to = 100; for (retry = 0; retry < VERSALOON_RETRY_CNT; retry++) { versaloon_buf[0] = VERSALOON_GET_INFO; - if ((ERROR_OK == versaloon_send_command(1, &ret)) && (ret >= 3)) + if ((versaloon_send_command(1, &ret) == ERROR_OK) && (ret >= 3)) break; } versaloon_usb_to = timeout_tmp; - if (VERSALOON_RETRY_CNT == retry) { + if (retry == VERSALOON_RETRY_CNT) { versaloon_fini(); LOG_ERROR(ERRMSG_FAILURE_OPERATION, "communicate with versaloon"); return ERRCODE_FAILURE_OPERATION; @@ -274,18 +274,18 @@ static RESULT versaloon_init(void) versaloon_buf = NULL; versaloon_buf = malloc(versaloon_interface.usb_setting.buf_size); - if (NULL == versaloon_buf) { + if (!versaloon_buf) { versaloon_fini(); LOG_ERROR(ERRMSG_NOT_ENOUGH_MEMORY); return ERRCODE_NOT_ENOUGH_MEMORY; } versaloon_cmd_buf = malloc(versaloon_interface.usb_setting.buf_size - 3); - if (NULL == versaloon_cmd_buf) { + if (!versaloon_cmd_buf) { versaloon_fini(); LOG_ERROR(ERRMSG_NOT_ENOUGH_MEMORY); return ERRCODE_NOT_ENOUGH_MEMORY; } - if (ERROR_OK != usbtoxxx_init()) { + if (usbtoxxx_init() != ERROR_OK) { LOG_ERROR(ERRMSG_FAILURE_OPERATION, "initialize usbtoxxx"); return ERROR_FAIL; } @@ -294,7 +294,7 @@ static RESULT versaloon_init(void) static RESULT versaloon_fini(void) { - if (versaloon_usb_device_handle != NULL) { + if (versaloon_usb_device_handle) { usbtoxxx_fini(); versaloon_free_want_pos(); @@ -325,11 +325,11 @@ static RESULT versaloon_get_target_voltage(uint16_t *voltage) uint16_t inlen; #if PARAM_CHECK - if (NULL == versaloon_buf) { + if (!versaloon_buf) { LOG_BUG(ERRMSG_INVALID_BUFFER, TO_STR(versaloon_buf)); return ERRCODE_INVALID_BUFFER; } - if (NULL == voltage) { + if (!voltage) { LOG_BUG(ERRMSG_INVALID_PARAMETER, __func__); return ERRCODE_INVALID_PARAMETER; } @@ -337,7 +337,7 @@ static RESULT versaloon_get_target_voltage(uint16_t *voltage) versaloon_buf[0] = VERSALOON_GET_TVCC; - if ((ERROR_OK != versaloon_send_command(1, &inlen)) || (inlen != 2)) { + if ((versaloon_send_command(1, &inlen) != ERROR_OK) || (inlen != 2)) { LOG_ERROR(ERRMSG_FAILURE_OPERATION, "communicate with versaloon"); return ERRCODE_FAILURE_OPERATION; } else { diff --git a/src/jtag/drivers/versaloon/versaloon.h b/src/jtag/drivers/versaloon/versaloon.h index fcf223574..22e73fb35 100644 --- a/src/jtag/drivers/versaloon/versaloon.h +++ b/src/jtag/drivers/versaloon/versaloon.h @@ -69,7 +69,7 @@ struct interface_swd_t { struct interface_jtag_raw_t { RESULT(*init)(uint8_t interface_index); RESULT(*fini)(uint8_t interface_index); - RESULT(*config)(uint8_t interface_index, uint32_t kHz); + RESULT(*config)(uint8_t interface_index, uint32_t khz); RESULT(*execute)(uint8_t interface_index, uint8_t *tdi, uint8_t *tms, uint8_t *tdo, uint32_t bitlen); }; diff --git a/src/jtag/drivers/vsllink.c b/src/jtag/drivers/vsllink.c index f08fa9165..7325f6abc 100644 --- a/src/jtag/drivers/vsllink.c +++ b/src/jtag/drivers/vsllink.c @@ -105,7 +105,7 @@ static int vsllink_execute_queue(void) " vsllink " "-------------------------------------"); - while (cmd != NULL) { + while (cmd) { switch (cmd->type) { case JTAG_RUNTEST: LOG_DEBUG_IO("runtest %i cycles, end in %s", @@ -280,14 +280,14 @@ static int vsllink_quit(void) static int vsllink_interface_init(void) { vsllink_handle = malloc(sizeof(struct vsllink)); - if (NULL == vsllink_handle) { + if (!vsllink_handle) { LOG_ERROR("unable to allocate memory"); return ERROR_FAIL; } libusb_init(&vsllink_handle->libusb_ctx); - if (ERROR_OK != vsllink_usb_open(vsllink_handle)) { + if (vsllink_usb_open(vsllink_handle) != ERROR_OK) { LOG_ERROR("Can't find USB JTAG Interface!" "Please check connection and permissions."); return ERROR_JTAG_INIT_FAILED; @@ -297,7 +297,7 @@ static int vsllink_interface_init(void) versaloon_interface.usb_setting.pid); versaloon_usb_device_handle = vsllink_handle->usb_device_handle; - if (ERROR_OK != versaloon_interface.init()) + if (versaloon_interface.init() != ERROR_OK) return ERROR_FAIL; if (versaloon_interface.usb_setting.buf_size < 32) { versaloon_interface.fini(); @@ -310,7 +310,7 @@ static int vsllink_interface_init(void) static int vsllink_init(void) { int retval = vsllink_interface_init(); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; versaloon_interface.adaptors.gpio.init(0); @@ -333,7 +333,7 @@ static int vsllink_init(void) tdi_buffer = malloc(tap_buffer_size); tdo_buffer = malloc(tap_buffer_size); tms_buffer = malloc(tap_buffer_size); - if ((NULL == tdi_buffer) || (NULL == tdo_buffer) || (NULL == tms_buffer)) { + if ((!tdi_buffer) || (!tdo_buffer) || (!tms_buffer)) { vsllink_quit(); return ERROR_FAIL; } @@ -344,7 +344,7 @@ static int vsllink_init(void) GPIO_TRST, GPIO_SRST, GPIO_SRST); } - if (ERROR_OK != versaloon_interface.adaptors.peripheral_commit()) + if (versaloon_interface.adaptors.peripheral_commit() != ERROR_OK) return ERROR_FAIL; vsllink_reset(0, 0); @@ -785,7 +785,7 @@ static int vsllink_check_usb_strings( char desc_string[256]; int retval; - if (NULL != versaloon_interface.usb_setting.serialstring) { + if (versaloon_interface.usb_setting.serialstring) { retval = libusb_get_string_descriptor_ascii(usb_device_handle, usb_desc->iSerialNumber, (unsigned char *)desc_string, sizeof(desc_string)); @@ -803,7 +803,7 @@ static int vsllink_check_usb_strings( if (retval < 0) return ERROR_FAIL; - if (strstr(desc_string, "Versaloon") == NULL) + if (!strstr(desc_string, "Versaloon")) return ERROR_FAIL; return ERROR_OK; @@ -838,7 +838,7 @@ static int vsllink_usb_open(struct vsllink *vsllink) continue; retval = vsllink_check_usb_strings(usb_device_handle, &usb_desc); - if (ERROR_OK == retval) + if (retval == ERROR_OK) break; libusb_close(usb_device_handle); @@ -887,44 +887,44 @@ static void vsllink_debug_buffer(uint8_t *buffer, int length) } } -static const struct command_registration vsllink_command_handlers[] = { +static const struct command_registration vsllink_subcommand_handlers[] = { { - .name = "vsllink_usb_vid", + .name = "usb_vid", .handler = &vsllink_handle_usb_vid_command, .mode = COMMAND_CONFIG, .help = "Set USB VID", .usage = "", }, { - .name = "vsllink_usb_pid", + .name = "usb_pid", .handler = &vsllink_handle_usb_pid_command, .mode = COMMAND_CONFIG, .help = "Set USB PID", .usage = "", }, { - .name = "vsllink_usb_serial", + .name = "usb_serial", .handler = &vsllink_handle_usb_serial_command, .mode = COMMAND_CONFIG, .help = "Set or disable check for USB serial", .usage = "[]", }, { - .name = "vsllink_usb_bulkin", + .name = "usb_bulkin", .handler = &vsllink_handle_usb_bulkin_command, .mode = COMMAND_CONFIG, .help = "Set USB input endpoint", .usage = "", }, { - .name = "vsllink_usb_bulkout", + .name = "usb_bulkout", .handler = &vsllink_handle_usb_bulkout_command, .mode = COMMAND_CONFIG, .help = "Set USB output endpoint", .usage = "", }, { - .name = "vsllink_usb_interface", + .name = "usb_interface", .handler = &vsllink_handle_usb_interface_command, .mode = COMMAND_CONFIG, .help = "Set USB output interface", @@ -933,6 +933,17 @@ static const struct command_registration vsllink_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration vsllink_command_handlers[] = { + { + .name = "vsllink", + .mode = COMMAND_ANY, + .help = "perform vsllink management", + .chain = vsllink_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static const char * const vsllink_transports[] = {"jtag", "swd", NULL}; static const struct swd_driver vsllink_swd_driver = { diff --git a/src/jtag/drivers/xds110.c b/src/jtag/drivers/xds110.c index 85a1b81db..243577d7c 100644 --- a/src/jtag/drivers/xds110.c +++ b/src/jtag/drivers/xds110.c @@ -341,7 +341,7 @@ static bool usb_connect(void) /* Initialize libusb context */ result = libusb_init(&ctx); - if (0 == result) { + if (result == 0) { /* Get list of USB devices attached to system */ count = libusb_get_device_list(ctx, &list); if (count <= 0) { @@ -350,7 +350,7 @@ static bool usb_connect(void) } } - if (0 == result) { + if (result == 0) { /* Scan through list of devices for any XDS110s */ for (i = 0; i < count; i++) { /* Check for device vid/pid match */ @@ -365,13 +365,13 @@ static bool usb_connect(void) } if (match) { result = libusb_open(list[i], &dev); - if (0 == result) { + if (result == 0) { const int max_data = 256; unsigned char data[max_data + 1]; *data = '\0'; /* May be the requested device if serial number matches */ - if (0 == xds110.serial[0]) { + if (xds110.serial[0] == 0) { /* No serial number given; match first XDS110 found */ found = true; break; @@ -379,8 +379,8 @@ static bool usb_connect(void) /* Get the device's serial number string */ result = libusb_get_string_descriptor_ascii(dev, desc.iSerialNumber, data, max_data); - if (0 < result && - 0 == strcmp((char *)data, (char *)xds110.serial)) { + if (result > 0 && + strcmp((char *)data, (char *)xds110.serial) == 0) { found = true; break; } @@ -400,7 +400,7 @@ static bool usb_connect(void) * 2) didn't find the XDS110, and no devices are currently open */ - if (NULL != list) { + if (list) { /* Free the device list, we're done with it */ libusb_free_device_list(list, 1); } @@ -430,36 +430,36 @@ static bool usb_connect(void) } /* On an error, clean up what we can */ - if (0 != result) { - if (NULL != dev) { + if (result != 0) { + if (dev) { /* Release the debug and data interface on the XDS110 */ (void)libusb_release_interface(dev, xds110.interface); libusb_close(dev); } - if (NULL != ctx) + if (ctx) libusb_exit(ctx); xds110.ctx = NULL; xds110.dev = NULL; } /* Log the results */ - if (0 == result) + if (result == 0) LOG_INFO("XDS110: connected"); else LOG_ERROR("XDS110: failed to connect"); - return (0 == result) ? true : false; + return (result == 0) ? true : false; } static void usb_disconnect(void) { - if (NULL != xds110.dev) { + if (xds110.dev) { /* Release the debug and data interface on the XDS110 */ (void)libusb_release_interface(xds110.dev, xds110.interface); libusb_close(xds110.dev); xds110.dev = NULL; } - if (NULL != xds110.ctx) { + if (xds110.ctx) { libusb_exit(xds110.ctx); xds110.ctx = NULL; } @@ -472,17 +472,17 @@ static bool usb_read(unsigned char *buffer, int size, int *bytes_read, { int result; - if (NULL == xds110.dev || NULL == buffer || NULL == bytes_read) + if (!xds110.dev || !buffer || !bytes_read) return false; /* Force a non-zero timeout to prevent blocking */ - if (0 == timeout) + if (timeout == 0) timeout = DEFAULT_TIMEOUT; result = libusb_bulk_transfer(xds110.dev, xds110.endpoint_in, buffer, size, bytes_read, timeout); - return (0 == result) ? true : false; + return (result == 0) ? true : false; } static bool usb_write(unsigned char *buffer, int size, int *written) @@ -491,13 +491,13 @@ static bool usb_write(unsigned char *buffer, int size, int *written) int result = LIBUSB_SUCCESS; int retries = 0; - if (NULL == xds110.dev || NULL == buffer) + if (!xds110.dev || !buffer) return false; result = libusb_bulk_transfer(xds110.dev, xds110.endpoint_out, buffer, size, &bytes_written, 0); - while (LIBUSB_ERROR_PIPE == result && retries < 3) { + while (result == LIBUSB_ERROR_PIPE && retries < 3) { /* Try clearing the pipe stall and retry transfer */ libusb_clear_halt(xds110.dev, xds110.endpoint_out); result = libusb_bulk_transfer(xds110.dev, xds110.endpoint_out, buffer, @@ -505,10 +505,10 @@ static bool usb_write(unsigned char *buffer, int size, int *written) retries++; } - if (NULL != written) + if (written) *written = bytes_written; - return (0 == result && size == bytes_written) ? true : false; + return (result == 0 && size == bytes_written) ? true : false; } static bool usb_get_response(uint32_t *total_bytes_read, uint32_t timeout) @@ -550,7 +550,7 @@ static bool usb_get_response(uint32_t *total_bytes_read, uint32_t timeout) /* Abort now if we didn't receive a valid response */ if (!success) { - if (NULL != total_bytes_read) + if (total_bytes_read) *total_bytes_read = 0; return false; } @@ -587,7 +587,7 @@ static bool usb_get_response(uint32_t *total_bytes_read, uint32_t timeout) if (!success) count = 0; - if (NULL != total_bytes_read) + if (total_bytes_read) *total_bytes_read = count; return success; @@ -636,7 +636,7 @@ static bool xds_execute(uint32_t out_length, uint32_t in_length, int error = 0; uint32_t bytes_read = 0; - if (NULL == xds110.dev) + if (!xds110.dev) return false; while (!done && attempts > 0) { @@ -661,7 +661,7 @@ static bool xds_execute(uint32_t out_length, uint32_t in_length, /* Extract error code from return packet */ error = (int)xds110_get_u32(&xds110.read_payload[0]); done = true; - if (SC_ERR_NONE != error) + if (error != SC_ERR_NONE) LOG_DEBUG("XDS110: command 0x%02x returned error %d", xds110.write_payload[0], error); } @@ -671,7 +671,7 @@ static bool xds_execute(uint32_t out_length, uint32_t in_length, if (!success) error = SC_ERR_XDS110_FAIL; - if (0 != error) + if (error != 0) success = false; return success; @@ -714,9 +714,9 @@ static bool xds_version(uint32_t *firmware_id, uint16_t *hardware_id) DEFAULT_TIMEOUT); if (success) { - if (NULL != firmware_id) + if (firmware_id) *firmware_id = xds110_get_u32(fw_id_pntr); - if (NULL != hardware_id) + if (hardware_id) *hardware_id = xds110_get_u16(hw_id_pntr); } @@ -863,7 +863,7 @@ static bool cmapi_connect(uint32_t *idcode) DEFAULT_TIMEOUT); if (success) { - if (NULL != idcode) + if (idcode) *idcode = xds110_get_u32(idcode_pntr); } @@ -926,7 +926,7 @@ static bool cmapi_read_dap_reg(uint32_t type, uint32_t ap_num, DEFAULT_TIMEOUT); if (success) { - if (NULL != value) + if (value) *value = xds110_get_u32(value_pntr); } @@ -943,7 +943,7 @@ static bool cmapi_write_dap_reg(uint32_t type, uint32_t ap_num, bool success; - if (NULL == value) + if (!value) return false; xds110.write_payload[0] = CMAPI_REG_WRITE; @@ -1021,7 +1021,7 @@ static bool xds_set_supply(uint32_t voltage) xds110.write_payload[0] = XDS_SET_SUPPLY; xds110_set_u32(volts_pntr, voltage); - *source_pntr = (uint8_t)(0 != voltage ? 1 : 0); + *source_pntr = (uint8_t)(voltage != 0 ? 1 : 0); success = xds_execute(XDS_OUT_LEN + 5, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); @@ -1037,7 +1037,7 @@ static bool ocd_dap_request(uint8_t *dap_requests, uint32_t request_size, bool success; - if (NULL == dap_requests || NULL == dap_results) + if (!dap_requests || !dap_results) return false; xds110.write_payload[0] = OCD_DAP_REQUEST; @@ -1062,7 +1062,7 @@ static bool ocd_scan_request(uint8_t *scan_requests, uint32_t request_size, bool success; - if (NULL == scan_requests || NULL == scan_results) + if (!scan_requests || !scan_results) return false; xds110.write_payload[0] = OCD_SCAN_REQUEST; @@ -1086,7 +1086,7 @@ static bool ocd_pathmove(uint32_t num_states, uint8_t *path) bool success; - if (NULL == path) + if (!path) return false; xds110.write_payload[0] = OCD_PATHMOVE; @@ -1165,9 +1165,9 @@ static int xds110_swd_switch_seq(enum swd_special_seq seq) static bool xds110_legacy_read_reg(uint8_t cmd, uint32_t *value) { /* Make sure this is a read request */ - bool is_read_request = (0 != (SWD_CMD_RnW & cmd)); + bool is_read_request = (0 != (SWD_CMD_RNW & cmd)); /* Determine whether this is a DP or AP register access */ - uint32_t type = (0 != (SWD_CMD_APnDP & cmd)) ? DAP_AP : DAP_DP; + uint32_t type = (0 != (SWD_CMD_APNDP & cmd)) ? DAP_AP : DAP_DP; /* Determine the AP number from cached SELECT value */ uint32_t ap_num = (xds110.select & 0xff000000) >> 24; /* Extract register address from command */ @@ -1183,7 +1183,7 @@ static bool xds110_legacy_read_reg(uint8_t cmd, uint32_t *value) if (!is_read_request) return false; - if (DAP_AP == type) { + if (type == DAP_AP) { /* Add bank address to register address for CMAPI call */ address |= bank; } @@ -1209,7 +1209,7 @@ static bool xds110_legacy_read_reg(uint8_t cmd, uint32_t *value) /* Handle result of read attempt */ if (!success) LOG_ERROR("XDS110: failed to read DAP register"); - else if (NULL != value) + else if (value) *value = reg_value; if (success && DAP_AP == type) { @@ -1227,9 +1227,9 @@ static bool xds110_legacy_read_reg(uint8_t cmd, uint32_t *value) static bool xds110_legacy_write_reg(uint8_t cmd, uint32_t value) { /* Make sure this isn't a read request */ - bool is_read_request = (0 != (SWD_CMD_RnW & cmd)); + bool is_read_request = (0 != (SWD_CMD_RNW & cmd)); /* Determine whether this is a DP or AP register access */ - uint32_t type = (0 != (SWD_CMD_APnDP & cmd)) ? DAP_AP : DAP_DP; + uint32_t type = (0 != (SWD_CMD_APNDP & cmd)) ? DAP_AP : DAP_DP; /* Determine the AP number from cached SELECT value */ uint32_t ap_num = (xds110.select & 0xff000000) >> 24; /* Extract register address from command */ @@ -1245,12 +1245,12 @@ static bool xds110_legacy_write_reg(uint8_t cmd, uint32_t value) /* Invalidate the RDBUFF cache */ xds110.use_rdbuff = false; - if (DAP_AP == type) { + if (type == DAP_AP) { /* Add bank address to register address for CMAPI call */ address |= bank; /* Any write to an AP register invalidates the firmware's cache */ xds110.is_ap_dirty = true; - } else if (DAP_DP_SELECT == address) { + } else if (address == DAP_DP_SELECT) { /* Any write to the SELECT register invalidates the firmware's cache */ xds110.is_ap_dirty = true; } @@ -1264,7 +1264,7 @@ static bool xds110_legacy_write_reg(uint8_t cmd, uint32_t value) * If the debugger wrote to SELECT, cache the value * to use to build the apNum and address values above */ - if ((DAP_DP == type) && (DAP_DP_SELECT == address)) + if ((type == DAP_DP) && (address == DAP_DP_SELECT)) xds110.select = value; } @@ -1280,7 +1280,7 @@ static int xds110_swd_run_queue(void) uint32_t value; bool success = true; - if (0 == xds110.txn_request_size) + if (xds110.txn_request_size == 0) return ERROR_OK; /* Terminate request queue */ @@ -1296,7 +1296,7 @@ static int xds110_swd_run_queue(void) result = 0; while (xds110.txn_requests[request] != 0) { cmd = xds110.txn_requests[request++]; - if (0 == (SWD_CMD_RnW & cmd)) { + if (0 == (SWD_CMD_RNW & cmd)) { /* DAP register write command */ value = (uint32_t)(xds110.txn_requests[request++]) << 0; value |= (uint32_t)(xds110.txn_requests[request++]) << 8; @@ -1316,7 +1316,7 @@ static int xds110_swd_run_queue(void) /* Transfer results into caller's buffers */ for (result = 0; result < xds110.txn_result_count; result++) - if (0 != xds110.txn_dap_results[result]) + if (xds110.txn_dap_results[result] != 0) *xds110.txn_dap_results[result] = dap_results[result]; xds110.txn_request_size = 0; @@ -1329,9 +1329,9 @@ static int xds110_swd_run_queue(void) static void xds110_swd_queue_cmd(uint8_t cmd, uint32_t *value) { /* Check if this is a read or write request */ - bool is_read_request = (0 != (SWD_CMD_RnW & cmd)); + bool is_read_request = (0 != (SWD_CMD_RNW & cmd)); /* Determine whether this is a DP or AP register access */ - uint32_t type = (0 != (SWD_CMD_APnDP & cmd)) ? DAP_AP : DAP_DP; + uint32_t type = (0 != (SWD_CMD_APNDP & cmd)) ? DAP_AP : DAP_DP; /* Extract register address from command */ uint32_t address = ((cmd & SWD_CMD_A32) >> 1); uint32_t request_size = (is_read_request) ? 1 : 5; @@ -1395,7 +1395,7 @@ static void xds110_show_info(void) (((firmware >> 12) & 0xf) * 10) + ((firmware >> 8) & 0xf), (((firmware >> 4) & 0xf) * 10) + ((firmware >> 0) & 0xf)); LOG_INFO("XDS110: hardware version = 0x%04x", xds110.hardware); - if (0 != xds110.serial[0]) + if (xds110.serial[0] != 0) LOG_INFO("XDS110: serial number = %s", xds110.serial); if (xds110.is_swd_mode) { LOG_INFO("XDS110: connected to target via SWD"); @@ -1470,12 +1470,12 @@ static int xds110_init(void) if (success) { /* Set supply voltage for stand-alone probes */ - if (XDS110_STAND_ALONE_ID == xds110.hardware) { + if (xds110.hardware == XDS110_STAND_ALONE_ID) { success = xds_set_supply(xds110.voltage); /* Allow time for target device to power up */ /* (CC32xx takes up to 1300 ms before debug is enabled) */ alive_sleep(1500); - } else if (0 != xds110.voltage) { + } else if (xds110.voltage != 0) { /* Voltage supply not a feature of embedded probes */ LOG_WARNING( "XDS110: ignoring supply voltage, not supported on this probe"); @@ -1557,7 +1557,7 @@ static void xds110_flush(void) uint8_t data_in[MAX_DATA_BLOCK]; uint8_t *data_pntr; - if (0 == xds110.txn_request_size) + if (xds110.txn_request_size == 0) return; /* Terminate request queue */ @@ -1867,7 +1867,7 @@ static int xds110_execute_queue(void) { struct jtag_command *cmd = jtag_command_queue; - while (cmd != NULL) { + while (cmd) { xds110_execute_command(cmd); cmd = cmd->next; } diff --git a/src/jtag/drivers/xlnx-pcie-xvc.c b/src/jtag/drivers/xlnx-pcie-xvc.c index 22f256f35..c05b9cf4a 100644 --- a/src/jtag/drivers/xlnx-pcie-xvc.c +++ b/src/jtag/drivers/xlnx-pcie-xvc.c @@ -31,7 +31,7 @@ #define XLNX_XVC_VSEC_HDR 0x04 #define XLNX_XVC_LEN_REG 0x0C #define XLNX_XVC_TMS_REG 0x10 -#define XLNX_XVC_TDx_REG 0x14 +#define XLNX_XVC_TDX_REG 0x14 #define XLNX_XVC_CAP_SIZE 0x20 #define XLNX_XVC_VSEC_ID 0x8 @@ -103,11 +103,11 @@ static int xlnx_pcie_xvc_transact(size_t num_bits, uint32_t tms, uint32_t tdi, if (err != ERROR_OK) return err; - err = xlnx_pcie_xvc_write_reg(XLNX_XVC_TDx_REG, tdi); + err = xlnx_pcie_xvc_write_reg(XLNX_XVC_TDX_REG, tdi); if (err != ERROR_OK) return err; - err = xlnx_pcie_xvc_read_reg(XLNX_XVC_TDx_REG, tdo); + err = xlnx_pcie_xvc_read_reg(XLNX_XVC_TDX_REG, tdo); if (err != ERROR_OK) return err; @@ -460,9 +460,9 @@ COMMAND_HANDLER(xlnx_pcie_xvc_handle_config_command) return ERROR_OK; } -static const struct command_registration xlnx_pcie_xvc_command_handlers[] = { +static const struct command_registration xlnx_pcie_xvc_subcommand_handlers[] = { { - .name = "xlnx_pcie_xvc_config", + .name = "config", .handler = xlnx_pcie_xvc_handle_config_command, .mode = COMMAND_CONFIG, .help = "Configure XVC/PCIe JTAG adapter", @@ -471,6 +471,17 @@ static const struct command_registration xlnx_pcie_xvc_command_handlers[] = { COMMAND_REGISTRATION_DONE }; +static const struct command_registration xlnx_pcie_xvc_command_handlers[] = { + { + .name = "xlnx_pcie_xvc", + .mode = COMMAND_ANY, + .help = "perform xlnx_pcie_xvc management", + .chain = xlnx_pcie_xvc_subcommand_handlers, + .usage = "", + }, + COMMAND_REGISTRATION_DONE +}; + static struct jtag_interface xlnx_pcie_xvc_jtag_ops = { .execute_queue = &xlnx_pcie_xvc_execute_queue, }; @@ -535,7 +546,7 @@ static void xlnx_pcie_xvc_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t res, ack, rpar; int err; - assert(cmd & SWD_CMD_RnW); + assert(cmd & SWD_CMD_RNW); cmd |= SWD_CMD_START | SWD_CMD_PARK; /* cmd + ack */ @@ -558,8 +569,8 @@ static void xlnx_pcie_xvc_swd_read_reg(uint8_t cmd, uint32_t *value, LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", - cmd & SWD_CMD_APnDP ? "AP" : "DP", - cmd & SWD_CMD_RnW ? "read" : "write", + cmd & SWD_CMD_APNDP ? "AP" : "DP", + cmd & SWD_CMD_RNW ? "read" : "write", (cmd & SWD_CMD_A32) >> 1, res); switch (ack) { @@ -571,7 +582,7 @@ static void xlnx_pcie_xvc_swd_read_reg(uint8_t cmd, uint32_t *value, } if (value) *value = res; - if (cmd & SWD_CMD_APnDP) + if (cmd & SWD_CMD_APNDP) err = xlnx_pcie_xvc_transact(ap_delay_clk, 0, 0, NULL); queued_retval = err; return; @@ -598,7 +609,7 @@ static void xlnx_pcie_xvc_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t res, ack; int err; - assert(!(cmd & SWD_CMD_RnW)); + assert(!(cmd & SWD_CMD_RNW)); cmd |= SWD_CMD_START | SWD_CMD_PARK; /* cmd + trn + ack */ @@ -621,14 +632,14 @@ static void xlnx_pcie_xvc_swd_write_reg(uint8_t cmd, uint32_t value, LOG_DEBUG("%s %s %s reg %X = %08"PRIx32, ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK", - cmd & SWD_CMD_APnDP ? "AP" : "DP", - cmd & SWD_CMD_RnW ? "read" : "write", + cmd & SWD_CMD_APNDP ? "AP" : "DP", + cmd & SWD_CMD_RNW ? "read" : "write", (cmd & SWD_CMD_A32) >> 1, value); switch (ack) { case SWD_ACK_OK: - if (cmd & SWD_CMD_APnDP) + if (cmd & SWD_CMD_APNDP) err = xlnx_pcie_xvc_transact(ap_delay_clk, 0, 0, NULL); queued_retval = err; return; diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c index 15651763d..b16a930a9 100644 --- a/src/jtag/hla/hla_interface.c +++ b/src/jtag/hla/hla_interface.c @@ -147,7 +147,7 @@ int hl_interface_init_reset(void) static int hl_interface_khz(int khz, int *jtag_speed) { - if (hl_if.layout->api->speed == NULL) + if (!hl_if.layout->api->speed) return ERROR_OK; *jtag_speed = hl_if.layout->api->speed(hl_if.handle, khz, true); @@ -162,10 +162,10 @@ static int hl_interface_speed_div(int speed, int *khz) static int hl_interface_speed(int speed) { - if (hl_if.layout->api->speed == NULL) + if (!hl_if.layout->api->speed) return ERROR_OK; - if (hl_if.handle == NULL) { + if (!hl_if.handle) { /* pass speed as initial param as interface not open yet */ hl_if.param.initial_interface_speed = speed; return ERROR_OK; diff --git a/src/jtag/hla/hla_layout.c b/src/jtag/hla/hla_layout.c index cf51a6713..16b221797 100644 --- a/src/jtag/hla/hla_layout.c +++ b/src/jtag/hla/hla_layout.c @@ -94,7 +94,7 @@ int hl_layout_init(struct hl_interface_s *adapter) { LOG_DEBUG("hl_layout_init"); - if (adapter->layout == NULL) { + if (!adapter->layout) { LOG_ERROR("no layout specified"); return ERROR_FAIL; } diff --git a/src/jtag/hla/hla_tcl.c b/src/jtag/hla/hla_tcl.c index 2998498be..5aa330145 100644 --- a/src/jtag/hla/hla_tcl.c +++ b/src/jtag/hla/hla_tcl.c @@ -29,7 +29,7 @@ #include static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi, - struct jtag_tap *pTap) + struct jtag_tap *tap) { jim_wide w; int e = jim_getopt_wide(goi, &w); @@ -39,15 +39,15 @@ static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi return e; } - uint32_t *p = realloc(pTap->expected_ids, - (pTap->expected_ids_cnt + 1) * sizeof(uint32_t)); + uint32_t *p = realloc(tap->expected_ids, + (tap->expected_ids_cnt + 1) * sizeof(uint32_t)); if (!p) { Jim_SetResultFormatted(goi->interp, "no memory"); return JIM_ERR; } - pTap->expected_ids = p; - pTap->expected_ids[pTap->expected_ids_cnt++] = w; + tap->expected_ids = p; + tap->expected_ids[tap->expected_ids_cnt++] = w; return JIM_OK; } @@ -62,7 +62,7 @@ static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi static int jim_hl_newtap_cmd(struct jim_getopt_info *goi) { - struct jtag_tap *pTap; + struct jtag_tap *tap; int x; int e; struct jim_nvp *n; @@ -78,8 +78,8 @@ static int jim_hl_newtap_cmd(struct jim_getopt_info *goi) { .name = NULL, .value = -1}, }; - pTap = calloc(1, sizeof(struct jtag_tap)); - if (!pTap) { + tap = calloc(1, sizeof(struct jtag_tap)); + if (!tap) { Jim_SetResultFormatted(goi->interp, "no memory"); return JIM_ERR; } @@ -90,41 +90,41 @@ static int jim_hl_newtap_cmd(struct jim_getopt_info *goi) if (goi->argc < 3) { Jim_SetResultFormatted(goi->interp, "Missing CHIP TAP OPTIONS ...."); - free(pTap); + free(tap); return JIM_ERR; } const char *tmp; jim_getopt_string(goi, &tmp, NULL); - pTap->chip = strdup(tmp); + tap->chip = strdup(tmp); jim_getopt_string(goi, &tmp, NULL); - pTap->tapname = strdup(tmp); + tap->tapname = strdup(tmp); /* name + dot + name + null */ - x = strlen(pTap->chip) + 1 + strlen(pTap->tapname) + 1; + x = strlen(tap->chip) + 1 + strlen(tap->tapname) + 1; cp = malloc(x); - sprintf(cp, "%s.%s", pTap->chip, pTap->tapname); - pTap->dotted_name = cp; + sprintf(cp, "%s.%s", tap->chip, tap->tapname); + tap->dotted_name = cp; LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params", - pTap->chip, pTap->tapname, pTap->dotted_name, goi->argc); + tap->chip, tap->tapname, tap->dotted_name, goi->argc); while (goi->argc) { e = jim_getopt_nvp(goi, opts, &n); if (e != JIM_OK) { jim_getopt_nvp_unknown(goi, opts, 0); free(cp); - free(pTap); + free(tap); return e; } LOG_DEBUG("Processing option: %s", n->name); switch (n->value) { case NTAP_OPT_EXPECTED_ID: - e = jim_newtap_expected_id(n, goi, pTap); - if (JIM_OK != e) { + e = jim_newtap_expected_id(n, goi, tap); + if (e != JIM_OK) { free(cp); - free(pTap); + free(tap); return e; } break; @@ -138,9 +138,9 @@ static int jim_hl_newtap_cmd(struct jim_getopt_info *goi) } /* while (goi->argc) */ /* default is enabled-after-reset */ - pTap->enabled = !pTap->disabled_after_reset; + tap->enabled = !tap->disabled_after_reset; - jtag_tap_init(pTap); + jtag_tap_init(tap); return JIM_OK; } diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl index 3060c5c06..d5b2ae221 100644 --- a/src/jtag/startup.tcl +++ b/src/jtag/startup.tcl @@ -207,4 +207,532 @@ proc "hla newtap" {args} { eval swj_newdap $args } +lappend _telnet_autocomplete_skip ftdi_device_desc +proc ftdi_device_desc args { + echo "DEPRECATED! use 'ftdi device_desc' not 'ftdi_device_desc'" + eval ftdi device_desc $args +} + +lappend _telnet_autocomplete_skip ftdi_serial +proc ftdi_serial args { + echo "DEPRECATED! use 'ftdi serial' not 'ftdi_serial'" + eval ftdi serial $args +} + +lappend _telnet_autocomplete_skip ftdi_channel +proc ftdi_channel args { + echo "DEPRECATED! use 'ftdi channel' not 'ftdi_channel'" + eval ftdi channel $args +} + +lappend _telnet_autocomplete_skip ftdi_layout_init +proc ftdi_layout_init args { + echo "DEPRECATED! use 'ftdi layout_init' not 'ftdi_layout_init'" + eval ftdi layout_init $args +} + +lappend _telnet_autocomplete_skip ftdi_layout_signal +proc ftdi_layout_signal args { + echo "DEPRECATED! use 'ftdi layout_signal' not 'ftdi_layout_signal'" + eval ftdi layout_signal $args +} + +lappend _telnet_autocomplete_skip ftdi_set_signal +proc ftdi_set_signal args { + echo "DEPRECATED! use 'ftdi set_signal' not 'ftdi_set_signal'" + eval ftdi set_signal $args +} + +lappend _telnet_autocomplete_skip ftdi_get_signal +proc ftdi_get_signal args { + echo "DEPRECATED! use 'ftdi get_signal' not 'ftdi_get_signal'" + eval ftdi get_signal $args +} + +lappend _telnet_autocomplete_skip ftdi_vid_pid +proc ftdi_vid_pid args { + echo "DEPRECATED! use 'ftdi vid_pid' not 'ftdi_vid_pid'" + eval ftdi vid_pid $args +} + +lappend _telnet_autocomplete_skip ftdi_tdo_sample_edge +proc ftdi_tdo_sample_edge args { + echo "DEPRECATED! use 'ftdi tdo_sample_edge' not 'ftdi_tdo_sample_edge'" + eval ftdi tdo_sample_edge $args +} + +lappend _telnet_autocomplete_skip remote_bitbang_host +proc remote_bitbang_host args { + echo "DEPRECATED! use 'remote_bitbang host' not 'remote_bitbang_host'" + eval remote_bitbang host $args +} + +lappend _telnet_autocomplete_skip remote_bitbang_port +proc remote_bitbang_port args { + echo "DEPRECATED! use 'remote_bitbang port' not 'remote_bitbang_port'" + eval remote_bitbang port $args +} + +lappend _telnet_autocomplete_skip openjtag_device_desc +proc openjtag_device_desc args { + echo "DEPRECATED! use 'openjtag device_desc' not 'openjtag_device_desc'" + eval openjtag device_desc $args +} + +lappend _telnet_autocomplete_skip openjtag_variant +proc openjtag_variant args { + echo "DEPRECATED! use 'openjtag variant' not 'openjtag_variant'" + eval openjtag variant $args +} + +lappend _telnet_autocomplete_skip parport_port +proc parport_port args { + echo "DEPRECATED! use 'parport port' not 'parport_port'" + eval parport port $args +} + +lappend _telnet_autocomplete_skip parport_cable +proc parport_cable args { + echo "DEPRECATED! use 'parport cable' not 'parport_cable'" + eval parport cable $args +} + +lappend _telnet_autocomplete_skip parport_write_on_exit +proc parport_write_on_exit args { + echo "DEPRECATED! use 'parport write_on_exit' not 'parport_write_on_exit'" + eval parport write_on_exit $args +} + +lappend _telnet_autocomplete_skip parport_toggling_time +proc parport_toggling_time args { + echo "DEPRECATED! use 'parport toggling_time' not 'parport_toggling_time'" + eval parport toggling_time $args +} + +lappend _telnet_autocomplete_skip jtag_dpi_set_port +proc jtag_dpi_set_port args { + echo "DEPRECATED! use 'jtag_dpi set_port' not 'jtag_dpi_set_port'" + eval jtag_dpi set_port $args +} + +lappend _telnet_autocomplete_skip jtag_dpi_set_address +proc jtag_dpi_set_address args { + echo "DEPRECATED! use 'jtag_dpi set_address' not 'jtag_dpi_set_address'" + eval jtag_dpi set_address $args +} + +lappend _telnet_autocomplete_skip jtag_vpi_set_port +proc jtag_vpi_set_port args { + echo "DEPRECATED! use 'jtag_vpi set_port' not 'jtag_vpi_set_port'" + eval jtag_vpi set_port $args +} + +lappend _telnet_autocomplete_skip jtag_vpi_set_address +proc jtag_vpi_set_address args { + echo "DEPRECATED! use 'jtag_vpi set_address' not 'jtag_vpi_set_address'" + eval jtag_vpi set_address $args +} + +lappend _telnet_autocomplete_skip jtag_vpi_stop_sim_on_exit +proc jtag_vpi_stop_sim_on_exit args { + echo "DEPRECATED! use 'jtag_vpi stop_sim_on_exit' not 'jtag_vpi_stop_sim_on_exit'" + eval jtag_vpi stop_sim_on_exit $args +} + +lappend _telnet_autocomplete_skip presto_serial +proc presto_serial args { + echo "DEPRECATED! use 'presto serial' not 'presto_serial'" + eval presto serial $args +} + +lappend _telnet_autocomplete_skip xlnx_pcie_xvc_config +proc xlnx_pcie_xvc_config args { + echo "DEPRECATED! use 'xlnx_pcie_xvc config' not 'xlnx_pcie_xvc_config'" + eval xlnx_pcie_xvc config $args +} + +lappend _telnet_autocomplete_skip ulink_download_firmware +proc ulink_download_firmware args { + echo "DEPRECATED! use 'ulink download_firmware' not 'ulink_download_firmware'" + eval ulink download_firmware $args +} + +lappend _telnet_autocomplete_skip vsllink_usb_vid +proc vsllink_usb_vid args { + echo "DEPRECATED! use 'vsllink usb_vid' not 'vsllink_usb_vid'" + eval vsllink usb_vid $args +} + +lappend _telnet_autocomplete_skip vsllink_usb_pid +proc vsllink_usb_pid args { + echo "DEPRECATED! use 'vsllink usb_pid' not 'vsllink_usb_pid'" + eval vsllink usb_pid $args +} + +lappend _telnet_autocomplete_skip vsllink_usb_serial +proc vsllink_usb_serial args { + echo "DEPRECATED! use 'vsllink usb_serial' not 'vsllink_usb_serial'" + eval vsllink usb_serial $args +} + +lappend _telnet_autocomplete_skip vsllink_usb_bulkin +proc vsllink_usb_bulkin args { + echo "DEPRECATED! use 'vsllink usb_bulkin' not 'vsllink_usb_bulkin'" + eval vsllink usb_bulkin $args +} + +lappend _telnet_autocomplete_skip vsllink_usb_bulkout +proc vsllink_usb_bulkout args { + echo "DEPRECATED! use 'vsllink usb_bulkout' not 'vsllink_usb_bulkout'" + eval vsllink usb_bulkout $args +} + +lappend _telnet_autocomplete_skip vsllink_usb_interface +proc vsllink_usb_interface args { + echo "DEPRECATED! use 'vsllink usb_interface' not 'vsllink_usb_interface'" + eval vsllink usb_interface $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_jtag_nums +proc bcm2835gpio_jtag_nums args { + echo "DEPRECATED! use 'bcm2835gpio jtag_nums' not 'bcm2835gpio_jtag_nums'" + eval bcm2835gpio jtag_nums $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_tck_num +proc bcm2835gpio_tck_num args { + echo "DEPRECATED! use 'bcm2835gpio tck_num' not 'bcm2835gpio_tck_num'" + eval bcm2835gpio tck_num $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_tms_num +proc bcm2835gpio_tms_num args { + echo "DEPRECATED! use 'bcm2835gpio tms_num' not 'bcm2835gpio_tms_num'" + eval bcm2835gpio tms_num $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_tdo_num +proc bcm2835gpio_tdo_num args { + echo "DEPRECATED! use 'bcm2835gpio tdo_num' not 'bcm2835gpio_tdo_num'" + eval bcm2835gpio tdo_num $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_tdi_num +proc bcm2835gpio_tdi_num args { + echo "DEPRECATED! use 'bcm2835gpio tdi_num' not 'bcm2835gpio_tdi_num'" + eval bcm2835gpio tdi_num $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_swd_nums +proc bcm2835gpio_swd_nums args { + echo "DEPRECATED! use 'bcm2835gpio swd_nums' not 'bcm2835gpio_swd_nums'" + eval bcm2835gpio swd_nums $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_swclk_num +proc bcm2835gpio_swclk_num args { + echo "DEPRECATED! use 'bcm2835gpio swclk_num' not 'bcm2835gpio_swclk_num'" + eval bcm2835gpio swclk_num $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_swdio_num +proc bcm2835gpio_swdio_num args { + echo "DEPRECATED! use 'bcm2835gpio swdio_num' not 'bcm2835gpio_swdio_num'" + eval bcm2835gpio swdio_num $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_swdio_dir_num +proc bcm2835gpio_swdio_dir_num args { + echo "DEPRECATED! use 'bcm2835gpio swdio_dir_num' not 'bcm2835gpio_swdio_dir_num'" + eval bcm2835gpio swdio_dir_num $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_srst_num +proc bcm2835gpio_srst_num args { + echo "DEPRECATED! use 'bcm2835gpio srst_num' not 'bcm2835gpio_srst_num'" + eval bcm2835gpio srst_num $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_trst_num +proc bcm2835gpio_trst_num args { + echo "DEPRECATED! use 'bcm2835gpio trst_num' not 'bcm2835gpio_trst_num'" + eval bcm2835gpio trst_num $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_speed_coeffs +proc bcm2835gpio_speed_coeffs args { + echo "DEPRECATED! use 'bcm2835gpio speed_coeffs' not 'bcm2835gpio_speed_coeffs'" + eval bcm2835gpio speed_coeffs $args +} + +lappend _telnet_autocomplete_skip bcm2835gpio_peripheral_base +proc bcm2835gpio_peripheral_base args { + echo "DEPRECATED! use 'bcm2835gpio peripheral_base' not 'bcm2835gpio_peripheral_base'" + eval bcm2835gpio peripheral_base $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_jtag_nums +proc linuxgpiod_jtag_nums args { + echo "DEPRECATED! use 'linuxgpiod jtag_nums' not 'linuxgpiod_jtag_nums'" + eval linuxgpiod jtag_nums $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_tck_num +proc linuxgpiod_tck_num args { + echo "DEPRECATED! use 'linuxgpiod tck_num' not 'linuxgpiod_tck_num'" + eval linuxgpiod tck_num $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_tms_num +proc linuxgpiod_tms_num args { + echo "DEPRECATED! use 'linuxgpiod tms_num' not 'linuxgpiod_tms_num'" + eval linuxgpiod tms_num $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_tdo_num +proc linuxgpiod_tdo_num args { + echo "DEPRECATED! use 'linuxgpiod tdo_num' not 'linuxgpiod_tdo_num'" + eval linuxgpiod tdo_num $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_tdi_num +proc linuxgpiod_tdi_num args { + echo "DEPRECATED! use 'linuxgpiod tdi_num' not 'linuxgpiod_tdi_num'" + eval linuxgpiod tdi_num $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_srst_num +proc linuxgpiod_srst_num args { + echo "DEPRECATED! use 'linuxgpiod srst_num' not 'linuxgpiod_srst_num'" + eval linuxgpiod srst_num $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_trst_num +proc linuxgpiod_trst_num args { + echo "DEPRECATED! use 'linuxgpiod trst_num' not 'linuxgpiod_trst_num'" + eval linuxgpiod trst_num $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_swd_nums +proc linuxgpiod_swd_nums args { + echo "DEPRECATED! use 'linuxgpiod swd_nums' not 'linuxgpiod_swd_nums'" + eval linuxgpiod swd_nums $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_swclk_num +proc linuxgpiod_swclk_num args { + echo "DEPRECATED! use 'linuxgpiod swclk_num' not 'linuxgpiod_swclk_num'" + eval linuxgpiod swclk_num $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_swdio_num +proc linuxgpiod_swdio_num args { + echo "DEPRECATED! use 'linuxgpiod swdio_num' not 'linuxgpiod_swdio_num'" + eval linuxgpiod swdio_num $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_led_num +proc linuxgpiod_led_num args { + echo "DEPRECATED! use 'linuxgpiod led_num' not 'linuxgpiod_led_num'" + eval linuxgpiod led_num $args +} + +lappend _telnet_autocomplete_skip linuxgpiod_gpiochip +proc linuxgpiod_gpiochip args { + echo "DEPRECATED! use 'linuxgpiod gpiochip' not 'linuxgpiod_gpiochip'" + eval linuxgpiod gpiochip $args +} + +lappend _telnet_autocomplete_skip sysfsgpio_jtag_nums +proc sysfsgpio_jtag_nums args { + echo "DEPRECATED! use 'sysfsgpio jtag_nums' not 'sysfsgpio_jtag_nums'" + eval sysfsgpio jtag_nums $args +} + +lappend _telnet_autocomplete_skip sysfsgpio_tck_num +proc sysfsgpio_tck_num args { + echo "DEPRECATED! use 'sysfsgpio tck_num' not 'sysfsgpio_tck_num'" + eval sysfsgpio tck_num $args +} + +lappend _telnet_autocomplete_skip sysfsgpio_tms_num +proc sysfsgpio_tms_num args { + echo "DEPRECATED! use 'sysfsgpio tms_num' not 'sysfsgpio_tms_num'" + eval sysfsgpio tms_num $args +} + +lappend _telnet_autocomplete_skip sysfsgpio_tdo_num +proc sysfsgpio_tdo_num args { + echo "DEPRECATED! use 'sysfsgpio tdo_num' not 'sysfsgpio_tdo_num'" + eval sysfsgpio tdo_num $args +} + +lappend _telnet_autocomplete_skip sysfsgpio_tdi_num +proc sysfsgpio_tdi_num args { + echo "DEPRECATED! use 'sysfsgpio tdi_num' not 'sysfsgpio_tdi_num'" + eval sysfsgpio tdi_num $args +} + +lappend _telnet_autocomplete_skip sysfsgpio_srst_num +proc sysfsgpio_srst_num args { + echo "DEPRECATED! use 'sysfsgpio srst_num' not 'sysfsgpio_srst_num'" + eval sysfsgpio srst_num $args +} + +lappend _telnet_autocomplete_skip sysfsgpio_trst_num +proc sysfsgpio_trst_num args { + echo "DEPRECATED! use 'sysfsgpio trst_num' not 'sysfsgpio_trst_num'" + eval sysfsgpio trst_num $args +} + +lappend _telnet_autocomplete_skip sysfsgpio_swd_nums +proc sysfsgpio_swd_nums args { + echo "DEPRECATED! use 'sysfsgpio swd_nums' not 'sysfsgpio_swd_nums'" + eval sysfsgpio swd_nums $args +} + +lappend _telnet_autocomplete_skip sysfsgpio_swclk_num +proc sysfsgpio_swclk_num args { + echo "DEPRECATED! use 'sysfsgpio swclk_num' not 'sysfsgpio_swclk_num'" + eval sysfsgpio swclk_num $args +} + +lappend _telnet_autocomplete_skip sysfsgpio_swdio_num +proc sysfsgpio_swdio_num args { + echo "DEPRECATED! use 'sysfsgpio swdio_num' not 'sysfsgpio_swdio_num'" + eval sysfsgpio swdio_num $args +} + +lappend _telnet_autocomplete_skip buspirate_adc +proc buspirate_adc args { + echo "DEPRECATED! use 'buspirate adc' not 'buspirate_adc'" + eval buspirate adc $args +} + +lappend _telnet_autocomplete_skip buspirate_vreg +proc buspirate_vreg args { + echo "DEPRECATED! use 'buspirate vreg' not 'buspirate_vreg'" + eval buspirate vreg $args +} + +lappend _telnet_autocomplete_skip buspirate_pullup +proc buspirate_pullup args { + echo "DEPRECATED! use 'buspirate pullup' not 'buspirate_pullup'" + eval buspirate pullup $args +} + +lappend _telnet_autocomplete_skip buspirate_led +proc buspirate_led args { + echo "DEPRECATED! use 'buspirate led' not 'buspirate_led'" + eval buspirate led $args +} + +lappend _telnet_autocomplete_skip buspirate_speed +proc buspirate_speed args { + echo "DEPRECATED! use 'buspirate speed' not 'buspirate_speed'" + eval buspirate speed $args +} + +lappend _telnet_autocomplete_skip buspirate_mode +proc buspirate_mode args { + echo "DEPRECATED! use 'buspirate mode' not 'buspirate_mode'" + eval buspirate mode $args +} + +lappend _telnet_autocomplete_skip buspirate_port +proc buspirate_port args { + echo "DEPRECATED! use 'buspirate port' not 'buspirate_port'" + eval buspirate port $args +} + +lappend _telnet_autocomplete_skip usb_blaster_device_desc +proc usb_blaster_device_desc args { + echo "DEPRECATED! use 'usb_blaster device_desc' not 'usb_blaster_device_desc'" + eval usb_blaster device_desc $args +} + +lappend _telnet_autocomplete_skip usb_blaster_vid_pid +proc usb_blaster_vid_pid args { + echo "DEPRECATED! use 'usb_blaster vid_pid' not 'usb_blaster_vid_pid'" + eval usb_blaster vid_pid $args +} + +lappend _telnet_autocomplete_skip usb_blaster_lowlevel_driver +proc usb_blaster_lowlevel_driver args { + echo "DEPRECATED! use 'usb_blaster lowlevel_driver' not 'usb_blaster_lowlevel_driver'" + eval usb_blaster lowlevel_driver $args +} + +lappend _telnet_autocomplete_skip usb_blaster_pin +proc usb_blaster_pin args { + echo "DEPRECATED! use 'usb_blaster pin' not 'usb_blaster_pin'" + eval usb_blaster pin $args +} + +lappend _telnet_autocomplete_skip usb_blaster_firmware +proc usb_blaster_firmware args { + echo "DEPRECATED! use 'usb_blaster firmware' not 'usb_blaster_firmware'" + eval usb_blaster firmware $args +} + +lappend _telnet_autocomplete_skip ft232r_serial_desc +proc ft232r_serial_desc args { + echo "DEPRECATED! use 'ft232r serial_desc' not 'ft232r_serial_desc'" + eval ft232r serial_desc $args +} + +lappend _telnet_autocomplete_skip ft232r_vid_pid +proc ft232r_vid_pid args { + echo "DEPRECATED! use 'ft232r vid_pid' not 'ft232r_vid_pid'" + eval ft232r vid_pid $args +} + +lappend _telnet_autocomplete_skip ft232r_jtag_nums +proc ft232r_jtag_nums args { + echo "DEPRECATED! use 'ft232r jtag_nums' not 'ft232r_jtag_nums'" + eval ft232r jtag_nums $args +} + +lappend _telnet_autocomplete_skip ft232r_tck_num +proc ft232r_tck_num args { + echo "DEPRECATED! use 'ft232r tck_num' not 'ft232r_tck_num'" + eval ft232r tck_num $args +} + +lappend _telnet_autocomplete_skip ft232r_tms_num +proc ft232r_tms_num args { + echo "DEPRECATED! use 'ft232r tms_num' not 'ft232r_tms_num'" + eval ft232r tms_num $args +} + +lappend _telnet_autocomplete_skip ft232r_tdo_num +proc ft232r_tdo_num args { + echo "DEPRECATED! use 'ft232r tdo_num' not 'ft232r_tdo_num'" + eval ft232r tdo_num $args +} + +lappend _telnet_autocomplete_skip ft232r_tdi_num +proc ft232r_tdi_num args { + echo "DEPRECATED! use 'ft232r tdi_num' not 'ft232r_tdi_num'" + eval ft232r tdi_num $args +} + +lappend _telnet_autocomplete_skip ft232r_srst_num +proc ft232r_srst_num args { + echo "DEPRECATED! use 'ft232r srst_num' not 'ft232r_srst_num'" + eval ft232r srst_num $args +} + +lappend _telnet_autocomplete_skip ft232r_trst_num +proc ft232r_trst_num args { + echo "DEPRECATED! use 'ft232r trst_num' not 'ft232r_trst_num'" + eval ft232r trst_num $args +} + +lappend _telnet_autocomplete_skip ft232r_restore_serial +proc ft232r_restore_serial args { + echo "DEPRECATED! use 'ft232r restore_serial' not 'ft232r_restore_serial'" + eval ft232r restore_serial $args +} + # END MIGRATION AIDS diff --git a/src/jtag/swd.h b/src/jtag/swd.h index 487cb85bf..fe28667c6 100644 --- a/src/jtag/swd.h +++ b/src/jtag/swd.h @@ -24,8 +24,8 @@ * first bit on the wire is START */ #define SWD_CMD_START (1 << 0) /* always set */ -#define SWD_CMD_APnDP (1 << 1) /* set only for AP access */ -#define SWD_CMD_RnW (1 << 2) /* set only for read access */ +#define SWD_CMD_APNDP (1 << 1) /* set only for AP access */ +#define SWD_CMD_RNW (1 << 2) /* set only for read access */ #define SWD_CMD_A32 (3 << 3) /* bits A[3:2] of register addr */ #define SWD_CMD_PARITY (1 << 5) /* parity of APnDP|RnW|A32 */ #define SWD_CMD_STOP (0 << 6) /* always clear for synch SWD */ @@ -38,8 +38,8 @@ */ static inline uint8_t swd_cmd(bool is_read, bool is_ap, uint8_t regnum) { - uint8_t cmd = (is_ap ? SWD_CMD_APnDP : 0) - | (is_read ? SWD_CMD_RnW : 0) + uint8_t cmd = (is_ap ? SWD_CMD_APNDP : 0) + | (is_read ? SWD_CMD_RNW : 0) | ((regnum & 0xc) << 1); /* 8 cmd bits 4:1 may be set */ diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c index 970bd37ec..6d3fee43c 100644 --- a/src/jtag/tcl.c +++ b/src/jtag/tcl.c @@ -62,9 +62,9 @@ struct jtag_tap *jtag_tap_by_jim_obj(Jim_Interp *interp, Jim_Obj *o) { const char *cp = Jim_GetString(o, NULL); struct jtag_tap *t = cp ? jtag_tap_by_string(cp) : NULL; - if (NULL == cp) + if (!cp) cp = "(unknown)"; - if (NULL == t) + if (!t) Jim_SetResultFormatted(interp, "Tap '%s' could not be found", cp); return t; } @@ -82,7 +82,7 @@ static bool scan_is_safe(tap_state_t state) } } -static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args) +static int jim_command_drscan(Jim_Interp *interp, int argc, Jim_Obj * const *args) { int retval; struct scan_field *fields; @@ -133,7 +133,7 @@ static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args /* get arg as a string. */ cp = Jim_GetString(args[i], NULL); /* is it the magic? */ - if (0 == strcmp("-endstate", cp)) { + if (strcmp("-endstate", cp) == 0) { /* is the statename valid? */ cp = Jim_GetString(args[i + 1], NULL); @@ -162,7 +162,7 @@ static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args assert(e == JIM_OK); tap = jtag_tap_by_jim_obj(interp, args[1]); - if (tap == NULL) + if (!tap) return JIM_ERR; num_fields = (argc-2)/2; @@ -223,7 +223,7 @@ static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args } -static int Jim_Command_pathmove(Jim_Interp *interp, int argc, Jim_Obj *const *args) +static int jim_command_pathmove(Jim_Interp *interp, int argc, Jim_Obj * const *args) { tap_state_t states[8]; @@ -260,7 +260,7 @@ static int Jim_Command_pathmove(Jim_Interp *interp, int argc, Jim_Obj *const *ar } -static int Jim_Command_flush_count(Jim_Interp *interp, int argc, Jim_Obj *const *args) +static int jim_command_flush_count(Jim_Interp *interp, int argc, Jim_Obj * const *args) { Jim_SetResult(interp, Jim_NewIntObj(interp, jtag_get_flush_queue_count())); @@ -281,7 +281,7 @@ static const struct command_registration jtag_command_handlers_to_move[] = { { .name = "drscan", .mode = COMMAND_EXEC, - .jim_handler = Jim_Command_drscan, + .jim_handler = jim_command_drscan, .help = "Execute Data Register (DR) scan for one TAP. " "Other TAPs must be in BYPASS mode.", .usage = "tap_name [num_bits value]* ['-endstate' state_name]", @@ -289,14 +289,14 @@ static const struct command_registration jtag_command_handlers_to_move[] = { { .name = "flush_count", .mode = COMMAND_EXEC, - .jim_handler = Jim_Command_flush_count, + .jim_handler = jim_command_flush_count, .help = "Returns the number of times the JTAG queue " "has been flushed.", }, { .name = "pathmove", .mode = COMMAND_EXEC, - .jim_handler = Jim_Command_pathmove, + .jim_handler = jim_command_pathmove, .usage = "start_state state1 [state2 [state3 ...]]", .help = "Move JTAG state machine from current state " "(start_state) to state1, then state2, state3, etc.", @@ -362,7 +362,7 @@ static int jtag_tap_configure_event(struct jim_getopt_info *goi, struct jtag_tap if (goi->isconfigure) { if (!found) jteap = calloc(1, sizeof(*jteap)); - else if (NULL != jteap->body) + else if (jteap->body) Jim_DecrRefCount(goi->interp, jteap->body); jteap->interp = goi->interp; @@ -440,7 +440,7 @@ static int is_bad_irval(int ir_length, jim_wide w) } static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi, - struct jtag_tap *pTap) + struct jtag_tap *tap) { jim_wide w; int e = jim_getopt_wide(goi, &w); @@ -449,15 +449,15 @@ static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi return e; } - uint32_t *p = realloc(pTap->expected_ids, - (pTap->expected_ids_cnt + 1) * sizeof(uint32_t)); + uint32_t *p = realloc(tap->expected_ids, + (tap->expected_ids_cnt + 1) * sizeof(uint32_t)); if (!p) { Jim_SetResultFormatted(goi->interp, "no memory"); return JIM_ERR; } - pTap->expected_ids = p; - pTap->expected_ids[pTap->expected_ids_cnt++] = w; + tap->expected_ids = p; + tap->expected_ids[tap->expected_ids_cnt++] = w; return JIM_OK; } @@ -471,7 +471,7 @@ static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi #define NTAP_OPT_VERSION 6 static int jim_newtap_ir_param(struct jim_nvp *n, struct jim_getopt_info *goi, - struct jtag_tap *pTap) + struct jtag_tap *tap) { jim_wide w; int e = jim_getopt_wide(goi, &w); @@ -482,33 +482,33 @@ static int jim_newtap_ir_param(struct jim_nvp *n, struct jim_getopt_info *goi, } switch (n->value) { case NTAP_OPT_IRLEN: - if (w > (jim_wide) (8 * sizeof(pTap->ir_capture_value))) { + if (w > (jim_wide) (8 * sizeof(tap->ir_capture_value))) { LOG_WARNING("%s: huge IR length %d", - pTap->dotted_name, (int) w); + tap->dotted_name, (int) w); } - pTap->ir_length = w; + tap->ir_length = w; break; case NTAP_OPT_IRMASK: - if (is_bad_irval(pTap->ir_length, w)) { + if (is_bad_irval(tap->ir_length, w)) { LOG_ERROR("%s: IR mask %x too big", - pTap->dotted_name, + tap->dotted_name, (int) w); return JIM_ERR; } if ((w & 3) != 3) - LOG_WARNING("%s: nonstandard IR mask", pTap->dotted_name); - pTap->ir_capture_mask = w; + LOG_WARNING("%s: nonstandard IR mask", tap->dotted_name); + tap->ir_capture_mask = w; break; case NTAP_OPT_IRCAPTURE: - if (is_bad_irval(pTap->ir_length, w)) { + if (is_bad_irval(tap->ir_length, w)) { LOG_ERROR("%s: IR capture %x too big", - pTap->dotted_name, (int) w); + tap->dotted_name, (int) w); return JIM_ERR; } if ((w & 3) != 1) LOG_WARNING("%s: nonstandard IR value", - pTap->dotted_name); - pTap->ir_capture_value = w; + tap->dotted_name); + tap->ir_capture_value = w; break; default: return JIM_ERR; @@ -518,7 +518,7 @@ static int jim_newtap_ir_param(struct jim_nvp *n, struct jim_getopt_info *goi, static int jim_newtap_cmd(struct jim_getopt_info *goi) { - struct jtag_tap *pTap; + struct jtag_tap *tap; int x; int e; struct jim_nvp *n; @@ -534,8 +534,8 @@ static int jim_newtap_cmd(struct jim_getopt_info *goi) { .name = NULL, .value = -1 }, }; - pTap = calloc(1, sizeof(struct jtag_tap)); - if (!pTap) { + tap = calloc(1, sizeof(struct jtag_tap)); + if (!tap) { Jim_SetResultFormatted(goi->interp, "no memory"); return JIM_ERR; } @@ -545,30 +545,30 @@ static int jim_newtap_cmd(struct jim_getopt_info *goi) * */ if (goi->argc < 3) { Jim_SetResultFormatted(goi->interp, "Missing CHIP TAP OPTIONS ...."); - free(pTap); + free(tap); return JIM_ERR; } const char *tmp; jim_getopt_string(goi, &tmp, NULL); - pTap->chip = strdup(tmp); + tap->chip = strdup(tmp); jim_getopt_string(goi, &tmp, NULL); - pTap->tapname = strdup(tmp); + tap->tapname = strdup(tmp); /* name + dot + name + null */ - x = strlen(pTap->chip) + 1 + strlen(pTap->tapname) + 1; + x = strlen(tap->chip) + 1 + strlen(tap->tapname) + 1; cp = malloc(x); - sprintf(cp, "%s.%s", pTap->chip, pTap->tapname); - pTap->dotted_name = cp; + sprintf(cp, "%s.%s", tap->chip, tap->tapname); + tap->dotted_name = cp; LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params", - pTap->chip, pTap->tapname, pTap->dotted_name, goi->argc); + tap->chip, tap->tapname, tap->dotted_name, goi->argc); if (!transport_is_jtag()) { /* SWD doesn't require any JTAG tap parameters */ - pTap->enabled = true; - jtag_tap_init(pTap); + tap->enabled = true; + jtag_tap_init(tap); return JIM_OK; } @@ -576,62 +576,62 @@ static int jim_newtap_cmd(struct jim_getopt_info *goi) * that the default. The "-ircapture" and "-irmask" options are only * needed to cope with nonstandard TAPs, or to specify more bits. */ - pTap->ir_capture_mask = 0x03; - pTap->ir_capture_value = 0x01; + tap->ir_capture_mask = 0x03; + tap->ir_capture_value = 0x01; while (goi->argc) { e = jim_getopt_nvp(goi, opts, &n); if (e != JIM_OK) { jim_getopt_nvp_unknown(goi, opts, 0); free(cp); - free(pTap); + free(tap); return e; } LOG_DEBUG("Processing option: %s", n->name); switch (n->value) { case NTAP_OPT_ENABLED: - pTap->disabled_after_reset = false; + tap->disabled_after_reset = false; break; case NTAP_OPT_DISABLED: - pTap->disabled_after_reset = true; + tap->disabled_after_reset = true; break; case NTAP_OPT_EXPECTED_ID: - e = jim_newtap_expected_id(n, goi, pTap); - if (JIM_OK != e) { + e = jim_newtap_expected_id(n, goi, tap); + if (e != JIM_OK) { free(cp); - free(pTap); + free(tap); return e; } break; case NTAP_OPT_IRLEN: case NTAP_OPT_IRMASK: case NTAP_OPT_IRCAPTURE: - e = jim_newtap_ir_param(n, goi, pTap); - if (JIM_OK != e) { + e = jim_newtap_ir_param(n, goi, tap); + if (e != JIM_OK) { free(cp); - free(pTap); + free(tap); return e; } break; case NTAP_OPT_VERSION: - pTap->ignore_version = true; + tap->ignore_version = true; break; } /* switch (n->value) */ } /* while (goi->argc) */ /* default is enabled-after-reset */ - pTap->enabled = !pTap->disabled_after_reset; + tap->enabled = !tap->disabled_after_reset; /* Did all the required option bits get cleared? */ - if (pTap->ir_length != 0) { - jtag_tap_init(pTap); + if (tap->ir_length != 0) { + jtag_tap_init(tap); return JIM_OK; } Jim_SetResultFormatted(goi->interp, "newtap: %s missing IR length", - pTap->dotted_name); - jtag_tap_free(pTap); + tap->dotted_name); + jtag_tap_free(tap); return JIM_ERR; } @@ -640,7 +640,7 @@ static void jtag_tap_handle_event(struct jtag_tap *tap, enum jtag_event e) struct jtag_tap_event_action *jteap; int retval; - for (jteap = tap->event_action; jteap != NULL; jteap = jteap->next) { + for (jteap = tap->event_action; jteap; jteap = jteap->next) { if (jteap->event != e) continue; @@ -769,7 +769,7 @@ int jim_jtag_tap_enabler(Jim_Interp *interp, int argc, Jim_Obj *const *argv) struct jtag_tap *t; t = jtag_tap_by_jim_obj(goi.interp, goi.argv[0]); - if (t == NULL) + if (!t) return JIM_ERR; if (strcasecmp(cmd_name, "tapisenabled") == 0) { @@ -811,7 +811,7 @@ int jim_jtag_configure(Jim_Interp *interp, int argc, Jim_Obj *const *argv) Jim_Obj *o; jim_getopt_obj(&goi, &o); t = jtag_tap_by_jim_obj(goi.interp, o); - if (t == NULL) + if (!t) return JIM_ERR; return jtag_tap_configure_cmd(&goi, t); @@ -1041,13 +1041,13 @@ COMMAND_HANDLER(handle_jtag_rclk_command) COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], khz); retval = jtag_config_rclk(khz); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } int cur_khz = jtag_get_speed_khz(); retval = jtag_get_speed_readable(&cur_khz); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (cur_khz) @@ -1122,7 +1122,7 @@ COMMAND_HANDLER(handle_irscan_command) int retval; for (i = 0; i < num_fields; i++) { tap = jtag_tap_by_string(CMD_ARGV[i*2]); - if (tap == NULL) { + if (!tap) { free(fields); command_print(CMD, "Tap: %s unknown", CMD_ARGV[i*2]); @@ -1130,7 +1130,7 @@ COMMAND_HANDLER(handle_irscan_command) } uint64_t value; retval = parse_u64(CMD_ARGV[i * 2 + 1], &value); - if (ERROR_OK != retval) + if (retval != ERROR_OK) goto error_return; int field_size = tap->ir_length; diff --git a/src/openocd.c b/src/openocd.c index 32b68b6fc..b4571b464 100644 --- a/src/openocd.c +++ b/src/openocd.c @@ -131,7 +131,7 @@ COMMAND_HANDLER(handle_init_command) initialized = 1; retval = command_run_line(CMD_CTX, "target init"); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return ERROR_FAIL; retval = adapter_init(CMD_CTX); @@ -150,11 +150,11 @@ COMMAND_HANDLER(handle_init_command) command_context_mode(CMD_CTX, COMMAND_EXEC); retval = command_run_line(CMD_CTX, "transport init"); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return ERROR_FAIL; retval = command_run_line(CMD_CTX, "dap init"); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return ERROR_FAIL; LOG_DEBUG("Examining targets..."); @@ -262,9 +262,9 @@ static struct command_context *setup_command_handler(Jim_Interp *interp) &arm_tpiu_swo_register_commands, NULL }; - for (unsigned i = 0; NULL != command_registrants[i]; i++) { + for (unsigned i = 0; command_registrants[i]; i++) { int retval = (*command_registrants[i])(cmd_ctx); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { command_done(cmd_ctx); return NULL; } @@ -303,12 +303,12 @@ static int openocd_thread(int argc, char *argv[], struct command_context *cmd_ct } ret = server_init(cmd_ctx); - if (ERROR_OK != ret) + if (ret != ERROR_OK) return ERROR_FAIL; if (init_at_startup) { ret = command_run_line(cmd_ctx, "init"); - if (ERROR_OK != ret) { + if (ret != ERROR_OK) { server_quit(); return ERROR_FAIL; } @@ -364,8 +364,8 @@ int openocd_main(int argc, char *argv[]) help_del_all_commands(cmd_ctx); /* free all DAP and CTI objects */ - dap_cleanup_all(); arm_cti_cleanup_all(); + dap_cleanup_all(); adapter_quit(); @@ -377,9 +377,9 @@ int openocd_main(int argc, char *argv[]) rtt_exit(); free_config(); - if (ERROR_FAIL == ret) + if (ret == ERROR_FAIL) return EXIT_FAILURE; - else if (ERROR_OK != ret) + else if (ret != ERROR_OK) exit_on_signal(ret); return ret; diff --git a/src/pld/pld.c b/src/pld/pld.c index 66f5d44bc..d0f85d74b 100644 --- a/src/pld/pld.c +++ b/src/pld/pld.c @@ -69,7 +69,7 @@ COMMAND_HANDLER(handle_pld_device_command) if (pld_drivers[i]->commands) { retval = register_commands(CMD_CTX, NULL, pld_drivers[i]->commands); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("couldn't register '%s' commands", CMD_ARGV[0]); return ERROR_FAIL; } @@ -81,7 +81,7 @@ COMMAND_HANDLER(handle_pld_device_command) retval = CALL_COMMAND_HANDLER( pld_drivers[i]->pld_device_command, c); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("'%s' driver rejected pld device", CMD_ARGV[0]); free(c); diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c index 934a6807c..a2de8ccf5 100644 --- a/src/pld/virtex2.c +++ b/src/pld/virtex2.c @@ -26,7 +26,7 @@ static int virtex2_set_instr(struct jtag_tap *tap, uint32_t new_instr) { - if (tap == NULL) + if (!tap) return ERROR_FAIL; if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { @@ -204,7 +204,7 @@ PLD_DEVICE_COMMAND_HANDLER(virtex2_pld_device_command) return ERROR_COMMAND_SYNTAX_ERROR; tap = jtag_tap_by_string(CMD_ARGV[1]); - if (tap == NULL) { + if (!tap) { command_print(CMD, "Tap: %s does not exist", CMD_ARGV[1]); return ERROR_OK; } diff --git a/src/pld/xilinx_bit.c b/src/pld/xilinx_bit.c index a530ee776..fe3faefc9 100644 --- a/src/pld/xilinx_bit.c +++ b/src/pld/xilinx_bit.c @@ -93,7 +93,7 @@ int xilinx_read_bit_file(struct xilinx_bit_file *bit_file, const char *filename) } input_file = fopen(filename, "rb"); - if (input_file == NULL) { + if (!input_file) { LOG_ERROR("couldn't open %s: %s", filename, strerror(errno)); return ERROR_PLD_FILE_LOAD_FAILED; } diff --git a/src/rtos/FreeRTOS.c b/src/rtos/FreeRTOS.c index 68b3f2cc9..27a70fe77 100644 --- a/src/rtos/FreeRTOS.c +++ b/src/rtos/FreeRTOS.c @@ -34,21 +34,21 @@ #define FREERTOS_MAX_PRIORITIES 63 #define FREERTOS_THREAD_NAME_STR_SIZE 200 -struct FreeRTOS_params { +struct freertos_params { const char *target_name; int (*stacking)(struct rtos *rtos, const struct rtos_register_stacking **stacking, target_addr_t stack_ptr); const struct command_registration *commands; }; -struct FreeRTOS_thread_entry { +struct freertos_thread_entry { struct list_head list; threadid_t threadid; target_addr_t tcb; }; struct FreeRTOS { - const struct FreeRTOS_params *param; + const struct freertos_params *param; threadid_t last_threadid; /* Keep track of which threadid we're using for which TCB. We cannot use a * 1:1 mapping because TCB's can be 64 bits, and the gdb protocol doesn't @@ -171,21 +171,21 @@ static int riscv_stacking(struct rtos *rtos, const struct rtos_register_stacking switch (riscv_freertos_stacking) { case STACKING_MAINLINE: if (freertos->pointer_size == 4) - *stacking = &rtos_standard_RV32_stacking; + *stacking = &rtos_standard_rv32_stacking; else if (freertos->pointer_size == 8) - *stacking = &rtos_standard_RV64_stacking; + *stacking = &rtos_standard_rv64_stacking; break; case STACKING_METAL: if (freertos->pointer_size == 4) - *stacking = &rtos_metal_RV32_stacking; + *stacking = &rtos_metal_rv32_stacking; else if (freertos->pointer_size == 8) - *stacking = &rtos_metal_RV64_stacking; + *stacking = &rtos_metal_rv64_stacking; break; } return ERROR_OK; } -static const struct FreeRTOS_params FreeRTOS_params_list[] = { +static const struct freertos_params freertos_params_list[] = { { .target_name = "cortex_m", .stacking = cortex_m_stacking @@ -205,40 +205,40 @@ static const struct FreeRTOS_params FreeRTOS_params_list[] = { }, }; -static bool FreeRTOS_detect_rtos(struct target *target); -static int FreeRTOS_create(struct target *target); -static int FreeRTOS_update_threads(struct rtos *rtos); -static int FreeRTOS_get_thread_reg_list(struct rtos *rtos, threadid_t thread_id, +static bool freertos_detect_rtos(struct target *target); +static int freertos_create(struct target *target); +static int freertos_update_threads(struct rtos *rtos); +static int freertos_get_thread_reg_list(struct rtos *rtos, threadid_t thread_id, struct rtos_reg **reg_list, int *num_regs); -static int FreeRTOS_get_thread_reg(struct rtos *rtos, threadid_t thread_id, +static int freertos_get_thread_reg(struct rtos *rtos, threadid_t thread_id, uint32_t reg_num, struct rtos_reg *reg); -static int FreeRTOS_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_value); -static int FreeRTOS_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]); +static int freertos_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_value); +static int freertos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]); -struct rtos_type FreeRTOS_rtos = { +struct rtos_type freertos_rtos = { .name = "FreeRTOS", - .detect_rtos = FreeRTOS_detect_rtos, - .create = FreeRTOS_create, - .update_threads = FreeRTOS_update_threads, - .get_thread_reg_list = FreeRTOS_get_thread_reg_list, - .get_thread_reg = FreeRTOS_get_thread_reg, - .set_reg = FreeRTOS_set_reg, - .get_symbol_list_to_lookup = FreeRTOS_get_symbol_list_to_lookup, + .detect_rtos = freertos_detect_rtos, + .create = freertos_create, + .update_threads = freertos_update_threads, + .get_thread_reg_list = freertos_get_thread_reg_list, + .get_thread_reg = freertos_get_thread_reg, + .set_reg = freertos_set_reg, + .get_symbol_list_to_lookup = freertos_get_symbol_list_to_lookup, }; -enum FreeRTOS_symbol_values { - FreeRTOS_VAL_pxCurrentTCB = 0, - FreeRTOS_VAL_pxReadyTasksLists = 1, - FreeRTOS_VAL_xDelayedTaskList1 = 2, - FreeRTOS_VAL_xDelayedTaskList2 = 3, - FreeRTOS_VAL_pxDelayedTaskList = 4, - FreeRTOS_VAL_pxOverflowDelayedTaskList = 5, - FreeRTOS_VAL_xPendingReadyList = 6, - FreeRTOS_VAL_xTasksWaitingTermination = 7, - FreeRTOS_VAL_xSuspendedTaskList = 8, - FreeRTOS_VAL_uxCurrentNumberOfTasks = 9, - FreeRTOS_VAL_uxTopUsedPriority = 10, +enum freertos_symbol_values { + FREERTOS_VAL_PX_CURRENT_TCB = 0, + FREERTOS_VAL_PX_READY_TASKS_LISTS = 1, + FREERTOS_VAL_X_DELAYED_TASK_LIST1 = 2, + FREERTOS_VAL_X_DELAYED_TASK_LIST2 = 3, + FREERTOS_VAL_PX_DELAYED_TASK_LIST = 4, + FREERTOS_VAL_PX_OVERFLOW_DELAYED_TASK_LIST = 5, + FREERTOS_VAL_X_PENDING_READY_LIST = 6, + FREERTOS_VAL_X_TASKS_WAITING_TERMINATION = 7, + FREERTOS_VAL_X_SUSPENDED_TASK_LIST = 8, + FREERTOS_VAL_UX_CURRENT_NUMBER_OF_TASKS = 9, + FREERTOS_VAL_UX_TOP_USED_PRIORITY = 10, }; struct symbols { @@ -246,7 +246,7 @@ struct symbols { bool optional; }; -static const struct symbols FreeRTOS_symbol_list[] = { +static const struct symbols freertos_symbol_list[] = { { "pxCurrentTCB", false }, { "pxReadyTasksLists", false }, { "xDelayedTaskList1", false }, @@ -266,7 +266,7 @@ static const struct symbols FreeRTOS_symbol_list[] = { /* may be problems reading if sizes are not 32 bit long integers. */ /* test mallocs for failure */ -static int FreeRTOS_read_struct_value( +static int freertos_read_struct_value( struct target *target, target_addr_t base_address, unsigned offset, unsigned size_bytes, uint64_t *value) { @@ -343,7 +343,7 @@ static unsigned populate_offset_size(struct FreeRTOS *freertos, return offset; } -static void FreeRTOS_compute_offsets(struct rtos *rtos) +static void freertos_compute_offsets(struct rtos *rtos) { struct FreeRTOS *freertos = (struct FreeRTOS *) rtos->rtos_specific_params; @@ -411,10 +411,10 @@ static void FreeRTOS_compute_offsets(struct rtos *rtos) freertos->thread_name_offset = task_control_block_info[5].offset; } -struct FreeRTOS_thread_entry *thread_entry_list_find_by_tcb( +struct freertos_thread_entry *thread_entry_list_find_by_tcb( struct list_head *list, target_addr_t tcb) { - struct FreeRTOS_thread_entry *t; + struct freertos_thread_entry *t; list_for_each_entry(t, list, list) { if (t->tcb == tcb) return t; @@ -422,10 +422,10 @@ struct FreeRTOS_thread_entry *thread_entry_list_find_by_tcb( return NULL; } -struct FreeRTOS_thread_entry *thread_entry_list_find_by_id( +struct freertos_thread_entry *thread_entry_list_find_by_id( struct list_head *list, threadid_t threadid) { - struct FreeRTOS_thread_entry *t; + struct freertos_thread_entry *t; list_for_each_entry(t, list, list) { if (t->threadid == threadid) return t; @@ -433,36 +433,36 @@ struct FreeRTOS_thread_entry *thread_entry_list_find_by_id( return NULL; } -static int FreeRTOS_update_threads(struct rtos *rtos) +static int freertos_update_threads(struct rtos *rtos) { int retval; unsigned int tasks_found = 0; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return ERROR_FAIL; - FreeRTOS_compute_offsets(rtos); + freertos_compute_offsets(rtos); struct FreeRTOS *freertos = (struct FreeRTOS *) rtos->rtos_specific_params; - if (rtos->symbols == NULL) { + if (!rtos->symbols) { LOG_ERROR("No symbols for FreeRTOS"); return ERROR_FAIL; } - if (rtos->symbols[FreeRTOS_VAL_uxCurrentNumberOfTasks].address == 0) { + if (rtos->symbols[FREERTOS_VAL_UX_CURRENT_NUMBER_OF_TASKS].address == 0) { LOG_ERROR("Don't have the number of threads in FreeRTOS"); return ERROR_FAIL; } uint64_t thread_list_size; - retval = FreeRTOS_read_struct_value(rtos->target, - rtos->symbols[FreeRTOS_VAL_uxCurrentNumberOfTasks].address, + retval = freertos_read_struct_value(rtos->target, + rtos->symbols[FREERTOS_VAL_UX_CURRENT_NUMBER_OF_TASKS].address, 0, freertos->ubasetype_size, &thread_list_size); LOG_DEBUG("FreeRTOS: Read uxCurrentNumberOfTasks at 0x%" PRIx64 ", value %" PRIu64, - rtos->symbols[FreeRTOS_VAL_uxCurrentNumberOfTasks].address, + rtos->symbols[FREERTOS_VAL_UX_CURRENT_NUMBER_OF_TASKS].address, thread_list_size); if (retval != ERROR_OK) { @@ -475,8 +475,8 @@ static int FreeRTOS_update_threads(struct rtos *rtos) /* read the current thread */ target_addr_t pxCurrentTCB; - retval = FreeRTOS_read_struct_value(rtos->target, - rtos->symbols[FreeRTOS_VAL_pxCurrentTCB].address, + retval = freertos_read_struct_value(rtos->target, + rtos->symbols[FREERTOS_VAL_PX_CURRENT_TCB].address, 0, freertos->pointer_size, &pxCurrentTCB); @@ -485,7 +485,7 @@ static int FreeRTOS_update_threads(struct rtos *rtos) return retval; } LOG_DEBUG("FreeRTOS: Read pxCurrentTCB at 0x%" PRIx64 ", value 0x%" PRIx64, - rtos->symbols[FreeRTOS_VAL_pxCurrentTCB].address, + rtos->symbols[FREERTOS_VAL_PX_CURRENT_TCB].address, pxCurrentTCB); if ((thread_list_size == 0) || (pxCurrentTCB == 0)) { @@ -523,22 +523,22 @@ static int FreeRTOS_update_threads(struct rtos *rtos) /* Find out how many lists are needed to be read from pxReadyTasksLists, */ uint64_t top_used_priority = 0; - if (rtos->symbols[FreeRTOS_VAL_uxTopUsedPriority].address == 0) { + if (rtos->symbols[FREERTOS_VAL_UX_TOP_USED_PRIORITY].address == 0) { LOG_WARNING("FreeRTOS: uxTopUsedPriority is not defined, consult the OpenOCD manual for a work-around"); /* This is a hack specific to the binary I'm debugging. * Ideally we get https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/33 * into our FreeRTOS source. */ top_used_priority = 6; } else { - retval = FreeRTOS_read_struct_value(rtos->target, - rtos->symbols[FreeRTOS_VAL_uxTopUsedPriority].address, + retval = freertos_read_struct_value(rtos->target, + rtos->symbols[FREERTOS_VAL_UX_TOP_USED_PRIORITY].address, 0, freertos->ubasetype_size, &top_used_priority); if (retval != ERROR_OK) return retval; LOG_DEBUG("FreeRTOS: Read uxTopUsedPriority at 0x%" PRIx64 ", value %" PRIu64, - rtos->symbols[FreeRTOS_VAL_uxTopUsedPriority].address, + rtos->symbols[FREERTOS_VAL_UX_TOP_USED_PRIORITY].address, top_used_priority); } if (top_used_priority > FREERTOS_MAX_PRIORITIES) { @@ -563,14 +563,14 @@ static int FreeRTOS_update_threads(struct rtos *rtos) unsigned int num_lists; for (num_lists = 0; num_lists < config_max_priorities; num_lists++) - list_of_lists[num_lists] = rtos->symbols[FreeRTOS_VAL_pxReadyTasksLists].address + + list_of_lists[num_lists] = rtos->symbols[FREERTOS_VAL_PX_READY_TASKS_LISTS].address + num_lists * freertos->list_width; - list_of_lists[num_lists++] = rtos->symbols[FreeRTOS_VAL_xDelayedTaskList1].address; - list_of_lists[num_lists++] = rtos->symbols[FreeRTOS_VAL_xDelayedTaskList2].address; - list_of_lists[num_lists++] = rtos->symbols[FreeRTOS_VAL_xPendingReadyList].address; - list_of_lists[num_lists++] = rtos->symbols[FreeRTOS_VAL_xSuspendedTaskList].address; - list_of_lists[num_lists++] = rtos->symbols[FreeRTOS_VAL_xTasksWaitingTermination].address; + list_of_lists[num_lists++] = rtos->symbols[FREERTOS_VAL_X_DELAYED_TASK_LIST1].address; + list_of_lists[num_lists++] = rtos->symbols[FREERTOS_VAL_X_DELAYED_TASK_LIST2].address; + list_of_lists[num_lists++] = rtos->symbols[FREERTOS_VAL_X_PENDING_READY_LIST].address; + list_of_lists[num_lists++] = rtos->symbols[FREERTOS_VAL_X_SUSPENDED_TASK_LIST].address; + list_of_lists[num_lists++] = rtos->symbols[FREERTOS_VAL_X_TASKS_WAITING_TERMINATION].address; rtos->current_thread = 0; for (unsigned int i = 0; i < num_lists; i++) { @@ -579,7 +579,7 @@ static int FreeRTOS_update_threads(struct rtos *rtos) /* Read the number of threads in this list */ uint64_t list_thread_count = 0; - retval = FreeRTOS_read_struct_value(rtos->target, + retval = freertos_read_struct_value(rtos->target, list_of_lists[i], freertos->list_uxNumberOfItems_offset, freertos->list_uxNumberOfItems_size, @@ -598,7 +598,7 @@ static int FreeRTOS_update_threads(struct rtos *rtos) /* Read the location of first list item */ target_addr_t prev_list_elem_ptr = -1; target_addr_t list_elem_ptr = 0; - retval = FreeRTOS_read_struct_value(rtos->target, + retval = freertos_read_struct_value(rtos->target, list_of_lists[i], freertos->list_next_offset, freertos->list_next_size, @@ -617,7 +617,7 @@ static int FreeRTOS_update_threads(struct rtos *rtos) /* Get the location of the thread structure. */ rtos->thread_details[tasks_found].threadid = 0; target_addr_t tcb; - retval = FreeRTOS_read_struct_value(rtos->target, + retval = freertos_read_struct_value(rtos->target, list_elem_ptr, freertos->list_elem_content_offset, freertos->list_elem_content_size, @@ -628,11 +628,11 @@ static int FreeRTOS_update_threads(struct rtos *rtos) return retval; } - const struct FreeRTOS_thread_entry *value = + const struct freertos_thread_entry *value = thread_entry_list_find_by_tcb(&freertos->thread_entry_list, tcb); - if (value == NULL) { - struct FreeRTOS_thread_entry *new_value = calloc(1, sizeof(struct FreeRTOS_thread_entry)); + if (!value) { + struct freertos_thread_entry *new_value = calloc(1, sizeof(struct freertos_thread_entry)); new_value->tcb = tcb; /* threadid can't be 0. */ new_value->threadid = ++freertos->last_threadid; @@ -690,7 +690,7 @@ static int FreeRTOS_update_threads(struct rtos *rtos) prev_list_elem_ptr = list_elem_ptr; list_elem_ptr = 0; - retval = FreeRTOS_read_struct_value(rtos->target, + retval = freertos_read_struct_value(rtos->target, prev_list_elem_ptr, freertos->list_elem_next_offset, freertos->list_elem_next_size, @@ -712,29 +712,29 @@ static int FreeRTOS_update_threads(struct rtos *rtos) return 0; } -static int FreeRTOS_get_stacking_info(struct rtos *rtos, threadid_t thread_id, +static int freertos_get_stacking_info(struct rtos *rtos, threadid_t thread_id, const struct rtos_register_stacking **stacking_info, target_addr_t *stack_ptr) { - if (rtos->rtos_specific_params == NULL) { + if (!rtos->rtos_specific_params) { LOG_ERROR("rtos_specific_params is NULL!"); return ERROR_FAIL; } - FreeRTOS_compute_offsets(rtos); + freertos_compute_offsets(rtos); struct FreeRTOS *freertos = (struct FreeRTOS *) rtos->rtos_specific_params; - const struct FreeRTOS_params *param = freertos->param; + const struct freertos_params *param = freertos->param; - const struct FreeRTOS_thread_entry *entry = + const struct freertos_thread_entry *entry = thread_entry_list_find_by_id(&freertos->thread_entry_list, thread_id); - if (entry == NULL) { + if (!entry) { LOG_ERROR("Unknown thread id: %" PRId64, thread_id); return ERROR_FAIL; } /* Read the stack pointer */ - int retval = FreeRTOS_read_struct_value(rtos->target, + int retval = freertos_read_struct_value(rtos->target, entry->tcb, freertos->thread_stack_offset, freertos->thread_stack_size, @@ -754,7 +754,7 @@ static int FreeRTOS_get_stacking_info(struct rtos *rtos, threadid_t thread_id, return ERROR_OK; } -static int FreeRTOS_get_thread_reg_list(struct rtos *rtos, threadid_t thread_id, +static int freertos_get_thread_reg_list(struct rtos *rtos, threadid_t thread_id, struct rtos_reg **reg_list, int *num_regs) { /* Let the caller read registers directly for the current thread. */ @@ -763,13 +763,13 @@ static int FreeRTOS_get_thread_reg_list(struct rtos *rtos, threadid_t thread_id, const struct rtos_register_stacking *stacking_info; target_addr_t stack_ptr; - if (FreeRTOS_get_stacking_info(rtos, thread_id, &stacking_info, &stack_ptr) != ERROR_OK) + if (freertos_get_stacking_info(rtos, thread_id, &stacking_info, &stack_ptr) != ERROR_OK) return ERROR_FAIL; return rtos_generic_stack_read(rtos->target, stacking_info, stack_ptr, reg_list, num_regs); } -static int FreeRTOS_get_thread_reg(struct rtos *rtos, threadid_t thread_id, +static int freertos_get_thread_reg(struct rtos *rtos, threadid_t thread_id, uint32_t reg_num, struct rtos_reg *reg) { LOG_DEBUG("reg_num=%d", reg_num); @@ -779,13 +779,13 @@ static int FreeRTOS_get_thread_reg(struct rtos *rtos, threadid_t thread_id, const struct rtos_register_stacking *stacking_info; target_addr_t stack_ptr; - if (FreeRTOS_get_stacking_info(rtos, thread_id, &stacking_info, &stack_ptr) != ERROR_OK) + if (freertos_get_stacking_info(rtos, thread_id, &stacking_info, &stack_ptr) != ERROR_OK) return ERROR_FAIL; return rtos_generic_stack_read_reg(rtos->target, stacking_info, stack_ptr, reg_num, reg); } -static int FreeRTOS_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_value) +static int freertos_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_value) { LOG_DEBUG("[%" PRId64 "] reg_num=%" PRId32, rtos->current_threadid, reg_num); @@ -795,7 +795,7 @@ static int FreeRTOS_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_va const struct rtos_register_stacking *stacking_info; target_addr_t stack_ptr; - if (FreeRTOS_get_stacking_info(rtos, rtos->current_threadid, + if (freertos_get_stacking_info(rtos, rtos->current_threadid, &stacking_info, &stack_ptr) != ERROR_OK) return ERROR_FAIL; @@ -803,15 +803,15 @@ static int FreeRTOS_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_va reg_num, reg_value); } -static int FreeRTOS_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) +static int freertos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) { unsigned int i; *symbol_list = calloc( - ARRAY_SIZE(FreeRTOS_symbol_list), sizeof(struct symbol_table_elem)); + ARRAY_SIZE(freertos_symbol_list), sizeof(struct symbol_table_elem)); - for (i = 0; i < ARRAY_SIZE(FreeRTOS_symbol_list); i++) { - (*symbol_list)[i].symbol_name = FreeRTOS_symbol_list[i].name; - (*symbol_list)[i].optional = FreeRTOS_symbol_list[i].optional; + for (i = 0; i < ARRAY_SIZE(freertos_symbol_list); i++) { + (*symbol_list)[i].symbol_name = freertos_symbol_list[i].name; + (*symbol_list)[i].optional = freertos_symbol_list[i].optional; } return 0; @@ -819,26 +819,26 @@ static int FreeRTOS_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_l #if 0 -static int FreeRTOS_set_current_thread(struct rtos *rtos, threadid_t thread_id) +static int freertos_set_current_thread(struct rtos *rtos, threadid_t thread_id) { return 0; } -static int FreeRTOS_get_thread_ascii_info(struct rtos *rtos, threadid_t thread_id, char **info) +static int freertos_get_thread_ascii_info(struct rtos *rtos, threadid_t thread_id, char **info) { int retval; - const struct FreeRTOS_params *param; + const struct freertos_params *param; - if (rtos == NULL) + if (!rtos) return -1; if (thread_id == 0) return -2; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return -3; - param = (const struct FreeRTOS_params *) rtos->rtos_specific_params; + param = (const struct freertos_params *) rtos->rtos_specific_params; #define FREERTOS_THREAD_NAME_STR_SIZE (200) char tmp_str[FREERTOS_THREAD_NAME_STR_SIZE]; @@ -864,30 +864,30 @@ static int FreeRTOS_get_thread_ascii_info(struct rtos *rtos, threadid_t thread_i #endif -static bool FreeRTOS_detect_rtos(struct target *target) +static bool freertos_detect_rtos(struct target *target) { - if ((target->rtos->symbols != NULL) && - (target->rtos->symbols[FreeRTOS_VAL_pxReadyTasksLists].address != 0)) { + if ((target->rtos->symbols) && + (target->rtos->symbols[FREERTOS_VAL_PX_READY_TASKS_LISTS].address != 0)) { /* looks like FreeRTOS */ return true; } return false; } -static int FreeRTOS_create(struct target *target) +static int freertos_create(struct target *target) { unsigned int i = 0; - while (i < ARRAY_SIZE(FreeRTOS_params_list) && - strcmp(FreeRTOS_params_list[i].target_name, target->type->name) != 0) { + while (i < ARRAY_SIZE(freertos_params_list) && + strcmp(freertos_params_list[i].target_name, target->type->name) != 0) { i++; } - if (i >= ARRAY_SIZE(FreeRTOS_params_list)) { + if (i >= ARRAY_SIZE(freertos_params_list)) { LOG_ERROR("Could not find target in FreeRTOS compatibility list"); return ERROR_FAIL; } target->rtos->rtos_specific_params = calloc(1, sizeof(struct FreeRTOS)); - if (target->rtos->rtos_specific_params == NULL) { + if (!target->rtos->rtos_specific_params) { LOG_ERROR("calloc failed"); return ERROR_FAIL; } @@ -895,7 +895,7 @@ static int FreeRTOS_create(struct target *target) struct FreeRTOS *freertos = (struct FreeRTOS *) target->rtos->rtos_specific_params; INIT_LIST_HEAD(&freertos->thread_entry_list); - freertos->param = &FreeRTOS_params_list[i]; + freertos->param = &freertos_params_list[i]; if (freertos->param->commands) { if (register_commands(target->rtos->cmd_ctx, NULL, diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am index 49cb830e5..f09ac21a2 100644 --- a/src/rtos/Makefile.am +++ b/src/rtos/Makefile.am @@ -31,10 +31,3 @@ noinst_LTLIBRARIES += %D%/librtos.la %D%/rtos_riot_stackings.h \ %D%/rtos_ucos_iii_stackings.h \ %D%/nuttx_header.h - -%C%_librtos_la_CFLAGS = $(AM_CFLAGS) - -if IS_MINGW -# FD_* macros are sloppy with their signs on MinGW32 platform -%C%_librtos_la_CFLAGS += -Wno-sign-compare -endif diff --git a/src/rtos/ThreadX.c b/src/rtos/ThreadX.c index 99f3bf91e..441b7abc5 100644 --- a/src/rtos/ThreadX.c +++ b/src/rtos/ThreadX.c @@ -35,20 +35,20 @@ static const struct rtos_register_stacking *get_stacking_info_arm926ejs(const st static int is_thread_id_valid(const struct rtos *rtos, int64_t thread_id); static int is_thread_id_valid_arm926ejs(const struct rtos *rtos, int64_t thread_id); -static bool ThreadX_detect_rtos(struct target *target); -static int ThreadX_create(struct target *target); -static int ThreadX_update_threads(struct rtos *rtos); -static int ThreadX_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs); -static int ThreadX_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]); +static bool threadx_detect_rtos(struct target *target); +static int threadx_create(struct target *target); +static int threadx_update_threads(struct rtos *rtos); +static int threadx_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs); +static int threadx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]); -struct ThreadX_thread_state { +struct threadx_thread_state { int value; const char *desc; }; -static const struct ThreadX_thread_state ThreadX_thread_states[] = { +static const struct threadx_thread_state threadx_thread_states[] = { { 0, "Ready" }, { 1, "Completed" }, { 2, "Terminated" }, @@ -65,7 +65,7 @@ static const struct ThreadX_thread_state ThreadX_thread_states[] = { { 13, "Waiting - Mutex" }, }; -#define THREADX_NUM_STATES ARRAY_SIZE(ThreadX_thread_states) +#define THREADX_NUM_STATES ARRAY_SIZE(threadx_thread_states) #define ARM926EJS_REGISTERS_SIZE_SOLICITED (11 * 4) static const struct stack_register_offset rtos_threadx_arm926ejs_stack_offsets_solicited[] = { @@ -125,7 +125,7 @@ static const struct rtos_register_stacking rtos_threadx_arm926ejs_stacking[] = { }, }; -struct ThreadX_params { +struct threadx_params { const char *target_name; unsigned char pointer_width; unsigned char thread_stack_offset; @@ -138,7 +138,7 @@ struct ThreadX_params { int (*fn_is_thread_id_valid)(const struct rtos *rtos, int64_t thread_id); }; -static const struct ThreadX_params ThreadX_params_list[] = { +static const struct threadx_params threadx_params_list[] = { { "cortex_m", /* target_name */ 4, /* pointer_width; */ @@ -146,7 +146,7 @@ static const struct ThreadX_params ThreadX_params_list[] = { 40, /* thread_name_offset; */ 48, /* thread_state_offset; */ 136, /* thread_next_offset */ - &rtos_standard_Cortex_M3_stacking, /* stacking_info */ + &rtos_standard_cortex_m3_stacking, /* stacking_info */ 1, /* stacking_info_nb */ NULL, /* fn_get_stacking_info */ NULL, /* fn_is_thread_id_valid */ @@ -158,7 +158,7 @@ static const struct ThreadX_params ThreadX_params_list[] = { 40, /* thread_name_offset; */ 48, /* thread_state_offset; */ 136, /* thread_next_offset */ - &rtos_standard_Cortex_R4_stacking, /* stacking_info */ + &rtos_standard_cortex_r4_stacking, /* stacking_info */ 1, /* stacking_info_nb */ NULL, /* fn_get_stacking_info */ NULL, /* fn_is_thread_id_valid */ @@ -177,34 +177,34 @@ static const struct ThreadX_params ThreadX_params_list[] = { }, }; -enum ThreadX_symbol_values { - ThreadX_VAL_tx_thread_current_ptr = 0, - ThreadX_VAL_tx_thread_created_ptr = 1, - ThreadX_VAL_tx_thread_created_count = 2, +enum threadx_symbol_values { + THREADX_VAL_TX_THREAD_CURRENT_PTR = 0, + THREADX_VAL_TX_THREAD_CREATED_PTR = 1, + THREADX_VAL_TX_THREAD_CREATED_COUNT = 2, }; -static const char * const ThreadX_symbol_list[] = { +static const char * const threadx_symbol_list[] = { "_tx_thread_current_ptr", "_tx_thread_created_ptr", "_tx_thread_created_count", NULL }; -const struct rtos_type ThreadX_rtos = { +const struct rtos_type threadx_rtos = { .name = "ThreadX", - .detect_rtos = ThreadX_detect_rtos, - .create = ThreadX_create, - .update_threads = ThreadX_update_threads, - .get_thread_reg_list = ThreadX_get_thread_reg_list, - .get_symbol_list_to_lookup = ThreadX_get_symbol_list_to_lookup, + .detect_rtos = threadx_detect_rtos, + .create = threadx_create, + .update_threads = threadx_update_threads, + .get_thread_reg_list = threadx_get_thread_reg_list, + .get_symbol_list_to_lookup = threadx_get_symbol_list_to_lookup, }; static const struct rtos_register_stacking *get_stacking_info(const struct rtos *rtos, int64_t stack_ptr) { - const struct ThreadX_params *param = (const struct ThreadX_params *) rtos->rtos_specific_params; + const struct threadx_params *param = (const struct threadx_params *) rtos->rtos_specific_params; - if (param->fn_get_stacking_info != NULL) + if (param->fn_get_stacking_info) return param->fn_get_stacking_info(rtos, stack_ptr); return param->stacking_info + 0; @@ -212,14 +212,14 @@ static const struct rtos_register_stacking *get_stacking_info(const struct rtos static int is_thread_id_valid(const struct rtos *rtos, int64_t thread_id) { - const struct ThreadX_params *param; + const struct threadx_params *param; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return 0; /* invalid */ - param = (const struct ThreadX_params *) rtos->rtos_specific_params; + param = (const struct threadx_params *) rtos->rtos_specific_params; - if (param->fn_is_thread_id_valid != NULL) + if (param->fn_is_thread_id_valid) return param->fn_is_thread_id_valid(rtos, thread_id); return (thread_id != 0); @@ -227,7 +227,7 @@ static int is_thread_id_valid(const struct rtos *rtos, int64_t thread_id) static const struct rtos_register_stacking *get_stacking_info_arm926ejs(const struct rtos *rtos, int64_t stack_ptr) { - const struct ThreadX_params *param = (const struct ThreadX_params *) rtos->rtos_specific_params; + const struct threadx_params *param = (const struct threadx_params *) rtos->rtos_specific_params; int retval; uint32_t flag; @@ -254,34 +254,34 @@ static int is_thread_id_valid_arm926ejs(const struct rtos *rtos, int64_t thread_ return (thread_id != 0 && thread_id != 1); } -static int ThreadX_update_threads(struct rtos *rtos) +static int threadx_update_threads(struct rtos *rtos) { int retval; int tasks_found = 0; int thread_list_size = 0; - const struct ThreadX_params *param; + const struct threadx_params *param; - if (rtos == NULL) + if (!rtos) return -1; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return -3; - param = (const struct ThreadX_params *) rtos->rtos_specific_params; + param = (const struct threadx_params *) rtos->rtos_specific_params; - if (rtos->symbols == NULL) { + if (!rtos->symbols) { LOG_ERROR("No symbols for ThreadX"); return -4; } - if (rtos->symbols[ThreadX_VAL_tx_thread_created_count].address == 0) { + if (rtos->symbols[THREADX_VAL_TX_THREAD_CREATED_COUNT].address == 0) { LOG_ERROR("Don't have the number of threads in ThreadX"); return -2; } /* read the number of threads */ retval = target_read_buffer(rtos->target, - rtos->symbols[ThreadX_VAL_tx_thread_created_count].address, + rtos->symbols[THREADX_VAL_TX_THREAD_CREATED_COUNT].address, 4, (uint8_t *)&thread_list_size); @@ -295,7 +295,7 @@ static int ThreadX_update_threads(struct rtos *rtos) /* read the current thread id */ retval = target_read_buffer(rtos->target, - rtos->symbols[ThreadX_VAL_tx_thread_current_ptr].address, + rtos->symbols[THREADX_VAL_TX_THREAD_CURRENT_PTR].address, 4, (uint8_t *)&rtos->current_thread); @@ -332,7 +332,7 @@ static int ThreadX_update_threads(struct rtos *rtos) /* Read the pointer to the first thread */ int64_t thread_ptr = 0; retval = target_read_buffer(rtos->target, - rtos->symbols[ThreadX_VAL_tx_thread_created_ptr].address, + rtos->symbols[THREADX_VAL_TX_THREAD_CREATED_PTR].address, param->pointer_width, (uint8_t *)&thread_ptr); if (retval != ERROR_OK) { @@ -393,13 +393,13 @@ static int ThreadX_update_threads(struct rtos *rtos) } for (i = 0; (i < THREADX_NUM_STATES) && - (ThreadX_thread_states[i].value != thread_status); i++) { + (threadx_thread_states[i].value != thread_status); i++) { /* empty */ } const char *state_desc; if (i < THREADX_NUM_STATES) - state_desc = ThreadX_thread_states[i].desc; + state_desc = threadx_thread_states[i].desc; else state_desc = "Unknown state"; @@ -429,22 +429,22 @@ static int ThreadX_update_threads(struct rtos *rtos) return 0; } -static int ThreadX_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, +static int threadx_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs) { int retval; - const struct ThreadX_params *param; + const struct threadx_params *param; - if (rtos == NULL) + if (!rtos) return -1; if (!is_thread_id_valid(rtos, thread_id)) return -2; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return -3; - param = (const struct ThreadX_params *) rtos->rtos_specific_params; + param = (const struct threadx_params *) rtos->rtos_specific_params; /* Read the stack pointer */ int64_t stack_ptr = 0; @@ -467,7 +467,7 @@ static int ThreadX_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, const struct rtos_register_stacking *stacking_info = get_stacking_info(rtos, stack_ptr); - if (stacking_info == NULL) { + if (!stacking_info) { LOG_ERROR("Unknown stacking info for thread id=0x%" PRIx64, (uint64_t)thread_id); return -6; } @@ -475,22 +475,22 @@ static int ThreadX_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, return rtos_generic_stack_read(rtos->target, stacking_info, stack_ptr, reg_list, num_regs); } -static int ThreadX_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) +static int threadx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) { unsigned int i; *symbol_list = calloc( - ARRAY_SIZE(ThreadX_symbol_list), sizeof(struct symbol_table_elem)); + ARRAY_SIZE(threadx_symbol_list), sizeof(struct symbol_table_elem)); - for (i = 0; i < ARRAY_SIZE(ThreadX_symbol_list); i++) - (*symbol_list)[i].symbol_name = ThreadX_symbol_list[i]; + for (i = 0; i < ARRAY_SIZE(threadx_symbol_list); i++) + (*symbol_list)[i].symbol_name = threadx_symbol_list[i]; return 0; } -static bool ThreadX_detect_rtos(struct target *target) +static bool threadx_detect_rtos(struct target *target) { - if ((target->rtos->symbols != NULL) && - (target->rtos->symbols[ThreadX_VAL_tx_thread_created_ptr].address != 0)) { + if ((target->rtos->symbols) && + (target->rtos->symbols[THREADX_VAL_TX_THREAD_CREATED_PTR].address != 0)) { /* looks like ThreadX */ return true; } @@ -499,12 +499,12 @@ static bool ThreadX_detect_rtos(struct target *target) #if 0 -static int ThreadX_set_current_thread(struct rtos *rtos, threadid_t thread_id) +static int threadx_set_current_thread(struct rtos *rtos, threadid_t thread_id) { return 0; } -static int ThreadX_get_thread_detail(struct rtos *rtos, +static int threadx_get_thread_detail(struct rtos *rtos, threadid_t thread_id, struct thread_detail *detail) { @@ -514,20 +514,20 @@ static int ThreadX_get_thread_detail(struct rtos *rtos, #define THREADX_THREAD_NAME_STR_SIZE (200) char tmp_str[THREADX_THREAD_NAME_STR_SIZE]; - const struct ThreadX_params *param; + const struct threadx_params *param; - if (rtos == NULL) + if (!rtos) return -1; if (thread_id == 0) return -2; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return -3; - param = (const struct ThreadX_params *) rtos->rtos_specific_params; + param = (const struct threadx_params *) rtos->rtos_specific_params; - if (rtos->symbols == NULL) { + if (!rtos->symbols) { LOG_ERROR("No symbols for ThreadX"); return -3; } @@ -574,13 +574,13 @@ static int ThreadX_get_thread_detail(struct rtos *rtos, } for (i = 0; (i < THREADX_NUM_STATES) && - (ThreadX_thread_states[i].value != thread_status); i++) { + (threadx_thread_states[i].value != thread_status); i++) { /* empty */ } char *state_desc; if (i < THREADX_NUM_STATES) - state_desc = ThreadX_thread_states[i].desc; + state_desc = threadx_thread_states[i].desc; else state_desc = "Unknown state"; @@ -593,11 +593,11 @@ static int ThreadX_get_thread_detail(struct rtos *rtos, #endif -static int ThreadX_create(struct target *target) +static int threadx_create(struct target *target) { - for (unsigned int i = 0; i < ARRAY_SIZE(ThreadX_params_list); i++) - if (strcmp(ThreadX_params_list[i].target_name, target->type->name) == 0) { - target->rtos->rtos_specific_params = (void *)&ThreadX_params_list[i]; + for (unsigned int i = 0; i < ARRAY_SIZE(threadx_params_list); i++) + if (strcmp(threadx_params_list[i].target_name, target->type->name) == 0) { + target->rtos->rtos_specific_params = (void *)&threadx_params_list[i]; target->rtos->current_thread = 0; target->rtos->thread_details = NULL; return 0; diff --git a/src/rtos/chibios.c b/src/rtos/chibios.c index 2a23017cd..ef1f34d51 100644 --- a/src/rtos/chibios.c +++ b/src/rtos/chibios.c @@ -62,9 +62,9 @@ struct chibios_chdebug { uint8_t cf_off_time; /**< @brief Offset of @p p_time field. */ }; -#define GET_CH_KERNEL_MAJOR(codedVersion) ((codedVersion >> 11) & 0x1f) -#define GET_CH_KERNEL_MINOR(codedVersion) ((codedVersion >> 6) & 0x1f) -#define GET_CH_KERNEL_PATCH(codedVersion) ((codedVersion >> 0) & 0x3f) +#define GET_CH_KERNEL_MAJOR(coded_version) ((coded_version >> 11) & 0x1f) +#define GET_CH_KERNEL_MINOR(coded_version) ((coded_version >> 6) & 0x1f) +#define GET_CH_KERNEL_PATCH(coded_version) ((coded_version >> 0) & 0x3f) /** * @brief ChibiOS thread states. @@ -184,10 +184,10 @@ static int chibios_update_memory_signature(struct rtos *rtos) } /* Convert endianness of version field */ - const uint8_t *versionTarget = (const uint8_t *) + const uint8_t *versiontarget = (const uint8_t *) &signature->ch_version; signature->ch_version = rtos->target->endianness == TARGET_LITTLE_ENDIAN ? - le_to_h_u32(versionTarget) : be_to_h_u32(versionTarget); + le_to_h_u32(versiontarget) : be_to_h_u32(versiontarget); const uint16_t ch_version = signature->ch_version; LOG_INFO("Successfully loaded memory map of ChibiOS/RT target " @@ -469,8 +469,8 @@ static int chibios_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, const struct chibios_params *param; uint32_t stack_ptr = 0; - if ((rtos == NULL) || (thread_id == 0) || - (rtos->rtos_specific_params == NULL)) + if ((!rtos) || (thread_id == 0) || + (!rtos->rtos_specific_params)) return -1; param = (const struct chibios_params *) rtos->rtos_specific_params; @@ -500,7 +500,7 @@ static int chibios_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_li { *symbol_list = malloc(sizeof(chibios_symbol_list)); - if (*symbol_list == NULL) + if (!*symbol_list) return ERROR_FAIL; memcpy(*symbol_list, chibios_symbol_list, sizeof(chibios_symbol_list)); @@ -509,7 +509,7 @@ static int chibios_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_li static bool chibios_detect_rtos(struct target *target) { - if ((target->rtos->symbols != NULL) && + if ((target->rtos->symbols) && ((target->rtos->symbols[CHIBIOS_VAL_RLIST].address != 0) || (target->rtos->symbols[CHIBIOS_VAL_CH].address != 0))) { diff --git a/src/rtos/chromium-ec.c b/src/rtos/chromium-ec.c index 1476f1969..1c8f4e3f4 100644 --- a/src/rtos/chromium-ec.c +++ b/src/rtos/chromium-ec.c @@ -36,7 +36,7 @@ static const struct chromium_ec_params chromium_ec_params_list[] = { .task_offset_sp = 0, .task_offset_events = 4, .task_offset_runtime = 8, - .stacking = &rtos_standard_Cortex_M3_stacking, + .stacking = &rtos_standard_cortex_m3_stacking, }, { @@ -46,7 +46,7 @@ static const struct chromium_ec_params chromium_ec_params_list[] = { .task_offset_sp = 0, .task_offset_events = 4, .task_offset_runtime = 8, - .stacking = &rtos_standard_Cortex_M3_stacking, + .stacking = &rtos_standard_cortex_m3_stacking, }, }; @@ -62,13 +62,13 @@ static const char * const chromium_ec_symbol_list[] = { }; enum chromium_ec_symbol_values { - CHROMIUM_EC_VAL_start_called = 0, - CHROMIUM_EC_VAL_current_task, - CHROMIUM_EC_VAL_tasks, - CHROMIUM_EC_VAL_tasks_enabled, - CHROMIUM_EC_VAL_tasks_ready, - CHROMIUM_EC_VAL_task_names, - CHROMIUM_EC_VAL_build_info, + CHROMIUM_EC_VAL_START_CALLED = 0, + CHROMIUM_EC_VAL_CURRENT_TASK, + CHROMIUM_EC_VAL_TASKS, + CHROMIUM_EC_VAL_TASKS_ENABLED, + CHROMIUM_EC_VAL_TASKS_READY, + CHROMIUM_EC_VAL_TASK_NAMES, + CHROMIUM_EC_VAL_BUILD_INFO, CHROMIUM_EC_VAL_COUNT, }; @@ -84,7 +84,7 @@ static bool chromium_ec_detect_rtos(struct target *target) if (!target || !target->rtos || !target->rtos->symbols) return false; - for (sym = CHROMIUM_EC_VAL_start_called; + for (sym = CHROMIUM_EC_VAL_START_CALLED; sym < CHROMIUM_EC_VAL_COUNT; sym++) { if (target->rtos->symbols[sym].address) { LOG_DEBUG("Chromium-EC: Symbol \"%s\" found", @@ -97,7 +97,7 @@ static bool chromium_ec_detect_rtos(struct target *target) } ret = target_read_buffer(target, - target->rtos->symbols[CHROMIUM_EC_VAL_build_info].address, + target->rtos->symbols[CHROMIUM_EC_VAL_BUILD_INFO].address, sizeof(build_info_buf), (uint8_t *)build_info_buf); @@ -107,7 +107,7 @@ static bool chromium_ec_detect_rtos(struct target *target) LOG_INFO("Chromium-EC: Buildinfo: %s", build_info_buf); return target->rtos->symbols && - target->rtos->symbols[CHROMIUM_EC_VAL_start_called].address; + target->rtos->symbols[CHROMIUM_EC_VAL_START_CALLED].address; } static int chromium_ec_create(struct target *target) @@ -143,7 +143,7 @@ static int chromium_ec_get_current_task_ptr(struct rtos *rtos, uint32_t *current return ERROR_FAIL; return target_read_u32(rtos->target, - rtos->symbols[CHROMIUM_EC_VAL_current_task].address, + rtos->symbols[CHROMIUM_EC_VAL_CURRENT_TASK].address, current_task); } @@ -153,7 +153,7 @@ static int chromium_ec_get_num_tasks(struct rtos *rtos, int *num_tasks) int ret, t, found; ret = target_read_u32(rtos->target, - rtos->symbols[CHROMIUM_EC_VAL_tasks_enabled].address, + rtos->symbols[CHROMIUM_EC_VAL_TASKS_ENABLED].address, &tasks_enabled); if (ret != ERROR_OK) { LOG_ERROR("Failed to determine #of tasks"); @@ -213,7 +213,7 @@ static int chromium_ec_update_threads(struct rtos *rtos) /* One check if task switching has started ... */ start_called = 0; - ret = target_read_u32(rtos->target, rtos->symbols[CHROMIUM_EC_VAL_start_called].address, + ret = target_read_u32(rtos->target, rtos->symbols[CHROMIUM_EC_VAL_START_CALLED].address, &start_called); if (ret != ERROR_OK) { LOG_ERROR("Failed to load start_called"); @@ -241,7 +241,7 @@ static int chromium_ec_update_threads(struct rtos *rtos) } tasks_enabled = 0; - ret = target_read_u32(rtos->target, rtos->symbols[CHROMIUM_EC_VAL_tasks_enabled].address, + ret = target_read_u32(rtos->target, rtos->symbols[CHROMIUM_EC_VAL_TASKS_ENABLED].address, &tasks_enabled); if (ret != ERROR_OK) { LOG_ERROR("Failed to load tasks_enabled"); @@ -249,14 +249,14 @@ static int chromium_ec_update_threads(struct rtos *rtos) } tasks_ready = 0; - ret = target_read_u32(rtos->target, rtos->symbols[CHROMIUM_EC_VAL_tasks_ready].address, + ret = target_read_u32(rtos->target, rtos->symbols[CHROMIUM_EC_VAL_TASKS_READY].address, &tasks_ready); if (ret != ERROR_OK) { LOG_ERROR("Failed to load tasks_ready"); return ret; } - thread_ptr = rtos->symbols[CHROMIUM_EC_VAL_tasks].address; + thread_ptr = rtos->symbols[CHROMIUM_EC_VAL_TASKS].address; tasks_found = 0; for (t = 0; t < CROS_EC_MAX_TASKS; t++) { @@ -268,7 +268,7 @@ static int chromium_ec_update_threads(struct rtos *rtos) rtos->thread_details[tasks_found].threadid = thread_ptr; ret = target_read_u32(rtos->target, - rtos->symbols[CHROMIUM_EC_VAL_task_names].address + + rtos->symbols[CHROMIUM_EC_VAL_TASK_NAMES].address + params->ptr_size * t, &name_ptr); if (ret != ERROR_OK) { LOG_ERROR("Failed to read name_ptr"); @@ -348,7 +348,7 @@ static int chromium_ec_get_thread_reg_list(struct rtos *rtos, return ERROR_FAIL; ret = target_read_u32(rtos->target, - rtos->symbols[CHROMIUM_EC_VAL_tasks].address + + rtos->symbols[CHROMIUM_EC_VAL_TASKS].address + params->task_offset_next * t, &stack_ptr); if (ret != ERROR_OK) { diff --git a/src/rtos/eCos.c b/src/rtos/eCos.c index 1b1e73e60..a81d7b993 100644 --- a/src/rtos/eCos.c +++ b/src/rtos/eCos.c @@ -27,18 +27,18 @@ #include "helper/types.h" #include "rtos_ecos_stackings.h" -static bool eCos_detect_rtos(struct target *target); -static int eCos_create(struct target *target); -static int eCos_update_threads(struct rtos *rtos); -static int eCos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs); -static int eCos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]); +static bool ecos_detect_rtos(struct target *target); +static int ecos_create(struct target *target); +static int ecos_update_threads(struct rtos *rtos); +static int ecos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs); +static int ecos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]); -struct eCos_thread_state { +struct ecos_thread_state { int value; const char *desc; }; -static const struct eCos_thread_state eCos_thread_states[] = { +static const struct ecos_thread_state ecos_thread_states[] = { { 0, "Ready" }, { 1, "Sleeping" }, { 2, "Countsleep" }, @@ -47,9 +47,9 @@ static const struct eCos_thread_state eCos_thread_states[] = { { 16, "Exited" } }; -#define ECOS_NUM_STATES ARRAY_SIZE(eCos_thread_states) +#define ECOS_NUM_STATES ARRAY_SIZE(ecos_thread_states) -struct eCos_params { +struct ecos_params { const char *target_name; unsigned char pointer_width; unsigned char thread_stack_offset; @@ -60,7 +60,7 @@ struct eCos_params { const struct rtos_register_stacking *stacking_info; }; -static const struct eCos_params eCos_params_list[] = { +static const struct ecos_params ecos_params_list[] = { { "cortex_m", /* target_name */ 4, /* pointer_width; */ @@ -69,53 +69,53 @@ static const struct eCos_params eCos_params_list[] = { 0x3c, /* thread_state_offset; */ 0xa0, /* thread_next_offset */ 0x4c, /* thread_uniqueid_offset */ - &rtos_eCos_Cortex_M3_stacking /* stacking_info */ + &rtos_ecos_cortex_m3_stacking /* stacking_info */ } }; -enum eCos_symbol_values { - eCos_VAL_thread_list = 0, - eCos_VAL_current_thread_ptr = 1 +enum ecos_symbol_values { + ECOS_VAL_THREAD_LIST = 0, + ECOS_VAL_CURRENT_THREAD_PTR = 1 }; -static const char * const eCos_symbol_list[] = { +static const char * const ecos_symbol_list[] = { "Cyg_Thread::thread_list", "Cyg_Scheduler_Base::current_thread", NULL }; -const struct rtos_type eCos_rtos = { +const struct rtos_type ecos_rtos = { .name = "eCos", - .detect_rtos = eCos_detect_rtos, - .create = eCos_create, - .update_threads = eCos_update_threads, - .get_thread_reg_list = eCos_get_thread_reg_list, - .get_symbol_list_to_lookup = eCos_get_symbol_list_to_lookup, + .detect_rtos = ecos_detect_rtos, + .create = ecos_create, + .update_threads = ecos_update_threads, + .get_thread_reg_list = ecos_get_thread_reg_list, + .get_symbol_list_to_lookup = ecos_get_symbol_list_to_lookup, }; -static int eCos_update_threads(struct rtos *rtos) +static int ecos_update_threads(struct rtos *rtos) { int retval; int tasks_found = 0; int thread_list_size = 0; - const struct eCos_params *param; + const struct ecos_params *param; - if (rtos == NULL) + if (!rtos) return -1; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return -3; - param = (const struct eCos_params *) rtos->rtos_specific_params; + param = (const struct ecos_params *) rtos->rtos_specific_params; - if (rtos->symbols == NULL) { + if (!rtos->symbols) { LOG_ERROR("No symbols for eCos"); return -4; } - if (rtos->symbols[eCos_VAL_thread_list].address == 0) { + if (rtos->symbols[ECOS_VAL_THREAD_LIST].address == 0) { LOG_ERROR("Don't have the thread list head"); return -2; } @@ -124,7 +124,7 @@ static int eCos_update_threads(struct rtos *rtos) rtos_free_threadlist(rtos); /* determine the number of current threads */ - uint32_t thread_list_head = rtos->symbols[eCos_VAL_thread_list].address; + uint32_t thread_list_head = rtos->symbols[ECOS_VAL_THREAD_LIST].address; uint32_t thread_index; target_read_buffer(rtos->target, thread_list_head, @@ -144,7 +144,7 @@ static int eCos_update_threads(struct rtos *rtos) /* read the current thread id */ uint32_t current_thread_addr; retval = target_read_buffer(rtos->target, - rtos->symbols[eCos_VAL_current_thread_ptr].address, + rtos->symbols[ECOS_VAL_CURRENT_THREAD_PTR].address, 4, (uint8_t *)¤t_thread_addr); if (retval != ERROR_OK) @@ -246,7 +246,7 @@ static int eCos_update_threads(struct rtos *rtos) return retval; } - for (i = 0; (i < ECOS_NUM_STATES) && (eCos_thread_states[i].value != thread_status); i++) { + for (i = 0; (i < ECOS_NUM_STATES) && (ecos_thread_states[i].value != thread_status); i++) { /* * empty */ @@ -254,7 +254,7 @@ static int eCos_update_threads(struct rtos *rtos) const char *state_desc; if (i < ECOS_NUM_STATES) - state_desc = eCos_thread_states[i].desc; + state_desc = ecos_thread_states[i].desc; else state_desc = "Unknown state"; @@ -268,7 +268,7 @@ static int eCos_update_threads(struct rtos *rtos) prev_thread_ptr = thread_index; /* Get the location of the next thread structure. */ - thread_index = rtos->symbols[eCos_VAL_thread_list].address; + thread_index = rtos->symbols[ECOS_VAL_THREAD_LIST].address; retval = target_read_buffer(rtos->target, prev_thread_ptr + param->thread_next_offset, param->pointer_width, @@ -283,26 +283,26 @@ static int eCos_update_threads(struct rtos *rtos) return 0; } -static int eCos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, +static int ecos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs) { int retval; - const struct eCos_params *param; + const struct ecos_params *param; - if (rtos == NULL) + if (!rtos) return -1; if (thread_id == 0) return -2; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return -3; - param = (const struct eCos_params *) rtos->rtos_specific_params; + param = (const struct ecos_params *) rtos->rtos_specific_params; /* Find the thread with that thread id */ uint16_t id = 0; - uint32_t thread_list_head = rtos->symbols[eCos_VAL_thread_list].address; + uint32_t thread_list_head = rtos->symbols[ECOS_VAL_THREAD_LIST].address; uint32_t thread_index; target_read_buffer(rtos->target, thread_list_head, param->pointer_width, (uint8_t *)&thread_index); @@ -349,33 +349,33 @@ static int eCos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, return -1; } -static int eCos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) +static int ecos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) { unsigned int i; *symbol_list = calloc( - ARRAY_SIZE(eCos_symbol_list), sizeof(struct symbol_table_elem)); + ARRAY_SIZE(ecos_symbol_list), sizeof(struct symbol_table_elem)); - for (i = 0; i < ARRAY_SIZE(eCos_symbol_list); i++) - (*symbol_list)[i].symbol_name = eCos_symbol_list[i]; + for (i = 0; i < ARRAY_SIZE(ecos_symbol_list); i++) + (*symbol_list)[i].symbol_name = ecos_symbol_list[i]; return 0; } -static bool eCos_detect_rtos(struct target *target) +static bool ecos_detect_rtos(struct target *target) { - if ((target->rtos->symbols != NULL) && - (target->rtos->symbols[eCos_VAL_thread_list].address != 0)) { + if ((target->rtos->symbols) && + (target->rtos->symbols[ECOS_VAL_THREAD_LIST].address != 0)) { /* looks like eCos */ return true; } return false; } -static int eCos_create(struct target *target) +static int ecos_create(struct target *target) { - for (unsigned int i = 0; i < ARRAY_SIZE(eCos_params_list); i++) - if (strcmp(eCos_params_list[i].target_name, target->type->name) == 0) { - target->rtos->rtos_specific_params = (void *)&eCos_params_list[i]; + for (unsigned int i = 0; i < ARRAY_SIZE(ecos_params_list); i++) + if (strcmp(ecos_params_list[i].target_name, target->type->name) == 0) { + target->rtos->rtos_specific_params = (void *)&ecos_params_list[i]; target->rtos->current_thread = 0; target->rtos->thread_details = NULL; return 0; diff --git a/src/rtos/embKernel.c b/src/rtos/embKernel.c index 994cbc091..d70ae37d9 100644 --- a/src/rtos/embKernel.c +++ b/src/rtos/embKernel.c @@ -31,33 +31,33 @@ #define EMBKERNEL_MAX_THREAD_NAME_STR_SIZE (64) -static bool embKernel_detect_rtos(struct target *target); -static int embKernel_create(struct target *target); -static int embKernel_update_threads(struct rtos *rtos); -static int embKernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, +static bool embkernel_detect_rtos(struct target *target); +static int embkernel_create(struct target *target); +static int embkernel_update_threads(struct rtos *rtos); +static int embkernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs); -static int embKernel_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]); +static int embkernel_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]); -struct rtos_type embKernel_rtos = { +struct rtos_type embkernel_rtos = { .name = "embKernel", - .detect_rtos = embKernel_detect_rtos, - .create = embKernel_create, - .update_threads = embKernel_update_threads, + .detect_rtos = embkernel_detect_rtos, + .create = embkernel_create, + .update_threads = embkernel_update_threads, .get_thread_reg_list = - embKernel_get_thread_reg_list, - .get_symbol_list_to_lookup = embKernel_get_symbol_list_to_lookup, + embkernel_get_thread_reg_list, + .get_symbol_list_to_lookup = embkernel_get_symbol_list_to_lookup, }; enum { - SYMBOL_ID_sCurrentTask = 0, - SYMBOL_ID_sListReady = 1, - SYMBOL_ID_sListSleep = 2, - SYMBOL_ID_sListSuspended = 3, - SYMBOL_ID_sMaxPriorities = 4, - SYMBOL_ID_sCurrentTaskCount = 5, + SYMBOL_ID_S_CURRENT_TASK = 0, + SYMBOL_ID_S_LIST_READY = 1, + SYMBOL_ID_S_LIST_SLEEP = 2, + SYMBOL_ID_S_LIST_SUSPENDED = 3, + SYMBOL_ID_S_MAX_PRIORITIES = 4, + SYMBOL_ID_S_CURRENT_TASK_COUNT = 5, }; -static const char * const embKernel_symbol_list[] = { +static const char * const embkernel_symbol_list[] = { "Rtos::sCurrentTask", "Rtos::sListReady", "Rtos::sListSleep", @@ -66,7 +66,7 @@ static const char * const embKernel_symbol_list[] = { "Rtos::sCurrentTaskCount", NULL }; -struct embKernel_params { +struct embkernel_params { const char *target_name; const unsigned char pointer_width; const unsigned char thread_count_width; @@ -80,7 +80,7 @@ struct embKernel_params { const struct rtos_register_stacking *stacking_info; }; -static const struct embKernel_params embKernel_params_list[] = { +static const struct embkernel_params embkernel_params_list[] = { { "cortex_m", /* target_name */ 4, /* pointer_width */ @@ -92,7 +92,7 @@ static const struct embKernel_params embKernel_params_list[] = { 4, /*thread_priority_width */ 4, /*iterable_next_offset */ 12, /*iterable_task_owner_offset */ - &rtos_embkernel_Cortex_M_stacking, /* stacking_info*/ + &rtos_embkernel_cortex_m_stacking, /* stacking_info*/ }, { "hla_target", /* target_name */ 4, /* pointer_width */ @@ -104,37 +104,37 @@ static const struct embKernel_params embKernel_params_list[] = { 4, /*thread_priority_width */ 4, /*iterable_next_offset */ 12, /*iterable_task_owner_offset */ - &rtos_embkernel_Cortex_M_stacking, /* stacking_info */ + &rtos_embkernel_cortex_m_stacking, /* stacking_info */ } }; -static bool embKernel_detect_rtos(struct target *target) +static bool embkernel_detect_rtos(struct target *target) { - if (target->rtos->symbols != NULL) { - if (target->rtos->symbols[SYMBOL_ID_sCurrentTask].address != 0) + if (target->rtos->symbols) { + if (target->rtos->symbols[SYMBOL_ID_S_CURRENT_TASK].address != 0) return true; } return false; } -static int embKernel_create(struct target *target) +static int embkernel_create(struct target *target) { size_t i = 0; - while ((i < ARRAY_SIZE(embKernel_params_list)) && - (0 != strcmp(embKernel_params_list[i].target_name, target->type->name))) + while ((i < ARRAY_SIZE(embkernel_params_list)) && + (strcmp(embkernel_params_list[i].target_name, target->type->name) != 0)) i++; - if (i >= ARRAY_SIZE(embKernel_params_list)) { + if (i >= ARRAY_SIZE(embkernel_params_list)) { LOG_WARNING("Could not find target \"%s\" in embKernel compatibility " "list", target->type->name); return -1; } - target->rtos->rtos_specific_params = (void *) &embKernel_params_list[i]; + target->rtos->rtos_specific_params = (void *) &embkernel_params_list[i]; return 0; } -static int embKernel_get_tasks_details(struct rtos *rtos, int64_t iterable, const struct embKernel_params *param, +static int embkernel_get_tasks_details(struct rtos *rtos, int64_t iterable, const struct embkernel_params *param, struct thread_detail *details, const char *state_str) { int64_t task = 0; @@ -181,24 +181,24 @@ static int embKernel_get_tasks_details(struct rtos *rtos, int64_t iterable, cons return 0; } -static int embKernel_update_threads(struct rtos *rtos) +static int embkernel_update_threads(struct rtos *rtos) { /* int i = 0; */ int retval; - const struct embKernel_params *param; + const struct embkernel_params *param; - if (rtos == NULL) + if (!rtos) return -1; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return -3; - if (rtos->symbols == NULL) { + if (!rtos->symbols) { LOG_ERROR("No symbols for embKernel"); return -4; } - if (rtos->symbols[SYMBOL_ID_sCurrentTask].address == 0) { + if (rtos->symbols[SYMBOL_ID_S_CURRENT_TASK].address == 0) { LOG_ERROR("Don't have the thread list head"); return -2; } @@ -206,9 +206,9 @@ static int embKernel_update_threads(struct rtos *rtos) /* wipe out previous thread details if any */ rtos_free_threadlist(rtos); - param = (const struct embKernel_params *) rtos->rtos_specific_params; + param = (const struct embkernel_params *) rtos->rtos_specific_params; - retval = target_read_buffer(rtos->target, rtos->symbols[SYMBOL_ID_sCurrentTask].address, param->pointer_width, + retval = target_read_buffer(rtos->target, rtos->symbols[SYMBOL_ID_S_CURRENT_TASK].address, param->pointer_width, (uint8_t *) &rtos->current_thread); if (retval != ERROR_OK) { LOG_ERROR("Error reading current thread in embKernel thread list"); @@ -216,13 +216,13 @@ static int embKernel_update_threads(struct rtos *rtos) } int64_t max_used_priority = 0; - retval = target_read_buffer(rtos->target, rtos->symbols[SYMBOL_ID_sMaxPriorities].address, param->pointer_width, + retval = target_read_buffer(rtos->target, rtos->symbols[SYMBOL_ID_S_MAX_PRIORITIES].address, param->pointer_width, (uint8_t *) &max_used_priority); if (retval != ERROR_OK) return retval; int thread_list_size = 0; - retval = target_read_buffer(rtos->target, rtos->symbols[SYMBOL_ID_sCurrentTaskCount].address, + retval = target_read_buffer(rtos->target, rtos->symbols[SYMBOL_ID_S_CURRENT_TASK_COUNT].address, param->thread_count_width, (uint8_t *) &thread_list_size); if (retval != ERROR_OK) { @@ -237,19 +237,19 @@ static int embKernel_update_threads(struct rtos *rtos) return ERROR_FAIL; } - int threadIdx = 0; + int thread_idx = 0; /* Look for ready tasks */ for (int pri = 0; pri < max_used_priority; pri++) { /* Get first item in queue */ int64_t iterable = 0; retval = target_read_buffer(rtos->target, - rtos->symbols[SYMBOL_ID_sListReady].address + (pri * param->rtos_list_size), param->pointer_width, + rtos->symbols[SYMBOL_ID_S_LIST_READY].address + (pri * param->rtos_list_size), param->pointer_width, (uint8_t *) &iterable); if (retval != ERROR_OK) return retval; - for (; iterable && threadIdx < thread_list_size; threadIdx++) { + for (; iterable && thread_idx < thread_list_size; thread_idx++) { /* Get info from this iterable item */ - retval = embKernel_get_tasks_details(rtos, iterable, param, &rtos->thread_details[threadIdx], "Ready"); + retval = embkernel_get_tasks_details(rtos, iterable, param, &rtos->thread_details[thread_idx], "Ready"); if (retval != ERROR_OK) return retval; /* Get next iterable item */ @@ -261,13 +261,13 @@ static int embKernel_update_threads(struct rtos *rtos) } /* Look for sleeping tasks */ int64_t iterable = 0; - retval = target_read_buffer(rtos->target, rtos->symbols[SYMBOL_ID_sListSleep].address, param->pointer_width, + retval = target_read_buffer(rtos->target, rtos->symbols[SYMBOL_ID_S_LIST_SLEEP].address, param->pointer_width, (uint8_t *) &iterable); if (retval != ERROR_OK) return retval; - for (; iterable && threadIdx < thread_list_size; threadIdx++) { + for (; iterable && thread_idx < thread_list_size; thread_idx++) { /*Get info from this iterable item */ - retval = embKernel_get_tasks_details(rtos, iterable, param, &rtos->thread_details[threadIdx], "Sleeping"); + retval = embkernel_get_tasks_details(rtos, iterable, param, &rtos->thread_details[thread_idx], "Sleeping"); if (retval != ERROR_OK) return retval; /*Get next iterable item */ @@ -279,13 +279,13 @@ static int embKernel_update_threads(struct rtos *rtos) /* Look for suspended tasks */ iterable = 0; - retval = target_read_buffer(rtos->target, rtos->symbols[SYMBOL_ID_sListSuspended].address, param->pointer_width, + retval = target_read_buffer(rtos->target, rtos->symbols[SYMBOL_ID_S_LIST_SUSPENDED].address, param->pointer_width, (uint8_t *) &iterable); if (retval != ERROR_OK) return retval; - for (; iterable && threadIdx < thread_list_size; threadIdx++) { + for (; iterable && thread_idx < thread_list_size; thread_idx++) { /* Get info from this iterable item */ - retval = embKernel_get_tasks_details(rtos, iterable, param, &rtos->thread_details[threadIdx], "Suspended"); + retval = embkernel_get_tasks_details(rtos, iterable, param, &rtos->thread_details[thread_idx], "Suspended"); if (retval != ERROR_OK) return retval; /*Get next iterable item */ @@ -296,28 +296,28 @@ static int embKernel_update_threads(struct rtos *rtos) } rtos->thread_count = 0; - rtos->thread_count = threadIdx; - LOG_OUTPUT("Found %u tasks\n", (unsigned int)threadIdx); + rtos->thread_count = thread_idx; + LOG_OUTPUT("Found %u tasks\n", (unsigned int)thread_idx); return 0; } -static int embKernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, +static int embkernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs) { int retval; - const struct embKernel_params *param; + const struct embkernel_params *param; int64_t stack_ptr = 0; - if (rtos == NULL) + if (!rtos) return -1; if (thread_id == 0) return -2; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return -1; - param = (const struct embKernel_params *) rtos->rtos_specific_params; + param = (const struct embkernel_params *) rtos->rtos_specific_params; /* Read the stack pointer */ retval = target_read_buffer(rtos->target, thread_id + param->thread_stack_offset, param->pointer_width, @@ -330,13 +330,13 @@ static int embKernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, return rtos_generic_stack_read(rtos->target, param->stacking_info, stack_ptr, reg_list, num_regs); } -static int embKernel_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) +static int embkernel_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) { unsigned int i; - *symbol_list = calloc(ARRAY_SIZE(embKernel_symbol_list), sizeof(struct symbol_table_elem)); + *symbol_list = calloc(ARRAY_SIZE(embkernel_symbol_list), sizeof(struct symbol_table_elem)); - for (i = 0; i < ARRAY_SIZE(embKernel_symbol_list); i++) - (*symbol_list)[i].symbol_name = embKernel_symbol_list[i]; + for (i = 0; i < ARRAY_SIZE(embkernel_symbol_list); i++) + (*symbol_list)[i].symbol_name = embkernel_symbol_list[i]; return 0; } diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c index a1a048af3..d147aadeb 100644 --- a/src/rtos/hwthread.c +++ b/src/rtos/hwthread.c @@ -99,14 +99,14 @@ static int hwthread_update_threads(struct rtos *rtos) int64_t current_thread = 0; enum target_debug_reason current_reason = DBG_REASON_UNDEFINED; - if (rtos == NULL) + if (!rtos) return ERROR_FAIL; target = rtos->target; /* determine the number of "threads" */ if (target->smp) { - for (head = target->head; head != NULL; head = head->next) { + for (head = target->head; head; head = head->next) { struct target *curr = head->target; if (!target_was_examined(curr)) @@ -127,7 +127,7 @@ static int hwthread_update_threads(struct rtos *rtos) if (target->smp) { /* loop over all threads */ - for (head = target->head; head != NULL; head = head->next) { + for (head = target->head; head; head = head->next) { struct target *curr = head->target; if (!target_was_examined(curr)) @@ -219,10 +219,10 @@ static int hwthread_smp_init(struct target *target) static struct target *hwthread_find_thread(struct target *target, int64_t thread_id) { /* Find the thread with that thread_id */ - if (target == NULL) + if (!target) return NULL; if (target->smp) { - for (struct target_list *head = target->head; head != NULL; head = head->next) { + for (struct target_list *head = target->head; head; head = head->next) { if (thread_id == threadid_from_target(head->target)) return head->target; } @@ -235,13 +235,13 @@ static struct target *hwthread_find_thread(struct target *target, int64_t thread static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **rtos_reg_list, int *rtos_reg_list_size) { - if (rtos == NULL) + if (!rtos) return ERROR_FAIL; struct target *target = rtos->target; struct target *curr = hwthread_find_thread(target, thread_id); - if (curr == NULL) + if (!curr) return ERROR_FAIL; if (!target_was_examined(curr)) @@ -256,20 +256,20 @@ static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, int j = 0; for (int i = 0; i < reg_list_size; i++) { - if (reg_list[i] == NULL || reg_list[i]->exist == false || reg_list[i]->hidden) + if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden) continue; j++; } *rtos_reg_list_size = j; *rtos_reg_list = calloc(*rtos_reg_list_size, sizeof(struct rtos_reg)); - if (*rtos_reg_list == NULL) { + if (!*rtos_reg_list) { free(reg_list); return ERROR_FAIL; } j = 0; for (int i = 0; i < reg_list_size; i++) { - if (reg_list[i] == NULL || reg_list[i]->exist == false || reg_list[i]->hidden) + if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden) continue; (*rtos_reg_list)[j].number = (*reg_list)[i].number; (*rtos_reg_list)[j].size = (*reg_list)[i].size; @@ -285,13 +285,13 @@ static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, static int hwthread_get_thread_reg(struct rtos *rtos, int64_t thread_id, uint32_t reg_num, struct rtos_reg *rtos_reg) { - if (rtos == NULL) + if (!rtos) return ERROR_FAIL; struct target *target = rtos->target; struct target *curr = hwthread_find_thread(target, thread_id); - if (curr == NULL) { + if (!curr) { LOG_ERROR("Couldn't find RTOS thread for id %" PRId64 ".", thread_id); return ERROR_FAIL; } @@ -322,13 +322,13 @@ static int hwthread_get_thread_reg(struct rtos *rtos, int64_t thread_id, static int hwthread_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_value) { - if (rtos == NULL) + if (!rtos) return ERROR_FAIL; struct target *target = rtos->target; struct target *curr = hwthread_find_thread(target, rtos->current_thread); - if (curr == NULL) + if (!curr) return ERROR_FAIL; struct reg *reg = register_get_by_number(curr->reg_cache, reg_num, true); @@ -351,7 +351,7 @@ static int hwthread_target_for_threadid(struct connection *connection, int64_t t struct target *target = get_target_from_connection(connection); struct target *curr = hwthread_find_thread(target, thread_id); - if (curr == NULL) + if (!curr) return ERROR_FAIL; *p_target = curr; @@ -415,13 +415,13 @@ static bool hwthread_needs_fake_step(struct target *target, int64_t thread_id) static int hwthread_read_buffer(struct rtos *rtos, target_addr_t address, uint32_t size, uint8_t *buffer) { - if (rtos == NULL) + if (!rtos) return ERROR_FAIL; struct target *target = rtos->target; struct target *curr = hwthread_find_thread(target, rtos->current_thread); - if (curr == NULL) + if (!curr) return ERROR_FAIL; return target_read_buffer(curr, address, size, buffer); @@ -430,13 +430,13 @@ static int hwthread_read_buffer(struct rtos *rtos, target_addr_t address, static int hwthread_write_buffer(struct rtos *rtos, target_addr_t address, uint32_t size, const uint8_t *buffer) { - if (rtos == NULL) + if (!rtos) return ERROR_FAIL; struct target *target = rtos->target; struct target *curr = hwthread_find_thread(target, rtos->current_thread); - if (curr == NULL) + if (!curr) return ERROR_FAIL; return target_write_buffer(curr, address, size, buffer); diff --git a/src/rtos/linux.c b/src/rtos/linux.c index 4b96a931d..11a55c434 100644 --- a/src/rtos/linux.c +++ b/src/rtos/linux.c @@ -181,7 +181,7 @@ static int linux_os_thread_reg_list(struct rtos *rtos, found = 1; else next = next->next; - } while ((found == 0) && (next != tmp) && (next != NULL)); + } while ((found == 0) && (next != tmp) && (next)); if (found == 0) { LOG_ERROR("could not find thread: %" PRIx64, thread_id); @@ -260,7 +260,7 @@ static int linux_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list static char *linux_ps_command(struct target *target); -const struct rtos_type Linux_os = { +const struct rtos_type linux_rtos = { .name = "linux", .detect_rtos = linux_os_detect, .create = linux_os_create, @@ -408,7 +408,7 @@ static int get_current(struct target *target, int create) struct current_thread *ctt = linux_os->current_threads; /* invalid current threads content */ - while (ctt != NULL) { + while (ctt) { ctt->threadid = -1; ctt->TS = 0xdeadbeef; ctt = ctt->next; @@ -431,8 +431,8 @@ static int get_current(struct target *target, int create) buf = reg_list[13]->value; val = get_buffer(target, buf); ti_addr = (val & 0xffffe000); - uint32_t TS_addr = ti_addr + 0xc; - retval = fill_buffer(target, TS_addr, buffer); + uint32_t ts_addr = ti_addr + 0xc; + retval = fill_buffer(target, ts_addr, buffer); if (retval == ERROR_OK) { uint32_t TS = get_buffer(target, buffer); @@ -445,10 +445,10 @@ static int get_current(struct target *target, int create) linux_os->current_threads; cpu = head->target->coreid; - while ((ct != NULL) && (ct->core_id != (int32_t) cpu)) + while ((ct) && (ct->core_id != (int32_t) cpu)) ct = ct->next; - if ((ct != NULL) && (ct->TS == 0xdeadbeef)) + if ((ct) && (ct->TS == 0xdeadbeef)) ct->TS = TS; else LOG_ERROR @@ -603,13 +603,13 @@ static struct current_thread *add_current_thread(struct current_thread *currents { ct->next = NULL; - if (currents == NULL) { + if (!currents) { currents = ct; return currents; } else { struct current_thread *temp = currents; - while (temp->next != NULL) + while (temp->next) temp = temp->next; temp->next = ct; @@ -639,14 +639,14 @@ static struct threads *liste_add_task(struct threads *task_list, struct threads { t->next = NULL; - if (*last == NULL) - if (task_list == NULL) { + if (!*last) + if (!task_list) { task_list = t; return task_list; } else { struct threads *temp = task_list; - while (temp->next != NULL) + while (temp->next) temp = temp->next; temp->next = t; @@ -668,15 +668,15 @@ static int current_base_addr(struct linux_os *linux_os, uint32_t base_addr) struct current_thread *ct = linux_os->current_threads; #ifdef PID_CHECK - while ((ct != NULL) && (ct->pid != pid)) + while ((ct) && (ct->pid != pid)) #else - while ((ct != NULL) && (ct->TS != base_addr)) + while ((ct) && (ct->TS != base_addr)) #endif ct = ct->next; #ifdef PID_CHECK - if ((ct != NULL) && (ct->pid == pid)) + if ((ct) && (ct->pid == pid)) #else - if ((ct != NULL) && (ct->TS == base_addr)) + if ((ct) && (ct->TS == base_addr)) #endif return 1; @@ -777,7 +777,7 @@ static int clean_threadlist(struct target *target) target->rtos->rtos_specific_params; struct threads *old, *temp = linux_os->thread_list; - while (temp != NULL) { + while (temp) { old = temp; free(temp->context); @@ -815,10 +815,10 @@ static int insert_into_threadlist(struct target *target, struct threads *t) t->status = 1; t->next = NULL; - if (temp == NULL) + if (!temp) linux_os->thread_list = t; else { - while (temp->next != NULL) + while (temp->next) temp = temp->next; t->next = NULL; @@ -836,7 +836,7 @@ static void linux_identify_current_threads(struct target *target) struct current_thread *ct = linux_os->current_threads; struct threads *t = NULL; - while ((ct != NULL)) { + while ((ct)) { if (ct->threadid == -1) { /* un-identified thread */ @@ -856,7 +856,7 @@ error_handling: /* search in the list of threads if pid already present */ - while ((thread_list != NULL) && (found == 0)) { + while ((thread_list) && (found == 0)) { #ifdef PID_CHECK if (thread_list->pid == t->pid) { #else @@ -926,7 +926,7 @@ static int linux_task_update(struct target *target, int context) linux_os->thread_count = 0; /*thread_list = thread_list->next; skip init_task*/ - while (thread_list != NULL) { + while (thread_list) { thread_list->status = 0; /*setting all tasks to dead state*/ free(thread_list->context); @@ -967,7 +967,7 @@ static int linux_task_update(struct target *target, int context) thread_list = linux_os->thread_list; - while (thread_list != NULL) { + while (thread_list) { #ifdef PID_CHECK if (t->pid == thread_list->pid) { #else @@ -1058,7 +1058,7 @@ static int linux_gdb_thread_packet(struct target *target, tmp_str += sprintf(tmp_str, "m"); struct threads *temp = linux_os->thread_list; - while (temp != NULL) { + while (temp) { tmp_str += sprintf(tmp_str, "%016" PRIx64, temp->threadid); temp = temp->next; if (temp) @@ -1079,7 +1079,7 @@ static int linux_gdb_thread_update(struct target *target, target->rtos->rtos_specific_params; struct threads *temp = linux_os->thread_list; - while (temp != NULL) { + while (temp) { if (temp->threadid == linux_os->preupdtate_threadid_count + 1) { /*LOG_INFO("FOUND");*/ found = 1; @@ -1098,7 +1098,7 @@ static int linux_gdb_thread_update(struct target *target, temp = temp->next; - while (temp != NULL) { + while (temp) { /*LOG_INFO("INTO GDB THREAD UPDATE WHILE");*/ tmp_strr += sprintf(tmp_strr, ","); tmp_strr += @@ -1128,7 +1128,7 @@ static int linux_thread_extra_info(struct target *target, /*LOG_INFO("lookup extra info for thread %" SCNx64, threadid);*/ struct threads *temp = linux_os->thread_list; - while (temp != NULL) { + while (temp) { if (temp->threadid == threadid) { char *pid = " PID: "; char *pid_current = "*PID: "; @@ -1163,7 +1163,7 @@ static int linux_thread_extra_info(struct target *target, return ERROR_OK; } -static int linux_gdb_T_packet(struct connection *connection, +static int linux_gdb_t_packet(struct connection *connection, struct target *target, char const *packet, int packet_size) { int64_t threadid; @@ -1176,7 +1176,7 @@ static int linux_gdb_T_packet(struct connection *connection, struct threads *temp = linux_os->thread_list; struct threads *prev = NULL; - while (temp != NULL) { + while (temp) { if (temp->threadid == threadid) { if (temp->status != 0) { gdb_put_packet(connection, "OK", 2); @@ -1205,7 +1205,7 @@ static int linux_gdb_T_packet(struct connection *connection, retval = linux_task_update(target, 1); struct threads *temp = linux_os->thread_list; - while (temp != NULL) { + while (temp) { if (temp->threadid == threadid) { if (temp->status == 1) { gdb_put_packet(connection, "OK", 2); @@ -1231,20 +1231,20 @@ static int linux_gdb_h_packet(struct connection *connection, struct current_thread *ct = linux_os->current_threads; /* select to display the current thread of the selected target */ - while ((ct != NULL) && (ct->core_id != target->coreid)) + while ((ct) && (ct->core_id != target->coreid)) ct = ct->next; int64_t current_gdb_thread_rq; if (linux_os->threads_lookup == 1) { - if ((ct != NULL) && (ct->threadid == -1)) { + if ((ct) && (ct->threadid == -1)) { ct = linux_os->current_threads; - while ((ct != NULL) && (ct->threadid == -1)) + while ((ct) && (ct->threadid == -1)) ct = ct->next; } - if (ct == NULL) { + if (!ct) { /* no current thread can be identified * any way with smp */ LOG_INFO("no current thread identified"); @@ -1253,7 +1253,7 @@ static int linux_gdb_h_packet(struct connection *connection, struct threads t; ct = linux_os->current_threads; - while ((ct != NULL) && (ct->threadid == -1)) { + while ((ct) && (ct->threadid == -1)) { t.base_addr = ct->TS; get_name(target, &t); LOG_INFO("name of unidentified thread %s", @@ -1304,7 +1304,7 @@ static int linux_thread_packet(struct connection *connection, char const *packet switch (packet[0]) { case 'T': /* Is thread alive?*/ - linux_gdb_T_packet(connection, target, packet, packet_size); + linux_gdb_t_packet(connection, target, packet, packet_size); break; case 'H': /* Set current thread */ /* ( 'c' for step and continue, 'g' for all other operations )*/ @@ -1321,7 +1321,7 @@ static int linux_thread_packet(struct connection *connection, char const *packet break; } else if (strncmp(packet, "qfThreadInfo", 12) == 0) { - if (linux_os->thread_list == NULL) { + if (!linux_os->thread_list) { retval = linux_gdb_thread_packet(target, connection, packet, @@ -1356,17 +1356,17 @@ static int linux_thread_packet(struct connection *connection, char const *packet if (linux_os->threads_lookup == 1) { ct = linux_os->current_threads; - while ((ct != NULL) && (ct->core_id) != target->coreid) + while ((ct) && (ct->core_id) != target->coreid) ct = ct->next; - if ((ct != NULL) && (ct->threadid == -1)) { + if ((ct) && (ct->threadid == -1)) { ct = linux_os->current_threads; - while ((ct != NULL) && (ct->threadid == -1)) + while ((ct) && (ct->threadid == -1)) ct = ct->next; } - if ((ct != NULL) && (ct->threadid != + if ((ct) && (ct->threadid != target->rtos->current_threadid) && (target->rtos->current_threadid != -1)) LOG_WARNING("WARNING! current GDB thread do not match " @@ -1478,7 +1478,7 @@ static char *linux_ps_command(struct target *target) tmp += sprintf(tmp, "PID\t\tCPU\t\tASID\t\tNAME\n"); tmp += sprintf(tmp, "---\t\t---\t\t----\t\t----\n"); - while (temp != NULL) { + while (temp) { if (temp->status) { if (temp->context) tmp += diff --git a/src/rtos/mqx.c b/src/rtos/mqx.c index 9f895deed..754470e3c 100644 --- a/src/rtos/mqx.c +++ b/src/rtos/mqx.c @@ -49,8 +49,8 @@ /* types */ enum mqx_symbols { - mqx_VAL_mqx_kernel_data, - mqx_VAL_MQX_init_struct, + MQX_VAL_MQX_KERNEL_DATA, + MQX_VAL_MQX_INIT_STRUCT, }; enum mqx_arch { @@ -199,28 +199,22 @@ static int mqx_is_scheduler_running( uint32_t capability_value = 0; /* get '_mqx_kernel_data' symbol */ - if (ERROR_OK != mqx_get_symbol( - rtos, mqx_VAL_mqx_kernel_data, &kernel_data_symbol - )) { + if (mqx_get_symbol(rtos, MQX_VAL_MQX_KERNEL_DATA, &kernel_data_symbol) != ERROR_OK) return ERROR_FAIL; - } + /* get '_mqx_kernel_data' */ - if (ERROR_OK != mqx_get_member( - rtos, kernel_data_symbol, 0, 4, - "_mqx_kernel_data", &kernel_data_addr - )) { + if (mqx_get_member(rtos, kernel_data_symbol, 0, 4, + "_mqx_kernel_data", &kernel_data_addr) != ERROR_OK) return ERROR_FAIL; - } + /* return if '_mqx_kernel_data' is NULL or default 0xFFFFFFFF */ - if (0 == kernel_data_addr || (uint32_t)(-1) == kernel_data_addr) + if (kernel_data_addr == 0 || kernel_data_addr == (uint32_t)(-1)) return ERROR_FAIL; /* get kernel_data->ADDRESSING_CAPABILITY */ - if (ERROR_OK != mqx_get_member( - rtos, kernel_data_addr, MQX_KERNEL_OFFSET_CAPABILITY, 4, - "kernel_data->ADDRESSING_CAPABILITY", (void *)&capability_value - )) { + if (mqx_get_member(rtos, kernel_data_addr, MQX_KERNEL_OFFSET_CAPABILITY, 4, + "kernel_data->ADDRESSING_CAPABILITY", (void *)&capability_value) != ERROR_OK) return ERROR_FAIL; - } + /* check first member, the '_mqx_kernel_data->ADDRESSING_CAPABILITY'. it suppose to be set to value 8 */ if (capability_value != 8) { @@ -228,12 +222,10 @@ static int mqx_is_scheduler_running( return ERROR_FAIL; } /* get active ptr */ - if (ERROR_OK != mqx_get_member( - rtos, kernel_data_addr, MQX_KERNEL_OFFSET_ACTIVE_TASK, 4, - "kernel_data->ACTIVE_PTR", (void *)&active_td_addr - )) { + if (mqx_get_member(rtos, kernel_data_addr, MQX_KERNEL_OFFSET_ACTIVE_TASK, 4, + "kernel_data->ACTIVE_PTR", (void *)&active_td_addr) != ERROR_OK) return ERROR_FAIL; - } + /* active task is system task, scheduler has not not run yet */ system_td_addr = kernel_data_addr + MQX_KERNEL_OFFSET_SYSTEM_TASK; if (active_td_addr == system_td_addr) { @@ -251,8 +243,8 @@ static bool mqx_detect_rtos( ) { if ( - (target->rtos->symbols != NULL) && - (target->rtos->symbols[mqx_VAL_mqx_kernel_data].address != 0) + (target->rtos->symbols) && + (target->rtos->symbols[MQX_VAL_MQX_KERNEL_DATA].address != 0) ) { return true; } @@ -268,7 +260,7 @@ static int mqx_create( { /* check target name against supported architectures */ for (unsigned int i = 0; i < ARRAY_SIZE(mqx_params_list); i++) { - if (0 == strcmp(mqx_params_list[i].target_name, target->type->name)) { + if (strcmp(mqx_params_list[i].target_name, target->type->name) == 0) { target->rtos->rtos_specific_params = (void *)&mqx_params_list[i]; /* LOG_DEBUG("MQX RTOS - valid architecture: %s", target->type->name); */ return 0; @@ -299,42 +291,34 @@ static int mqx_update_threads( /* clear old data */ rtos_free_threadlist(rtos); /* check scheduler */ - if (ERROR_OK != mqx_is_scheduler_running(rtos)) + if (mqx_is_scheduler_running(rtos) != ERROR_OK) return ERROR_FAIL; /* get kernel_data symbol */ - if (ERROR_OK != mqx_get_symbol( - rtos, mqx_VAL_mqx_kernel_data, &kernel_data_addr - )) { + if (mqx_get_symbol(rtos, MQX_VAL_MQX_KERNEL_DATA, &kernel_data_addr) != ERROR_OK) return ERROR_FAIL; - } + /* read kernel_data */ - if (ERROR_OK != mqx_get_member( - rtos, kernel_data_addr, 0, 4, "_mqx_kernel_data", &kernel_data_addr - )) { + if (mqx_get_member(rtos, kernel_data_addr, 0, 4, + "_mqx_kernel_data", &kernel_data_addr) != ERROR_OK) return ERROR_FAIL; - } + /* get task queue address */ task_queue_addr = kernel_data_addr + MQX_KERNEL_OFFSET_TDLIST; /* get task queue size */ - if (ERROR_OK != mqx_get_member( - rtos, task_queue_addr, MQX_QUEUE_OFFSET_SIZE, 2, - "kernel_data->TD_LIST.SIZE", &task_queue_size - )) { + if (mqx_get_member(rtos, task_queue_addr, MQX_QUEUE_OFFSET_SIZE, 2, + "kernel_data->TD_LIST.SIZE", &task_queue_size) != ERROR_OK) return ERROR_FAIL; - } + /* get active ptr */ - if (ERROR_OK != mqx_get_member( - rtos, kernel_data_addr, MQX_KERNEL_OFFSET_ACTIVE_TASK, 4, - "kernel_data->ACTIVE_PTR", (void *)&active_td_addr - )) { + if (mqx_get_member(rtos, kernel_data_addr, MQX_KERNEL_OFFSET_ACTIVE_TASK, 4, + "kernel_data->ACTIVE_PTR", (void *)&active_td_addr) != ERROR_OK) return ERROR_FAIL; - } /* setup threads info */ rtos->thread_count = task_queue_size; rtos->current_thread = 0; rtos->thread_details = calloc(rtos->thread_count, sizeof(struct thread_detail)); - if (NULL == rtos->thread_details) + if (!rtos->thread_details) return ERROR_FAIL; /* loop over each task and setup thread details, @@ -355,60 +339,46 @@ static int mqx_update_threads( char *state_name = "Unknown"; /* set current taskpool address */ - if (ERROR_OK != mqx_get_member( - rtos, taskpool_addr, MQX_TASK_OFFSET_NEXT, 4, - "td_struct_ptr->NEXT", &taskpool_addr - )) { + if (mqx_get_member(rtos, taskpool_addr, MQX_TASK_OFFSET_NEXT, 4, + "td_struct_ptr->NEXT", &taskpool_addr) != ERROR_OK) return ERROR_FAIL; - } + /* get task address from taskpool */ task_addr = taskpool_addr - MQX_TASK_OFFSET_TDLIST; /* get address of 'td_struct_ptr->TEMPLATE_LIST_PTR' */ - if (ERROR_OK != mqx_get_member( - rtos, task_addr, MQX_TASK_OFFSET_TEMPLATE, 4, - "td_struct_ptr->TEMPLATE_LIST_PTR", &task_template - )) { + if (mqx_get_member(rtos, task_addr, MQX_TASK_OFFSET_TEMPLATE, 4, + "td_struct_ptr->TEMPLATE_LIST_PTR", &task_template) != ERROR_OK) return ERROR_FAIL; - } + /* get address of 'td_struct_ptr->TEMPLATE_LIST_PTR->NAME' */ - if (ERROR_OK != mqx_get_member( - rtos, task_template, MQX_TASK_TEMPLATE_OFFSET_NAME, 4, - "td_struct_ptr->TEMPLATE_LIST_PTR->NAME", &task_name_addr - )) { + if (mqx_get_member(rtos, task_template, MQX_TASK_TEMPLATE_OFFSET_NAME, 4, + "td_struct_ptr->TEMPLATE_LIST_PTR->NAME", &task_name_addr) != ERROR_OK) return ERROR_FAIL; - } + /* get value of 'td_struct->TEMPLATE_LIST_PTR->NAME' */ - if (ERROR_OK != mqx_get_member( - rtos, task_name_addr, 0, MQX_THREAD_NAME_LENGTH, - "*td_struct_ptr->TEMPLATE_LIST_PTR->NAME", task_name - )) { + if (mqx_get_member(rtos, task_name_addr, 0, MQX_THREAD_NAME_LENGTH, + "*td_struct_ptr->TEMPLATE_LIST_PTR->NAME", task_name) != ERROR_OK) return ERROR_FAIL; - } + /* always terminate last character by force, otherwise openocd might fail if task_name has corrupted data */ task_name[MQX_THREAD_NAME_LENGTH] = '\0'; /* get value of 'td_struct_ptr->TASK_ID' */ - if (ERROR_OK != mqx_get_member( - rtos, task_addr, MQX_TASK_OFFSET_ID, 4, - "td_struct_ptr->TASK_ID", &task_id - )) { + if (mqx_get_member(rtos, task_addr, MQX_TASK_OFFSET_ID, 4, + "td_struct_ptr->TASK_ID", &task_id) != ERROR_OK) return ERROR_FAIL; - } + /* get task errno */ - if (ERROR_OK != mqx_get_member( - rtos, task_addr, MQX_TASK_OFFSET_ERROR_CODE, 4, - "td_struct_ptr->TASK_ERROR_CODE", &task_errno - )) { + if (mqx_get_member(rtos, task_addr, MQX_TASK_OFFSET_ERROR_CODE, 4, + "td_struct_ptr->TASK_ERROR_CODE", &task_errno) != ERROR_OK) return ERROR_FAIL; - } + /* get value of 'td_struct_ptr->STATE' */ - if (ERROR_OK != mqx_get_member( - rtos, task_addr, MQX_TASK_OFFSET_STATE, 4, - "td_struct_ptr->STATE", &task_state - )) { + if (mqx_get_member(rtos, task_addr, MQX_TASK_OFFSET_STATE, 4, + "td_struct_ptr->STATE", &task_state) != ERROR_OK) return ERROR_FAIL; - } + task_state &= MQX_TASK_STATE_MASK; /* and search for defined state */ for (state_index = 0; state_index < ARRAY_SIZE(mqx_states); state_index++) { @@ -423,7 +393,7 @@ static int mqx_update_threads( rtos->thread_details[i].exists = true; /* set thread name */ rtos->thread_details[i].thread_name_str = malloc(strlen((void *)task_name) + 1); - if (NULL == rtos->thread_details[i].thread_name_str) + if (!rtos->thread_details[i].thread_name_str) return ERROR_FAIL; strcpy(rtos->thread_details[i].thread_name_str, (void *)task_name); /* set thread extra info @@ -435,7 +405,7 @@ static int mqx_update_threads( */ extra_info_length += strlen((void *)state_name) + 7 + 13 + 8 + 15 + 8; rtos->thread_details[i].extra_info_str = malloc(extra_info_length + 1); - if (NULL == rtos->thread_details[i].extra_info_str) + if (!rtos->thread_details[i].extra_info_str) return ERROR_FAIL; snprintf(rtos->thread_details[i].extra_info_str, extra_info_length, "State: %s, Address: 0x%" PRIx32 ", Error Code: %" PRIu32, @@ -468,29 +438,24 @@ static int mqx_get_thread_reg_list( LOG_ERROR("MQX RTOS - invalid threadid: 0x%X", (int)thread_id); return ERROR_FAIL; } - if (ERROR_OK != mqx_is_scheduler_running(rtos)) + if (mqx_is_scheduler_running(rtos) != ERROR_OK) return ERROR_FAIL; /* get kernel_data symbol */ - if (ERROR_OK != mqx_get_symbol( - rtos, mqx_VAL_mqx_kernel_data, &kernel_data_addr - )) { + if (mqx_get_symbol(rtos, MQX_VAL_MQX_KERNEL_DATA, &kernel_data_addr) != ERROR_OK) return ERROR_FAIL; - } + /* read kernel_data */ - if (ERROR_OK != mqx_get_member( - rtos, kernel_data_addr, 0, 4, "_mqx_kernel_data", &kernel_data_addr - )) { + if (mqx_get_member(rtos, kernel_data_addr, 0, 4, + "_mqx_kernel_data", &kernel_data_addr) != ERROR_OK) return ERROR_FAIL; - } + /* get task queue address */ task_queue_addr = kernel_data_addr + MQX_KERNEL_OFFSET_TDLIST; /* get task queue size */ - if (ERROR_OK != mqx_get_member( - rtos, task_queue_addr, MQX_QUEUE_OFFSET_SIZE, 2, - "kernel_data->TD_LIST.SIZE", &task_queue_size - )) { + if (mqx_get_member(rtos, task_queue_addr, MQX_QUEUE_OFFSET_SIZE, 2, + "kernel_data->TD_LIST.SIZE", &task_queue_size) != ERROR_OK) return ERROR_FAIL; - } + /* search for taskid */ for ( uint32_t i = 0, taskpool_addr = task_queue_addr; @@ -501,21 +466,17 @@ static int mqx_get_thread_reg_list( uint32_t task_id = 0; /* set current taskpool address */ tmp_address = taskpool_addr; - if (ERROR_OK != mqx_get_member( - rtos, tmp_address, MQX_TASK_OFFSET_NEXT, 4, - "td_struct_ptr->NEXT", &taskpool_addr - )) { + if (mqx_get_member(rtos, tmp_address, MQX_TASK_OFFSET_NEXT, 4, + "td_struct_ptr->NEXT", &taskpool_addr) != ERROR_OK) return ERROR_FAIL; - } + /* get task address from taskpool */ task_addr = taskpool_addr - MQX_TASK_OFFSET_TDLIST; /* get value of td_struct->TASK_ID */ - if (ERROR_OK != mqx_get_member( - rtos, task_addr, MQX_TASK_OFFSET_ID, 4, - "td_struct_ptr->TASK_ID", &task_id - )) { + if (mqx_get_member(rtos, task_addr, MQX_TASK_OFFSET_ID, 4, + "td_struct_ptr->TASK_ID", &task_id) != ERROR_OK) return ERROR_FAIL; - } + /* found taskid, break */ if (task_id == thread_id) { my_task_addr = task_addr; @@ -527,11 +488,10 @@ static int mqx_get_thread_reg_list( return ERROR_FAIL; } /* get task stack head address */ - if (ERROR_OK != mqx_get_member( - rtos, my_task_addr, MQX_TASK_OFFSET_STACK, 4, "task->STACK_PTR", &stack_ptr - )) { + if (mqx_get_member(rtos, my_task_addr, MQX_TASK_OFFSET_STACK, 4, + "task->STACK_PTR", &stack_ptr) != ERROR_OK) return ERROR_FAIL; - } + return rtos_generic_stack_read( rtos->target, ((struct mqx_params *)rtos->rtos_specific_params)->stacking_info, stack_ptr, reg_list, num_regs ); @@ -541,7 +501,7 @@ static int mqx_get_thread_reg_list( static int mqx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) { *symbol_list = calloc(ARRAY_SIZE(mqx_symbol_list), sizeof(struct symbol_table_elem)); - if (NULL == *symbol_list) + if (!*symbol_list) return ERROR_FAIL; /* export required symbols */ for (int i = 0; i < (int)(ARRAY_SIZE(mqx_symbol_list)); i++) diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c index b2151bbea..f0b304861 100644 --- a/src/rtos/nuttx.c +++ b/src/rtos/nuttx.c @@ -231,7 +231,7 @@ retok: static bool nuttx_detect_rtos(struct target *target) { - if ((target->rtos->symbols != NULL) && + if ((target->rtos->symbols) && (target->rtos->symbols[0].address != 0) && (target->rtos->symbols[1].address != 0)) { return true; @@ -257,7 +257,7 @@ static int nuttx_update_threads(struct rtos *rtos) uint32_t i; uint8_t state; - if (rtos->symbols == NULL) { + if (!rtos->symbols) { LOG_ERROR("No symbols for NuttX"); return -3; } diff --git a/src/rtos/riot.c b/src/rtos/riot.c index 9165fe11b..8a3874202 100644 --- a/src/rtos/riot.c +++ b/src/rtos/riot.c @@ -91,19 +91,19 @@ enum riot_symbol_values { RIOT_NAME_OFFSET, }; -/* refer RIOT core/sched.c */ -static const char *const riot_symbol_list[] = { - "sched_threads", - "sched_num_threads", - "sched_active_pid", - "max_threads", - "_tcb_name_offset", - NULL +struct riot_symbol { + const char *const name; + bool optional; }; -/* Define which symbols are not mandatory */ -static const enum riot_symbol_values riot_optional_symbols[] = { - RIOT_NAME_OFFSET, +/* refer RIOT core/sched.c */ +static struct riot_symbol const riot_symbol_list[] = { + {"sched_threads", false}, + {"sched_num_threads", false}, + {"sched_active_pid", false}, + {"max_threads", false}, + {"_tcb_name_offset", true}, + {NULL, false} }; const struct rtos_type riot_rtos = { @@ -118,25 +118,25 @@ const struct rtos_type riot_rtos = { static int riot_update_threads(struct rtos *rtos) { int retval; - unsigned int tasks_found = 0; + int tasks_found = 0; const struct riot_params *param; - if (rtos == NULL) + if (!rtos) return ERROR_FAIL; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return ERROR_FAIL; param = (const struct riot_params *)rtos->rtos_specific_params; - if (rtos->symbols == NULL) { + if (!rtos->symbols) { LOG_ERROR("No symbols for RIOT"); return ERROR_FAIL; } if (rtos->symbols[RIOT_THREADS_BASE].address == 0) { LOG_ERROR("Can't find symbol `%s`", - riot_symbol_list[RIOT_THREADS_BASE]); + riot_symbol_list[RIOT_THREADS_BASE].name); return ERROR_FAIL; } @@ -154,7 +154,7 @@ static int riot_update_threads(struct rtos *rtos) (uint16_t *)&active_pid); if (retval != ERROR_OK) { LOG_ERROR("Can't read symbol `%s`", - riot_symbol_list[RIOT_ACTIVE_PID]); + riot_symbol_list[RIOT_ACTIVE_PID].name); return retval; } rtos->current_thread = active_pid; @@ -167,10 +167,9 @@ static int riot_update_threads(struct rtos *rtos) (uint16_t *)&thread_count); if (retval != ERROR_OK) { LOG_ERROR("Can't read symbol `%s`", - riot_symbol_list[RIOT_NUM_THREADS]); + riot_symbol_list[RIOT_NUM_THREADS].name); return retval; } - rtos->thread_count = thread_count; /* read the maximum number of threads */ uint8_t max_threads = 0; @@ -179,9 +178,14 @@ static int riot_update_threads(struct rtos *rtos) &max_threads); if (retval != ERROR_OK) { LOG_ERROR("Can't read symbol `%s`", - riot_symbol_list[RIOT_MAX_THREADS]); + riot_symbol_list[RIOT_MAX_THREADS].name); return retval; } + if (thread_count > max_threads) { + LOG_ERROR("Thread count is invalid"); + return ERROR_FAIL; + } + rtos->thread_count = thread_count; /* Base address of thread array */ uint32_t threads_base = rtos->symbols[RIOT_THREADS_BASE].address; @@ -195,14 +199,14 @@ static int riot_update_threads(struct rtos *rtos) &name_offset); if (retval != ERROR_OK) { LOG_ERROR("Can't read symbol `%s`", - riot_symbol_list[RIOT_NAME_OFFSET]); + riot_symbol_list[RIOT_NAME_OFFSET].name); return retval; } } /* Allocate memory for thread description */ rtos->thread_details = calloc(thread_count, sizeof(struct thread_detail)); - if (rtos->thread_details == NULL) { + if (!rtos->thread_details) { LOG_ERROR("RIOT: out of memory"); return ERROR_FAIL; } @@ -211,13 +215,17 @@ static int riot_update_threads(struct rtos *rtos) char buffer[32]; for (unsigned int i = 0; i < max_threads; i++) { + if (tasks_found == rtos->thread_count) + break; + /* get pointer to tcb_t */ uint32_t tcb_pointer = 0; retval = target_read_u32(rtos->target, threads_base + (i * 4), &tcb_pointer); if (retval != ERROR_OK) { - LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE]); + LOG_ERROR("Can't parse `%s`", + riot_symbol_list[RIOT_THREADS_BASE].name); goto error; } @@ -235,7 +243,8 @@ static int riot_update_threads(struct rtos *rtos) tcb_pointer + param->thread_status_offset, &status); if (retval != ERROR_OK) { - LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE]); + LOG_ERROR("Can't parse `%s`", + riot_symbol_list[RIOT_THREADS_BASE].name); goto error; } @@ -255,7 +264,7 @@ static int riot_update_threads(struct rtos *rtos) strdup(riot_thread_states[k].desc); } - if (rtos->thread_details[tasks_found].extra_info_str == NULL) { + if (!rtos->thread_details[tasks_found].extra_info_str) { LOG_ERROR("RIOT: out of memory"); retval = ERROR_FAIL; goto error; @@ -269,7 +278,7 @@ static int riot_update_threads(struct rtos *rtos) &name_pointer); if (retval != ERROR_OK) { LOG_ERROR("Can't parse `%s`", - riot_symbol_list[RIOT_THREADS_BASE]); + riot_symbol_list[RIOT_THREADS_BASE].name); goto error; } @@ -280,7 +289,7 @@ static int riot_update_threads(struct rtos *rtos) (uint8_t *)&buffer); if (retval != ERROR_OK) { LOG_ERROR("Can't parse `%s`", - riot_symbol_list[RIOT_THREADS_BASE]); + riot_symbol_list[RIOT_THREADS_BASE].name); goto error; } @@ -297,7 +306,7 @@ static int riot_update_threads(struct rtos *rtos) strdup("Enable DEVELHELP to see task names"); } - if (rtos->thread_details[tasks_found].thread_name_str == NULL) { + if (!rtos->thread_details[tasks_found].thread_name_str) { LOG_ERROR("RIOT: out of memory"); retval = ERROR_FAIL; goto error; @@ -321,13 +330,13 @@ static int riot_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, int retval; const struct riot_params *param; - if (rtos == NULL) + if (!rtos) return ERROR_FAIL; if (thread_id == 0) return ERROR_FAIL; - if (rtos->rtos_specific_params == NULL) + if (!rtos->rtos_specific_params) return ERROR_FAIL; param = (const struct riot_params *)rtos->rtos_specific_params; @@ -339,7 +348,7 @@ static int riot_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, threads_base + (thread_id * 4), &tcb_pointer); if (retval != ERROR_OK) { - LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE]); + LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE].name); return retval; } @@ -349,7 +358,7 @@ static int riot_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, tcb_pointer + param->thread_sp_offset, &stackptr); if (retval != ERROR_OK) { - LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE]); + LOG_ERROR("Can't parse `%s`", riot_symbol_list[RIOT_THREADS_BASE].name); return retval; } @@ -364,22 +373,14 @@ static int riot_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[ { *symbol_list = calloc(ARRAY_SIZE(riot_symbol_list), sizeof(struct symbol_table_elem)); - if (*symbol_list == NULL) { + if (!*symbol_list) { LOG_ERROR("RIOT: out of memory"); return ERROR_FAIL; } for (unsigned int i = 0; i < ARRAY_SIZE(riot_symbol_list); i++) { - (*symbol_list)[i].symbol_name = riot_symbol_list[i]; - (*symbol_list)[i].optional = false; - - /* Lookup if symbol is optional */ - for (unsigned int k = 0; k < sizeof(riot_optional_symbols); k++) { - if (i == riot_optional_symbols[k]) { - (*symbol_list)[i].optional = true; - break; - } - } + (*symbol_list)[i].symbol_name = riot_symbol_list[i].name; + (*symbol_list)[i].optional = riot_symbol_list[i].optional; } return ERROR_OK; @@ -387,7 +388,7 @@ static int riot_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[ static bool riot_detect_rtos(struct target *target) { - if ((target->rtos->symbols != NULL) && + if ((target->rtos->symbols) && (target->rtos->symbols[RIOT_THREADS_BASE].address != 0)) { /* looks like RIOT */ return true; @@ -401,7 +402,7 @@ static int riot_create(struct target *target) /* lookup if target is supported by RIOT */ while ((i < RIOT_NUM_PARAMS) && - (0 != strcmp(riot_params_list[i].target_name, target->type->name))) { + (strcmp(riot_params_list[i].target_name, target->type->name) != 0)) { i++; } if (i >= RIOT_NUM_PARAMS) { diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c index 31e910d4e..ffae89269 100644 --- a/src/rtos/rtos.c +++ b/src/rtos/rtos.c @@ -27,30 +27,30 @@ #include "server/gdb_server.h" /* RTOSs */ -extern struct rtos_type FreeRTOS_rtos; -extern struct rtos_type ThreadX_rtos; -extern struct rtos_type eCos_rtos; -extern struct rtos_type Linux_os; +extern struct rtos_type freertos_rtos; +extern struct rtos_type threadx_rtos; +extern struct rtos_type ecos_rtos; +extern struct rtos_type linux_rtos; extern struct rtos_type chibios_rtos; extern struct rtos_type chromium_ec_rtos; -extern struct rtos_type embKernel_rtos; +extern struct rtos_type embkernel_rtos; extern struct rtos_type mqx_rtos; -extern struct rtos_type uCOS_III_rtos; +extern struct rtos_type ucos_iii_rtos; extern struct rtos_type nuttx_rtos; extern struct rtos_type hwthread_rtos; extern struct rtos_type riot_rtos; extern struct rtos_type zephyr_rtos; static struct rtos_type *rtos_types[] = { - &ThreadX_rtos, - &FreeRTOS_rtos, - &eCos_rtos, - &Linux_os, + &threadx_rtos, + &freertos_rtos, + &ecos_rtos, + &linux_rtos, &chibios_rtos, &chromium_ec_rtos, - &embKernel_rtos, + &embkernel_rtos, &mqx_rtos, - &uCOS_III_rtos, + &ucos_iii_rtos, &nuttx_rtos, &riot_rtos, &zephyr_rtos, @@ -119,7 +119,7 @@ static int os_alloc_create(struct target *target, struct rtos_type *ostype, { int ret = os_alloc(target, ostype, cmd_ctx); - if (JIM_OK == ret) { + if (ret == JIM_OK) { ret = target->rtos->type->create(target); if (ret != JIM_OK) os_free(target); @@ -148,7 +148,7 @@ int rtos_create(struct jim_getopt_info *goi, struct target *target) if (e != JIM_OK) return e; - if (0 == strcmp(cp, "auto")) { + if (strcmp(cp, "auto") == 0) { /* Auto detect tries to look up all symbols for each RTOS, * and runs the RTOS driver's _detect() function when GDB * finds all symbols for any RTOS. See rtos_qsymbol(). */ @@ -160,7 +160,7 @@ int rtos_create(struct jim_getopt_info *goi, struct target *target) } for (x = 0; rtos_types[x]; x++) - if (0 == strcmp(cp, rtos_types[x]->name)) + if (strcmp(cp, rtos_types[x]->name) == 0) return os_alloc_create(target, rtos_types[x], cmd_ctx); Jim_SetResultFormatted(goi->interp, "Unknown RTOS type %s, try one of: ", cp); @@ -180,7 +180,7 @@ void rtos_destroy(struct target *target) int gdb_thread_packet(struct connection *connection, char const *packet, int packet_size) { struct target *target = get_target_from_connection(connection); - if (target->rtos == NULL) + if (!target->rtos) return rtos_thread_packet(connection, packet, packet_size); /* thread not *found*/ return target->rtos->gdb_thread_packet(connection, packet, packet_size); @@ -274,8 +274,17 @@ int rtos_qsymbol(struct connection *connection, char const *packet, int packet_s cur_sym[0] = '\x00'; } } + + LOG_DEBUG("RTOS: Address of symbol '%s' is 0x%" PRIx64, cur_sym, addr); + next_sym = next_symbol(os, cur_sym, addr); + /* Should never happen unless the debugger misbehaves */ + if (next_sym == NULL) { + LOG_WARNING("RTOS: Debugger sent us qSymbol with '%s' that we did not ask for", cur_sym); + goto done; + } + if (!next_sym->symbol_name) { /* No more symbols need looking up */ @@ -299,6 +308,8 @@ int rtos_qsymbol(struct connection *connection, char const *packet, int packet_s goto done; } + LOG_DEBUG("RTOS: Requesting symbol lookup of '%s' from the debugger", next_sym->symbol_name); + reply_len = snprintf(reply, sizeof(reply), "qSymbol:"); reply_len += hexify(reply + reply_len, (const uint8_t *)next_sym->symbol_name, strlen(next_sym->symbol_name), @@ -314,13 +325,13 @@ int rtos_thread_packet(struct connection *connection, char const *packet, int pa struct target *target = get_target_from_connection(connection); if (strncmp(packet, "qThreadExtraInfo,", 17) == 0) { - if ((target->rtos != NULL) && (target->rtos->thread_details != NULL) && + if ((target->rtos) && (target->rtos->thread_details) && (target->rtos->thread_count != 0)) { threadid_t threadid = 0; int found = -1; sscanf(packet, "qThreadExtraInfo,%" SCNx64, &threadid); - if ((target->rtos != NULL) && (target->rtos->thread_details != NULL)) { + if ((target->rtos) && (target->rtos->thread_details)) { int thread_num; for (thread_num = 0; thread_num < target->rtos->thread_count; thread_num++) { if (target->rtos->thread_details[thread_num].threadid == threadid) { @@ -337,17 +348,17 @@ int rtos_thread_packet(struct connection *connection, char const *packet, int pa struct thread_detail *detail = &target->rtos->thread_details[found]; int str_size = 0; - if (detail->thread_name_str != NULL) + if (detail->thread_name_str) str_size += strlen(detail->thread_name_str); - if (detail->extra_info_str != NULL) + if (detail->extra_info_str) str_size += strlen(detail->extra_info_str); char *tmp_str = calloc(str_size + 9, sizeof(char)); char *tmp_str_ptr = tmp_str; - if (detail->thread_name_str != NULL) + if (detail->thread_name_str) tmp_str_ptr += sprintf(tmp_str_ptr, "Name: %s", detail->thread_name_str); - if (detail->extra_info_str != NULL) { + if (detail->extra_info_str) { if (tmp_str_ptr != tmp_str) tmp_str_ptr += sprintf(tmp_str_ptr, ", "); tmp_str_ptr += sprintf(tmp_str_ptr, "%s", detail->extra_info_str); @@ -379,7 +390,7 @@ int rtos_thread_packet(struct connection *connection, char const *packet, int pa return ERROR_OK; } else if (strncmp(packet, "qfThreadInfo", 12) == 0) { int i; - if (target->rtos != NULL) { + if (target->rtos) { if (target->rtos->thread_count == 0) { gdb_put_packet(connection, "l", 1); } else { @@ -412,7 +423,7 @@ int rtos_thread_packet(struct connection *connection, char const *packet, int pa * otherwise it gets incorrectly handled */ return GDB_THREAD_PACKET_NOT_CONSUMED; } else if (strncmp(packet, "qC", 2) == 0) { - if (target->rtos != NULL) { + if (target->rtos) { char buffer[19]; int size; size = snprintf(buffer, 19, "QC%016" PRIx64, target->rtos->current_thread); @@ -424,7 +435,7 @@ int rtos_thread_packet(struct connection *connection, char const *packet, int pa threadid_t threadid; int found = -1; sscanf(packet, "T%" SCNx64, &threadid); - if ((target->rtos != NULL) && (target->rtos->thread_details != NULL)) { + if ((target->rtos) && (target->rtos->thread_details)) { int thread_num; for (thread_num = 0; thread_num < target->rtos->thread_count; thread_num++) { if (target->rtos->thread_details[thread_num].threadid == threadid) { @@ -440,7 +451,7 @@ int rtos_thread_packet(struct connection *connection, char const *packet, int pa return ERROR_OK; } else if (packet[0] == 'H') { /* Set current thread ( 'c' for step and continue, 'g' for * all other operations ) */ - if ((packet[1] == 'g') && (target->rtos != NULL)) { + if ((packet[1] == 'g') && (target->rtos)) { threadid_t threadid; sscanf(packet, "Hg%16" SCNx64, &threadid); LOG_DEBUG("RTOS: GDB requested to set current thread to 0x%" PRIx64, threadid); @@ -485,7 +496,7 @@ int rtos_get_gdb_reg(struct connection *connection, int reg_num) { struct target *target = get_target_from_connection(connection); threadid_t current_threadid = target->rtos->current_threadid; - if ((target->rtos != NULL) && (current_threadid != -1) && + if ((target->rtos) && (current_threadid != -1) && (current_threadid != 0) && ((current_threadid != target->rtos->current_thread) || (target->smp))) { /* in smp several current thread are possible */ @@ -538,7 +549,7 @@ int rtos_get_gdb_reg_list(struct connection *connection) { struct target *target = get_target_from_connection(connection); int64_t current_threadid = target->rtos->current_threadid; - if ((target->rtos != NULL) && (current_threadid != -1) && + if ((target->rtos) && (current_threadid != -1) && (current_threadid != 0) && ((current_threadid != target->rtos->current_thread) || (target->smp))) { /* in smp several current thread are possible */ @@ -572,8 +583,8 @@ int rtos_set_reg(struct connection *connection, int reg_num, { struct target *target = get_target_from_connection(connection); int64_t current_threadid = target->rtos->current_threadid; - if ((target->rtos != NULL) && - (target->rtos->type->set_reg != NULL) && + if ((target->rtos) && + (target->rtos->type->set_reg) && (current_threadid != -1) && (current_threadid != 0)) { return target->rtos->type->set_reg(target->rtos, reg_num, reg_value); @@ -615,7 +626,7 @@ int rtos_generic_stack_read(struct target *target, #endif target_addr_t new_stack_ptr; - if (stacking->calculate_process_stack != NULL) { + if (stacking->calculate_process_stack) { new_stack_ptr = stacking->calculate_process_stack(target, stack_data, stacking, stack_ptr); } else { @@ -763,7 +774,7 @@ static int rtos_try_next(struct target *target) int rtos_update_threads(struct target *target) { - if ((target->rtos != NULL) && (target->rtos->type != NULL)) + if ((target->rtos) && (target->rtos->type)) target->rtos->type->update_threads(target->rtos); return ERROR_OK; } diff --git a/src/rtos/rtos_ecos_stackings.c b/src/rtos/rtos_ecos_stackings.c index c6b0712c6..4745470ce 100644 --- a/src/rtos/rtos_ecos_stackings.c +++ b/src/rtos/rtos_ecos_stackings.c @@ -22,7 +22,7 @@ #include "rtos_standard_stackings.h" #include "target/armv7m.h" -static const struct stack_register_offset rtos_eCos_Cortex_M3_stack_offsets[ARMV7M_NUM_CORE_REGS] = { +static const struct stack_register_offset rtos_ecos_cortex_m3_stack_offsets[ARMV7M_NUM_CORE_REGS] = { { ARMV7M_R0, 0x0c, 32 }, /* r0 */ { ARMV7M_R1, 0x10, 32 }, /* r1 */ { ARMV7M_R2, 0x14, 32 }, /* r2 */ @@ -42,10 +42,10 @@ static const struct stack_register_offset rtos_eCos_Cortex_M3_stack_offsets[ARMV { ARMV7M_xPSR, -1, 32 }, /* xPSR */ }; -const struct rtos_register_stacking rtos_eCos_Cortex_M3_stacking = { +const struct rtos_register_stacking rtos_ecos_cortex_m3_stacking = { .stack_registers_size = 0x44, .stack_growth_direction = -1, .num_output_registers = ARMV7M_NUM_CORE_REGS, .calculate_process_stack = rtos_generic_stack_align8, - .register_offsets = rtos_eCos_Cortex_M3_stack_offsets + .register_offsets = rtos_ecos_cortex_m3_stack_offsets }; diff --git a/src/rtos/rtos_ecos_stackings.h b/src/rtos/rtos_ecos_stackings.h index 951f7de50..d66d05fe9 100644 --- a/src/rtos/rtos_ecos_stackings.h +++ b/src/rtos/rtos_ecos_stackings.h @@ -23,6 +23,6 @@ #include "rtos.h" -extern const struct rtos_register_stacking rtos_eCos_Cortex_M3_stacking; +extern const struct rtos_register_stacking rtos_ecos_cortex_m3_stacking; #endif /* OPENOCD_RTOS_RTOS_ECOS_STACKINGS_H */ diff --git a/src/rtos/rtos_embkernel_stackings.c b/src/rtos/rtos_embkernel_stackings.c index 8c0fd2a99..df1fc51f2 100644 --- a/src/rtos/rtos_embkernel_stackings.c +++ b/src/rtos/rtos_embkernel_stackings.c @@ -24,7 +24,7 @@ #include "target/armv7m.h" #include "rtos_standard_stackings.h" -static const struct stack_register_offset rtos_embkernel_Cortex_M_stack_offsets[ARMV7M_NUM_CORE_REGS] = { +static const struct stack_register_offset rtos_embkernel_cortex_m_stack_offsets[ARMV7M_NUM_CORE_REGS] = { { ARMV7M_R0, 0x24, 32 }, /* r0 */ { ARMV7M_R1, 0x28, 32 }, /* r1 */ { ARMV7M_R2, 0x2c, 32 }, /* r2 */ @@ -44,10 +44,10 @@ static const struct stack_register_offset rtos_embkernel_Cortex_M_stack_offsets[ { ARMV7M_xPSR, 0x40, 32 }, /* xPSR */ }; -const struct rtos_register_stacking rtos_embkernel_Cortex_M_stacking = { +const struct rtos_register_stacking rtos_embkernel_cortex_m_stacking = { .stack_registers_size = 0x40, .stack_growth_direction = -1, .num_output_registers = ARMV7M_NUM_CORE_REGS, .calculate_process_stack = rtos_generic_stack_align8, - .register_offsets = rtos_embkernel_Cortex_M_stack_offsets + .register_offsets = rtos_embkernel_cortex_m_stack_offsets }; diff --git a/src/rtos/rtos_embkernel_stackings.h b/src/rtos/rtos_embkernel_stackings.h index 89a0c2f12..7850bebcd 100644 --- a/src/rtos/rtos_embkernel_stackings.h +++ b/src/rtos/rtos_embkernel_stackings.h @@ -25,6 +25,6 @@ #include "rtos.h" -extern const struct rtos_register_stacking rtos_embkernel_Cortex_M_stacking; +extern const struct rtos_register_stacking rtos_embkernel_cortex_m_stacking; #endif /* OPENOCD_RTOS_RTOS_EMBKERNEL_STACKINGS_H */ diff --git a/src/rtos/rtos_riot_stackings.c b/src/rtos/rtos_riot_stackings.c index 6eddc7915..84e1f7ff8 100644 --- a/src/rtos/rtos_riot_stackings.c +++ b/src/rtos/rtos_riot_stackings.c @@ -32,7 +32,7 @@ static target_addr_t rtos_riot_cortex_m_stack_align(struct target *target, target_addr_t stack_ptr) { const int XPSR_OFFSET = 0x40; - return rtos_Cortex_M_stack_align(target, stack_data, stacking, + return rtos_cortex_m_stack_align(target, stack_data, stacking, stack_ptr, XPSR_OFFSET); } diff --git a/src/rtos/rtos_standard_stackings.c b/src/rtos/rtos_standard_stackings.c index 8a833dee9..d775786b6 100644 --- a/src/rtos/rtos_standard_stackings.c +++ b/src/rtos/rtos_standard_stackings.c @@ -24,7 +24,7 @@ #include "target/armv7m.h" #include "target/riscv/riscv.h" -static const struct stack_register_offset rtos_standard_Cortex_M3_stack_offsets[ARMV7M_NUM_CORE_REGS] = { +static const struct stack_register_offset rtos_standard_cortex_m3_stack_offsets[ARMV7M_NUM_CORE_REGS] = { { ARMV7M_R0, 0x20, 32 }, /* r0 */ { ARMV7M_R1, 0x24, 32 }, /* r1 */ { ARMV7M_R2, 0x28, 32 }, /* r2 */ @@ -44,7 +44,7 @@ static const struct stack_register_offset rtos_standard_Cortex_M3_stack_offsets[ { ARMV7M_xPSR, 0x3c, 32 }, /* xPSR */ }; -static const struct stack_register_offset rtos_standard_Cortex_M4F_stack_offsets[] = { +static const struct stack_register_offset rtos_standard_cortex_m4f_stack_offsets[] = { { ARMV7M_R0, 0x24, 32 }, /* r0 */ { ARMV7M_R1, 0x28, 32 }, /* r1 */ { ARMV7M_R2, 0x2c, 32 }, /* r2 */ @@ -64,7 +64,7 @@ static const struct stack_register_offset rtos_standard_Cortex_M4F_stack_offsets { ARMV7M_xPSR, 0x40, 32 }, /* xPSR */ }; -static const struct stack_register_offset rtos_standard_Cortex_M4F_FPU_stack_offsets[] = { +static const struct stack_register_offset rtos_standard_cortex_m4f_fpu_stack_offsets[] = { { ARMV7M_R0, 0x64, 32 }, /* r0 */ { ARMV7M_R1, 0x68, 32 }, /* r1 */ { ARMV7M_R2, 0x6c, 32 }, /* r2 */ @@ -85,7 +85,7 @@ static const struct stack_register_offset rtos_standard_Cortex_M4F_FPU_stack_off }; -static const struct stack_register_offset rtos_standard_Cortex_R4_stack_offsets[] = { +static const struct stack_register_offset rtos_standard_cortex_r4_stack_offsets[] = { { 0, 0x08, 32 }, /* r0 (a1) */ { 1, 0x0c, 32 }, /* r1 (a2) */ { 2, 0x10, 32 }, /* r2 (a3) */ @@ -114,7 +114,7 @@ static const struct stack_register_offset rtos_standard_Cortex_R4_stack_offsets[ { 26, 0x04, 32 }, /* CSPR */ }; -static const struct stack_register_offset rtos_standard_NDS32_N1068_stack_offsets[] = { +static const struct stack_register_offset rtos_standard_nds32_n1068_stack_offsets[] = { { 0, 0x88, 32 }, /* R0 */ { 1, 0x8C, 32 }, /* R1 */ { 2, 0x14, 32 }, /* R2 */ @@ -365,7 +365,7 @@ target_addr_t rtos_generic_stack_align8(struct target *target, * This is just a helper function for use in the calculate_process_stack * function for a given architecture/rtos. */ -int64_t rtos_Cortex_M_stack_align(struct target *target, +int64_t rtos_cortex_m_stack_align(struct target *target, const uint8_t *stack_data, const struct rtos_register_stacking *stacking, int64_t stack_ptr, size_t xpsr_offset) { @@ -386,81 +386,81 @@ int64_t rtos_Cortex_M_stack_align(struct target *target, return new_stack_ptr; } -static target_addr_t rtos_standard_Cortex_M3_stack_align(struct target *target, +static target_addr_t rtos_standard_cortex_m3_stack_align(struct target *target, const uint8_t *stack_data, const struct rtos_register_stacking *stacking, target_addr_t stack_ptr) { const int XPSR_OFFSET = 0x3c; - return rtos_Cortex_M_stack_align(target, stack_data, stacking, + return rtos_cortex_m_stack_align(target, stack_data, stacking, stack_ptr, XPSR_OFFSET); } -static target_addr_t rtos_standard_Cortex_M4F_stack_align(struct target *target, +static target_addr_t rtos_standard_cortex_m4f_stack_align(struct target *target, const uint8_t *stack_data, const struct rtos_register_stacking *stacking, target_addr_t stack_ptr) { const int XPSR_OFFSET = 0x40; - return rtos_Cortex_M_stack_align(target, stack_data, stacking, + return rtos_cortex_m_stack_align(target, stack_data, stacking, stack_ptr, XPSR_OFFSET); } -static target_addr_t rtos_standard_Cortex_M4F_FPU_stack_align(struct target *target, +static target_addr_t rtos_standard_cortex_m4f_fpu_stack_align(struct target *target, const uint8_t *stack_data, const struct rtos_register_stacking *stacking, target_addr_t stack_ptr) { const int XPSR_OFFSET = 0x80; - return rtos_Cortex_M_stack_align(target, stack_data, stacking, + return rtos_cortex_m_stack_align(target, stack_data, stacking, stack_ptr, XPSR_OFFSET); } -const struct rtos_register_stacking rtos_standard_Cortex_M3_stacking = { +const struct rtos_register_stacking rtos_standard_cortex_m3_stacking = { .stack_registers_size = 0x40, .stack_growth_direction = -1, .num_output_registers = ARMV7M_NUM_CORE_REGS, - .calculate_process_stack = rtos_standard_Cortex_M3_stack_align, - .register_offsets = rtos_standard_Cortex_M3_stack_offsets + .calculate_process_stack = rtos_standard_cortex_m3_stack_align, + .register_offsets = rtos_standard_cortex_m3_stack_offsets }; -const struct rtos_register_stacking rtos_standard_Cortex_M4F_stacking = { +const struct rtos_register_stacking rtos_standard_cortex_m4f_stacking = { .stack_registers_size = 0x44, /* 4 more for LR*/ .stack_growth_direction = -1, .num_output_registers = ARMV7M_NUM_CORE_REGS, - .calculate_process_stack = rtos_standard_Cortex_M4F_stack_align, - .register_offsets = rtos_standard_Cortex_M4F_stack_offsets + .calculate_process_stack = rtos_standard_cortex_m4f_stack_align, + .register_offsets = rtos_standard_cortex_m4f_stack_offsets }; -const struct rtos_register_stacking rtos_standard_Cortex_M4F_FPU_stacking = { +const struct rtos_register_stacking rtos_standard_cortex_m4f_fpu_stacking = { .stack_registers_size = 0xcc, /* 4 more for LR + 48 more for FPU S0-S15 register*/ .stack_growth_direction = -1, .num_output_registers = ARMV7M_NUM_CORE_REGS, - .calculate_process_stack = rtos_standard_Cortex_M4F_FPU_stack_align, - .register_offsets = rtos_standard_Cortex_M4F_FPU_stack_offsets + .calculate_process_stack = rtos_standard_cortex_m4f_fpu_stack_align, + .register_offsets = rtos_standard_cortex_m4f_fpu_stack_offsets }; -const struct rtos_register_stacking rtos_standard_Cortex_R4_stacking = { +const struct rtos_register_stacking rtos_standard_cortex_r4_stacking = { .stack_registers_size = 0x48, .stack_growth_direction = -1, .num_output_registers = 26, .calculate_process_stack = rtos_generic_stack_align8, - .register_offsets = rtos_standard_Cortex_R4_stack_offsets + .register_offsets = rtos_standard_cortex_r4_stack_offsets }; -const struct rtos_register_stacking rtos_standard_NDS32_N1068_stacking = { +const struct rtos_register_stacking rtos_standard_nds32_n1068_stacking = { .stack_registers_size = 0x90, .stack_growth_direction = -1, .num_output_registers = 32, .calculate_process_stack = rtos_generic_stack_align8, - .register_offsets = rtos_standard_NDS32_N1068_stack_offsets + .register_offsets = rtos_standard_nds32_n1068_stack_offsets }; -const struct rtos_register_stacking rtos_metal_RV32_stacking = { +const struct rtos_register_stacking rtos_metal_rv32_stacking = { .stack_registers_size = (32 + 2) * 4, .stack_growth_direction = -1, .num_output_registers = 33, .calculate_process_stack = rtos_generic_stack_align8, - .register_offsets = rtos_metal_RV32_stack_offsets, - .total_register_count = ARRAY_SIZE(rtos_metal_RV32_stack_offsets) + .register_offsets = rtos_metal_rv32_stack_offsets, + .total_register_count = ARRAY_SIZE(rtos_metal_rv32_stack_offsets) }; const struct rtos_register_stacking rtos_standard_RV32_stacking = { @@ -468,8 +468,8 @@ const struct rtos_register_stacking rtos_standard_RV32_stacking = { .stack_growth_direction = -1, .num_output_registers = 33, .calculate_process_stack = rtos_generic_stack_align8, - .register_offsets = rtos_standard_RV32_stack_offsets, - .total_register_count = ARRAY_SIZE(rtos_standard_RV32_stack_offsets) + .register_offsets = rtos_standard_rv32_stack_offsets, + .total_register_count = ARRAY_SIZE(rtos_standard_rv32_stack_offsets) }; const struct rtos_register_stacking rtos_metal_RV64_stacking = { @@ -477,15 +477,15 @@ const struct rtos_register_stacking rtos_metal_RV64_stacking = { .stack_growth_direction = -1, .num_output_registers = 33, .calculate_process_stack = rtos_generic_stack_align8, - .register_offsets = rtos_metal_RV64_stack_offsets, - .total_register_count = ARRAY_SIZE(rtos_metal_RV64_stack_offsets) + .register_offsets = rtos_metal_rv64_stack_offsets, + .total_register_count = ARRAY_SIZE(rtos_metal_rv64_stack_offsets) }; -const struct rtos_register_stacking rtos_standard_RV64_stacking = { +const struct rtos_register_stacking rtos_standard_rv64_stacking = { .stack_registers_size = (32 + 2) * 8, .stack_growth_direction = -1, .num_output_registers = 33, .calculate_process_stack = rtos_generic_stack_align8, - .register_offsets = rtos_standard_RV64_stack_offsets, - .total_register_count = ARRAY_SIZE(rtos_standard_RV64_stack_offsets) + .register_offsets = rtos_standard_rv64_stack_offsets, + .total_register_count = ARRAY_SIZE(rtos_standard_rv64_stack_offsets) }; diff --git a/src/rtos/rtos_standard_stackings.h b/src/rtos/rtos_standard_stackings.h index 6a10e4bdf..5001c8516 100644 --- a/src/rtos/rtos_standard_stackings.h +++ b/src/rtos/rtos_standard_stackings.h @@ -25,11 +25,11 @@ #include "rtos.h" -extern const struct rtos_register_stacking rtos_standard_Cortex_M3_stacking; -extern const struct rtos_register_stacking rtos_standard_Cortex_M4F_stacking; -extern const struct rtos_register_stacking rtos_standard_Cortex_M4F_FPU_stacking; -extern const struct rtos_register_stacking rtos_standard_Cortex_R4_stacking; -extern const struct rtos_register_stacking rtos_standard_NDS32_N1068_stacking; +extern const struct rtos_register_stacking rtos_standard_cortex_m3_stacking; +extern const struct rtos_register_stacking rtos_standard_cortex_m4f_stacking; +extern const struct rtos_register_stacking rtos_standard_cortex_m4f_fpu_stacking; +extern const struct rtos_register_stacking rtos_standard_cortex_r4_stacking; +extern const struct rtos_register_stacking rtos_standard_nds32_n1068_stacking; target_addr_t rtos_generic_stack_align8(struct target *target, const uint8_t *stack_data, const struct rtos_register_stacking *stacking, target_addr_t stack_ptr); diff --git a/src/rtos/rtos_ucos_iii_stackings.c b/src/rtos/rtos_ucos_iii_stackings.c index 1081d3716..c11601b2e 100644 --- a/src/rtos/rtos_ucos_iii_stackings.c +++ b/src/rtos/rtos_ucos_iii_stackings.c @@ -26,7 +26,7 @@ #include #include -static const struct stack_register_offset rtos_uCOS_III_Cortex_M_stack_offsets[] = { +static const struct stack_register_offset rtos_ucos_iii_cortex_m_stack_offsets[] = { { ARMV7M_R0, 0x20, 32 }, /* r0 */ { ARMV7M_R1, 0x24, 32 }, /* r1 */ { ARMV7M_R2, 0x28, 32 }, /* r2 */ @@ -46,7 +46,7 @@ static const struct stack_register_offset rtos_uCOS_III_Cortex_M_stack_offsets[] { ARMV7M_xPSR, 0x3c, 32 }, /* xPSR */ }; -static const struct stack_register_offset rtos_uCOS_III_eSi_RISC_stack_offsets[] = { +static const struct stack_register_offset rtos_ucos_iii_esi_risc_stack_offsets[] = { { ESIRISC_SP, -2, 32 }, /* sp */ { ESIRISC_RA, 0x48, 32 }, /* ra */ { ESIRISC_R2, 0x44, 32 }, /* r2 */ @@ -70,14 +70,14 @@ static const struct stack_register_offset rtos_uCOS_III_eSi_RISC_stack_offsets[] const struct rtos_register_stacking rtos_uCOS_III_Cortex_M_stacking = { .stack_registers_size = 0x40, .stack_growth_direction = -1, - .num_output_registers = ARRAY_SIZE(rtos_uCOS_III_Cortex_M_stack_offsets), + .num_output_registers = ARRAY_SIZE(rtos_ucos_iii_cortex_m_stack_offsets), .calculate_process_stack = rtos_generic_stack_align8, - .register_offsets = rtos_uCOS_III_Cortex_M_stack_offsets + .register_offsets = rtos_ucos_iii_cortex_m_stack_offsets }; const struct rtos_register_stacking rtos_uCOS_III_eSi_RISC_stacking = { .stack_registers_size = 0x4c, .stack_growth_direction = -1, - .num_output_registers = ARRAY_SIZE(rtos_uCOS_III_eSi_RISC_stack_offsets), - .register_offsets = rtos_uCOS_III_eSi_RISC_stack_offsets + .num_output_registers = ARRAY_SIZE(rtos_ucos_iii_esi_risc_stack_offsets), + .register_offsets = rtos_ucos_iii_esi_risc_stack_offsets }; diff --git a/src/rtos/rtos_ucos_iii_stackings.h b/src/rtos/rtos_ucos_iii_stackings.h index a9398138b..f2f120fd9 100644 --- a/src/rtos/rtos_ucos_iii_stackings.h +++ b/src/rtos/rtos_ucos_iii_stackings.h @@ -25,7 +25,7 @@ #include -extern const struct rtos_register_stacking rtos_uCOS_III_Cortex_M_stacking; -extern const struct rtos_register_stacking rtos_uCOS_III_eSi_RISC_stacking; +extern const struct rtos_register_stacking rtos_ucos_iii_cortex_m_stacking; +extern const struct rtos_register_stacking rtos_ucos_iii_esi_risc_stacking; #endif /* OPENOCD_RTOS_RTOS_UCOS_III_STACKINGS_H */ diff --git a/src/rtos/uCOS-III.c b/src/rtos/uCOS-III.c index d62a2199b..385c8d841 100644 --- a/src/rtos/uCOS-III.c +++ b/src/rtos/uCOS-III.c @@ -37,7 +37,7 @@ #define UCOS_III_MAX_THREADS 256 #endif -struct uCOS_III_params { +struct ucos_iii_params { const char *target_name; const unsigned char pointer_width; symbol_address_t thread_stack_offset; @@ -53,7 +53,7 @@ struct uCOS_III_params { symbol_address_t threads[]; }; -static const struct uCOS_III_params uCOS_III_params_list[] = { +static const struct ucos_iii_params ucos_iii_params_list[] = { { "cortex_m", /* target_name */ sizeof(uint32_t), /* pointer_width */ @@ -65,7 +65,7 @@ static const struct uCOS_III_params uCOS_III_params_list[] = { 0, /* thread_next_offset */ false, /* thread_offsets_updated */ 1, /* threadid_start */ - &rtos_uCOS_III_Cortex_M_stacking, /* stacking_info */ + &rtos_ucos_iii_cortex_m_stacking, /* stacking_info */ 0, /* num_threads */ }, { @@ -79,12 +79,12 @@ static const struct uCOS_III_params uCOS_III_params_list[] = { 0, /* thread_next_offset */ false, /* thread_offsets_updated */ 1, /* threadid_start */ - &rtos_uCOS_III_eSi_RISC_stacking, /* stacking_info */ + &rtos_ucos_iii_esi_risc_stacking, /* stacking_info */ 0, /* num_threads */ }, }; -static const char * const uCOS_III_symbol_list[] = { +static const char * const ucos_iii_symbol_list[] = { "OSRunning", "OSTCBCurPtr", "OSTaskDbgListPtr", @@ -100,22 +100,22 @@ static const char * const uCOS_III_symbol_list[] = { NULL }; -enum uCOS_III_symbol_values { - uCOS_III_VAL_OSRunning, - uCOS_III_VAL_OSTCBCurPtr, - uCOS_III_VAL_OSTaskDbgListPtr, - uCOS_III_VAL_OSTaskQty, +enum ucos_iii_symbol_values { + UCOS_III_VAL_OS_RUNNING, + UCOS_III_VAL_OS_TCB_CUR_PTR, + UCOS_III_VAL_OS_TASK_DBG_LIST_PTR, + UCOS_III_VAL_OS_TASK_QTY, /* also see: contrib/rtos-helpers/uCOS-III-openocd.c */ - uCOS_III_VAL_OS_TCB_StkPtr_offset, - uCOS_III_VAL_OS_TCB_NamePtr_offset, - uCOS_III_VAL_OS_TCB_TaskState_offset, - uCOS_III_VAL_OS_TCB_Prio_offset, - uCOS_III_VAL_OS_TCB_DbgPrevPtr_offset, - uCOS_III_VAL_OS_TCB_DbgNextPtr_offset, + UCOS_III_VAL_OS_TCB_STK_PTR_OFFSET, + UCOS_III_VAL_OS_TCB_NAME_PTR_OFFSET, + UCOS_III_VAL_OS_TCB_TASK_STATE_OFFSET, + UCOS_III_VAL_OS_TCB_PRIO_OFFSET, + UCOS_III_VAL_OS_TCB_DBG_PREV_PTR_OFFSET, + UCOS_III_VAL_OS_TCB_DBG_NEXT_PTR_OFFSET, }; -static const char * const uCOS_III_thread_state_list[] = { +static const char * const ucos_iii_thread_state_list[] = { "Ready", "Delay", "Pend", @@ -126,10 +126,10 @@ static const char * const uCOS_III_thread_state_list[] = { "Pend Timeout Suspended", }; -static int uCOS_III_find_or_create_thread(struct rtos *rtos, symbol_address_t thread_address, +static int ucos_iii_find_or_create_thread(struct rtos *rtos, symbol_address_t thread_address, threadid_t *threadid) { - struct uCOS_III_params *params = rtos->rtos_specific_params; + struct ucos_iii_params *params = rtos->rtos_specific_params; size_t thread_index; for (thread_index = 0; thread_index < params->num_threads; thread_index++) @@ -148,10 +148,10 @@ found: return ERROR_OK; } -static int uCOS_III_find_thread_address(struct rtos *rtos, threadid_t threadid, +static int ucos_iii_find_thread_address(struct rtos *rtos, threadid_t threadid, symbol_address_t *thread_address) { - struct uCOS_III_params *params = rtos->rtos_specific_params; + struct ucos_iii_params *params = rtos->rtos_specific_params; size_t thread_index; thread_index = threadid - params->threadid_start; @@ -164,16 +164,16 @@ static int uCOS_III_find_thread_address(struct rtos *rtos, threadid_t threadid, return ERROR_OK; } -static int uCOS_III_find_last_thread_address(struct rtos *rtos, symbol_address_t *thread_address) +static int ucos_iii_find_last_thread_address(struct rtos *rtos, symbol_address_t *thread_address) { - struct uCOS_III_params *params = rtos->rtos_specific_params; + struct ucos_iii_params *params = rtos->rtos_specific_params; int retval; /* read the thread list head */ symbol_address_t thread_list_address = 0; retval = target_read_memory(rtos->target, - rtos->symbols[uCOS_III_VAL_OSTaskDbgListPtr].address, + rtos->symbols[UCOS_III_VAL_OS_TASK_DBG_LIST_PTR].address, params->pointer_width, 1, (void *)&thread_list_address); @@ -200,39 +200,39 @@ static int uCOS_III_find_last_thread_address(struct rtos *rtos, symbol_address_t return ERROR_OK; } -static int uCOS_III_update_thread_offsets(struct rtos *rtos) +static int ucos_iii_update_thread_offsets(struct rtos *rtos) { - struct uCOS_III_params *params = rtos->rtos_specific_params; + struct ucos_iii_params *params = rtos->rtos_specific_params; if (params->thread_offsets_updated) return ERROR_OK; const struct thread_offset_map { - enum uCOS_III_symbol_values symbol_value; + enum ucos_iii_symbol_values symbol_value; symbol_address_t *thread_offset; } thread_offset_maps[] = { { - uCOS_III_VAL_OS_TCB_StkPtr_offset, + UCOS_III_VAL_OS_TCB_STK_PTR_OFFSET, ¶ms->thread_stack_offset, }, { - uCOS_III_VAL_OS_TCB_NamePtr_offset, + UCOS_III_VAL_OS_TCB_NAME_PTR_OFFSET, ¶ms->thread_name_offset, }, { - uCOS_III_VAL_OS_TCB_TaskState_offset, + UCOS_III_VAL_OS_TCB_TASK_STATE_OFFSET, ¶ms->thread_state_offset, }, { - uCOS_III_VAL_OS_TCB_Prio_offset, + UCOS_III_VAL_OS_TCB_PRIO_OFFSET, ¶ms->thread_priority_offset, }, { - uCOS_III_VAL_OS_TCB_DbgPrevPtr_offset, + UCOS_III_VAL_OS_TCB_DBG_PREV_PTR_OFFSET, ¶ms->thread_prev_offset, }, { - uCOS_III_VAL_OS_TCB_DbgNextPtr_offset, + UCOS_III_VAL_OS_TCB_DBG_NEXT_PTR_OFFSET, ¶ms->thread_next_offset, }, }; @@ -255,15 +255,15 @@ static int uCOS_III_update_thread_offsets(struct rtos *rtos) return ERROR_OK; } -static bool uCOS_III_detect_rtos(struct target *target) +static bool ucos_iii_detect_rtos(struct target *target) { - return target->rtos->symbols != NULL && - target->rtos->symbols[uCOS_III_VAL_OSRunning].address != 0; + return target->rtos->symbols && + target->rtos->symbols[UCOS_III_VAL_OS_RUNNING].address != 0; } -static int uCOS_III_reset_handler(struct target *target, enum target_reset_mode reset_mode, void *priv) +static int ucos_iii_reset_handler(struct target *target, enum target_reset_mode reset_mode, void *priv) { - struct uCOS_III_params *params = target->rtos->rtos_specific_params; + struct ucos_iii_params *params = target->rtos->rtos_specific_params; params->thread_offsets_updated = false; params->num_threads = 0; @@ -271,22 +271,22 @@ static int uCOS_III_reset_handler(struct target *target, enum target_reset_mode return ERROR_OK; } -static int uCOS_III_create(struct target *target) +static int ucos_iii_create(struct target *target) { - struct uCOS_III_params *params; + struct ucos_iii_params *params; - for (size_t i = 0; i < ARRAY_SIZE(uCOS_III_params_list); i++) - if (strcmp(uCOS_III_params_list[i].target_name, target->type->name) == 0) { + for (size_t i = 0; i < ARRAY_SIZE(ucos_iii_params_list); i++) + if (strcmp(ucos_iii_params_list[i].target_name, target->type->name) == 0) { params = malloc(sizeof(*params) + (UCOS_III_MAX_THREADS * sizeof(*params->threads))); - if (params == NULL) { + if (!params) { LOG_ERROR("uCOS-III: out of memory"); return ERROR_FAIL; } - memcpy(params, &uCOS_III_params_list[i], sizeof(uCOS_III_params_list[i])); + memcpy(params, &ucos_iii_params_list[i], sizeof(ucos_iii_params_list[i])); target->rtos->rtos_specific_params = (void *)params; - target_register_reset_callback(uCOS_III_reset_handler, NULL); + target_register_reset_callback(ucos_iii_reset_handler, NULL); return ERROR_OK; } @@ -295,12 +295,12 @@ static int uCOS_III_create(struct target *target) return ERROR_FAIL; } -static int uCOS_III_update_threads(struct rtos *rtos) +static int ucos_iii_update_threads(struct rtos *rtos) { - struct uCOS_III_params *params = rtos->rtos_specific_params; + struct ucos_iii_params *params = rtos->rtos_specific_params; int retval; - if (rtos->symbols == NULL) { + if (!rtos->symbols) { LOG_ERROR("uCOS-III: symbol list not loaded"); return ERROR_FAIL; } @@ -312,7 +312,7 @@ static int uCOS_III_update_threads(struct rtos *rtos) uint8_t rtos_running; retval = target_read_u8(rtos->target, - rtos->symbols[uCOS_III_VAL_OSRunning].address, + rtos->symbols[UCOS_III_VAL_OS_RUNNING].address, &rtos_running); if (retval != ERROR_OK) { LOG_ERROR("uCOS-III: failed to read RTOS running"); @@ -326,7 +326,7 @@ static int uCOS_III_update_threads(struct rtos *rtos) if (!rtos_running) { rtos->thread_details = calloc(1, sizeof(struct thread_detail)); - if (rtos->thread_details == NULL) { + if (!rtos->thread_details) { LOG_ERROR("uCOS-III: out of memory"); return ERROR_FAIL; } @@ -340,7 +340,7 @@ static int uCOS_III_update_threads(struct rtos *rtos) } /* update thread offsets */ - retval = uCOS_III_update_thread_offsets(rtos); + retval = ucos_iii_update_thread_offsets(rtos); if (retval != ERROR_OK) { LOG_ERROR("uCOS-III: failed to update thread offsets"); return retval; @@ -350,7 +350,7 @@ static int uCOS_III_update_threads(struct rtos *rtos) symbol_address_t current_thread_address = 0; retval = target_read_memory(rtos->target, - rtos->symbols[uCOS_III_VAL_OSTCBCurPtr].address, + rtos->symbols[UCOS_III_VAL_OS_TCB_CUR_PTR].address, params->pointer_width, 1, (void *)¤t_thread_address); @@ -361,7 +361,7 @@ static int uCOS_III_update_threads(struct rtos *rtos) /* read number of tasks */ retval = target_read_u16(rtos->target, - rtos->symbols[uCOS_III_VAL_OSTaskQty].address, + rtos->symbols[UCOS_III_VAL_OS_TASK_QTY].address, (void *)&rtos->thread_count); if (retval != ERROR_OK) { LOG_ERROR("uCOS-III: failed to read thread count"); @@ -369,7 +369,7 @@ static int uCOS_III_update_threads(struct rtos *rtos) } rtos->thread_details = calloc(rtos->thread_count, sizeof(struct thread_detail)); - if (rtos->thread_details == NULL) { + if (!rtos->thread_details) { LOG_ERROR("uCOS-III: out of memory"); return ERROR_FAIL; } @@ -380,7 +380,7 @@ static int uCOS_III_update_threads(struct rtos *rtos) */ symbol_address_t thread_address = 0; - retval = uCOS_III_find_last_thread_address(rtos, &thread_address); + retval = ucos_iii_find_last_thread_address(rtos, &thread_address); if (retval != ERROR_OK) { LOG_ERROR("uCOS-III: failed to find last thread address"); return retval; @@ -391,7 +391,7 @@ static int uCOS_III_update_threads(struct rtos *rtos) char thread_str_buffer[UCOS_III_MAX_STRLEN + 1]; /* find or create new threadid */ - retval = uCOS_III_find_or_create_thread(rtos, thread_address, &thread_detail->threadid); + retval = ucos_iii_find_or_create_thread(rtos, thread_address, &thread_detail->threadid); if (retval != ERROR_OK) { LOG_ERROR("uCOS-III: failed to find or create thread"); return retval; @@ -449,8 +449,8 @@ static int uCOS_III_update_threads(struct rtos *rtos) const char *thread_state_str; - if (thread_state < ARRAY_SIZE(uCOS_III_thread_state_list)) - thread_state_str = uCOS_III_thread_state_list[thread_state]; + if (thread_state < ARRAY_SIZE(ucos_iii_thread_state_list)) + thread_state_str = ucos_iii_thread_state_list[thread_state]; else thread_state_str = "Unknown"; @@ -473,16 +473,16 @@ static int uCOS_III_update_threads(struct rtos *rtos) return ERROR_OK; } -static int uCOS_III_get_thread_reg_list(struct rtos *rtos, threadid_t threadid, +static int ucos_iii_get_thread_reg_list(struct rtos *rtos, threadid_t threadid, struct rtos_reg **reg_list, int *num_regs) { - struct uCOS_III_params *params = rtos->rtos_specific_params; + struct ucos_iii_params *params = rtos->rtos_specific_params; int retval; /* find thread address for threadid */ symbol_address_t thread_address = 0; - retval = uCOS_III_find_thread_address(rtos, threadid, &thread_address); + retval = ucos_iii_find_thread_address(rtos, threadid, &thread_address); if (retval != ERROR_OK) { LOG_ERROR("uCOS-III: failed to find thread address"); return retval; @@ -508,25 +508,25 @@ static int uCOS_III_get_thread_reg_list(struct rtos *rtos, threadid_t threadid, num_regs); } -static int uCOS_III_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) +static int ucos_iii_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]) { - *symbol_list = calloc(ARRAY_SIZE(uCOS_III_symbol_list), sizeof(struct symbol_table_elem)); - if (*symbol_list == NULL) { + *symbol_list = calloc(ARRAY_SIZE(ucos_iii_symbol_list), sizeof(struct symbol_table_elem)); + if (!*symbol_list) { LOG_ERROR("uCOS-III: out of memory"); return ERROR_FAIL; } - for (size_t i = 0; i < ARRAY_SIZE(uCOS_III_symbol_list); i++) - (*symbol_list)[i].symbol_name = uCOS_III_symbol_list[i]; + for (size_t i = 0; i < ARRAY_SIZE(ucos_iii_symbol_list); i++) + (*symbol_list)[i].symbol_name = ucos_iii_symbol_list[i]; return ERROR_OK; } -const struct rtos_type uCOS_III_rtos = { +const struct rtos_type ucos_iii_rtos = { .name = "uCOS-III", - .detect_rtos = uCOS_III_detect_rtos, - .create = uCOS_III_create, - .update_threads = uCOS_III_update_threads, - .get_thread_reg_list = uCOS_III_get_thread_reg_list, - .get_symbol_list_to_lookup = uCOS_III_get_symbol_list_to_lookup, + .detect_rtos = ucos_iii_detect_rtos, + .create = ucos_iii_create, + .update_threads = ucos_iii_update_threads, + .get_thread_reg_list = ucos_iii_get_thread_reg_list, + .get_symbol_list_to_lookup = ucos_iii_get_symbol_list_to_lookup, }; diff --git a/src/rtos/zephyr.c b/src/rtos/zephyr.c index 3ef9bcd2c..630511636 100644 --- a/src/rtos/zephyr.c +++ b/src/rtos/zephyr.c @@ -193,7 +193,7 @@ static target_addr_t zephyr_cortex_m_stack_align(struct target *target, const uint8_t *stack_data, const struct rtos_register_stacking *stacking, target_addr_t stack_ptr) { - return rtos_Cortex_M_stack_align(target, stack_data, stacking, + return rtos_cortex_m_stack_align(target, stack_data, stacking, stack_ptr, ARM_XPSR_OFFSET); } @@ -340,6 +340,14 @@ static struct zephyr_params zephyr_params_list[] = { .cpu_saved_fp_stacking = &arm_cpu_saved_fp_stacking, .get_cpu_state = &zephyr_get_arm_state, }, + { + .target_name = "cortex_r4", + .pointer_width = 4, + .callee_saved_stacking = &arm_callee_saved_stacking, + .cpu_saved_nofp_stacking = &arm_cpu_saved_nofp_stacking, + .cpu_saved_fp_stacking = &arm_cpu_saved_fp_stacking, + .get_cpu_state = &zephyr_get_arm_state, + }, { .target_name = "hla_target", .pointer_width = 4, @@ -385,7 +393,7 @@ static const struct symbol_table_elem zephyr_symbol_list[] = { static bool zephyr_detect_rtos(struct target *target) { - if (target->rtos->symbols == NULL) { + if (!target->rtos->symbols) { LOG_INFO("Zephyr: no symbols while detecting RTOS"); return false; } @@ -745,14 +753,14 @@ static int zephyr_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, LOG_INFO("Getting thread %" PRId64 " reg list", thread_id); - if (rtos == NULL) + if (!rtos) return ERROR_FAIL; if (thread_id == 0) return ERROR_FAIL; params = rtos->rtos_specific_params; - if (params == NULL) + if (!params) return ERROR_FAIL; addr = thread_id + params->offsets[OFFSET_T_STACK_POINTER] diff --git a/src/server/Makefile.am b/src/server/Makefile.am index 5f7469a84..fb5248bfd 100644 --- a/src/server/Makefile.am +++ b/src/server/Makefile.am @@ -14,10 +14,4 @@ noinst_LTLIBRARIES += %D%/libserver.la %D%/ipdbg.c \ %D%/ipdbg.h -%C%_libserver_la_CFLAGS = $(AM_CFLAGS) -if IS_MINGW -# FD_* macros are sloppy with their signs on MinGW32 platform -%C%_libserver_la_CFLAGS += -Wno-sign-compare -endif - STARTUP_TCL_SRCS += %D%/startup.tcl diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c index 398c3f6ad..b5d99a944 100644 --- a/src/server/gdb_server.c +++ b/src/server/gdb_server.c @@ -177,7 +177,7 @@ static int check_pending(struct connection *connection, fd_set read_fds; struct gdb_connection *gdb_con = connection->priv; int t; - if (got_data == NULL) + if (!got_data) got_data = &t; *got_data = 0; @@ -369,7 +369,7 @@ static void gdb_log_incoming_packet(char *packet) /* Does packet at least have a prefix that is printable? * Look within the first 50 chars of the packet. */ const char *colon = memchr(packet, ':', MIN(50, packet_len)); - const bool packet_has_prefix = (colon != NULL); + const bool packet_has_prefix = (colon); const bool packet_prefix_printable = (packet_has_prefix && nonprint > colon); if (packet_prefix_printable) { @@ -739,7 +739,7 @@ static int gdb_output_con(struct connection *connection, const char *line) bin_size = strlen(line); hex_buffer = malloc(bin_size * 2 + 2); - if (hex_buffer == NULL) + if (!hex_buffer) return ERROR_GDB_BUFFER_TOO_SMALL; hex_buffer[0] = 'O'; @@ -773,7 +773,7 @@ static void gdb_signal_reply(struct target *target, struct connection *connectio sig_reply_len = snprintf(sig_reply, sizeof(sig_reply), "W00"); } else { struct target *ct; - if (target->rtos != NULL) { + if (target->rtos) { target->rtos->current_threadid = target->rtos->current_thread; target->rtos->gdb_target_for_threadid(connection, target->rtos->current_threadid, &ct); } else { @@ -812,7 +812,7 @@ static void gdb_signal_reply(struct target *target, struct connection *connectio } current_thread[0] = '\0'; - if (target->rtos != NULL) + if (target->rtos) snprintf(current_thread, sizeof(current_thread), "thread:%" PRIx64 ";", target->rtos->current_thread); @@ -1045,7 +1045,7 @@ static int gdb_new_connection(struct connection *connection) } gdb_actual_connections++; - log_printf_lf(all_targets->next != NULL ? LOG_LVL_INFO : LOG_LVL_DEBUG, + log_printf_lf(all_targets->next ? LOG_LVL_INFO : LOG_LVL_DEBUG, __FILE__, __LINE__, __func__, "New GDB Connection: %d, Target %s, state: %s", gdb_actual_connections, @@ -1214,7 +1214,7 @@ static int gdb_get_registers_packet(struct connection *connection, LOG_DEBUG("-"); #endif - if ((target->rtos != NULL) && (ERROR_OK == rtos_get_gdb_reg_list(connection))) + if ((target->rtos) && (rtos_get_gdb_reg_list(connection) == ERROR_OK)) return ERROR_OK; retval = target_get_gdb_reg_list(target, ®_list, ®_list_size, @@ -1223,7 +1223,7 @@ static int gdb_get_registers_packet(struct connection *connection, return gdb_error(connection, retval); for (i = 0; i < reg_list_size; i++) { - if (reg_list[i] == NULL || reg_list[i]->exist == false || reg_list[i]->hidden) + if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden) continue; reg_packet_size += DIV_ROUND_UP(reg_list[i]->size, 8) * 2; } @@ -1231,13 +1231,13 @@ static int gdb_get_registers_packet(struct connection *connection, assert(reg_packet_size > 0); reg_packet = malloc(reg_packet_size + 1); /* plus one for string termination null */ - if (reg_packet == NULL) + if (!reg_packet) return ERROR_FAIL; reg_packet_p = reg_packet; for (i = 0; i < reg_list_size; i++) { - if (reg_list[i] == NULL || reg_list[i]->exist == false || reg_list[i]->hidden) + if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden) continue; if (!reg_list[i]->valid) { retval = reg_list[i]->type->get(reg_list[i]); @@ -1344,7 +1344,7 @@ static int gdb_get_register_packet(struct connection *connection, LOG_DEBUG("-"); #endif - if ((target->rtos != NULL) && (ERROR_OK == rtos_get_gdb_reg(connection, reg_num))) + if ((target->rtos) && (rtos_get_gdb_reg(connection, reg_num) == ERROR_OK)) return ERROR_OK; retval = target_get_gdb_reg_list_noread(target, ®_list, ®_list_size, @@ -1400,8 +1400,8 @@ static int gdb_set_register_packet(struct connection *connection, uint8_t *bin_buf = malloc(chars / 2); gdb_target_to_reg(target, separator + 1, chars, bin_buf); - if ((target->rtos != NULL) && - (ERROR_OK == rtos_set_reg(connection, reg_num, bin_buf))) { + if ((target->rtos) && + (rtos_set_reg(connection, reg_num, bin_buf) == ERROR_OK)) { free(bin_buf); gdb_put_packet(connection, "OK", 2); return ERROR_OK; @@ -1497,7 +1497,7 @@ static int gdb_read_memory_packet(struct connection *connection, LOG_DEBUG("addr: 0x%16.16" PRIx64 ", len: 0x%8.8" PRIx32 "", addr, len); retval = ERROR_NOT_IMPLEMENTED; - if (target->rtos != NULL) + if (target->rtos) retval = rtos_read_buffer(target, addr, len, buffer); if (retval == ERROR_NOT_IMPLEMENTED) retval = target_read_buffer(target, addr, len, buffer); @@ -1572,7 +1572,7 @@ static int gdb_write_memory_packet(struct connection *connection, LOG_ERROR("unable to decode memory packet"); retval = ERROR_NOT_IMPLEMENTED; - if (target->rtos != NULL) + if (target->rtos) retval = rtos_write_buffer(target, addr, len, buffer); if (retval == ERROR_NOT_IMPLEMENTED) retval = target_write_buffer(target, addr, len, buffer); @@ -1645,7 +1645,7 @@ static int gdb_write_memory_binary_packet(struct connection *connection, LOG_DEBUG("addr: 0x%" PRIx64 ", len: 0x%8.8" PRIx32 "", addr, len); retval = ERROR_NOT_IMPLEMENTED; - if (target->rtos != NULL) + if (target->rtos) retval = rtos_write_buffer(target, addr, len, (uint8_t *)separator); if (retval == ERROR_NOT_IMPLEMENTED) retval = target_write_buffer(target, addr, len, (uint8_t *)separator); @@ -1794,14 +1794,14 @@ static __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 5, 6))) void xml_printf( int first = 1; for (;; ) { - if ((*xml == NULL) || (!first)) { + if ((!*xml) || (!first)) { /* start by 0 to exercise all the code paths. * Need minimum 2 bytes to fit 1 char and 0 terminator. */ *size = *size * 2 + 2; char *t = *xml; *xml = realloc(*xml, *size); - if (*xml == NULL) { + if (!*xml) { free(t); *retval = ERROR_SERVER_REMOTE_CLOSED; return; @@ -1826,7 +1826,7 @@ static int decode_xfer_read(char const *buf, char **annex, int *ofs, unsigned in { /* Locate the annex. */ const char *annex_end = strchr(buf, ':'); - if (annex_end == NULL) + if (!annex_end) return ERROR_FAIL; /* After the read marker and annex, qXfer looks like a @@ -1840,9 +1840,9 @@ static int decode_xfer_read(char const *buf, char **annex, int *ofs, unsigned in *len = strtoul(separator + 1, NULL, 16); /* Extract the annex if needed */ - if (annex != NULL) { + if (annex) { *annex = strndup(buf, annex_end - buf); - if (*annex == NULL) + if (!*annex) return ERROR_FAIL; } @@ -2061,7 +2061,7 @@ static int lookup_add_arch_defined_types(char const **arch_defined_types_list[], { int tbl_sz = *num_arch_defined_types; - if (type_id != NULL && (strcmp(type_id, ""))) { + if (type_id && (strcmp(type_id, ""))) { for (int j = 0; j < (tbl_sz + 1); j++) { if (!((*arch_defined_types_list)[j])) { (*arch_defined_types_list)[tbl_sz++] = type_id; @@ -2104,7 +2104,7 @@ static int gdb_generate_reg_type_description(struct target *target, } else if (type->type_class == REG_TYPE_CLASS_UNION) { struct reg_data_type_union_field *field; field = type->reg_type_union->fields; - while (field != NULL) { + while (field) { struct reg_data_type *data_type = field->type; if (data_type->type == REG_TYPE_ARCH_DEFINED) { if (lookup_add_arch_defined_types(arch_defined_types_list, data_type->id, @@ -2124,7 +2124,7 @@ static int gdb_generate_reg_type_description(struct target *target, type->id); field = type->reg_type_union->fields; - while (field != NULL) { + while (field) { xml_printf(&retval, tdesc, pos, size, "\n", field->name, field->type->id); @@ -2146,7 +2146,7 @@ static int gdb_generate_reg_type_description(struct target *target, xml_printf(&retval, tdesc, pos, size, "\n", type->id, type->reg_type_struct->size); - while (field != NULL) { + while (field) { xml_printf(&retval, tdesc, pos, size, "\n", field->name, field->bitfield->start, field->bitfield->end, @@ -2155,7 +2155,7 @@ static int gdb_generate_reg_type_description(struct target *target, field = field->next; } } else { - while (field != NULL) { + while (field) { struct reg_data_type *data_type = field->type; if (data_type->type == REG_TYPE_ARCH_DEFINED) { if (lookup_add_arch_defined_types(arch_defined_types_list, data_type->id, @@ -2172,7 +2172,7 @@ static int gdb_generate_reg_type_description(struct target *target, xml_printf(&retval, tdesc, pos, size, "\n", type->id); - while (field != NULL) { + while (field) { xml_printf(&retval, tdesc, pos, size, "\n", field->name, field->type->id); @@ -2194,7 +2194,7 @@ static int gdb_generate_reg_type_description(struct target *target, struct reg_data_type_flags_field *field; field = type->reg_type_flags->fields; - while (field != NULL) { + while (field) { xml_printf(&retval, tdesc, pos, size, "\n", field->name, field->bitfield->start, field->bitfield->end, @@ -2226,8 +2226,8 @@ static int get_reg_features_list(struct target *target, char const **feature_lis if (reg_list[i]->exist == false || reg_list[i]->hidden) continue; - if (reg_list[i]->feature != NULL - && reg_list[i]->feature->name != NULL + if (reg_list[i]->feature + && reg_list[i]->feature->name && (strcmp(reg_list[i]->feature->name, ""))) { /* We found a feature, check if the feature is already in the * table. If not, allocate a new entry for the table and @@ -2371,12 +2371,12 @@ static int gdb_generate_target_description(struct target *target, char **tdesc_o /* generate architecture element if supported by target */ architecture = target_get_gdb_arch(target); - if (architecture != NULL) + if (architecture) xml_printf(&retval, &tdesc, &pos, &size, "%s\n", architecture); /* generate target description according to register list */ - if (features != NULL) { + if (features) { while (features[current_feature]) { char const **arch_defined_types = NULL; int num_arch_defined_types = 0; @@ -2396,7 +2396,7 @@ static int gdb_generate_target_description(struct target *target, char **tdesc_o continue; const char *type_str; - if (reg_list[i]->reg_data_type != NULL) { + if (reg_list[i]->reg_data_type) { if (reg_list[i]->reg_data_type->type == REG_TYPE_ARCH_DEFINED) { /* generate group != NULL) + if (reg_list[i]->group) xml_printf(&retval, &tdesc, &pos, &size, " group=\"%s\"", reg_list[i]->group); @@ -2468,7 +2468,7 @@ error: static int gdb_get_target_description_chunk(struct target *target, struct target_desc_format *target_desc, char **chunk, int32_t offset, uint32_t length) { - if (target_desc == NULL) { + if (!target_desc) { LOG_ERROR("Unable to Generate Target Description"); return ERROR_FAIL; } @@ -2476,7 +2476,7 @@ static int gdb_get_target_description_chunk(struct target *target, struct target char *tdesc = target_desc->tdesc; uint32_t tdesc_length = target_desc->tdesc_length; - if (tdesc == NULL) { + if (!tdesc) { int retval = gdb_generate_target_description(target, &tdesc); if (retval != ERROR_OK) { LOG_ERROR("Unable to Generate Target Description"); @@ -2494,7 +2494,7 @@ static int gdb_get_target_description_chunk(struct target *target, struct target transfer_type = 'l'; *chunk = malloc(length + 2); - if (*chunk == NULL) { + if (!*chunk) { LOG_ERROR("Unable to allocate memory"); return ERROR_FAIL; } @@ -2577,7 +2577,7 @@ static int gdb_generate_thread_list(struct target *target, char **thread_list_ou "\n" "\n"); - if (rtos != NULL) { + if (rtos) { for (int i = 0; i < rtos->thread_count; i++) { struct thread_detail *thread_detail = &rtos->thread_details[i]; @@ -2587,12 +2587,12 @@ static int gdb_generate_thread_list(struct target *target, char **thread_list_ou xml_printf(&retval, &thread_list, &pos, &size, "", thread_detail->threadid); - if (thread_detail->thread_name_str != NULL) + if (thread_detail->thread_name_str) xml_printf(&retval, &thread_list, &pos, &size, "Name: %s", thread_detail->thread_name_str); - if (thread_detail->extra_info_str != NULL) { - if (thread_detail->thread_name_str != NULL) + if (thread_detail->extra_info_str) { + if (thread_detail->thread_name_str) xml_printf(&retval, &thread_list, &pos, &size, ", "); xml_printf(&retval, &thread_list, &pos, &size, @@ -2618,7 +2618,7 @@ static int gdb_generate_thread_list(struct target *target, char **thread_list_ou static int gdb_get_thread_list_chunk(struct target *target, char **thread_list, char **chunk, int32_t offset, uint32_t length) { - if (*thread_list == NULL) { + if (!*thread_list) { int retval = gdb_generate_thread_list(target, thread_list); if (retval != ERROR_OK) { LOG_ERROR("Unable to Generate Thread List"); @@ -2640,7 +2640,7 @@ static int gdb_get_thread_list_chunk(struct target *target, char **thread_list, * of strlen(chunk) word access: * Invalid read of size 4 * Address 0x4479934 is 44 bytes inside a block of size 45 alloc'd */ - if (*chunk == NULL) { + if (!*chunk) { LOG_ERROR("Unable to allocate memory"); return ERROR_FAIL; } @@ -2846,7 +2846,7 @@ static bool gdb_handle_vcont_packet(struct connection *connection, const char *p /* query for vCont supported */ if (parse[0] == '?') { - if (target->type->step != NULL) { + if (target->type->step) { /* gdb doesn't accept c without C and s without S */ gdb_put_packet(connection, "vCont;c;C;s;S", 13); return true; @@ -2901,12 +2901,12 @@ static bool gdb_handle_vcont_packet(struct connection *connection, const char *p packet_size -= 2; thread_id = strtoll(parse, &endp, 16); - if (endp != NULL) { + if (endp) { packet_size -= endp - parse; parse = endp; } - if (target->rtos != NULL) { + if (target->rtos) { /* FIXME: why is this necessary? rtos state should be up-to-date here already! */ /* Sometimes this results in picking a different thread than @@ -3035,7 +3035,7 @@ static char *next_hex_encoded_field(const char **str, char sep) return NULL; const char *end = strchr(hex, sep); - if (end == NULL) + if (!end) hexlen = strlen(hex); else hexlen = end - hex; @@ -3048,7 +3048,7 @@ static char *next_hex_encoded_field(const char **str, char sep) size_t count = hexlen / 2; char *decoded = malloc(count + 1); - if (decoded == NULL) + if (!decoded) return NULL; size_t converted = unhexify((void *)decoded, hex, count); @@ -3094,15 +3094,15 @@ static bool gdb_handle_vrun_packet(struct connection *connection, const char *pa char *cmdline = next_hex_encoded_field(&parse, ';'); char *arg; - while (cmdline != NULL && (arg = next_hex_encoded_field(&parse, ';')) != NULL) { + while (cmdline && (arg = next_hex_encoded_field(&parse, ';')) != NULL) { char *new_cmdline = alloc_printf("%s %s", cmdline, arg); free(cmdline); free(arg); cmdline = new_cmdline; } - if (cmdline != NULL) { - if (target->semihosting != NULL) { + if (cmdline) { + if (target->semihosting) { LOG_INFO("GDB set inferior command line to '%s'", cmdline); free(target->semihosting->cmdline); target->semihosting->cmdline = cmdline; @@ -3234,7 +3234,7 @@ static int gdb_v_packet(struct connection *connection, length = packet_size - (parse - packet); /* create a new image if there isn't already one */ - if (gdb_connection->vflash_image == NULL) { + if (!gdb_connection->vflash_image) { gdb_connection->vflash_image = malloc(sizeof(struct image)); image_open(gdb_connection->vflash_image, "", "build"); } @@ -3623,7 +3623,7 @@ static int gdb_target_start(struct target *target, const char *port) int ret; gdb_service = malloc(sizeof(struct gdb_service)); - if (NULL == gdb_service) + if (!gdb_service) return -ENOMEM; LOG_INFO("starting gdb server for %s on %s", target_name(target), port); @@ -3707,14 +3707,14 @@ static int gdb_target_add_one(struct target *target) int gdb_target_add_all(struct target *target) { - if (NULL == target) { + if (!target) { LOG_WARNING("gdb services need one or more targets defined"); return ERROR_OK; } - while (NULL != target) { + while (target) { int retval = gdb_target_add_one(target); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; target = target->next; @@ -3728,7 +3728,7 @@ COMMAND_HANDLER(handle_gdb_sync_command) if (CMD_ARGC != 0) return ERROR_COMMAND_SYNTAX_ERROR; - if (current_gdb_connection == NULL) { + if (!current_gdb_connection) { command_print(CMD, "gdb_sync command can only be run from within gdb using \"monitor gdb_sync\""); return ERROR_FAIL; @@ -3743,7 +3743,7 @@ COMMAND_HANDLER(handle_gdb_sync_command) COMMAND_HANDLER(handle_gdb_port_command) { int retval = CALL_COMMAND_HANDLER(server_pipe_command, &gdb_port); - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { free(gdb_port_next); gdb_port_next = strdup(gdb_port); } @@ -3837,7 +3837,7 @@ COMMAND_HANDLER(handle_gdb_save_tdesc_command) size_t size_written; char *tdesc_filename = alloc_printf("%s.xml", target_type_name(target)); - if (tdesc_filename == NULL) { + if (!tdesc_filename) { retval = ERROR_FAIL; goto out; } diff --git a/src/server/server.c b/src/server/server.c index d47b81223..64acd3689 100644 --- a/src/server/server.c +++ b/src/server/server.c @@ -263,11 +263,11 @@ int add_service(char *name, memset(&c->sin, 0, sizeof(c->sin)); c->sin.sin_family = AF_INET; - if (bindto_name == NULL) + if (!bindto_name) c->sin.sin_addr.s_addr = htonl(INADDR_LOOPBACK); else { hp = gethostbyname(bindto_name); - if (hp == NULL) { + if (!hp) { LOG_ERROR("couldn't resolve bindto address: %s", bindto_name); close_socket(c->fd); free_service(c); @@ -518,7 +518,8 @@ int server_loop(struct command_context *command_context) if (retval == 0) { /* We only execute these callbacks when there was nothing to do or we timed *out */ - target_call_timer_callbacks(&next_event); + target_call_timer_callbacks_now(); + next_event = target_timer_next_event(); process_jim_events(command_context); FD_ZERO(&read_fds); /* eCos leaves read_fds unchanged in this case! */ @@ -616,7 +617,7 @@ static void sig_handler(int sig) #ifdef _WIN32 -BOOL WINAPI ControlHandler(DWORD dwCtrlType) +BOOL WINAPI control_handler(DWORD ctrl_type) { shutdown_openocd = SHUTDOWN_WITH_SIGNAL_CODE; return TRUE; @@ -641,12 +642,12 @@ int server_host_os_entry(void) * This is an issue if you call init in your config script */ #ifdef _WIN32 - WORD wVersionRequested; - WSADATA wsaData; + WORD version_requested; + WSADATA wsadata; - wVersionRequested = MAKEWORD(2, 2); + version_requested = MAKEWORD(2, 2); - if (WSAStartup(wVersionRequested, &wsaData) != 0) { + if (WSAStartup(version_requested, &wsadata) != 0) { LOG_ERROR("Failed to Open Winsock"); return ERROR_FAIL; } @@ -666,7 +667,7 @@ int server_preinit(void) { #ifdef _WIN32 /* register ctrl-c handler */ - SetConsoleCtrlHandler(ControlHandler, TRUE); + SetConsoleCtrlHandler(control_handler, TRUE); signal(SIGBREAK, sig_handler); signal(SIGINT, sig_handler); @@ -705,7 +706,7 @@ int server_quit(void) target_quit(); #ifdef _WIN32 - SetConsoleCtrlHandler(ControlHandler, FALSE); + SetConsoleCtrlHandler(control_handler, FALSE); return ERROR_OK; #endif @@ -826,15 +827,15 @@ static const struct command_registration server_command_handlers[] = { int server_register_commands(struct command_context *cmd_ctx) { int retval = telnet_register_commands(cmd_ctx); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = tcl_register_commands(cmd_ctx); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = jsp_register_commands(cmd_ctx); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; return register_commands(cmd_ctx, NULL, server_command_handlers); diff --git a/src/server/tcl_server.c b/src/server/tcl_server.c index 1ecb827a1..e08823224 100644 --- a/src/server/tcl_server.c +++ b/src/server/tcl_server.c @@ -145,12 +145,12 @@ static int tcl_new_connection(struct connection *connection) struct tcl_connection *tclc; tclc = calloc(1, sizeof(struct tcl_connection)); - if (tclc == NULL) + if (!tclc) return ERROR_CONNECTION_REJECTED; tclc->tc_line_size = TCL_LINE_INITIAL; tclc->tc_line = malloc(tclc->tc_line_size); - if (tclc->tc_line == NULL) { + if (!tclc->tc_line) { free(tclc); return ERROR_CONNECTION_REJECTED; } @@ -158,7 +158,7 @@ static int tcl_new_connection(struct connection *connection) connection->priv = tclc; struct target *target = get_current_target_or_null(connection->cmd_ctx); - if (target != NULL) + if (target) tclc->tc_laststate = target->state; /* store the connection object on cmd_ctx so we can access it from command handlers */ @@ -192,7 +192,7 @@ static int tcl_input(struct connection *connection) } tclc = connection->priv; - if (tclc == NULL) + if (!tclc) return ERROR_CONNECTION_REJECTED; /* push as much data into the line as possible */ @@ -215,7 +215,7 @@ static int tcl_input(struct connection *connection) tc_line_size_new = TCL_LINE_MAX; tc_line_new = realloc(tclc->tc_line, tc_line_size_new); - if (tc_line_new == NULL) { + if (!tc_line_new) { tclc->tc_linedrop = 1; } else { tclc->tc_line = tc_line_new; @@ -298,10 +298,10 @@ COMMAND_HANDLER(handle_tcl_notifications_command) struct connection *connection = NULL; struct tcl_connection *tclc = NULL; - if (CMD_CTX->output_handler_priv != NULL) + if (CMD_CTX->output_handler_priv) connection = CMD_CTX->output_handler_priv; - if (connection != NULL && !strcmp(connection->service->name, "tcl")) { + if (connection && !strcmp(connection->service->name, "tcl")) { tclc = connection->priv; return CALL_COMMAND_HANDLER(handle_command_parse_bool, &tclc->tc_notify, "Target Notification output "); } else { @@ -315,10 +315,10 @@ COMMAND_HANDLER(handle_tcl_trace_command) struct connection *connection = NULL; struct tcl_connection *tclc = NULL; - if (CMD_CTX->output_handler_priv != NULL) + if (CMD_CTX->output_handler_priv) connection = CMD_CTX->output_handler_priv; - if (connection != NULL && !strcmp(connection->service->name, "tcl")) { + if (connection && !strcmp(connection->service->name, "tcl")) { tclc = connection->priv; return CALL_COMMAND_HANDLER(handle_command_parse_bool, &tclc->tc_trace, "Target trace output "); } else { diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c index 2ad3791d7..36b017c58 100644 --- a/src/server/telnet_server.c +++ b/src/server/telnet_server.c @@ -150,7 +150,7 @@ static void telnet_load_history(struct telnet_connection *t_con) char *history = get_home_dir(TELNET_HISTORY); - if (history == NULL) { + if (!history) { LOG_INFO("unable to get user home directory, telnet history will be disabled"); return; } @@ -159,7 +159,7 @@ static void telnet_load_history(struct telnet_connection *t_con) if (histfp) { - while (fgets(buffer, sizeof(buffer), histfp) != NULL) { + while (fgets(buffer, sizeof(buffer), histfp)) { char *p = strchr(buffer, '\n'); if (p) @@ -186,7 +186,7 @@ static void telnet_save_history(struct telnet_connection *t_con) char *history = get_home_dir(TELNET_HISTORY); - if (history == NULL) { + if (!history) { LOG_INFO("unable to get user home directory, telnet history will be disabled"); return; } @@ -199,7 +199,7 @@ static void telnet_save_history(struct telnet_connection *t_con) i = t_con->current_history + 1; i %= TELNET_LINE_HISTORY_SIZE; - while (t_con->history[i] == NULL && num > 0) { + while (!t_con->history[i] && num > 0) { i++; i %= TELNET_LINE_HISTORY_SIZE; num--; @@ -352,10 +352,14 @@ static int telnet_history_print(struct connection *connection) static void telnet_move_cursor(struct connection *connection, size_t pos) { - struct telnet_connection *tc; + struct telnet_connection *tc = connection->priv; size_t tmp; - tc = connection->priv; + if (pos == tc->line_cursor) /* nothing to do */ + return; + + if (pos > tc->line_size) /* out of bounds */ + return; if (pos < tc->line_cursor) { tmp = tc->line_cursor - pos; @@ -602,16 +606,16 @@ static int telnet_input(struct connection *connection) while (bytes_read) { switch (t_con->state) { case TELNET_STATE_DATA: - if (*buf_p == 0xff) + if (*buf_p == 0xff) { t_con->state = TELNET_STATE_IAC; - else { + } else { if (isprint(*buf_p)) { /* printable character */ telnet_insert(connection, buf_p, 1); - } else { /* non-printable */ + } else { /* non-printable */ if (*buf_p == 0x1b) { /* escape */ t_con->state = TELNET_STATE_ESCAPE; t_con->last_escape = '\x00'; - } else if ((*buf_p == 0xd) || (*buf_p == 0xa)) { /* CR/LF */ + } else if ((*buf_p == 0xd) || (*buf_p == 0xa)) { /* CR/LF */ int retval; /* skip over combinations with CR/LF and NUL characters */ @@ -640,7 +644,7 @@ static int telnet_input(struct connection *connection) /* save only non-blank not repeating lines in the history */ char *prev_line = t_con->history[(t_con->current_history > 0) ? t_con->current_history - 1 : TELNET_LINE_HISTORY_SIZE-1]; - if (*t_con->line && (prev_line == NULL || + if (*t_con->line && (!prev_line || strcmp(t_con->line, prev_line))) { /* if the history slot is already taken, free it */ free(t_con->history[t_con->next_history]); @@ -710,27 +714,34 @@ static int telnet_input(struct connection *connection) telnet_write(connection, "\b \b", 3); } } - } else if (*buf_p == 0x15) /* clear line */ + } else if (*buf_p == 0x15) { /* clear line */ telnet_clear_line(connection, t_con); - else if (*buf_p == CTRL('B')) { /* cursor left */ + } else if (*buf_p == CTRL('B')) { /* cursor left */ if (t_con->line_cursor > 0) { telnet_write(connection, "\b", 1); t_con->line_cursor--; } t_con->state = TELNET_STATE_DATA; + } else if (*buf_p == CTRL('C')) { /* interrupt */ + /* print '^C' at line end, and display a new command prompt */ + telnet_move_cursor(connection, t_con->line_size); + telnet_write(connection, "^C\n\r", 4); + t_con->line_cursor = 0; + t_con->line_size = 0; + telnet_prompt(connection); } else if (*buf_p == CTRL('F')) { /* cursor right */ if (t_con->line_cursor < t_con->line_size) telnet_write(connection, t_con->line + t_con->line_cursor++, 1); t_con->state = TELNET_STATE_DATA; - } else if (*buf_p == CTRL('P')) /* cursor up */ + } else if (*buf_p == CTRL('P')) { /* cursor up */ telnet_history_up(connection); - else if (*buf_p == CTRL('N')) /* cursor down */ + } else if (*buf_p == CTRL('N')) { /* cursor down */ telnet_history_down(connection); - else if (*buf_p == CTRL('A')) + } else if (*buf_p == CTRL('A')) { /* move the cursor to the beginning of the line */ telnet_move_cursor(connection, 0); - else if (*buf_p == CTRL('E')) + } else if (*buf_p == CTRL('E')) { /* move the cursor to the end of the line */ telnet_move_cursor(connection, t_con->line_size); - else if (*buf_p == CTRL('K')) { /* kill line to end */ + } else if (*buf_p == CTRL('K')) { /* kill line to end */ if (t_con->line_cursor < t_con->line_size) { /* overwrite with space, until end of line, move back */ for (size_t i = t_con->line_cursor; i < t_con->line_size; i++) @@ -740,10 +751,11 @@ static int telnet_input(struct connection *connection) t_con->line[t_con->line_cursor] = '\0'; t_con->line_size = t_con->line_cursor; } - } else if (*buf_p == '\t') + } else if (*buf_p == '\t') { telnet_auto_complete(connection); - else + } else { LOG_DEBUG("unhandled nonprintable: %2.2x", *buf_p); + } } } break; @@ -796,10 +808,11 @@ static int telnet_input(struct connection *connection) } else if (*buf_p == 'H') { /* home key */ telnet_move_cursor(connection, 0); t_con->state = TELNET_STATE_DATA; - } else if (*buf_p == '3') + } else if (*buf_p == '3') { t_con->last_escape = *buf_p; - else + } else { t_con->state = TELNET_STATE_DATA; + } } else if (t_con->last_escape == '3') { /* Remove character */ if (*buf_p == '~') { diff --git a/src/svf/svf.c b/src/svf/svf.c index f35c61314..3021dcb66 100644 --- a/src/svf/svf.c +++ b/src/svf/svf.c @@ -302,7 +302,7 @@ static int svf_realloc_buffers(size_t len) static void svf_free_xxd_para(struct svf_xxr_para *para) { - if (NULL != para) { + if (para) { free(para->tdi); para->tdi = NULL; @@ -395,7 +395,7 @@ COMMAND_HANDLER(handle_svf_command) svf_ignore_error = 1; else { svf_fd = fopen(CMD_ARGV[i], "r"); - if (svf_fd == NULL) { + if (!svf_fd) { int err = errno; command_print(CMD, "open(\"%s\"): %s", CMD_ARGV[i], strerror(err)); /* no need to free anything now */ @@ -405,7 +405,7 @@ COMMAND_HANDLER(handle_svf_command) } } - if (svf_fd == NULL) + if (!svf_fd) return ERROR_COMMAND_SYNTAX_ERROR; /* get time */ @@ -417,7 +417,7 @@ COMMAND_HANDLER(handle_svf_command) svf_check_tdo_para_index = 0; svf_check_tdo_para = malloc(sizeof(struct svf_check_tdo_para) * SVF_CHECK_TDO_PARA_SIZE); - if (NULL == svf_check_tdo_para) { + if (!svf_check_tdo_para) { LOG_ERROR("not enough memory"); ret = ERROR_FAIL; goto free_all; @@ -460,25 +460,25 @@ COMMAND_HANDLER(handle_svf_command) } /* HDR %d TDI (0) */ - if (ERROR_OK != svf_set_padding(&svf_para.hdr_para, header_dr_len, 0)) { + if (svf_set_padding(&svf_para.hdr_para, header_dr_len, 0) != ERROR_OK) { LOG_ERROR("failed to set data header"); return ERROR_FAIL; } /* HIR %d TDI (0xFF) */ - if (ERROR_OK != svf_set_padding(&svf_para.hir_para, header_ir_len, 0xFF)) { + if (svf_set_padding(&svf_para.hir_para, header_ir_len, 0xFF) != ERROR_OK) { LOG_ERROR("failed to set instruction header"); return ERROR_FAIL; } /* TDR %d TDI (0) */ - if (ERROR_OK != svf_set_padding(&svf_para.tdr_para, trailer_dr_len, 0)) { + if (svf_set_padding(&svf_para.tdr_para, trailer_dr_len, 0) != ERROR_OK) { LOG_ERROR("failed to set data trailer"); return ERROR_FAIL; } /* TIR %d TDI (0xFF) */ - if (ERROR_OK != svf_set_padding(&svf_para.tir_para, trailer_ir_len, 0xFF)) { + if (svf_set_padding(&svf_para.tir_para, trailer_ir_len, 0xFF) != ERROR_OK) { LOG_ERROR("failed to set instruction trailer"); return ERROR_FAIL; } @@ -492,7 +492,7 @@ COMMAND_HANDLER(handle_svf_command) } rewind(svf_fd); } - while (ERROR_OK == svf_read_command_from_file(svf_fd)) { + while (svf_read_command_from_file(svf_fd) == ERROR_OK) { /* Log Output */ if (svf_quiet) { if (svf_progress_enabled) { @@ -510,7 +510,7 @@ COMMAND_HANDLER(handle_svf_command) LOG_USER_N("%s", svf_read_line); } /* Run Command */ - if (ERROR_OK != svf_run_command(CMD_CTX, svf_command_buffer)) { + if (svf_run_command(CMD_CTX, svf_command_buffer) != ERROR_OK) { LOG_ERROR("fail to run command at line %d", svf_line_number); ret = ERROR_FAIL; break; @@ -518,9 +518,9 @@ COMMAND_HANDLER(handle_svf_command) command_num++; } - if ((!svf_nil) && (ERROR_OK != jtag_execute_queue())) + if ((!svf_nil) && (jtag_execute_queue() != ERROR_OK)) ret = ERROR_FAIL; - else if (ERROR_OK != svf_check_tdo()) + else if (svf_check_tdo() != ERROR_OK) ret = ERROR_FAIL; /* print time */ @@ -569,7 +569,7 @@ free_all: svf_free_xxd_para(&svf_para.sdr_para); svf_free_xxd_para(&svf_para.sir_para); - if (ERROR_OK == ret) + if (ret == ERROR_OK) command_print(CMD, "svf file programmed %s for %d commands with %d errors", (svf_ignore_error > 1) ? "unsuccessfully" : "successfully", @@ -587,7 +587,7 @@ static int svf_getline(char **lineptr, size_t *n, FILE *stream) #define MIN_CHUNK 16 /* Buffer is increased by this size each time as required */ size_t i = 0; - if (*lineptr == NULL) { + if (!*lineptr) { *n = MIN_CHUNK; *lineptr = malloc(*n); if (!*lineptr) @@ -675,7 +675,7 @@ static int svf_read_command_from_file(FILE *fd) if (cmd_pos + 3 > svf_command_buffer_size) { svf_command_buffer = realloc(svf_command_buffer, cmd_pos + 3); svf_command_buffer_size = cmd_pos + 3; - if (svf_command_buffer == NULL) { + if (!svf_command_buffer) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } @@ -742,8 +742,8 @@ parse_char: bool svf_tap_state_is_stable(tap_state_t state) { - return (TAP_RESET == state) || (TAP_IDLE == state) - || (TAP_DRPAUSE == state) || (TAP_IRPAUSE == state); + return (state == TAP_RESET) || (state == TAP_IDLE) + || (state == TAP_DRPAUSE) || (state == TAP_IRPAUSE); } static int svf_find_string_in_array(char *str, char **strs, int num_of_element) @@ -761,10 +761,10 @@ static int svf_adjust_array_length(uint8_t **arr, int orig_bit_len, int new_bit_ { int new_byte_len = (new_bit_len + 7) >> 3; - if ((NULL == *arr) || (((orig_bit_len + 7) >> 3) < ((new_bit_len + 7) >> 3))) { + if ((!*arr) || (((orig_bit_len + 7) >> 3) < ((new_bit_len + 7) >> 3))) { free(*arr); *arr = calloc(1, new_byte_len); - if (NULL == *arr) { + if (!*arr) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } @@ -790,7 +790,7 @@ static int svf_copy_hexstring_to_binary(char *str, uint8_t **bin, int orig_bit_l int i, str_len = strlen(str), str_hbyte_len = (bit_len + 3) >> 2; uint8_t ch = 0; - if (ERROR_OK != svf_adjust_array_length(bin, orig_bit_len, bit_len)) { + if (svf_adjust_array_length(bin, orig_bit_len, bit_len) != ERROR_OK) { LOG_ERROR("fail to adjust length of array"); return ERROR_FAIL; } @@ -893,9 +893,9 @@ static int svf_add_check_para(uint8_t enabled, int buffer_offset, int bit_len) static int svf_execute_tap(void) { - if ((!svf_nil) && (ERROR_OK != jtag_execute_queue())) + if ((!svf_nil) && (jtag_execute_queue() != ERROR_OK)) return ERROR_FAIL; - else if (ERROR_OK != svf_check_tdo()) + else if (svf_check_tdo() != ERROR_OK) return ERROR_FAIL; svf_buffer_index = 0; @@ -923,7 +923,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str) /* flag padding commands skipped due to -tap command */ int padding_command_skipped = 0; - if (ERROR_OK != svf_parse_cmd_string(cmd_str, strlen(cmd_str), argus, &num_of_argu)) + if (svf_parse_cmd_string(cmd_str, strlen(cmd_str), argus, &num_of_argu) != ERROR_OK) return ERROR_FAIL; /* NOTE: we're a bit loose here, because we ignore case in @@ -963,7 +963,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str) LOG_ERROR("invalid parameter of %s", argus[0]); return ERROR_FAIL; } - if (1 == num_of_argu) { + if (num_of_argu == 1) { /* TODO: set jtag speed to full speed */ svf_para.frequency = 0; } else { @@ -971,7 +971,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str) LOG_ERROR("HZ not found in FREQUENCY command"); return ERROR_FAIL; } - if (ERROR_OK != svf_execute_tap()) + if (svf_execute_tap() != ERROR_OK) return ERROR_FAIL; svf_para.frequency = atof(argus[1]); /* TODO: set jtag speed to */ @@ -989,35 +989,35 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str) break; } xxr_para_tmp = &svf_para.hdr_para; - goto XXR_common; + goto xxr_common; case HIR: if (svf_tap_is_specified) { padding_command_skipped = 1; break; } xxr_para_tmp = &svf_para.hir_para; - goto XXR_common; + goto xxr_common; case TDR: if (svf_tap_is_specified) { padding_command_skipped = 1; break; } xxr_para_tmp = &svf_para.tdr_para; - goto XXR_common; + goto xxr_common; case TIR: if (svf_tap_is_specified) { padding_command_skipped = 1; break; } xxr_para_tmp = &svf_para.tir_para; - goto XXR_common; + goto xxr_common; case SDR: xxr_para_tmp = &svf_para.sdr_para; - goto XXR_common; + goto xxr_common; case SIR: xxr_para_tmp = &svf_para.sir_para; - goto XXR_common; -XXR_common: + goto xxr_common; +xxr_common: /* XXR length [TDI (tdi)] [TDO (tdo)][MASK (mask)] [SMASK (smask)] */ if ((num_of_argu > 10) || (num_of_argu % 2)) { LOG_ERROR("invalid parameter of %s", argus[0]); @@ -1091,7 +1091,7 @@ XXR_common: } /* If TDO is absent, no comparison is needed, set the mask to 0 */ if (!(xxr_para_tmp->data_mask & XXR_TDO)) { - if (NULL == xxr_para_tmp->tdo) { + if (!xxr_para_tmp->tdo) { if (ERROR_OK != svf_adjust_array_length(&xxr_para_tmp->tdo, i_tmp, xxr_para_tmp->len)) { @@ -1099,7 +1099,7 @@ XXR_common: return ERROR_FAIL; } } - if (NULL == xxr_para_tmp->mask) { + if (!xxr_para_tmp->mask) { if (ERROR_OK != svf_adjust_array_length(&xxr_para_tmp->mask, i_tmp, xxr_para_tmp->len)) { @@ -1110,7 +1110,7 @@ XXR_common: memset(xxr_para_tmp->mask, 0, (xxr_para_tmp->len + 7) >> 3); } /* do scan if necessary */ - if (SDR == command) { + if (command == SDR) { /* check buffer size first, reallocate if necessary */ i = svf_para.hdr_para.len + svf_para.sdr_para.len + svf_para.tdr_para.len; @@ -1201,7 +1201,7 @@ XXR_common: } svf_buffer_index += (i + 7) >> 3; - } else if (SIR == command) { + } else if (command == SIR) { /* check buffer size first, reallocate if necessary */ i = svf_para.hir_para.len + svf_para.sir_para.len + svf_para.tir_para.len; @@ -1420,7 +1420,7 @@ XXR_common: if (num_of_argu > 2) { /* STATE pathstate1 ... stable_state */ path = malloc((num_of_argu - 1) * sizeof(tap_state_t)); - if (NULL == path) { + if (!path) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } @@ -1434,7 +1434,7 @@ XXR_common: return ERROR_FAIL; } /* OpenOCD refuses paths containing TAP_RESET */ - if (TAP_RESET == path[i]) { + if (path[i] == TAP_RESET) { /* FIXME last state MUST be stable! */ if (i > 0) { if (!svf_nil) @@ -1487,7 +1487,7 @@ XXR_common: return ERROR_FAIL; } if (svf_para.trst_mode != TRST_ABSENT) { - if (ERROR_OK != svf_execute_tap()) + if (svf_execute_tap() != ERROR_OK) return ERROR_FAIL; i_tmp = svf_find_string_in_array(argus[1], (char **)svf_trst_mode_name, @@ -1530,13 +1530,12 @@ XXR_common: if ((svf_buffer_index > 0) && (((command != STATE) && (command != RUNTEST)) || ((command == STATE) && (num_of_argu == 2)))) { - if (ERROR_OK != svf_execute_tap()) + if (svf_execute_tap() != ERROR_OK) return ERROR_FAIL; /* output debug info */ - if ((SIR == command) || (SDR == command)) { + if ((command == SIR) || (command == SDR)) SVF_BUF_LOG(DEBUG, svf_tdi_buffer, svf_check_tdo_para[0].bit_len, "TDO read"); - } } } else { /* for fast executing, execute tap if necessary */ diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 171c28615..70e727cf9 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -252,7 +252,7 @@ static int aarch64_init_debug_access(struct target *target) /* Write to memory mapped registers directly with no cache or mmu handling */ static int aarch64_dap_write_memap_register_u32(struct target *target, - uint32_t address, + target_addr_t address, uint32_t value) { int retval; @@ -335,7 +335,7 @@ static int aarch64_prepare_halt_smp(struct target *target, bool exc_target, stru LOG_DEBUG("target %s exc %i", target_name(target), exc_target); - while (head != NULL) { + while (head) { struct target *curr = head->target; struct armv8_common *armv8 = target_to_armv8(curr); head = head->next; @@ -359,7 +359,7 @@ static int aarch64_prepare_halt_smp(struct target *target, bool exc_target, stru LOG_DEBUG("target %s prepared", target_name(curr)); - if (first == NULL) + if (!first) first = curr; } @@ -488,7 +488,7 @@ static int update_halt_gdb(struct target *target, enum target_debug_reason debug if (curr->state == TARGET_HALTED) continue; /* remember the gdb_service->target */ - if (curr->gdb_service != NULL) + if (curr->gdb_service) gdb_target = curr->gdb_service->target; /* skip it */ if (curr == gdb_target) @@ -501,7 +501,7 @@ static int update_halt_gdb(struct target *target, enum target_debug_reason debug } /* after all targets were updated, poll the gdb serving target */ - if (gdb_target != NULL && gdb_target != target) + if (gdb_target && gdb_target != target) aarch64_poll(gdb_target); return ERROR_OK; @@ -762,7 +762,7 @@ static int aarch64_prep_restart_smp(struct target *target, int handle_breakpoint break; } /* remember the first valid target in the group */ - if (first == NULL) + if (!first) first = curr; } @@ -785,7 +785,7 @@ static int aarch64_step_restart_smp(struct target *target) if (retval != ERROR_OK) return retval; - if (first != NULL) + if (first) retval = aarch64_do_restart_one(first, RESTART_LAZY); if (retval != ERROR_OK) { LOG_DEBUG("error restarting target %s", target_name(first)); @@ -1259,18 +1259,18 @@ static int aarch64_set_breakpoint(struct target *target, bpt_value = brp_list[brp_i].value; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_i].brpn, (uint32_t)(bpt_value & 0xFFFFFFFF)); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 4 + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BVR_BASE + 4 + 16 * brp_list[brp_i].brpn, (uint32_t)(bpt_value >> 32)); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_i].brpn, brp_list[brp_i].control); if (retval != ERROR_OK) return retval; @@ -1377,12 +1377,12 @@ static int aarch64_set_context_breakpoint(struct target *target, brp_list[brp_i].value = (breakpoint->asid); brp_list[brp_i].control = control; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_i].brpn, brp_list[brp_i].value); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_i].brpn, brp_list[brp_i].control); if (retval != ERROR_OK) return retval; @@ -1398,11 +1398,11 @@ static int aarch64_set_hybrid_breakpoint(struct target *target, struct breakpoin int retval = ERROR_FAIL; int brp_1 = 0; /* holds the contextID pair */ int brp_2 = 0; /* holds the IVA pair */ - uint32_t control_CTX, control_IVA; - uint8_t CTX_byte_addr_select = 0x0F; - uint8_t IVA_byte_addr_select = 0x0F; - uint8_t CTX_machmode = 0x03; - uint8_t IVA_machmode = 0x01; + uint32_t control_ctx, control_iva; + uint8_t ctx_byte_addr_select = 0x0F; + uint8_t iva_byte_addr_select = 0x0F; + uint8_t ctx_machmode = 0x03; + uint8_t iva_machmode = 0x01; struct aarch64_common *aarch64 = target_to_aarch64(target); struct armv8_common *armv8 = &aarch64->armv8_common; struct aarch64_brp *brp_list = aarch64->brp_list; @@ -1416,7 +1416,7 @@ static int aarch64_set_hybrid_breakpoint(struct target *target, struct breakpoin (brp_list[brp_1].type != BRP_CONTEXT)) && (brp_1 < aarch64->brp_num)) brp_1++; - printf("brp(CTX) found num: %d\n", brp_1); + LOG_DEBUG("brp(CTX) found num: %d", brp_1); if (brp_1 >= aarch64->brp_num) { LOG_ERROR("ERROR Can not find free Breakpoint Register Pair"); return ERROR_FAIL; @@ -1426,7 +1426,7 @@ static int aarch64_set_hybrid_breakpoint(struct target *target, struct breakpoin (brp_list[brp_2].type != BRP_NORMAL)) && (brp_2 < aarch64->brp_num)) brp_2++; - printf("brp(IVA) found num: %d\n", brp_2); + LOG_DEBUG("brp(IVA) found num: %d", brp_2); if (brp_2 >= aarch64->brp_num) { LOG_ERROR("ERROR Can not find free Breakpoint Register Pair"); return ERROR_FAIL; @@ -1434,45 +1434,45 @@ static int aarch64_set_hybrid_breakpoint(struct target *target, struct breakpoin breakpoint->set = brp_1 + 1; breakpoint->linked_brp = brp_2; - control_CTX = ((CTX_machmode & 0x7) << 20) + control_ctx = ((ctx_machmode & 0x7) << 20) | (brp_2 << 16) | (0 << 14) - | (CTX_byte_addr_select << 5) + | (ctx_byte_addr_select << 5) | (3 << 1) | 1; brp_list[brp_1].used = 1; brp_list[brp_1].value = (breakpoint->asid); - brp_list[brp_1].control = control_CTX; + brp_list[brp_1].control = control_ctx; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_1].BRPn, + + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_1].brpn, brp_list[brp_1].value); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_1].BRPn, + + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_1].brpn, brp_list[brp_1].control); if (retval != ERROR_OK) return retval; - control_IVA = ((IVA_machmode & 0x7) << 20) + control_iva = ((iva_machmode & 0x7) << 20) | (brp_1 << 16) | (1 << 13) - | (IVA_byte_addr_select << 5) + | (iva_byte_addr_select << 5) | (3 << 1) | 1; brp_list[brp_2].used = 1; brp_list[brp_2].value = breakpoint->address & 0xFFFFFFFFFFFFFFFC; - brp_list[brp_2].control = control_IVA; + brp_list[brp_2].control = control_iva; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_2].BRPn, + + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_2].brpn, brp_list[brp_2].value & 0xFFFFFFFF); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 4 + 16 * brp_list[brp_2].BRPn, + + CPUV8_DBG_BVR_BASE + 4 + 16 * brp_list[brp_2].brpn, brp_list[brp_2].value >> 32); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_2].BRPn, + + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_2].brpn, brp_list[brp_2].control); if (retval != ERROR_OK) return retval; @@ -1506,17 +1506,17 @@ static int aarch64_unset_breakpoint(struct target *target, struct breakpoint *br brp_list[brp_i].value = 0; brp_list[brp_i].control = 0; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_i].brpn, brp_list[brp_i].control); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_i].brpn, (uint32_t)brp_list[brp_i].value); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 4 + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BVR_BASE + 4 + 16 * brp_list[brp_i].brpn, (uint32_t)brp_list[brp_i].value); if (retval != ERROR_OK) return retval; @@ -1530,17 +1530,17 @@ static int aarch64_unset_breakpoint(struct target *target, struct breakpoint *br brp_list[brp_j].value = 0; brp_list[brp_j].control = 0; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_j].BRPn, + + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_j].brpn, brp_list[brp_j].control); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_j].BRPn, + + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_j].brpn, (uint32_t)brp_list[brp_j].value); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 4 + 16 * brp_list[brp_j].BRPn, + + CPUV8_DBG_BVR_BASE + 4 + 16 * brp_list[brp_j].brpn, (uint32_t)brp_list[brp_j].value); if (retval != ERROR_OK) return retval; @@ -1561,18 +1561,18 @@ static int aarch64_unset_breakpoint(struct target *target, struct breakpoint *br brp_list[brp_i].value = 0; brp_list[brp_i].control = 0; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BCR_BASE + 16 * brp_list[brp_i].brpn, brp_list[brp_i].control); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BVR_BASE + 16 * brp_list[brp_i].brpn, brp_list[brp_i].value); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_BVR_BASE + 4 + 16 * brp_list[brp_i].BRPn, + + CPUV8_DBG_BVR_BASE + 4 + 16 * brp_list[brp_i].brpn, (uint32_t)brp_list[brp_i].value); if (retval != ERROR_OK) return retval; @@ -1735,18 +1735,18 @@ static int aarch64_set_watchpoint(struct target *target, wp_list[wp_i].control = control; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_WVR_BASE + 16 * wp_list[wp_i].BRPn, + + CPUV8_DBG_WVR_BASE + 16 * wp_list[wp_i].brpn, (uint32_t)(wp_list[wp_i].value & 0xFFFFFFFF)); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_WVR_BASE + 4 + 16 * wp_list[wp_i].BRPn, + + CPUV8_DBG_WVR_BASE + 4 + 16 * wp_list[wp_i].brpn, (uint32_t)(wp_list[wp_i].value >> 32)); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_WCR_BASE + 16 * wp_list[wp_i].BRPn, + + CPUV8_DBG_WCR_BASE + 16 * wp_list[wp_i].brpn, control); if (retval != ERROR_OK) return retval; @@ -1791,18 +1791,18 @@ static int aarch64_unset_watchpoint(struct target *target, wp_list[wp_i].value = 0; wp_list[wp_i].control = 0; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_WCR_BASE + 16 * wp_list[wp_i].BRPn, + + CPUV8_DBG_WCR_BASE + 16 * wp_list[wp_i].brpn, wp_list[wp_i].control); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_WVR_BASE + 16 * wp_list[wp_i].BRPn, + + CPUV8_DBG_WVR_BASE + 16 * wp_list[wp_i].brpn, wp_list[wp_i].value); if (retval != ERROR_OK) return retval; retval = aarch64_dap_write_memap_register_u32(target, armv8->debug_base - + CPUV8_DBG_WVR_BASE + 4 + 16 * wp_list[wp_i].BRPn, + + CPUV8_DBG_WVR_BASE + 4 + 16 * wp_list[wp_i].brpn, (uint32_t)wp_list[wp_i].value); if (retval != ERROR_OK) return retval; @@ -2548,7 +2548,7 @@ static int aarch64_examine_first(struct target *target) uint32_t tmp0, tmp1, tmp2, tmp3; debug = ttypr = cpuid = 0; - if (pc == NULL) + if (!pc) return ERROR_FAIL; if (pc->adiv5_config.ap_num == DP_APSEL_INVALID) { @@ -2571,7 +2571,7 @@ static int aarch64_examine_first(struct target *target) armv8->debug_ap->memaccess_tck = 10; if (!target->dbgbase_set) { - uint32_t dbgbase; + target_addr_t dbgbase; /* Get ROM Table base */ uint32_t apid; int32_t coreidx = target->coreid; @@ -2583,7 +2583,7 @@ static int aarch64_examine_first(struct target *target) &armv8->debug_base, &coreidx); if (retval != ERROR_OK) return retval; - LOG_DEBUG("Detected core %" PRId32 " dbgbase: %08" PRIx32 + LOG_DEBUG("Detected core %" PRId32 " dbgbase: " TARGET_ADDR_FMT " apid: %08" PRIx32, coreidx, armv8->debug_base, apid); } else armv8->debug_base = target->dbgbase; @@ -2634,7 +2634,7 @@ static int aarch64_examine_first(struct target *target) LOG_DEBUG("ttypr = 0x%08" PRIx64, ttypr); LOG_DEBUG("debug = 0x%08" PRIx64, debug); - if (pc->cti == NULL) + if (!pc->cti) return ERROR_FAIL; armv8->cti = pc->cti; @@ -2656,7 +2656,7 @@ static int aarch64_examine_first(struct target *target) aarch64->brp_list[i].type = BRP_CONTEXT; aarch64->brp_list[i].value = 0; aarch64->brp_list[i].control = 0; - aarch64->brp_list[i].BRPn = i; + aarch64->brp_list[i].brpn = i; } /* Setup Watchpoint Register Pairs */ @@ -2668,7 +2668,7 @@ static int aarch64_examine_first(struct target *target) aarch64->wp_list[i].type = BRP_NORMAL; aarch64->wp_list[i].value = 0; aarch64->wp_list[i].control = 0; - aarch64->wp_list[i].BRPn = i; + aarch64->wp_list[i].brpn = i; } LOG_DEBUG("Configured %i hw breakpoints, %i watchpoints", @@ -2739,7 +2739,7 @@ static int aarch64_target_create(struct target *target, Jim_Interp *interp) return ERROR_FAIL; aarch64 = calloc(1, sizeof(struct aarch64_common)); - if (aarch64 == NULL) { + if (!aarch64) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -2797,7 +2797,7 @@ static int aarch64_jim_configure(struct target *target, struct jim_getopt_info * int e; pc = (struct aarch64_private_config *)target->private_config; - if (pc == NULL) { + if (!pc) { pc = calloc(1, sizeof(struct aarch64_private_config)); pc->adiv5_config.ap_num = DP_APSEL_INVALID; target->private_config = pc; @@ -2842,7 +2842,7 @@ static int aarch64_jim_configure(struct target *target, struct jim_getopt_info * if (e != JIM_OK) return e; cti = cti_instance_by_jim_obj(goi->interp, o_cti); - if (cti == NULL) { + if (!cti) { Jim_SetResultString(goi->interp, "CTI name invalid!", -1); return JIM_ERR; } @@ -2855,7 +2855,7 @@ static int aarch64_jim_configure(struct target *target, struct jim_getopt_info * return JIM_ERR; } - if (pc == NULL || pc->cti == NULL) { + if (!pc || !pc->cti) { Jim_SetResultString(goi->interp, "CTI not configured", -1); return JIM_ERR; } @@ -2896,7 +2896,7 @@ COMMAND_HANDLER(aarch64_handle_disassemble_command) { struct target *target = get_current_target(CMD_CTX); - if (target == NULL) { + if (!target) { LOG_ERROR("No target selected"); return ERROR_FAIL; } @@ -2939,7 +2939,7 @@ COMMAND_HANDLER(aarch64_mask_interrupts_command) if (CMD_ARGC > 0) { n = jim_nvp_name2value_simple(nvp_maskisr_modes, CMD_ARGV[0]); - if (n->name == NULL) { + if (!n->name) { LOG_ERROR("Unknown parameter: %s - should be off or on", CMD_ARGV[0]); return ERROR_COMMAND_SYNTAX_ERROR; } @@ -2971,10 +2971,10 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) } context = current_command_context(interp); - assert(context != NULL); + assert(context); target = get_current_target(context); - if (target == NULL) { + if (!target) { LOG_ERROR("%s: no current target", __func__); return JIM_ERR; } @@ -3005,8 +3005,8 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) int cpnum; uint32_t op1; uint32_t op2; - uint32_t CRn; - uint32_t CRm; + uint32_t crn; + uint32_t crm; uint32_t value; long l; @@ -3043,7 +3043,7 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) "CRn", (int) l); return JIM_ERR; } - CRn = l; + crn = l; retval = Jim_GetLong(interp, argv[4], &l); if (retval != JIM_OK) @@ -3053,7 +3053,7 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) "CRm", (int) l); return JIM_ERR; } - CRm = l; + crm = l; retval = Jim_GetLong(interp, argv[5], &l); if (retval != JIM_OK) @@ -3074,14 +3074,14 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) value = l; /* NOTE: parameters reordered! */ - /* ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2) */ - retval = arm->mcr(target, cpnum, op1, op2, CRn, CRm, value); + /* ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2) */ + retval = arm->mcr(target, cpnum, op1, op2, crn, crm, value); if (retval != ERROR_OK) return JIM_ERR; } else { /* NOTE: parameters reordered! */ - /* ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2) */ - retval = arm->mrc(target, cpnum, op1, op2, CRn, CRm, &value); + /* ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2) */ + retval = arm->mrc(target, cpnum, op1, op2, crn, crm, &value); if (retval != ERROR_OK) return JIM_ERR; diff --git a/src/target/aarch64.h b/src/target/aarch64.h index 7c0ddf868..b57361f88 100644 --- a/src/target/aarch64.h +++ b/src/target/aarch64.h @@ -46,7 +46,7 @@ struct aarch64_brp { int type; target_addr_t value; uint32_t control; - uint8_t BRPn; + uint8_t brpn; }; struct aarch64_common { diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c index 239253d20..be625807c 100644 --- a/src/target/adi_v5_jtag.c +++ b/src/target/adi_v5_jtag.c @@ -43,10 +43,10 @@ /*#define DEBUG_WAIT*/ /* JTAG instructions/registers for JTAG-DP and SWJ-DP */ -#define JTAG_DP_ABORT 0x8 -#define JTAG_DP_DPACC 0xA -#define JTAG_DP_APACC 0xB -#define JTAG_DP_IDCODE 0xE +#define JTAG_DP_ABORT 0xF8 +#define JTAG_DP_DPACC 0xFA +#define JTAG_DP_APACC 0xFB +#define JTAG_DP_IDCODE 0xFE /* three-bit ACK values for DPACC and APACC reads */ #define JTAG_ACK_OK_FAULT 0x2 @@ -128,7 +128,7 @@ struct dap_cmd { struct list_head lh; uint8_t instr; uint8_t reg_addr; - uint8_t RnW; + uint8_t rnw; uint8_t *invalue; uint8_t ack; uint32_t memaccess_tck; @@ -153,7 +153,7 @@ static void log_dap_cmd(const char *header, struct dap_cmd *el) LOG_DEBUG("%s: %2s %6s %5s 0x%08x 0x%08x %2s", header, el->instr == JTAG_DP_APACC ? "AP" : "DP", dap_reg_name(el->instr, el->reg_addr), - el->RnW == DPAP_READ ? "READ" : "WRITE", + el->rnw == DPAP_READ ? "READ" : "WRITE", buf_get_u32(el->outvalue_buf, 0, 32), buf_get_u32(el->invalue, 0, 32), el->ack == JTAG_ACK_OK_FAULT ? "OK" : @@ -170,7 +170,7 @@ static int jtag_limit_queue_size(struct adiv5_dap *dap) } static struct dap_cmd *dap_cmd_new(struct adiv5_dap *dap, uint8_t instr, - uint8_t reg_addr, uint8_t RnW, + uint8_t reg_addr, uint8_t rnw, uint8_t *outvalue, uint8_t *invalue, uint32_t memaccess_tck) { @@ -179,7 +179,7 @@ static struct dap_cmd *dap_cmd_new(struct adiv5_dap *dap, uint8_t instr, if (list_empty(&dap->cmd_pool)) { pool = calloc(1, sizeof(struct dap_cmd_pool)); - if (pool == NULL) + if (!pool) return NULL; } else { pool = list_first_entry(&dap->cmd_pool, struct dap_cmd_pool, lh); @@ -193,10 +193,10 @@ static struct dap_cmd *dap_cmd_new(struct adiv5_dap *dap, uint8_t instr, INIT_LIST_HEAD(&cmd->lh); cmd->instr = instr; cmd->reg_addr = reg_addr; - cmd->RnW = RnW; - if (outvalue != NULL) + cmd->rnw = rnw; + if (outvalue) memcpy(cmd->outvalue_buf, outvalue, 4); - cmd->invalue = (invalue != NULL) ? invalue : cmd->invalue_buf; + cmd->invalue = (invalue) ? invalue : cmd->invalue_buf; cmd->memaccess_tck = memaccess_tck; return cmd; @@ -253,9 +253,9 @@ static int adi_jtag_dp_scan_cmd(struct adiv5_dap *dap, struct dap_cmd *cmd, uint * For APACC access with any sticky error flag set, this is discarded. */ cmd->fields[0].num_bits = 3; - buf_set_u32(&cmd->out_addr_buf, 0, 3, ((cmd->reg_addr >> 1) & 0x6) | (cmd->RnW & 0x1)); + buf_set_u32(&cmd->out_addr_buf, 0, 3, ((cmd->reg_addr >> 1) & 0x6) | (cmd->rnw & 0x1)); cmd->fields[0].out_value = &cmd->out_addr_buf; - cmd->fields[0].in_value = (ack != NULL) ? ack : &cmd->ack; + cmd->fields[0].in_value = (ack) ? ack : &cmd->ack; /* NOTE: if we receive JTAG_ACK_WAIT, the previous operation did not * complete; data we write is discarded, data we read is unpredictable. @@ -299,7 +299,7 @@ static int adi_jtag_dp_scan_cmd_sync(struct adiv5_dap *dap, struct dap_cmd *cmd, * conversions are performed. See section 4.4.3 of the ADIv5 spec, which * discusses operations which access these registers. * - * Note that only one scan is performed. If RnW is set, a separate scan + * Note that only one scan is performed. If rnw is set, a separate scan * will be needed to collect the data which was read; the "invalue" collects * the posted result of a preceding operation, not the current one. * @@ -307,7 +307,7 @@ static int adi_jtag_dp_scan_cmd_sync(struct adiv5_dap *dap, struct dap_cmd *cmd, * @param instr JTAG_DP_APACC (AP access) or JTAG_DP_DPACC (DP access) * @param reg_addr two significant bits; A[3:2]; for APACC access, the * SELECT register has more addressing bits. - * @param RnW false iff outvalue will be written to the DP or AP + * @param rnw false iff outvalue will be written to the DP or AP * @param outvalue points to a 32-bit (little-endian) integer * @param invalue NULL, or points to a 32-bit (little-endian) integer * @param ack points to where the three bit JTAG_ACK_* code will be stored @@ -315,15 +315,15 @@ static int adi_jtag_dp_scan_cmd_sync(struct adiv5_dap *dap, struct dap_cmd *cmd, */ static int adi_jtag_dp_scan(struct adiv5_dap *dap, - uint8_t instr, uint8_t reg_addr, uint8_t RnW, + uint8_t instr, uint8_t reg_addr, uint8_t rnw, uint8_t *outvalue, uint8_t *invalue, uint32_t memaccess_tck, uint8_t *ack) { struct dap_cmd *cmd; int retval; - cmd = dap_cmd_new(dap, instr, reg_addr, RnW, outvalue, invalue, memaccess_tck); - if (cmd != NULL) + cmd = dap_cmd_new(dap, instr, reg_addr, rnw, outvalue, invalue, memaccess_tck); + if (cmd) cmd->dp_select = dap->select; else return ERROR_JTAG_DEVICE_ERROR; @@ -342,7 +342,7 @@ static int adi_jtag_dp_scan(struct adiv5_dap *dap, * must be different). */ static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap, - uint8_t instr, uint8_t reg_addr, uint8_t RnW, + uint8_t instr, uint8_t reg_addr, uint8_t rnw, uint32_t outvalue, uint32_t *invalue, uint32_t memaccess_tck, uint8_t *ack) { @@ -351,7 +351,7 @@ static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap, buf_set_u32(out_value_buf, 0, 32, outvalue); - retval = adi_jtag_dp_scan(dap, instr, reg_addr, RnW, + retval = adi_jtag_dp_scan(dap, instr, reg_addr, rnw, out_value_buf, (uint8_t *)invalue, memaccess_tck, ack); if (retval != ERROR_OK) return retval; @@ -367,7 +367,7 @@ static int adi_jtag_finish_read(struct adiv5_dap *dap) { int retval = ERROR_OK; - if (dap->last_read != NULL) { + if (dap->last_read) { retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC, DP_RDBUFF, DPAP_READ, 0, dap->last_read, 0, NULL); dap->last_read = NULL; @@ -377,21 +377,21 @@ static int adi_jtag_finish_read(struct adiv5_dap *dap) } static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *dap, - uint8_t instr, uint8_t reg_addr, uint8_t RnW, + uint8_t instr, uint8_t reg_addr, uint8_t rnw, uint32_t outvalue, uint32_t *invalue, uint32_t memaccess_tck) { int retval; /* Issue the read or write */ retval = adi_jtag_dp_scan_u32(dap, instr, reg_addr, - RnW, outvalue, NULL, memaccess_tck, NULL); + rnw, outvalue, NULL, memaccess_tck, NULL); if (retval != ERROR_OK) return retval; /* For reads, collect posted value; RDBUFF has no other effect. * Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK". */ - if ((RnW == DPAP_READ) && (invalue != NULL)) { + if ((rnw == DPAP_READ) && (invalue)) { retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC, DP_RDBUFF, DPAP_READ, 0, invalue, 0, NULL); if (retval != ERROR_OK) @@ -435,7 +435,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap) */ if (found_wait && el != list_first_entry(&dap->cmd_journal, struct dap_cmd, lh)) { prev = list_entry(el->lh.prev, struct dap_cmd, lh); - if (prev->RnW == DPAP_READ) { + if (prev->rnw == DPAP_READ) { log_dap_cmd("PND", prev); /* search for the next OK transaction, it contains * the result of the previous READ */ @@ -453,7 +453,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap) } } - if (prev != NULL) { + if (prev) { log_dap_cmd("LST", el); /* @@ -466,7 +466,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap) */ tmp = dap_cmd_new(dap, JTAG_DP_DPACC, DP_RDBUFF, DPAP_READ, NULL, NULL, 0); - if (tmp == NULL) { + if (!tmp) { retval = ERROR_JTAG_DEVICE_ERROR; goto done; } @@ -545,7 +545,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap) el = list_first_entry(&replay_list, struct dap_cmd, lh); tmp = dap_cmd_new(dap, JTAG_DP_DPACC, DP_SELECT, DPAP_WRITE, (uint8_t *)&el->dp_select, NULL, 0); - if (tmp == NULL) { + if (!tmp) { retval = ERROR_JTAG_DEVICE_ERROR; goto done; } diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c index f1fca40ae..a21bf25b9 100644 --- a/src/target/adi_v5_swd.c +++ b/src/target/adi_v5_swd.c @@ -58,7 +58,7 @@ static bool do_sync; static void swd_finish_read(struct adiv5_dap *dap) { const struct swd_driver *swd = adiv5_dap_swd_driver(dap); - if (dap->last_read != NULL) { + if (dap->last_read) { swd->read_reg(swd_cmd(true, false, DP_RDBUFF), dap->last_read, 0); dap->last_read = NULL; } diff --git a/src/target/arc.c b/src/target/arc.c index e11cd7d79..4b546c3b4 100644 --- a/src/target/arc.c +++ b/src/target/arc.c @@ -866,7 +866,7 @@ static int arc_save_context(struct target *target) /* Read data from target. */ if (core_cnt > 0) { retval = arc_jtag_read_core_reg(&arc->jtag_info, core_addrs, core_cnt, core_values); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Attempt to read core registers failed."); retval = ERROR_FAIL; goto exit; @@ -874,7 +874,7 @@ static int arc_save_context(struct target *target) } if (aux_cnt > 0) { retval = arc_jtag_read_aux_reg(&arc->jtag_info, aux_addrs, aux_cnt, aux_values); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Attempt to read aux registers failed."); retval = ERROR_FAIL; goto exit; @@ -931,8 +931,8 @@ exit: static int get_current_actionpoint(struct target *target, struct arc_actionpoint **actionpoint) { - assert(target != NULL); - assert(actionpoint != NULL); + assert(target); + assert(actionpoint); uint32_t debug_ah; /* Check if actionpoint caused halt */ @@ -981,7 +981,7 @@ static int arc_examine_debug_reason(struct target *target) struct arc_actionpoint *actionpoint = NULL; CHECK_RETVAL(get_current_actionpoint(target, &actionpoint)); - if (actionpoint != NULL) { + if (actionpoint) { if (!actionpoint->used) LOG_WARNING("Target halted by an unused actionpoint."); @@ -1197,7 +1197,7 @@ static int arc_restore_context(struct target *target) * Check before write, if aux and core count is greater than 0. */ if (core_cnt > 0) { retval = arc_jtag_write_core_reg(&arc->jtag_info, core_addrs, core_cnt, core_values); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Attempt to write to core registers failed."); retval = ERROR_FAIL; goto exit; @@ -1206,7 +1206,7 @@ static int arc_restore_context(struct target *target) if (aux_cnt > 0) { retval = arc_jtag_write_aux_reg(&arc->jtag_info, aux_addrs, aux_cnt, aux_values); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Attempt to write to aux registers failed."); retval = ERROR_FAIL; goto exit; @@ -1940,7 +1940,7 @@ static int arc_hit_watchpoint(struct target *target, struct watchpoint **hit_wat struct arc_actionpoint *actionpoint = NULL; CHECK_RETVAL(get_current_actionpoint(target, &actionpoint)); - if (actionpoint != NULL) { + if (actionpoint) { if (!actionpoint->used) LOG_WARNING("Target halted by unused actionpoint."); @@ -1949,7 +1949,7 @@ static int arc_hit_watchpoint(struct target *target, struct watchpoint **hit_wat LOG_WARNING("Target halted by breakpoint, but is treated as a watchpoint."); for (struct watchpoint *watchpoint = target->watchpoints; - watchpoint != NULL; + watchpoint; watchpoint = watchpoint->next) { if (actionpoint->bp_value == watchpoint->address) { *hit_watchpoint = watchpoint; diff --git a/src/target/arc_mem.c b/src/target/arc_mem.c index 96762690f..81d1ab277 100644 --- a/src/target/arc_mem.c +++ b/src/target/arc_mem.c @@ -281,7 +281,7 @@ int arc_mem_read(struct target *target, target_addr_t address, uint32_t size, /* arc_..._read_mem with size 4/2 returns uint32_t/uint16_t in host */ /* endianness, but byte array should represent target endianness */ - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { switch (size) { case 4: target_buffer_set_u32_array(target, buffer, count, diff --git a/src/target/arm.h b/src/target/arm.h index f403b8f8a..17327899b 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -231,13 +231,13 @@ struct arm { /** Read coprocessor register. */ int (*mrc)(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t *value); /** Write coprocessor register. */ int (*mcr)(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t value); void *arch_info; @@ -252,13 +252,13 @@ struct arm { /** Convert target handle to generic ARM target state handle. */ static inline struct arm *target_to_arm(struct target *target) { - assert(target != NULL); + assert(target); return target->arch_info; } static inline bool is_arm(struct arm *arm) { - assert(arm != NULL); + assert(arm); return arm->common_magic == ARM_COMMON_MAGIC; } diff --git a/src/target/arm11.c b/src/target/arm11.c index ff125d0ea..e3b0975fb 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -51,14 +51,14 @@ static int arm11_step(struct target *target, int current, */ static int arm11_check_init(struct arm11_common *arm11) { - CHECK_RETVAL(arm11_read_DSCR(arm11)); + CHECK_RETVAL(arm11_read_dscr(arm11)); if (!(arm11->dscr & DSCR_HALT_DBG_MODE)) { LOG_DEBUG("DSCR %08x", (unsigned) arm11->dscr); LOG_DEBUG("Bringing target into debug mode"); arm11->dscr |= DSCR_HALT_DBG_MODE; - CHECK_RETVAL(arm11_write_DSCR(arm11, arm11->dscr)); + CHECK_RETVAL(arm11_write_dscr(arm11, arm11->dscr)); /* add further reset initialization here */ @@ -104,9 +104,9 @@ static int arm11_debug_entry(struct arm11_common *arm11) /* maybe save wDTR (pending DCC write to debug SW, e.g. libdcc) */ arm11->is_wdtr_saved = !!(arm11->dscr & DSCR_DTR_TX_FULL); if (arm11->is_wdtr_saved) { - arm11_add_debug_SCAN_N(arm11, 0x05, ARM11_TAP_DEFAULT); + arm11_add_debug_scan_n(arm11, 0x05, ARM11_TAP_DEFAULT); - arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); struct scan_field chain5_fields[3]; @@ -126,7 +126,7 @@ static int arm11_debug_entry(struct arm11_common *arm11) * but not to issue ITRs(?). The ARMv7 arch spec says it's required * for executing instructions via ITR. */ - CHECK_RETVAL(arm11_write_DSCR(arm11, DSCR_ITR_EN | arm11->dscr)); + CHECK_RETVAL(arm11_write_dscr(arm11, DSCR_ITR_EN | arm11->dscr)); /* From the spec: @@ -143,14 +143,14 @@ static int arm11_debug_entry(struct arm11_common *arm11) /* mcr 15, 0, r0, cr7, cr10, {4} */ arm11_run_instr_no_data1(arm11, 0xee070f9a); - uint32_t dscr = arm11_read_DSCR(arm11); + uint32_t dscr = arm11_read_dscr(arm11); LOG_DEBUG("DRAIN, DSCR %08x", dscr); if (dscr & ARM11_DSCR_STICKY_IMPRECISE_DATA_ABORT) { arm11_run_instr_no_data1(arm11, 0xe320f000); - dscr = arm11_read_DSCR(arm11); + dscr = arm11_read_dscr(arm11); LOG_DEBUG("DRAIN, DSCR %08x (DONE)", dscr); @@ -242,7 +242,7 @@ static int arm11_leave_debug_state(struct arm11_common *arm11, bool bpwp) /* spec says clear wDTR and rDTR; we assume they are clear as otherwise our programming would be sloppy */ { - CHECK_RETVAL(arm11_read_DSCR(arm11)); + CHECK_RETVAL(arm11_read_dscr(arm11)); if (arm11->dscr & (DSCR_DTR_RX_FULL | DSCR_DTR_TX_FULL)) { /* @@ -285,23 +285,23 @@ static int arm11_leave_debug_state(struct arm11_common *arm11, bool bpwp) register_cache_invalidate(arm11->arm.core_cache); /* restore DSCR */ - CHECK_RETVAL(arm11_write_DSCR(arm11, arm11->dscr)); + CHECK_RETVAL(arm11_write_dscr(arm11, arm11->dscr)); /* maybe restore rDTR */ if (arm11->is_rdtr_saved) { - arm11_add_debug_SCAN_N(arm11, 0x05, ARM11_TAP_DEFAULT); + arm11_add_debug_scan_n(arm11, 0x05, ARM11_TAP_DEFAULT); - arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); struct scan_field chain5_fields[3]; - uint8_t Ready = 0; /* ignored */ - uint8_t Valid = 0; /* ignored */ + uint8_t ready = 0; /* ignored */ + uint8_t valid = 0; /* ignored */ arm11_setup_field(arm11, 32, &arm11->saved_rdtr, NULL, chain5_fields + 0); - arm11_setup_field(arm11, 1, &Ready, NULL, chain5_fields + 1); - arm11_setup_field(arm11, 1, &Valid, NULL, chain5_fields + 2); + arm11_setup_field(arm11, 1, &ready, NULL, chain5_fields + 1); + arm11_setup_field(arm11, 1, &valid, NULL, chain5_fields + 2); arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE( chain5_fields), chain5_fields, TAP_DRPAUSE); @@ -376,14 +376,14 @@ static int arm11_halt(struct target *target) return ERROR_OK; } - arm11_add_IR(arm11, ARM11_HALT, TAP_IDLE); + arm11_add_ir(arm11, ARM11_HALT, TAP_IDLE); CHECK_RETVAL(jtag_execute_queue()); int i = 0; while (1) { - CHECK_RETVAL(arm11_read_DSCR(arm11)); + CHECK_RETVAL(arm11_read_dscr(arm11)); if (arm11->dscr & DSCR_CORE_HALTED) break; @@ -519,13 +519,13 @@ static int arm11_resume(struct target *target, int current, /* activate all watchpoints and breakpoints */ CHECK_RETVAL(arm11_leave_debug_state(arm11, true)); - arm11_add_IR(arm11, ARM11_RESTART, TAP_IDLE); + arm11_add_ir(arm11, ARM11_RESTART, TAP_IDLE); CHECK_RETVAL(jtag_execute_queue()); int i = 0; while (1) { - CHECK_RETVAL(arm11_read_DSCR(arm11)); + CHECK_RETVAL(arm11_read_dscr(arm11)); LOG_DEBUG("DSCR %08x", (unsigned) arm11->dscr); @@ -661,7 +661,7 @@ static int arm11_step(struct target *target, int current, CHECK_RETVAL(arm11_leave_debug_state(arm11, handle_breakpoints)); - arm11_add_IR(arm11, ARM11_RESTART, TAP_IDLE); + arm11_add_ir(arm11, ARM11_RESTART, TAP_IDLE); CHECK_RETVAL(jtag_execute_queue()); @@ -672,7 +672,7 @@ static int arm11_step(struct target *target, int current, const uint32_t mask = DSCR_CORE_RESTARTED | DSCR_CORE_HALTED; - CHECK_RETVAL(arm11_read_DSCR(arm11)); + CHECK_RETVAL(arm11_read_dscr(arm11)); LOG_DEBUG("DSCR %08x e", (unsigned) arm11->dscr); if ((arm11->dscr & mask) == mask) @@ -1096,7 +1096,7 @@ static int arm11_target_create(struct target *target, Jim_Interp *interp) { struct arm11_common *arm11; - if (target->tap == NULL) + if (!target->tap) return ERROR_FAIL; if (target->tap->ir_length != 5) { @@ -1151,7 +1151,7 @@ static int arm11_examine(struct target *target) /* check IDCODE */ - arm11_add_IR(arm11, ARM11_IDCODE, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_IDCODE, ARM11_TAP_DEFAULT); struct scan_field idcode_field; @@ -1161,9 +1161,9 @@ static int arm11_examine(struct target *target) /* check DIDR */ - arm11_add_debug_SCAN_N(arm11, 0x00, ARM11_TAP_DEFAULT); + arm11_add_debug_scan_n(arm11, 0x00, ARM11_TAP_DEFAULT); - arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); struct scan_field chain0_fields[2]; diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index 823ce5cc1..fc35414df 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -132,7 +132,7 @@ static const char *arm11_ir_to_string(uint8_t ir) * * \remarks This adds to the JTAG command queue but does \em not execute it. */ -void arm11_add_IR(struct arm11_common *arm11, uint8_t instr, tap_state_t state) +void arm11_add_ir(struct arm11_common *arm11, uint8_t instr, tap_state_t state) { struct jtag_tap *tap = arm11->arm.target->tap; @@ -153,7 +153,7 @@ void arm11_add_IR(struct arm11_common *arm11, uint8_t instr, tap_state_t state) } /** Verify data shifted out from Scan Chain Register (SCREG). */ -static void arm11_in_handler_SCAN_N(uint8_t *in_value) +static void arm11_in_handler_scan_n(uint8_t *in_value) { /* Don't expect JTAG layer to modify bits we didn't ask it to read */ uint8_t v = *in_value & 0x1F; @@ -186,12 +186,12 @@ static void arm11_in_handler_SCAN_N(uint8_t *in_value) * call will end in Pause-DR. The second call, due to the IR * caching, will not go through Capture-DR when shifting in the * new scan chain number. As a result the verification in - * arm11_in_handler_SCAN_N() must fail. + * arm11_in_handler_scan_n() must fail. * * \remarks This adds to the JTAG command queue but does \em not execute it. */ -int arm11_add_debug_SCAN_N(struct arm11_common *arm11, +int arm11_add_debug_scan_n(struct arm11_common *arm11, uint8_t chain, tap_state_t state) { /* Don't needlessly switch the scan chain. @@ -211,7 +211,7 @@ int arm11_add_debug_SCAN_N(struct arm11_common *arm11, #endif JTAG_DEBUG("SCREG <= %d", chain); - arm11_add_IR(arm11, ARM11_SCAN_N, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_SCAN_N, ARM11_TAP_DEFAULT); struct scan_field field; @@ -225,7 +225,7 @@ int arm11_add_debug_SCAN_N(struct arm11_common *arm11, jtag_execute_queue_noclear(); - arm11_in_handler_SCAN_N(tmp); + arm11_in_handler_scan_n(tmp); arm11->jtag_info.cur_scan_chain = chain; @@ -250,7 +250,7 @@ int arm11_add_debug_SCAN_N(struct arm11_common *arm11, * is properly set up. Depending on the instruction, you may also need * to ensure that the rDTR is ready before that Run-Test/Idle state. */ -static void arm11_add_debug_INST(struct arm11_common *arm11, +static void arm11_add_debug_inst(struct arm11_common *arm11, uint32_t inst, uint8_t *flag, tap_state_t state) { JTAG_DEBUG("INST <= 0x%08x", (unsigned) inst); @@ -273,15 +273,15 @@ static void arm11_add_debug_INST(struct arm11_common *arm11, * command queue. It does not require the ARM11 debug TAP to be * in any particular state. */ -int arm11_read_DSCR(struct arm11_common *arm11) +int arm11_read_dscr(struct arm11_common *arm11) { int retval; - retval = arm11_add_debug_SCAN_N(arm11, 0x01, ARM11_TAP_DEFAULT); + retval = arm11_add_debug_scan_n(arm11, 0x01, ARM11_TAP_DEFAULT); if (retval != ERROR_OK) return retval; - arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); uint32_t dscr; struct scan_field chain1_field; @@ -311,14 +311,14 @@ int arm11_read_DSCR(struct arm11_common *arm11) * * \remarks This is a stand-alone function that executes the JTAG command queue. */ -int arm11_write_DSCR(struct arm11_common *arm11, uint32_t dscr) +int arm11_write_dscr(struct arm11_common *arm11, uint32_t dscr) { int retval; - retval = arm11_add_debug_SCAN_N(arm11, 0x01, ARM11_TAP_DEFAULT); + retval = arm11_add_debug_scan_n(arm11, 0x01, ARM11_TAP_DEFAULT); if (retval != ERROR_OK) return retval; - arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); struct scan_field chain1_field; @@ -353,7 +353,7 @@ int arm11_write_DSCR(struct arm11_common *arm11, uint32_t dscr) */ int arm11_run_instr_data_prepare(struct arm11_common *arm11) { - return arm11_add_debug_SCAN_N(arm11, 0x05, ARM11_TAP_DEFAULT); + return arm11_add_debug_scan_n(arm11, 0x05, ARM11_TAP_DEFAULT); } /** Cleanup after ITR/DTR operations @@ -372,7 +372,7 @@ int arm11_run_instr_data_prepare(struct arm11_common *arm11) */ int arm11_run_instr_data_finish(struct arm11_common *arm11) { - return arm11_add_debug_SCAN_N(arm11, 0x00, ARM11_TAP_DEFAULT); + return arm11_add_debug_scan_n(arm11, 0x00, ARM11_TAP_DEFAULT); } /** @@ -392,16 +392,16 @@ static int arm11_run_instr_no_data(struct arm11_common *arm11, uint32_t *opcode, size_t count) { - arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT); while (count--) { - arm11_add_debug_INST(arm11, *opcode++, NULL, TAP_IDLE); + arm11_add_debug_inst(arm11, *opcode++, NULL, TAP_IDLE); int i = 0; while (1) { uint8_t flag; - arm11_add_debug_INST(arm11, 0, &flag, count ? TAP_IDLE : TAP_DRPAUSE); + arm11_add_debug_inst(arm11, 0, &flag, count ? TAP_IDLE : TAP_DRPAUSE); CHECK_RETVAL(jtag_execute_queue()); @@ -463,33 +463,33 @@ int arm11_run_instr_data_to_core(struct arm11_common *arm11, uint32_t *data, size_t count) { - arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT); - arm11_add_debug_INST(arm11, opcode, NULL, TAP_DRPAUSE); + arm11_add_debug_inst(arm11, opcode, NULL, TAP_DRPAUSE); - arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); struct scan_field chain5_fields[3]; - uint32_t Data; - uint8_t Ready; - uint8_t nRetry; + uint32_t _data; + uint8_t ready; + uint8_t n_retry; - arm11_setup_field(arm11, 32, &Data, NULL, chain5_fields + 0); - arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1); - arm11_setup_field(arm11, 1, NULL, &nRetry, chain5_fields + 2); + arm11_setup_field(arm11, 32, &_data, NULL, chain5_fields + 0); + arm11_setup_field(arm11, 1, NULL, &ready, chain5_fields + 1); + arm11_setup_field(arm11, 1, NULL, &n_retry, chain5_fields + 2); while (count--) { int i = 0; do { - Data = *data; + _data = *data; arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE( chain5_fields), chain5_fields, TAP_IDLE); CHECK_RETVAL(jtag_execute_queue()); - JTAG_DEBUG("DTR Ready %d nRetry %d", Ready, nRetry); + JTAG_DEBUG("DTR ready %d n_retry %d", ready, n_retry); int64_t then = 0; @@ -504,24 +504,24 @@ int arm11_run_instr_data_to_core(struct arm11_common *arm11, } i++; - } while (!Ready); + } while (!ready); data++; } - arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); int i = 0; do { - Data = 0; + _data = 0; arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE( chain5_fields), chain5_fields, TAP_DRPAUSE); CHECK_RETVAL(jtag_execute_queue()); - JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d", - (unsigned) Data, Ready, nRetry); + JTAG_DEBUG("DTR _data %08x ready %d n_retry %d", + (unsigned) _data, ready, n_retry); int64_t then = 0; @@ -535,7 +535,7 @@ int arm11_run_instr_data_to_core(struct arm11_common *arm11, } i++; - } while (!Ready); + } while (!ready); return ERROR_OK; } @@ -557,7 +557,7 @@ int arm11_run_instr_data_to_core(struct arm11_common *arm11, * https://lists.berlios.de/pipermail/openocd-development/2009-July/009698.html * https://lists.berlios.de/pipermail/openocd-development/2009-August/009865.html */ -static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] = { +static const tap_state_t arm11_move_drpause_idle_drpause_with_delay[] = { TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT }; @@ -581,26 +581,26 @@ static int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap, chain5_fields[2].out_value = NULL; chain5_fields[2].in_value = NULL; - uint8_t *Readies; - unsigned readiesNum = count; - unsigned bytes = sizeof(*Readies)*readiesNum; + uint8_t *readies; + unsigned readies_num = count; + unsigned bytes = sizeof(*readies)*readies_num; - Readies = malloc(bytes); - if (Readies == NULL) { + readies = malloc(bytes); + if (!readies) { LOG_ERROR("Out of memory allocating %u bytes", bytes); return ERROR_FAIL; } - uint8_t *ReadyPos = Readies; + uint8_t *ready_pos = readies; while (count--) { chain5_fields[0].out_value = (uint8_t *)(data++); - chain5_fields[1].in_value = ReadyPos++; + chain5_fields[1].in_value = ready_pos++; if (count > 0) { jtag_add_dr_scan(tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE); - jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay), - arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay); + jtag_add_pathmove(ARRAY_SIZE(arm11_move_drpause_idle_drpause_with_delay), + arm11_move_drpause_idle_drpause_with_delay); } else jtag_add_dr_scan(tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_IDLE); } @@ -609,18 +609,18 @@ static int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap, if (retval == ERROR_OK) { unsigned error_count = 0; - for (size_t i = 0; i < readiesNum; i++) { - if (Readies[i] != 1) + for (size_t i = 0; i < readies_num; i++) { + if (readies[i] != 1) error_count++; } if (error_count > 0) { LOG_ERROR("%u words out of %u not transferred", - error_count, readiesNum); + error_count, readies_num); retval = ERROR_FAIL; } } - free(Readies); + free(readies); return retval; } @@ -649,11 +649,11 @@ int arm11_run_instr_data_to_core_noack(struct arm11_common *arm11, uint32_t *data, size_t count) { - arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT); - arm11_add_debug_INST(arm11, opcode, NULL, TAP_DRPAUSE); + arm11_add_debug_inst(arm11, opcode, NULL, TAP_DRPAUSE); - arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); int retval = arm11_run_instr_data_to_core_noack_inner(arm11->arm.target->tap, opcode, @@ -663,7 +663,7 @@ int arm11_run_instr_data_to_core_noack(struct arm11_common *arm11, if (retval != ERROR_OK) return retval; - arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); struct scan_field chain5_fields[3]; @@ -740,21 +740,21 @@ int arm11_run_instr_data_from_core(struct arm11_common *arm11, uint32_t *data, size_t count) { - arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT); - arm11_add_debug_INST(arm11, opcode, NULL, TAP_IDLE); + arm11_add_debug_inst(arm11, opcode, NULL, TAP_IDLE); - arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); struct scan_field chain5_fields[3]; - uint32_t Data; - uint8_t Ready; - uint8_t nRetry; + uint32_t _data; + uint8_t ready; + uint8_t n_retry; - arm11_setup_field(arm11, 32, NULL, &Data, chain5_fields + 0); - arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1); - arm11_setup_field(arm11, 1, NULL, &nRetry, chain5_fields + 2); + arm11_setup_field(arm11, 32, NULL, &_data, chain5_fields + 0); + arm11_setup_field(arm11, 1, NULL, &ready, chain5_fields + 1); + arm11_setup_field(arm11, 1, NULL, &n_retry, chain5_fields + 2); while (count--) { int i = 0; @@ -765,8 +765,8 @@ int arm11_run_instr_data_from_core(struct arm11_common *arm11, CHECK_RETVAL(jtag_execute_queue()); - JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d", - (unsigned) Data, Ready, nRetry); + JTAG_DEBUG("DTR _data %08x ready %d n_retry %d", + (unsigned) _data, ready, n_retry); int64_t then = 0; @@ -781,9 +781,9 @@ int arm11_run_instr_data_from_core(struct arm11_common *arm11, } i++; - } while (!Ready); + } while (!ready); - *data++ = Data; + *data++ = _data; } return ERROR_OK; @@ -856,51 +856,51 @@ int arm11_sc7_run(struct arm11_common *arm11, struct arm11_sc7_action *actions, { int retval; - retval = arm11_add_debug_SCAN_N(arm11, 0x07, ARM11_TAP_DEFAULT); + retval = arm11_add_debug_scan_n(arm11, 0x07, ARM11_TAP_DEFAULT); if (retval != ERROR_OK) return retval; - arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); + arm11_add_ir(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT); struct scan_field chain7_fields[3]; - uint8_t nRW; - uint32_t DataOut; - uint8_t AddressOut; - uint8_t Ready; - uint32_t DataIn; - uint8_t AddressIn; + uint8_t n_rw; + uint32_t data_out; + uint8_t address_out; + uint8_t ready; + uint32_t data_in; + uint8_t address_in; - arm11_setup_field(arm11, 1, &nRW, &Ready, chain7_fields + 0); - arm11_setup_field(arm11, 32, &DataOut, &DataIn, chain7_fields + 1); - arm11_setup_field(arm11, 7, &AddressOut, &AddressIn, chain7_fields + 2); + arm11_setup_field(arm11, 1, &n_rw, &ready, chain7_fields + 0); + arm11_setup_field(arm11, 32, &data_out, &data_in, chain7_fields + 1); + arm11_setup_field(arm11, 7, &address_out, &address_in, chain7_fields + 2); for (size_t i = 0; i < count + 1; i++) { if (i < count) { - nRW = actions[i].write ? 1 : 0; - DataOut = actions[i].value; - AddressOut = actions[i].address; + n_rw = actions[i].write ? 1 : 0; + data_out = actions[i].value; + address_out = actions[i].address; } else { - nRW = 1; - DataOut = 0; - AddressOut = 0; + n_rw = 1; + data_out = 0; + address_out = 0; } /* Timeout here so we don't get stuck. */ int i_n = 0; while (1) { JTAG_DEBUG("SC7 <= c%-3d Data %08x %s", - (unsigned) AddressOut, - (unsigned) DataOut, - nRW ? "write" : "read"); + (unsigned) address_out, + (unsigned) data_out, + n_rw ? "write" : "read"); arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain7_fields), chain7_fields, TAP_DRPAUSE); CHECK_RETVAL(jtag_execute_queue()); - /* 'nRW' is 'Ready' on read out */ - if (Ready) + /* 'n_rw' is 'ready' on read out */ + if (ready) break; int64_t then = 0; @@ -918,17 +918,17 @@ int arm11_sc7_run(struct arm11_common *arm11, struct arm11_sc7_action *actions, i_n++; } - if (!nRW) - JTAG_DEBUG("SC7 => Data %08x", (unsigned) DataIn); + if (!n_rw) + JTAG_DEBUG("SC7 => Data %08x", (unsigned) data_in); if (i > 0) { - if (actions[i - 1].address != AddressIn) + if (actions[i - 1].address != address_in) LOG_WARNING("Scan chain 7 shifted out unexpected address"); if (!actions[i - 1].write) - actions[i - 1].value = DataIn; + actions[i - 1].value = data_in; else { - if (actions[i - 1].value != DataIn) + if (actions[i - 1].value != data_in) LOG_WARNING("Scan chain 7 shifted out unexpected data"); } } diff --git a/src/target/arm11_dbgtap.h b/src/target/arm11_dbgtap.h index be0248411..c6b20a895 100644 --- a/src/target/arm11_dbgtap.h +++ b/src/target/arm11_dbgtap.h @@ -27,12 +27,12 @@ void arm11_setup_field(struct arm11_common *arm11, int num_bits, void *in_data, void *out_data, struct scan_field *field); -void arm11_add_IR(struct arm11_common *arm11, +void arm11_add_ir(struct arm11_common *arm11, uint8_t instr, tap_state_t state); -int arm11_add_debug_SCAN_N(struct arm11_common *arm11, +int arm11_add_debug_scan_n(struct arm11_common *arm11, uint8_t chain, tap_state_t state); -int arm11_read_DSCR(struct arm11_common *arm11); -int arm11_write_DSCR(struct arm11_common *arm11, uint32_t dscr); +int arm11_read_dscr(struct arm11_common *arm11); +int arm11_write_dscr(struct arm11_common *arm11, uint32_t dscr); int arm11_run_instr_data_prepare(struct arm11_common *arm11); int arm11_run_instr_data_finish(struct arm11_common *arm11); diff --git a/src/target/arm720t.c b/src/target/arm720t.c index bff20a334..db75011cb 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -389,11 +389,11 @@ static void arm720t_deinit_target(struct target *target) /* FIXME remove forward decls */ static int arm720t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t *value); static int arm720t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t value); static int arm720t_init_arch_info(struct target *target, @@ -433,7 +433,7 @@ static int arm720t_target_create(struct target *target, Jim_Interp *interp) static int arm720t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t *value) { if (cpnum != 15) { @@ -443,14 +443,14 @@ static int arm720t_mrc(struct target *target, int cpnum, /* read "to" r0 */ return arm720t_read_cp15(target, - ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2), + ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2), value); } static int arm720t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t value) { if (cpnum != 15) { @@ -460,7 +460,7 @@ static int arm720t_mcr(struct target *target, int cpnum, /* write "from" r0 */ return arm720t_write_cp15(target, - ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2), + ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2), value); } diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 797f61c93..cf77a81a7 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -141,13 +141,13 @@ static int arm7_9_set_software_breakpoints(struct arm7_9_common *arm7_9) embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_VALUE], arm7_9->arm_bkpt); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK], 0x0); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK], 0xffffffffu); - embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], ~EICE_W_CTRL_nOPC & 0xff); + embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], ~EICE_W_CTRL_NOPC & 0xff); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], EICE_W_CTRL_ENABLE); } else if (arm7_9->sw_breakpoints_added == 2) { embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_DATA_VALUE], arm7_9->arm_bkpt); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_DATA_MASK], 0x0); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_ADDR_MASK], 0xffffffffu); - embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_MASK], ~EICE_W_CTRL_nOPC & 0xff); + embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_MASK], ~EICE_W_CTRL_NOPC & 0xff); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE], EICE_W_CTRL_ENABLE); } else { LOG_ERROR("BUG: both watchpoints used, but wp_available >= 1"); @@ -210,13 +210,13 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_VALUE], breakpoint->address); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK], mask); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK], 0xffffffffu); - embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], ~EICE_W_CTRL_nOPC & 0xff); + embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], ~EICE_W_CTRL_NOPC & 0xff); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], EICE_W_CTRL_ENABLE); } else if (breakpoint->set == 2) { embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_ADDR_VALUE], breakpoint->address); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_ADDR_MASK], mask); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_DATA_MASK], 0xffffffffu); - embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_MASK], ~EICE_W_CTRL_nOPC & 0xff); + embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_MASK], ~EICE_W_CTRL_NOPC & 0xff); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE], EICE_W_CTRL_ENABLE); } else { LOG_ERROR("BUG: no hardware comparator available"); @@ -484,9 +484,9 @@ static int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watch embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_VALUE], watchpoint->value); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], - 0xff & ~EICE_W_CTRL_nOPC & ~rw_mask); + 0xff & ~EICE_W_CTRL_NOPC & ~rw_mask); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], - EICE_W_CTRL_ENABLE | EICE_W_CTRL_nOPC | (watchpoint->rw & 1)); + EICE_W_CTRL_ENABLE | EICE_W_CTRL_NOPC | (watchpoint->rw & 1)); retval = jtag_execute_queue(); if (retval != ERROR_OK) @@ -503,9 +503,9 @@ static int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watch embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_DATA_VALUE], watchpoint->value); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_MASK], - 0xff & ~EICE_W_CTRL_nOPC & ~rw_mask); + 0xff & ~EICE_W_CTRL_NOPC & ~rw_mask); embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE], - EICE_W_CTRL_ENABLE | EICE_W_CTRL_nOPC | (watchpoint->rw & 1)); + EICE_W_CTRL_ENABLE | EICE_W_CTRL_NOPC | (watchpoint->rw & 1)); retval = jtag_execute_queue(); if (retval != ERROR_OK) @@ -933,7 +933,7 @@ int arm7_9_assert_reset(struct target *target) embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK], 0x3); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK], 0xffffffff); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], EICE_W_CTRL_ENABLE); - embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], ~EICE_W_CTRL_nOPC & 0xff); + embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], ~EICE_W_CTRL_NOPC & 0xff); } } @@ -1212,7 +1212,7 @@ int arm7_9_halt(struct target *target) embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], EICE_W_CTRL_ENABLE); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], - ~EICE_W_CTRL_nOPC & 0xff); + ~EICE_W_CTRL_NOPC & 0xff); } target->debug_reason = DBG_REASON_DBGRQ; @@ -1740,7 +1740,7 @@ int arm7_9_resume(struct target *target, struct breakpoint *breakpoint; breakpoint = breakpoint_find(target, buf_get_u32(arm->pc->value, 0, 32)); - if (breakpoint != NULL) { + if (breakpoint) { LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR " (id: %" PRIu32, breakpoint->address, breakpoint->unique_id); @@ -1873,14 +1873,14 @@ void arm7_9_enable_eice_step(struct target *target, uint32_t next_pc) embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], EICE_W_CTRL_ENABLE); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], - ~(EICE_W_CTRL_RANGE | EICE_W_CTRL_nOPC) & 0xff); + ~(EICE_W_CTRL_RANGE | EICE_W_CTRL_NOPC) & 0xff); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_ADDR_VALUE], current_pc); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_ADDR_MASK], 0); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_DATA_MASK], 0xffffffff); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE], 0x0); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_MASK], - ~EICE_W_CTRL_nOPC & 0xff); + ~EICE_W_CTRL_NOPC & 0xff); } else { embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK], 0xffffffff); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK], 0xffffffff); @@ -1892,7 +1892,7 @@ void arm7_9_enable_eice_step(struct target *target, uint32_t next_pc) embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE], EICE_W_CTRL_ENABLE); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_MASK], - ~EICE_W_CTRL_nOPC & 0xff); + ~EICE_W_CTRL_NOPC & 0xff); } } @@ -1932,7 +1932,7 @@ int arm7_9_step(struct target *target, int current, target_addr_t address, int h /* the front-end may request us not to handle breakpoints */ if (handle_breakpoints) breakpoint = breakpoint_find(target, current_pc); - if (breakpoint != NULL) { + if (breakpoint) { retval = arm7_9_unset_breakpoint(target, breakpoint); if (retval != ERROR_OK) return retval; @@ -2675,7 +2675,7 @@ int arm7_9_examine(struct target *target) struct reg_cache *t, **cache_p; t = embeddedice_build_reg_cache(target, arm7_9); - if (t == NULL) + if (!t) return ERROR_FAIL; cache_p = register_get_last_cache_p(&target->reg_cache); diff --git a/src/target/arm920t.c b/src/target/arm920t.c index a45dc6420..a6d626eee 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -799,11 +799,11 @@ int arm920t_soft_reset_halt(struct target *target) /* FIXME remove forward decls */ static int arm920t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t *value); static int arm920t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t value); static int arm920t_init_arch_info(struct target *target, @@ -873,7 +873,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) uint32_t cp15_ctrl, cp15_ctrl_saved; uint32_t regs[16]; uint32_t *regs_p[16]; - uint32_t C15_C_D_Ind, C15_C_I_Ind; + uint32_t c15_c_d_ind, c15_c_i_ind; int i; FILE *output; int segment, index_t; @@ -887,7 +887,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) return ERROR_COMMAND_SYNTAX_ERROR; output = fopen(CMD_ARGV[0], "w"); - if (output == NULL) { + if (!output) { LOG_DEBUG("error opening cache content file"); return ERROR_OK; } @@ -933,7 +933,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) /* read current victim */ arm920t_read_cp15_physical(target, - CP15PHYS_DCACHE_IDX, &C15_C_D_Ind); + CP15PHYS_DCACHE_IDX, &c15_c_d_ind); /* clear interpret mode */ cp15c15 &= ~0x1; @@ -992,7 +992,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) } /* Ra: r0 = index(31:26):SBZ(25:8):segment(7:5):SBZ(4:0) */ - regs[0] = 0x0 | (segment << 5) | (C15_C_D_Ind << 26); + regs[0] = 0x0 | (segment << 5) | (c15_c_d_ind << 26); arm9tdmi_write_core_regs(target, 0x1, regs); /* set interpret mode */ @@ -1034,7 +1034,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) /* read current victim */ arm920t_read_cp15_physical(target, CP15PHYS_ICACHE_IDX, - &C15_C_I_Ind); + &c15_c_i_ind); /* clear interpret mode */ cp15c15 &= ~0x1; @@ -1092,7 +1092,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) } /* Ra: r0 = index(31:26):SBZ(25:8):segment(7:5):SBZ(4:0) */ - regs[0] = 0x0 | (segment << 5) | (C15_C_D_Ind << 26); + regs[0] = 0x0 | (segment << 5) | (c15_c_d_ind << 26); arm9tdmi_write_core_regs(target, 0x1, regs); /* set interpret mode */ @@ -1156,7 +1156,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) uint32_t *regs_p[16]; int i; FILE *output; - uint32_t Dlockdown, Ilockdown; + uint32_t d_lockdown, i_lockdown; struct arm920t_tlb_entry d_tlb[64], i_tlb[64]; int victim; struct reg *r; @@ -1169,7 +1169,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) return ERROR_COMMAND_SYNTAX_ERROR; output = fopen(CMD_ARGV[0], "w"); - if (output == NULL) { + if (!output) { LOG_DEBUG("error opening mmu content file"); return ERROR_OK; } @@ -1213,13 +1213,13 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) retval = jtag_execute_queue(); if (retval != ERROR_OK) return retval; - Dlockdown = regs[1]; + d_lockdown = regs[1]; for (victim = 0; victim < 64; victim += 8) { /* new lockdown value: base[31:26]:victim[25:20]:SBZ[19:1]:p[0] * base remains unchanged, victim goes through entries 0 to 63 */ - regs[1] = (Dlockdown & 0xfc000000) | (victim << 20); + regs[1] = (d_lockdown & 0xfc000000) | (victim << 20); arm9tdmi_write_core_regs(target, 0x2, regs); /* set interpret mode */ @@ -1256,7 +1256,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) /* new lockdown value: base[31:26]:victim[25:20]:SBZ[19:1]:p[0] * base remains unchanged, victim goes through entries 0 to 63 */ - regs[1] = (Dlockdown & 0xfc000000) | (victim << 20); + regs[1] = (d_lockdown & 0xfc000000) | (victim << 20); arm9tdmi_write_core_regs(target, 0x2, regs); /* set interpret mode */ @@ -1292,7 +1292,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) } /* restore D TLB lockdown */ - regs[1] = Dlockdown; + regs[1] = d_lockdown; arm9tdmi_write_core_regs(target, 0x2, regs); /* Write D TLB lockdown */ @@ -1319,13 +1319,13 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) retval = jtag_execute_queue(); if (retval != ERROR_OK) return retval; - Ilockdown = regs[1]; + i_lockdown = regs[1]; for (victim = 0; victim < 64; victim += 8) { /* new lockdown value: base[31:26]:victim[25:20]:SBZ[19:1]:p[0] * base remains unchanged, victim goes through entries 0 to 63 */ - regs[1] = (Ilockdown & 0xfc000000) | (victim << 20); + regs[1] = (i_lockdown & 0xfc000000) | (victim << 20); arm9tdmi_write_core_regs(target, 0x2, regs); /* set interpret mode */ @@ -1362,7 +1362,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) /* new lockdown value: base[31:26]:victim[25:20]:SBZ[19:1]:p[0] * base remains unchanged, victim goes through entries 0 to 63 */ - regs[1] = (Dlockdown & 0xfc000000) | (victim << 20); + regs[1] = (d_lockdown & 0xfc000000) | (victim << 20); arm9tdmi_write_core_regs(target, 0x2, regs); /* set interpret mode */ @@ -1398,7 +1398,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) } /* restore I TLB lockdown */ - regs[1] = Ilockdown; + regs[1] = i_lockdown; arm9tdmi_write_core_regs(target, 0x2, regs); /* Write I TLB lockdown */ @@ -1528,7 +1528,7 @@ COMMAND_HANDLER(arm920t_handle_cache_info_command) static int arm920t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t *value) { if (cpnum != 15) { @@ -1538,13 +1538,13 @@ static int arm920t_mrc(struct target *target, int cpnum, /* read "to" r0 */ return arm920t_read_cp15_interpreted(target, - ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2), + ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2), 0, value); } static int arm920t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t value) { if (cpnum != 15) { @@ -1554,7 +1554,7 @@ static int arm920t_mcr(struct target *target, int cpnum, /* write "from" r0 */ return arm920t_write_cp15_interpreted(target, - ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2), + ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2), 0, value); } diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c index 21fd6897e..ea0927be6 100644 --- a/src/target/arm926ejs.c +++ b/src/target/arm926ejs.c @@ -46,15 +46,15 @@ #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -#define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, CRn, CRm) ((opcode_1 << 11) | (opcode_2 << 8) | (CRn << 4) | (CRm << 0)) +#define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, crn, crm) ((opcode_1 << 11) | (opcode_2 << 8) | (crn << 4) | (crm << 0)) static int arm926ejs_cp15_read(struct target *target, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, uint32_t *value) + uint32_t crn, uint32_t crm, uint32_t *value) { int retval = ERROR_OK; struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct arm_jtag *jtag_info = &arm7_9->jtag_info; - uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm); + uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, crn, crm); struct scan_field fields[4]; uint8_t address_buf[2] = {0, 0}; uint8_t nr_w_buf = 0; @@ -123,22 +123,22 @@ static int arm926ejs_cp15_read(struct target *target, uint32_t op1, uint32_t op2 } static int arm926ejs_mrc(struct target *target, int cpnum, uint32_t op1, - uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) + uint32_t op2, uint32_t crn, uint32_t crm, uint32_t *value) { if (cpnum != 15) { LOG_ERROR("Only cp15 is supported"); return ERROR_FAIL; } - return arm926ejs_cp15_read(target, op1, op2, CRn, CRm, value); + return arm926ejs_cp15_read(target, op1, op2, crn, crm, value); } static int arm926ejs_cp15_write(struct target *target, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, uint32_t value) + uint32_t crn, uint32_t crm, uint32_t value) { int retval = ERROR_OK; struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct arm_jtag *jtag_info = &arm7_9->jtag_info; - uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm); + uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, crn, crm); struct scan_field fields[4]; uint8_t value_buf[4]; uint8_t address_buf[2] = {0, 0}; @@ -206,13 +206,13 @@ static int arm926ejs_cp15_write(struct target *target, uint32_t op1, uint32_t op } static int arm926ejs_mcr(struct target *target, int cpnum, uint32_t op1, - uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) + uint32_t op2, uint32_t crn, uint32_t crm, uint32_t value) { if (cpnum != 15) { LOG_ERROR("Only cp15 is supported"); return ERROR_FAIL; } - return arm926ejs_cp15_write(target, op1, op2, CRn, CRm, value); + return arm926ejs_cp15_write(target, op1, op2, crn, crm, value); } static int arm926ejs_examine_debug_reason(struct target *target) diff --git a/src/target/arm926ejs.h b/src/target/arm926ejs.h index d4fd0cb6e..0cd523af9 100644 --- a/src/target/arm926ejs.h +++ b/src/target/arm926ejs.h @@ -29,9 +29,9 @@ struct arm926ejs_common { uint32_t common_magic; struct armv4_5_mmu_common armv4_5_mmu; int (*read_cp15)(struct target *target, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, uint32_t *value); + uint32_t crn, uint32_t crm, uint32_t *value); int (*write_cp15)(struct target *target, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, uint32_t value); + uint32_t crn, uint32_t crm, uint32_t value); uint32_t cp15_control_reg; uint32_t d_fsr; uint32_t i_fsr; diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 35d686e29..c29554239 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -13,6 +13,8 @@ * Copyright (C) 2013 by Andreas Fritiofson * * andreas.fritiofson@gmail.com * * * + * Copyright (C) 2019-2021, Ampere Computing LLC * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -86,7 +88,7 @@ uint32_t tar_block_size(uint32_t address) Return the largest block starting at address that does not cross a tar block size alignment boundary */ -static uint32_t max_tar_block_size(uint32_t tar_autoincr_block, uint32_t address) +static uint32_t max_tar_block_size(uint32_t tar_autoincr_block, target_addr_t address) { return tar_autoincr_block - ((tar_autoincr_block - 1) & address); } @@ -113,11 +115,16 @@ static int mem_ap_setup_csw(struct adiv5_ap *ap, uint32_t csw) return ERROR_OK; } -static int mem_ap_setup_tar(struct adiv5_ap *ap, uint32_t tar) +static int mem_ap_setup_tar(struct adiv5_ap *ap, target_addr_t tar) { if (!ap->tar_valid || tar != ap->tar_value) { /* LOG_DEBUG("DAP: Set TAR %x",tar); */ - int retval = dap_queue_ap_write(ap, MEM_AP_REG_TAR, tar); + int retval = dap_queue_ap_write(ap, MEM_AP_REG_TAR, (uint32_t)(tar & 0xffffffffUL)); + if (retval == ERROR_OK && is_64bit_ap(ap)) { + /* See if bits 63:32 of tar is different from last setting */ + if ((ap->tar_value >> 32) != (tar >> 32)) + retval = dap_queue_ap_write(ap, MEM_AP_REG_TAR64, (uint32_t)(tar >> 32)); + } if (retval != ERROR_OK) { ap->tar_valid = false; return retval; @@ -128,9 +135,15 @@ static int mem_ap_setup_tar(struct adiv5_ap *ap, uint32_t tar) return ERROR_OK; } -static int mem_ap_read_tar(struct adiv5_ap *ap, uint32_t *tar) +static int mem_ap_read_tar(struct adiv5_ap *ap, target_addr_t *tar) { - int retval = dap_queue_ap_read(ap, MEM_AP_REG_TAR, tar); + uint32_t lower; + uint32_t upper = 0; + + int retval = dap_queue_ap_read(ap, MEM_AP_REG_TAR, &lower); + if (retval == ERROR_OK && is_64bit_ap(ap)) + retval = dap_queue_ap_read(ap, MEM_AP_REG_TAR64, &upper); + if (retval != ERROR_OK) { ap->tar_valid = false; return retval; @@ -142,6 +155,8 @@ static int mem_ap_read_tar(struct adiv5_ap *ap, uint32_t *tar) return retval; } + *tar = (((target_addr_t)upper) << 32) | (target_addr_t)lower; + ap->tar_value = *tar; ap->tar_valid = true; return ERROR_OK; @@ -198,7 +213,7 @@ static void mem_ap_update_tar_cache(struct adiv5_ap *ap) * * @return ERROR_OK if the transaction was properly queued, else a fault code. */ -static int mem_ap_setup_transfer(struct adiv5_ap *ap, uint32_t csw, uint32_t tar) +static int mem_ap_setup_transfer(struct adiv5_ap *ap, uint32_t csw, target_addr_t tar) { int retval; retval = mem_ap_setup_csw(ap, csw); @@ -221,7 +236,7 @@ static int mem_ap_setup_transfer(struct adiv5_ap *ap, uint32_t csw, uint32_t tar * * @return ERROR_OK for success. Otherwise a fault code. */ -int mem_ap_read_u32(struct adiv5_ap *ap, uint32_t address, +int mem_ap_read_u32(struct adiv5_ap *ap, target_addr_t address, uint32_t *value) { int retval; @@ -231,7 +246,7 @@ int mem_ap_read_u32(struct adiv5_ap *ap, uint32_t address, */ retval = mem_ap_setup_transfer(ap, CSW_32BIT | (ap->csw_value & CSW_ADDRINC_MASK), - address & 0xFFFFFFF0); + address & 0xFFFFFFFFFFFFFFF0ull); if (retval != ERROR_OK) return retval; @@ -250,7 +265,7 @@ int mem_ap_read_u32(struct adiv5_ap *ap, uint32_t address, * @return ERROR_OK for success; *value holds the result. * Otherwise a fault code. */ -int mem_ap_read_atomic_u32(struct adiv5_ap *ap, uint32_t address, +int mem_ap_read_atomic_u32(struct adiv5_ap *ap, target_addr_t address, uint32_t *value) { int retval; @@ -273,7 +288,7 @@ int mem_ap_read_atomic_u32(struct adiv5_ap *ap, uint32_t address, * * @return ERROR_OK for success. Otherwise a fault code. */ -int mem_ap_write_u32(struct adiv5_ap *ap, uint32_t address, +int mem_ap_write_u32(struct adiv5_ap *ap, target_addr_t address, uint32_t value) { int retval; @@ -283,7 +298,7 @@ int mem_ap_write_u32(struct adiv5_ap *ap, uint32_t address, */ retval = mem_ap_setup_transfer(ap, CSW_32BIT | (ap->csw_value & CSW_ADDRINC_MASK), - address & 0xFFFFFFF0); + address & 0xFFFFFFFFFFFFFFF0ull); if (retval != ERROR_OK) return retval; @@ -302,7 +317,7 @@ int mem_ap_write_u32(struct adiv5_ap *ap, uint32_t address, * * @return ERROR_OK for success; the data was written. Otherwise a fault code. */ -int mem_ap_write_atomic_u32(struct adiv5_ap *ap, uint32_t address, +int mem_ap_write_atomic_u32(struct adiv5_ap *ap, target_addr_t address, uint32_t value) { int retval = mem_ap_write_u32(ap, address, value); @@ -326,13 +341,13 @@ int mem_ap_write_atomic_u32(struct adiv5_ap *ap, uint32_t address, * @return ERROR_OK on success, otherwise an error code. */ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t size, uint32_t count, - uint32_t address, bool addrinc) + target_addr_t address, bool addrinc) { struct adiv5_dap *dap = ap->dap; size_t nbytes = size * count; const uint32_t csw_addrincr = addrinc ? CSW_ADDRINC_SINGLE : CSW_ADDRINC_OFF; uint32_t csw_size; - uint32_t addr_xor; + target_addr_t addr_xor; int retval = ERROR_OK; /* TI BE-32 Quirks mode: @@ -433,9 +448,9 @@ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t siz retval = dap_run(dap); if (retval != ERROR_OK) { - uint32_t tar; + target_addr_t tar; if (mem_ap_read_tar(ap, &tar) == ERROR_OK) - LOG_ERROR("Failed to write memory at 0x%08"PRIx32, tar); + LOG_ERROR("Failed to write memory at " TARGET_ADDR_FMT, tar); else LOG_ERROR("Failed to write memory and, additionally, failed to find out where"); } @@ -456,13 +471,13 @@ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t siz * @return ERROR_OK on success, otherwise an error code. */ static int mem_ap_read(struct adiv5_ap *ap, uint8_t *buffer, uint32_t size, uint32_t count, - uint32_t adr, bool addrinc) + target_addr_t adr, bool addrinc) { struct adiv5_dap *dap = ap->dap; size_t nbytes = size * count; const uint32_t csw_addrincr = addrinc ? CSW_ADDRINC_SINGLE : CSW_ADDRINC_OFF; uint32_t csw_size; - uint32_t address = adr; + target_addr_t address = adr; int retval = ERROR_OK; /* TI BE-32 Quirks mode: @@ -490,7 +505,7 @@ static int mem_ap_read(struct adiv5_ap *ap, uint8_t *buffer, uint32_t size, uint uint32_t *read_buf = calloc(count, sizeof(uint32_t)); /* Multiplication count * sizeof(uint32_t) may overflow, calloc() is safe */ uint32_t *read_ptr = read_buf; - if (read_buf == NULL) { + if (!read_buf) { LOG_ERROR("Failed to allocate read buffer"); return ERROR_FAIL; } @@ -538,10 +553,10 @@ static int mem_ap_read(struct adiv5_ap *ap, uint8_t *buffer, uint32_t size, uint /* If something failed, read TAR to find out how much data was successfully read, so we can * at least give the caller what we have. */ if (retval != ERROR_OK) { - uint32_t tar; + target_addr_t tar; if (mem_ap_read_tar(ap, &tar) == ERROR_OK) { /* TAR is incremented after failed transfer on some devices (eg Cortex-M4) */ - LOG_ERROR("Failed to read memory at 0x%08"PRIx32, tar); + LOG_ERROR("Failed to read memory at " TARGET_ADDR_FMT, tar); if (nbytes > tar - address) nbytes = tar - address; } else { @@ -594,25 +609,25 @@ static int mem_ap_read(struct adiv5_ap *ap, uint8_t *buffer, uint32_t size, uint } int mem_ap_read_buf(struct adiv5_ap *ap, - uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address) + uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address) { return mem_ap_read(ap, buffer, size, count, address, true); } int mem_ap_write_buf(struct adiv5_ap *ap, - const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address) + const uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address) { return mem_ap_write(ap, buffer, size, count, address, true); } int mem_ap_read_buf_noincr(struct adiv5_ap *ap, - uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address) + uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address) { return mem_ap_read(ap, buffer, size, count, address, false); } int mem_ap_write_buf_noincr(struct adiv5_ap *ap, - const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address) + const uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address) { return mem_ap_write(ap, buffer, size, count, address, false); } @@ -633,7 +648,7 @@ void dap_invalidate_cache(struct adiv5_dap *dap) dap->last_read = NULL; int i; - for (i = 0; i <= 255; i++) { + for (i = 0; i <= DP_APSEL_MAX; i++) { /* force csw and tar write on the next mem-ap access */ dap->ap[i].tar_valid = false; dap->ap[i].csw_value = 0; @@ -761,6 +776,17 @@ int mem_ap_init(struct adiv5_ap *ap) int retval; struct adiv5_dap *dap = ap->dap; + /* Set ap->cfg_reg before calling mem_ap_setup_transfer(). */ + /* mem_ap_setup_transfer() needs to know if the MEM_AP supports LPAE. */ + retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG, &cfg); + if (retval != ERROR_OK) + return retval; + + retval = dap_run(dap); + if (retval != ERROR_OK) + return retval; + + ap->cfg_reg = cfg; ap->tar_valid = false; ap->csw_value = 0; /* force csw and tar write */ retval = mem_ap_setup_transfer(ap, CSW_8BIT | CSW_ADDRINC_PACKED, 0); @@ -771,10 +797,6 @@ int mem_ap_init(struct adiv5_ap *ap) if (retval != ERROR_OK) return retval; - retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG, &cfg); - if (retval != ERROR_OK) - return retval; - retval = dap_run(dap); if (retval != ERROR_OK) return retval; @@ -801,7 +823,7 @@ int mem_ap_init(struct adiv5_ap *ap) ap->unaligned_access_bad = dap->ti_be_32_quirks; LOG_DEBUG("MEM_AP CFG: large data %d, long address %d, big-endian %d", - !!(cfg & 0x04), !!(cfg & 0x02), !!(cfg & 0x01)); + !!(cfg & MEM_AP_REG_CFG_LD), !!(cfg & MEM_AP_REG_CFG_LA), !!(cfg & MEM_AP_REG_CFG_BE)); return ERROR_OK; } @@ -843,15 +865,30 @@ int dap_to_jtag(struct adiv5_dap *dap) return dap_send_sequence(dap, SWD_TO_JTAG); } -/* CID interpretation -- see ARM IHI 0029B section 3 - * and ARM IHI 0031A table 13-3. +/* CID interpretation -- see ARM IHI 0029E table B2-7 + * and ARM IHI 0031E table D1-2. + * + * From 2009/11/25 commit 21378f58b604: + * "OptimoDE DESS" is ARM's semicustom DSPish stuff. + * Let's keep it as is, for the time being */ static const char *class_description[16] = { - "Reserved", "ROM table", "Reserved", "Reserved", - "Reserved", "Reserved", "Reserved", "Reserved", - "Reserved", "CoreSight component", "Reserved", "Peripheral Test Block", - "Reserved", "OptimoDE DESS", - "Generic IP component", "PrimeCell or System component" + [0x0] = "Generic verification component", + [0x1] = "ROM table", + [0x2] = "Reserved", + [0x3] = "Reserved", + [0x4] = "Reserved", + [0x5] = "Reserved", + [0x6] = "Reserved", + [0x7] = "Reserved", + [0x8] = "Reserved", + [0x9] = "CoreSight component", + [0xA] = "Reserved", + [0xB] = "Peripheral Test Block", + [0xC] = "Reserved", + [0xD] = "OptimoDE DESS", /* see above */ + [0xE] = "Generic IP component", + [0xF] = "CoreLink, PrimeCell or System component", }; static bool is_dap_cid_ok(uint32_t cid) @@ -918,46 +955,64 @@ int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, struct adiv5_a } int dap_get_debugbase(struct adiv5_ap *ap, - uint32_t *dbgbase, uint32_t *apid) + target_addr_t *dbgbase, uint32_t *apid) { struct adiv5_dap *dap = ap->dap; int retval; + uint32_t baseptr_upper, baseptr_lower; - retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE, dbgbase); + if (ap->cfg_reg == MEM_AP_REG_CFG_INVALID) { + retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG, &ap->cfg_reg); + if (retval != ERROR_OK) + return retval; + } + retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE, &baseptr_lower); if (retval != ERROR_OK) return retval; retval = dap_queue_ap_read(ap, AP_REG_IDR, apid); if (retval != ERROR_OK) return retval; + /* MEM_AP_REG_BASE64 is defined as 'RES0'; can be read and then ignored on 32 bits AP */ + if (ap->cfg_reg == MEM_AP_REG_CFG_INVALID || is_64bit_ap(ap)) { + retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE64, &baseptr_upper); + if (retval != ERROR_OK) + return retval; + } + retval = dap_run(dap); if (retval != ERROR_OK) return retval; + if (!is_64bit_ap(ap)) + baseptr_upper = 0; + *dbgbase = (((target_addr_t)baseptr_upper) << 32) | baseptr_lower; + return ERROR_OK; } int dap_lookup_cs_component(struct adiv5_ap *ap, - uint32_t dbgbase, uint8_t type, uint32_t *addr, int32_t *idx) + target_addr_t dbgbase, uint8_t type, target_addr_t *addr, int32_t *idx) { - uint32_t romentry, entry_offset = 0, component_base, devtype; + uint32_t romentry, entry_offset = 0, devtype; + target_addr_t component_base; int retval; + dbgbase &= 0xFFFFFFFFFFFFF000ull; *addr = 0; do { - retval = mem_ap_read_atomic_u32(ap, (dbgbase&0xFFFFF000) | + retval = mem_ap_read_atomic_u32(ap, dbgbase | entry_offset, &romentry); if (retval != ERROR_OK) return retval; - component_base = (dbgbase & 0xFFFFF000) - + (romentry & 0xFFFFF000); + component_base = dbgbase + (target_addr_t)(romentry & 0xFFFFF000); if (romentry & 0x1) { uint32_t c_cid1; retval = mem_ap_read_atomic_u32(ap, component_base | 0xff4, &c_cid1); if (retval != ERROR_OK) { - LOG_ERROR("Can't read component with base address 0x%" PRIx32 + LOG_ERROR("Can't read component with base address " TARGET_ADDR_FMT ", the corresponding core might be turned off", component_base); return retval; } @@ -970,9 +1025,7 @@ int dap_lookup_cs_component(struct adiv5_ap *ap, return retval; } - retval = mem_ap_read_atomic_u32(ap, - (component_base & 0xfffff000) | 0xfcc, - &devtype); + retval = mem_ap_read_atomic_u32(ap, component_base | 0xfcc, &devtype); if (retval != ERROR_OK) return retval; if ((devtype & 0xff) == type) { @@ -984,7 +1037,7 @@ int dap_lookup_cs_component(struct adiv5_ap *ap, } } entry_offset += 4; - } while (romentry > 0); + } while ((romentry > 0) && (entry_offset < 0xf00)); if (!*addr) return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; @@ -992,10 +1045,10 @@ int dap_lookup_cs_component(struct adiv5_ap *ap, return ERROR_OK; } -static int dap_read_part_id(struct adiv5_ap *ap, uint32_t component_base, uint32_t *cid, uint64_t *pid) +static int dap_read_part_id(struct adiv5_ap *ap, target_addr_t component_base, uint32_t *cid, uint64_t *pid) { assert((component_base & 0xFFF) == 0); - assert(ap != NULL && cid != NULL && pid != NULL); + assert(ap && cid && pid); uint32_t cid0, cid1, cid2, cid3; uint32_t pid0, pid1, pid2, pid3, pid4; @@ -1070,7 +1123,7 @@ static int dap_read_part_id(struct adiv5_ap *ap, uint32_t component_base, uint32 #define ANY_ID 0x1000 -#define ARM_ID 0x4BB +#define ARM_ID 0x23B static const struct { uint16_t designer_id; @@ -1105,6 +1158,7 @@ static const struct { { ARM_ID, 0x4c7, "Cortex-M7 PPB ROM", "(Private Peripheral Bus ROM Table)", }, { ARM_ID, 0x4c8, "Cortex-M7 ROM", "(ROM Table)", }, { ARM_ID, 0x4e0, "Cortex-A35 ROM", "(v7 Memory Map ROM Table)", }, + { ARM_ID, 0x4e4, "Cortex-A76 ROM", "(ROM Table)", }, { ARM_ID, 0x906, "CoreSight CTI", "(Cross Trigger)", }, { ARM_ID, 0x907, "CoreSight ETB", "(Trace Buffer)", }, { ARM_ID, 0x908, "CoreSight CSTF", "(Trace Funnel)", }, @@ -1161,25 +1215,30 @@ static const struct { { ARM_ID, 0xd04, "Cortex-A35 Debug", "(Debug Unit)", }, { ARM_ID, 0xd07, "Cortex-A57 Debug", "(Debug Unit)", }, { ARM_ID, 0xd08, "Cortex-A72 Debug", "(Debug Unit)", }, - { 0x097, 0x9af, "MSP432 ROM", "(ROM Table)" }, - { 0x09f, 0xcd0, "Atmel CPU with DSU", "(CPU)" }, - { 0x0c1, 0x1db, "XMC4500 ROM", "(ROM Table)" }, - { 0x0c1, 0x1df, "XMC4700/4800 ROM", "(ROM Table)" }, - { 0x0c1, 0x1ed, "XMC1000 ROM", "(ROM Table)" }, - { 0x0E5, 0x000, "SHARC+/Blackfin+", "", }, - { 0x0F0, 0x440, "Qualcomm QDSS Component v1", "(Qualcomm Designed CoreSight Component v1)", }, - { 0x3eb, 0x181, "Tegra 186 ROM", "(ROM Table)", }, - { 0x3eb, 0x202, "Denver ETM", "(Denver Embedded Trace)", }, - { 0x3eb, 0x211, "Tegra 210 ROM", "(ROM Table)", }, - { 0x3eb, 0x302, "Denver Debug", "(Debug Unit)", }, - { 0x3eb, 0x402, "Denver PMU", "(Performance Monitor Unit)", }, + { ARM_ID, 0xd0b, "Cortex-A76 Debug", "(Debug Unit)", }, + { 0x017, 0x9af, "MSP432 ROM", "(ROM Table)" }, + { 0x01f, 0xcd0, "Atmel CPU with DSU", "(CPU)" }, + { 0x041, 0x1db, "XMC4500 ROM", "(ROM Table)" }, + { 0x041, 0x1df, "XMC4700/4800 ROM", "(ROM Table)" }, + { 0x041, 0x1ed, "XMC1000 ROM", "(ROM Table)" }, + { 0x065, 0x000, "SHARC+/Blackfin+", "", }, + { 0x070, 0x440, "Qualcomm QDSS Component v1", "(Qualcomm Designed CoreSight Component v1)", }, + { 0x0bf, 0x100, "Brahma-B53 Debug", "(Debug Unit)", }, + { 0x0bf, 0x9d3, "Brahma-B53 PMU", "(Performance Monitor Unit)", }, + { 0x0bf, 0x4a1, "Brahma-B53 ROM", "(ROM Table)", }, + { 0x0bf, 0x721, "Brahma-B53 ROM", "(ROM Table)", }, + { 0x1eb, 0x181, "Tegra 186 ROM", "(ROM Table)", }, + { 0x1eb, 0x202, "Denver ETM", "(Denver Embedded Trace)", }, + { 0x1eb, 0x211, "Tegra 210 ROM", "(ROM Table)", }, + { 0x1eb, 0x302, "Denver Debug", "(Debug Unit)", }, + { 0x1eb, 0x402, "Denver PMU", "(Performance Monitor Unit)", }, /* legacy comment: 0x113: what? */ { ANY_ID, 0x120, "TI SDTI", "(System Debug Trace Interface)", }, /* from OMAP3 memmap */ { ANY_ID, 0x343, "TI DAPCTL", "", }, /* from OMAP3 memmap */ }; static int dap_rom_display(struct command_invocation *cmd, - struct adiv5_ap *ap, uint32_t dbgbase, int depth) + struct adiv5_ap *ap, target_addr_t dbgbase, int depth) { int retval; uint64_t pid; @@ -1194,8 +1253,8 @@ static int dap_rom_display(struct command_invocation *cmd, if (depth) snprintf(tabs, sizeof(tabs), "[L%02d] ", depth); - uint32_t base_addr = dbgbase & 0xFFFFF000; - command_print(cmd, "\t\tComponent base address 0x%08" PRIx32, base_addr); + target_addr_t base_addr = dbgbase & 0xFFFFFFFFFFFFF000ull; + command_print(cmd, "\t\tComponent base address " TARGET_ADDR_FMT, base_addr); retval = dap_read_part_id(ap, base_addr, &cid, &pid); if (retval != ERROR_OK) { @@ -1211,18 +1270,18 @@ static int dap_rom_display(struct command_invocation *cmd, /* component may take multiple 4K pages */ uint32_t size = (pid >> 36) & 0xf; if (size > 0) - command_print(cmd, "\t\tStart address 0x%08" PRIx32, (uint32_t)(base_addr - 0x1000 * size)); + command_print(cmd, "\t\tStart address " TARGET_ADDR_FMT, base_addr - 0x1000 * size); command_print(cmd, "\t\tPeripheral ID 0x%010" PRIx64, pid); uint8_t class = (cid >> 12) & 0xf; uint16_t part_num = pid & 0xfff; - uint16_t designer_id = ((pid >> 32) & 0xf) << 8 | ((pid >> 12) & 0xff); + uint16_t designer_id = ((pid >> 32) & 0xf) << 7 | ((pid >> 12) & 0x7f); - if (designer_id & 0x80) { + if (pid & 0x00080000) { /* JEP106 code */ command_print(cmd, "\t\tDesigner is 0x%03" PRIx16 ", %s", - designer_id, jep106_manufacturer(designer_id >> 8, designer_id & 0x7f)); + designer_id, jep106_manufacturer(designer_id)); } else { /* Legacy ASCII ID, clear invalid bits */ designer_id &= 0x7f; @@ -1271,8 +1330,8 @@ static int dap_rom_display(struct command_invocation *cmd, command_print(cmd, "\t%sROMTABLE[0x%x] = 0x%" PRIx32 "", tabs, entry_offset, romentry); if (romentry & 0x01) { - /* Recurse */ - retval = dap_rom_display(cmd, ap, base_addr + (romentry & 0xFFFFF000), depth + 1); + /* Recurse. "romentry" is signed */ + retval = dap_rom_display(cmd, ap, base_addr + (int32_t)(romentry & 0xFFFFF000), depth + 1); if (retval != ERROR_OK) return retval; } else if (romentry != 0) { @@ -1436,7 +1495,9 @@ int dap_info_command(struct command_invocation *cmd, struct adiv5_ap *ap) { int retval; - uint32_t dbgbase, apid; + uint32_t apid; + target_addr_t dbgbase; + target_addr_t dbgaddr; uint8_t mem_ap; /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */ @@ -1476,9 +1537,14 @@ int dap_info_command(struct command_invocation *cmd, */ mem_ap = (apid & IDR_CLASS) == AP_CLASS_MEM_AP; if (mem_ap) { - command_print(cmd, "MEM-AP BASE 0x%8.8" PRIx32, dbgbase); + if (is_64bit_ap(ap)) + dbgaddr = 0xFFFFFFFFFFFFFFFFull; + else + dbgaddr = 0xFFFFFFFFul; - if (dbgbase == 0xFFFFFFFF || (dbgbase & 0x3) == 0x2) { + command_print(cmd, "MEM-AP BASE " TARGET_ADDR_FMT, dbgbase); + + if (dbgbase == dbgaddr || (dbgbase & 0x3) == 0x2) { command_print(cmd, "\tNo ROM table present"); } else { if (dbgbase & 0x01) @@ -1486,7 +1552,7 @@ int dap_info_command(struct command_invocation *cmd, else command_print(cmd, "\tROM table in legacy format"); - dap_rom_display(cmd, ap, dbgbase & 0xFFFFF000, 0); + dap_rom_display(cmd, ap, dbgbase & 0xFFFFFFFFFFFFF000ull, 0); } } @@ -1613,7 +1679,7 @@ int adiv5_jim_configure(struct target *target, struct jim_getopt_info *goi) int e; pc = (struct adiv5_private_config *)target->private_config; - if (pc == NULL) { + if (!pc) { pc = calloc(1, sizeof(struct adiv5_private_config)); pc->ap_num = DP_APSEL_INVALID; target->private_config = pc; @@ -1641,10 +1707,10 @@ int adiv5_jim_configure(struct target *target, struct jim_getopt_info *goi) int adiv5_verify_config(struct adiv5_private_config *pc) { - if (pc == NULL) + if (!pc) return ERROR_FAIL; - if (pc->dap == NULL) + if (!pc->dap) return ERROR_FAIL; return ERROR_OK; @@ -1690,9 +1756,13 @@ COMMAND_HANDLER(handle_dap_info_command) COMMAND_HANDLER(dap_baseaddr_command) { struct adiv5_dap *dap = adiv5_get_dap(CMD_DATA); - uint32_t apsel, baseaddr; + uint32_t apsel, baseaddr_lower, baseaddr_upper; + struct adiv5_ap *ap; + target_addr_t baseaddr; int retval; + baseaddr_upper = 0; + switch (CMD_ARGC) { case 0: apsel = dap->apsel; @@ -1714,16 +1784,30 @@ COMMAND_HANDLER(dap_baseaddr_command) * though they're not common for now. This should * use the ID register to verify it's a MEM-AP. */ - retval = dap_queue_ap_read(dap_ap(dap, apsel), MEM_AP_REG_BASE, &baseaddr); - if (retval != ERROR_OK) - return retval; - retval = dap_run(dap); + + ap = dap_ap(dap, apsel); + retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE, &baseaddr_lower); + + if (retval == ERROR_OK && ap->cfg_reg == MEM_AP_REG_CFG_INVALID) + retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG, &ap->cfg_reg); + + if (retval == ERROR_OK && (ap->cfg_reg == MEM_AP_REG_CFG_INVALID || is_64bit_ap(ap))) { + /* MEM_AP_REG_BASE64 is defined as 'RES0'; can be read and then ignored on 32 bits AP */ + retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE64, &baseaddr_upper); + } + + if (retval == ERROR_OK) + retval = dap_run(dap); if (retval != ERROR_OK) return retval; - command_print(CMD, "0x%8.8" PRIx32, baseaddr); + if (is_64bit_ap(ap)) { + baseaddr = (((target_addr_t)baseaddr_upper) << 32) | baseaddr_lower; + command_print(CMD, "0x%016" PRIx64, baseaddr); + } else + command_print(CMD, "0x%08" PRIx32, baseaddr_lower); - return retval; + return ERROR_OK; } COMMAND_HANDLER(dap_memaccess_command) @@ -1885,8 +1969,25 @@ COMMAND_HANDLER(dap_apreg_command) ap->csw_value = value; break; case MEM_AP_REG_TAR: - ap->tar_valid = false; /* invalid, force write */ - retval = mem_ap_setup_tar(ap, value); + retval = dap_queue_ap_write(ap, reg, value); + if (retval == ERROR_OK) + ap->tar_value = (ap->tar_value & ~0xFFFFFFFFull) | value; + else { + /* To track independent writes to TAR and TAR64, two tar_valid flags */ + /* should be used. To keep it simple, tar_valid is only invalidated on a */ + /* write fail. This approach causes a later re-write of the TAR and TAR64 */ + /* if tar_valid is false. */ + ap->tar_valid = false; + } + break; + case MEM_AP_REG_TAR64: + retval = dap_queue_ap_write(ap, reg, value); + if (retval == ERROR_OK) + ap->tar_value = (ap->tar_value & 0xFFFFFFFFull) | (((target_addr_t)value) << 32); + else { + /* See above comment for the MEM_AP_REG_TAR failed write case */ + ap->tar_valid = false; + } break; default: retval = dap_queue_ap_write(ap, reg, value); diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h index ce9155ae7..73ceea03f 100644 --- a/src/target/arm_adi_v5.h +++ b/src/target/arm_adi_v5.h @@ -31,6 +31,7 @@ #include #include "arm_jtag.h" +#include "helper/bits.h" /* three-bit ACK values for SWD access (sent LSB first) */ #define SWD_ACK_OK 0x1 @@ -149,6 +150,11 @@ /* APB: initial value of csw_default */ #define CSW_APB_DEFAULT (CSW_DBGSWENABLE) +/* Fields of the MEM-AP's CFG register */ +#define MEM_AP_REG_CFG_BE BIT(0) +#define MEM_AP_REG_CFG_LA BIT(1) +#define MEM_AP_REG_CFG_LD BIT(2) +#define MEM_AP_REG_CFG_INVALID 0xFFFFFFF8 /* Fields of the MEM-AP's IDR register */ #define IDR_REV (0xFUL << 28) @@ -201,7 +207,7 @@ struct adiv5_ap { * configure the address being read or written * "-1" indicates no cached value. */ - uint32_t tar_value; + target_addr_t tar_value; /** * Configures how many extra tck clocks are added after starting a @@ -220,6 +226,9 @@ struct adiv5_ap { /* true if tar_value is in sync with TAR register */ bool tar_valid; + + /* MEM AP configuration register indicating LPAE support */ + uint32_t cfg_reg; }; @@ -359,6 +368,20 @@ enum ap_type { AP_TYPE_AHB5_AP = 0x5, /* AHB5 Memory-AP. */ }; +/* Check the ap->cfg_reg Long Address field (bit 1) + * + * 0b0: The AP only supports physical addresses 32 bits or smaller + * 0b1: The AP supports physical addresses larger than 32 bits + * + * @param ap The AP used for reading. + * + * @return true for 64 bit, false for 32 bit + */ +static inline bool is_64bit_ap(struct adiv5_ap *ap) +{ + return (ap->cfg_reg & MEM_AP_REG_CFG_LA) != 0; +} + /** * Send an adi-v5 sequence to the DAP. * @@ -370,7 +393,7 @@ enum ap_type { static inline int dap_send_sequence(struct adiv5_dap *dap, enum swd_special_seq seq) { - assert(dap->ops != NULL); + assert(dap->ops); return dap->ops->send_sequence(dap, seq); } @@ -389,7 +412,7 @@ static inline int dap_send_sequence(struct adiv5_dap *dap, static inline int dap_queue_dp_read(struct adiv5_dap *dap, unsigned reg, uint32_t *data) { - assert(dap->ops != NULL); + assert(dap->ops); return dap->ops->queue_dp_read(dap, reg, data); } @@ -407,7 +430,7 @@ static inline int dap_queue_dp_read(struct adiv5_dap *dap, static inline int dap_queue_dp_write(struct adiv5_dap *dap, unsigned reg, uint32_t data) { - assert(dap->ops != NULL); + assert(dap->ops); return dap->ops->queue_dp_write(dap, reg, data); } @@ -424,7 +447,7 @@ static inline int dap_queue_dp_write(struct adiv5_dap *dap, static inline int dap_queue_ap_read(struct adiv5_ap *ap, unsigned reg, uint32_t *data) { - assert(ap->dap->ops != NULL); + assert(ap->dap->ops); return ap->dap->ops->queue_ap_read(ap, reg, data); } @@ -440,7 +463,7 @@ static inline int dap_queue_ap_read(struct adiv5_ap *ap, static inline int dap_queue_ap_write(struct adiv5_ap *ap, unsigned reg, uint32_t data) { - assert(ap->dap->ops != NULL); + assert(ap->dap->ops); return ap->dap->ops->queue_ap_write(ap, reg, data); } @@ -457,7 +480,7 @@ static inline int dap_queue_ap_write(struct adiv5_ap *ap, */ static inline int dap_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack) { - assert(dap->ops != NULL); + assert(dap->ops); return dap->ops->queue_ap_abort(dap, ack); } @@ -473,13 +496,13 @@ static inline int dap_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack) */ static inline int dap_run(struct adiv5_dap *dap) { - assert(dap->ops != NULL); + assert(dap->ops); return dap->ops->run(dap); } static inline int dap_sync(struct adiv5_dap *dap) { - assert(dap->ops != NULL); + assert(dap->ops); if (dap->ops->sync) return dap->ops->sync(dap); return ERROR_OK; @@ -528,27 +551,27 @@ static inline int dap_dp_poll_register(struct adiv5_dap *dap, unsigned reg, /* Queued MEM-AP memory mapped single word transfers. */ int mem_ap_read_u32(struct adiv5_ap *ap, - uint32_t address, uint32_t *value); + target_addr_t address, uint32_t *value); int mem_ap_write_u32(struct adiv5_ap *ap, - uint32_t address, uint32_t value); + target_addr_t address, uint32_t value); /* Synchronous MEM-AP memory mapped single word transfers. */ int mem_ap_read_atomic_u32(struct adiv5_ap *ap, - uint32_t address, uint32_t *value); + target_addr_t address, uint32_t *value); int mem_ap_write_atomic_u32(struct adiv5_ap *ap, - uint32_t address, uint32_t value); + target_addr_t address, uint32_t value); /* Synchronous MEM-AP memory mapped bus block transfers. */ int mem_ap_read_buf(struct adiv5_ap *ap, - uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address); + uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address); int mem_ap_write_buf(struct adiv5_ap *ap, - const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address); + const uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address); /* Synchronous, non-incrementing buffer functions for accessing fifos. */ int mem_ap_read_buf_noincr(struct adiv5_ap *ap, - uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address); + uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address); int mem_ap_write_buf_noincr(struct adiv5_ap *ap, - const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address); + const uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address); /* Initialisation of the debug system, power domains and registers */ int dap_dp_init(struct adiv5_dap *dap); @@ -560,7 +583,7 @@ void dap_invalidate_cache(struct adiv5_dap *dap); /* Probe the AP for ROM Table location */ int dap_get_debugbase(struct adiv5_ap *ap, - uint32_t *dbgbase, uint32_t *apid); + target_addr_t *dbgbase, uint32_t *apid); /* Probe Access Ports to find a particular type */ int dap_find_ap(struct adiv5_dap *dap, @@ -574,7 +597,7 @@ static inline struct adiv5_ap *dap_ap(struct adiv5_dap *dap, uint8_t ap_num) /* Lookup CoreSight component */ int dap_lookup_cs_component(struct adiv5_ap *ap, - uint32_t dbgbase, uint8_t type, uint32_t *addr, int32_t *idx); + target_addr_t dbgbase, uint8_t type, target_addr_t *addr, int32_t *idx); struct target; diff --git a/src/target/arm_cti.c b/src/target/arm_cti.c index 30212cbf4..7d005e2b1 100644 --- a/src/target/arm_cti.c +++ b/src/target/arm_cti.c @@ -70,7 +70,7 @@ static int arm_cti_mod_reg_bits(struct arm_cti *self, unsigned int reg, uint32_t /* Read register */ int retval = mem_ap_read_atomic_u32(ap, self->spot.base + reg, &tmp); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* clear bitfield */ @@ -143,7 +143,7 @@ int arm_cti_read_reg(struct arm_cti *self, unsigned int reg, uint32_t *p_value) { struct adiv5_ap *ap = dap_ap(self->spot.dap, self->spot.ap_num); - if (p_value == NULL) + if (!p_value) return ERROR_COMMAND_ARGUMENT_INVALID; return mem_ap_read_atomic_u32(ap, self->spot.base + reg, p_value); @@ -456,7 +456,7 @@ static int cti_create(struct jim_getopt_info *goi) int e; cmd_ctx = current_command_context(goi->interp); - assert(cmd_ctx != NULL); + assert(cmd_ctx); if (goi->argc < 3) { Jim_WrongNumArgs(goi->interp, 1, goi->argv, "?name? ..options..."); @@ -474,7 +474,7 @@ static int cti_create(struct jim_getopt_info *goi) /* Create it */ cti = calloc(1, sizeof(*cti)); - if (cti == NULL) + if (!cti) return JIM_ERR; adiv5_mem_ap_spot_init(&cti->spot); @@ -508,7 +508,7 @@ static int cti_create(struct jim_getopt_info *goi) COMMAND_REGISTRATION_DONE }; e = register_commands_with_data(cmd_ctx, NULL, cti_commands, cti); - if (ERROR_OK != e) + if (e != ERROR_OK) return JIM_ERR; list_add_tail(&cti->lh, &all_cti); diff --git a/src/target/arm_dap.c b/src/target/arm_dap.c index 747733dc9..2f21aa170 100644 --- a/src/target/arm_dap.c +++ b/src/target/arm_dap.c @@ -57,6 +57,7 @@ static void dap_instance_init(struct adiv5_dap *dap) dap->ap[i].tar_autoincr_block = (1<<10); /* default CSW value */ dap->ap[i].csw_default = CSW_AHB_DEFAULT; + dap->ap[i].cfg_reg = MEM_AP_REG_CFG_INVALID; /* mem_ap configuration reg (large physical addr, etc.) */ } INIT_LIST_HEAD(&dap->cmd_journal); INIT_LIST_HEAD(&dap->cmd_pool); @@ -184,7 +185,7 @@ static int dap_configure(struct jim_getopt_info *goi, struct arm_dap_object *dap if (e != JIM_OK) return e; tap = jtag_tap_by_jim_obj(goi->interp, o_t); - if (tap == NULL) { + if (!tap) { Jim_SetResultString(goi->interp, "-chain-position is invalid", -1); return JIM_ERR; } @@ -199,7 +200,7 @@ static int dap_configure(struct jim_getopt_info *goi, struct arm_dap_object *dap } } - if (tap == NULL) { + if (!tap) { Jim_SetResultString(goi->interp, "-chain-position required when creating DAP", -1); return JIM_ERR; } @@ -220,7 +221,7 @@ static int dap_create(struct jim_getopt_info *goi) int e; cmd_ctx = current_command_context(goi->interp); - assert(cmd_ctx != NULL); + assert(cmd_ctx); if (goi->argc < 3) { Jim_WrongNumArgs(goi->interp, 1, goi->argv, "?name? ..options..."); @@ -238,7 +239,7 @@ static int dap_create(struct jim_getopt_info *goi) /* Create it */ dap = calloc(1, sizeof(struct arm_dap_object)); - if (dap == NULL) + if (!dap) return JIM_ERR; e = dap_configure(goi, dap); @@ -266,7 +267,7 @@ static int dap_create(struct jim_getopt_info *goi) dap_commands[0].chain = NULL; e = register_commands_with_data(cmd_ctx, NULL, dap_commands, dap); - if (ERROR_OK != e) + if (e != ERROR_OK) return JIM_ERR; list_add_tail(&dap->lh, &all_dap); @@ -314,7 +315,7 @@ COMMAND_HANDLER(handle_dap_info_command) struct adiv5_dap *dap = arm->dap; uint32_t apsel; - if (dap == NULL) { + if (!dap) { LOG_ERROR("DAP instance not available. Probably a HLA target..."); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 9b8c09e45..661859379 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -123,36 +123,36 @@ static int evaluate_pld(uint32_t opcode, { /* PLD */ if ((opcode & 0x0d30f000) == 0x0510f000) { - uint8_t Rn; - uint8_t U; + uint8_t rn; + uint8_t u; unsigned offset; instruction->type = ARM_PLD; - Rn = (opcode & 0xf0000) >> 16; - U = (opcode & 0x00800000) >> 23; - if (Rn == 0xf) { + rn = (opcode & 0xf0000) >> 16; + u = (opcode & 0x00800000) >> 23; + if (rn == 0xf) { /* literal */ offset = opcode & 0x0fff; snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tPLD %s%d", - address, opcode, U ? "" : "-", offset); + address, opcode, u ? "" : "-", offset); } else { - uint8_t I, R; + uint8_t i, r; - I = (opcode & 0x02000000) >> 25; - R = (opcode & 0x00400000) >> 22; + i = (opcode & 0x02000000) >> 25; + r = (opcode & 0x00400000) >> 22; - if (I) { + if (i) { /* register PLD{W} [,+/-{, }] */ offset = (opcode & 0x0F80) >> 7; - uint8_t Rm; - Rm = opcode & 0xf; + uint8_t rm; + rm = opcode & 0xf; if (offset == 0) { /* No shift */ snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tPLD%s [r%d, %sr%d]", - address, opcode, R ? "" : "W", Rn, U ? "" : "-", Rm); + address, opcode, r ? "" : "W", rn, u ? "" : "-", rm); } else { uint8_t shift; @@ -162,22 +162,22 @@ static int evaluate_pld(uint32_t opcode, /* LSL */ snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tPLD%s [r%d, %sr%d, LSL #0x%x)", - address, opcode, R ? "" : "W", Rn, U ? "" : "-", Rm, offset); + address, opcode, r ? "" : "W", rn, u ? "" : "-", rm, offset); } else if (shift == 0x1) { /* LSR */ snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tPLD%s [r%d, %sr%d, LSR #0x%x)", - address, opcode, R ? "" : "W", Rn, U ? "" : "-", Rm, offset); + address, opcode, r ? "" : "W", rn, u ? "" : "-", rm, offset); } else if (shift == 0x2) { /* ASR */ snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tPLD%s [r%d, %sr%d, ASR #0x%x)", - address, opcode, R ? "" : "W", Rn, U ? "" : "-", Rm, offset); + address, opcode, r ? "" : "W", rn, u ? "" : "-", rm, offset); } else if (shift == 0x3) { /* ROR */ snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tPLD%s [r%d, %sr%d, ROR #0x%x)", - address, opcode, R ? "" : "W", Rn, U ? "" : "-", Rm, offset); + address, opcode, r ? "" : "W", rn, u ? "" : "-", rm, offset); } } } else { @@ -186,11 +186,11 @@ static int evaluate_pld(uint32_t opcode, if (offset == 0) { snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tPLD%s [r%d]", - address, opcode, R ? "" : "W", Rn); + address, opcode, r ? "" : "W", rn); } else { snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tPLD%s [r%d, #%s%d]", - address, opcode, R ? "" : "W", Rn, U ? "" : "-", offset); + address, opcode, r ? "" : "W", rn, u ? "" : "-", offset); } } } @@ -349,13 +349,13 @@ static int evaluate_blx_imm(uint32_t opcode, static int evaluate_b_bl(uint32_t opcode, uint32_t address, struct arm_instruction *instruction) { - uint8_t L; + uint8_t l; uint32_t immediate; int offset; uint32_t target_address; immediate = opcode & 0x00ffffff; - L = (opcode & 0x01000000) >> 24; + l = (opcode & 0x01000000) >> 24; /* sign extend 24-bit immediate */ if (immediate & 0x00800000) @@ -368,7 +368,7 @@ static int evaluate_b_bl(uint32_t opcode, target_address = address + 8 + offset; - if (L) + if (l) instruction->type = ARM_BL; else instruction->type = ARM_B; @@ -378,7 +378,7 @@ static int evaluate_b_bl(uint32_t opcode, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tB%s%s 0x%8.8" PRIx32, address, opcode, - (L) ? "L" : "", + (l) ? "L" : "", COND(opcode), target_address); @@ -397,13 +397,13 @@ static int evaluate_ldc_stc_mcrr_mrrc(uint32_t opcode, /* MCRR or MRRC */ if (((opcode & 0x0ff00000) == 0x0c400000) || ((opcode & 0x0ff00000) == 0x0c500000)) { - uint8_t cp_opcode, Rd, Rn, CRm; + uint8_t cp_opcode, rd, rn, crm; char *mnemonic; cp_opcode = (opcode & 0xf0) >> 4; - Rd = (opcode & 0xf000) >> 12; - Rn = (opcode & 0xf0000) >> 16; - CRm = (opcode & 0xf); + rd = (opcode & 0xf000) >> 12; + rn = (opcode & 0xf0000) >> 16; + crm = (opcode & 0xf); /* MCRR */ if ((opcode & 0x0ff00000) == 0x0c400000) { @@ -424,15 +424,15 @@ static int evaluate_ldc_stc_mcrr_mrrc(uint32_t opcode, address, opcode, mnemonic, ((opcode & 0xf0000000) == 0xf0000000) ? "2" : COND(opcode), - COND(opcode), cp_num, cp_opcode, Rd, Rn, CRm); + COND(opcode), cp_num, cp_opcode, rd, rn, crm); } else {/* LDC or STC */ - uint8_t CRd, Rn, offset; - uint8_t U; + uint8_t crd, rn, offset; + uint8_t u; char *mnemonic; char addressing_mode[32]; - CRd = (opcode & 0xf000) >> 12; - Rn = (opcode & 0xf0000) >> 16; + crd = (opcode & 0xf000) >> 12; + rn = (opcode & 0xf0000) >> 16; offset = (opcode & 0xff) << 2; /* load/store */ @@ -444,21 +444,21 @@ static int evaluate_ldc_stc_mcrr_mrrc(uint32_t opcode, mnemonic = "STC"; } - U = (opcode & 0x00800000) >> 23; + u = (opcode & 0x00800000) >> 23; /* addressing modes */ if ((opcode & 0x01200000) == 0x01000000)/* offset */ snprintf(addressing_mode, 32, "[r%i, #%s%d]", - Rn, U ? "" : "-", offset); + rn, u ? "" : "-", offset); else if ((opcode & 0x01200000) == 0x01200000) /* pre-indexed */ snprintf(addressing_mode, 32, "[r%i, #%s%d]!", - Rn, U ? "" : "-", offset); + rn, u ? "" : "-", offset); else if ((opcode & 0x01200000) == 0x00200000) /* post-indexed */ snprintf(addressing_mode, 32, "[r%i], #%s%d", - Rn, U ? "" : "-", offset); + rn, u ? "" : "-", offset); else if ((opcode & 0x01200000) == 0x00000000) /* unindexed */ snprintf(addressing_mode, 32, "[r%i], {%d}", - Rn, offset >> 2); + rn, offset >> 2); snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 @@ -467,7 +467,7 @@ static int evaluate_ldc_stc_mcrr_mrrc(uint32_t opcode, ((opcode & 0xf0000000) == 0xf0000000) ? "2" : COND(opcode), (opcode & (1 << 22)) ? "L" : "", - cp_num, CRd, addressing_mode); + cp_num, crd, addressing_mode); } return ERROR_OK; @@ -481,13 +481,13 @@ static int evaluate_cdp_mcr_mrc(uint32_t opcode, { const char *cond; char *mnemonic; - uint8_t cp_num, opcode_1, CRd_Rd, CRn, CRm, opcode_2; + uint8_t cp_num, opcode_1, crd_rd, crn, crm, opcode_2; cond = ((opcode & 0xf0000000) == 0xf0000000) ? "2" : COND(opcode); cp_num = (opcode & 0xf00) >> 8; - CRd_Rd = (opcode & 0xf000) >> 12; - CRn = (opcode & 0xf0000) >> 16; - CRm = (opcode & 0xf); + crd_rd = (opcode & 0xf000) >> 12; + crn = (opcode & 0xf0000) >> 16; + crm = (opcode & 0xf); opcode_2 = (opcode & 0xe0) >> 5; /* CDP or MRC/MCR */ @@ -511,9 +511,9 @@ static int evaluate_cdp_mcr_mrc(uint32_t opcode, cond, cp_num, opcode_1, - CRd_Rd, - CRn, - CRm, + crd_rd, + crn, + crm, opcode_2); } else {/* bit 4 not set -> CDP */ instruction->type = ARM_CDP; @@ -530,9 +530,9 @@ static int evaluate_cdp_mcr_mrc(uint32_t opcode, cond, cp_num, opcode_1, - CRd_Rd, - CRn, - CRm, + crd_rd, + crn, + crm, opcode_2); } @@ -543,60 +543,60 @@ static int evaluate_cdp_mcr_mrc(uint32_t opcode, static int evaluate_load_store(uint32_t opcode, uint32_t address, struct arm_instruction *instruction) { - uint8_t I, P, U, B, W, L; - uint8_t Rn, Rd; + uint8_t i, p, u, b, w, l; + uint8_t rn, rd; char *operation;/* "LDR" or "STR" */ char *suffix; /* "", "B", "T", "BT" */ char offset[32]; /* examine flags */ - I = (opcode & 0x02000000) >> 25; - P = (opcode & 0x01000000) >> 24; - U = (opcode & 0x00800000) >> 23; - B = (opcode & 0x00400000) >> 22; - W = (opcode & 0x00200000) >> 21; - L = (opcode & 0x00100000) >> 20; + i = (opcode & 0x02000000) >> 25; + p = (opcode & 0x01000000) >> 24; + u = (opcode & 0x00800000) >> 23; + b = (opcode & 0x00400000) >> 22; + w = (opcode & 0x00200000) >> 21; + l = (opcode & 0x00100000) >> 20; /* target register */ - Rd = (opcode & 0xf000) >> 12; + rd = (opcode & 0xf000) >> 12; /* base register */ - Rn = (opcode & 0xf0000) >> 16; + rn = (opcode & 0xf0000) >> 16; - instruction->info.load_store.Rd = Rd; - instruction->info.load_store.Rn = Rn; - instruction->info.load_store.U = U; + instruction->info.load_store.rd = rd; + instruction->info.load_store.rn = rn; + instruction->info.load_store.u = u; /* determine operation */ - if (L) + if (l) operation = "LDR"; else operation = "STR"; /* determine instruction type and suffix */ - if (B) { - if ((P == 0) && (W == 1)) { - if (L) + if (b) { + if ((p == 0) && (w == 1)) { + if (l) instruction->type = ARM_LDRBT; else instruction->type = ARM_STRBT; suffix = "BT"; } else { - if (L) + if (l) instruction->type = ARM_LDRB; else instruction->type = ARM_STRB; suffix = "B"; } } else { - if ((P == 0) && (W == 1)) { - if (L) + if ((p == 0) && (w == 1)) { + if (l) instruction->type = ARM_LDRT; else instruction->type = ARM_STRT; suffix = "T"; } else { - if (L) + if (l) instruction->type = ARM_LDR; else instruction->type = ARM_STR; @@ -604,10 +604,10 @@ static int evaluate_load_store(uint32_t opcode, } } - if (!I) { /* #+- */ + if (!i) { /* #+- */ uint32_t offset_12 = (opcode & 0xfff); if (offset_12) - snprintf(offset, 32, ", #%s0x%" PRIx32 "", (U) ? "" : "-", offset_12); + snprintf(offset, 32, ", #%s0x%" PRIx32 "", (u) ? "" : "-", offset_12); else snprintf(offset, 32, "%s", ""); @@ -615,11 +615,11 @@ static int evaluate_load_store(uint32_t opcode, instruction->info.load_store.offset.offset = offset_12; } else {/* either +- or +-, , # */ uint8_t shift_imm, shift; - uint8_t Rm; + uint8_t rm; shift_imm = (opcode & 0xf80) >> 7; shift = (opcode & 0x60) >> 5; - Rm = (opcode & 0xf); + rm = (opcode & 0xf); /* LSR encodes a shift by 32 bit as 0x0 */ if ((shift == 0x1) && (shift_imm == 0x0)) @@ -634,35 +634,35 @@ static int evaluate_load_store(uint32_t opcode, shift = 0x4; instruction->info.load_store.offset_mode = 1; - instruction->info.load_store.offset.reg.Rm = Rm; + instruction->info.load_store.offset.reg.rm = rm; instruction->info.load_store.offset.reg.shift = shift; instruction->info.load_store.offset.reg.shift_imm = shift_imm; if ((shift_imm == 0x0) && (shift == 0x0)) /* +- */ - snprintf(offset, 32, ", %sr%i", (U) ? "" : "-", Rm); + snprintf(offset, 32, ", %sr%i", (u) ? "" : "-", rm); else { /* +-, , # */ switch (shift) { case 0x0: /* LSL */ - snprintf(offset, 32, ", %sr%i, LSL #0x%x", (U) ? "" : "-", Rm, shift_imm); + snprintf(offset, 32, ", %sr%i, LSL #0x%x", (u) ? "" : "-", rm, shift_imm); break; case 0x1: /* LSR */ - snprintf(offset, 32, ", %sr%i, LSR #0x%x", (U) ? "" : "-", Rm, shift_imm); + snprintf(offset, 32, ", %sr%i, LSR #0x%x", (u) ? "" : "-", rm, shift_imm); break; case 0x2: /* ASR */ - snprintf(offset, 32, ", %sr%i, ASR #0x%x", (U) ? "" : "-", Rm, shift_imm); + snprintf(offset, 32, ", %sr%i, ASR #0x%x", (u) ? "" : "-", rm, shift_imm); break; case 0x3: /* ROR */ - snprintf(offset, 32, ", %sr%i, ROR #0x%x", (U) ? "" : "-", Rm, shift_imm); + snprintf(offset, 32, ", %sr%i, ROR #0x%x", (u) ? "" : "-", rm, shift_imm); break; case 0x4: /* RRX */ - snprintf(offset, 32, ", %sr%i, RRX", (U) ? "" : "-", Rm); + snprintf(offset, 32, ", %sr%i, RRX", (u) ? "" : "-", rm); break; } } } - if (P == 1) { - if (W == 0) { /* offset */ + if (p == 1) { + if (w == 0) { /* offset */ snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\t%s%s%s r%i, [r%i%s]", @@ -671,8 +671,8 @@ static int evaluate_load_store(uint32_t opcode, operation, COND(opcode), suffix, - Rd, - Rn, + rd, + rn, offset); instruction->info.load_store.index_mode = 0; @@ -685,8 +685,8 @@ static int evaluate_load_store(uint32_t opcode, operation, COND(opcode), suffix, - Rd, - Rn, + rd, + rn, offset); instruction->info.load_store.index_mode = 1; @@ -700,8 +700,8 @@ static int evaluate_load_store(uint32_t opcode, operation, COND(opcode), suffix, - Rd, - Rn, + rd, + rn, offset); instruction->info.load_store.index_mode = 2; @@ -1029,35 +1029,35 @@ undef: static int evaluate_misc_load_store(uint32_t opcode, uint32_t address, struct arm_instruction *instruction) { - uint8_t P, U, I, W, L, S, H; - uint8_t Rn, Rd; + uint8_t p, u, i, w, l, s, h; + uint8_t rn, rd; char *operation;/* "LDR" or "STR" */ char *suffix; /* "H", "SB", "SH", "D" */ char offset[32]; /* examine flags */ - P = (opcode & 0x01000000) >> 24; - U = (opcode & 0x00800000) >> 23; - I = (opcode & 0x00400000) >> 22; - W = (opcode & 0x00200000) >> 21; - L = (opcode & 0x00100000) >> 20; - S = (opcode & 0x00000040) >> 6; - H = (opcode & 0x00000020) >> 5; + p = (opcode & 0x01000000) >> 24; + u = (opcode & 0x00800000) >> 23; + i = (opcode & 0x00400000) >> 22; + w = (opcode & 0x00200000) >> 21; + l = (opcode & 0x00100000) >> 20; + s = (opcode & 0x00000040) >> 6; + h = (opcode & 0x00000020) >> 5; /* target register */ - Rd = (opcode & 0xf000) >> 12; + rd = (opcode & 0xf000) >> 12; /* base register */ - Rn = (opcode & 0xf0000) >> 16; + rn = (opcode & 0xf0000) >> 16; - instruction->info.load_store.Rd = Rd; - instruction->info.load_store.Rn = Rn; - instruction->info.load_store.U = U; + instruction->info.load_store.rd = rd; + instruction->info.load_store.rn = rn; + instruction->info.load_store.u = u; /* determine instruction type and suffix */ - if (S) {/* signed */ - if (L) {/* load */ - if (H) { + if (s) {/* signed */ + if (l) {/* load */ + if (h) { operation = "LDR"; instruction->type = ARM_LDRSH; suffix = "SH"; @@ -1069,7 +1069,7 @@ static int evaluate_misc_load_store(uint32_t opcode, } else {/* there are no signed stores, so this is used to encode double-register *load/stores */ suffix = "D"; - if (H) { + if (h) { operation = "STR"; instruction->type = ARM_STRD; } else { @@ -1079,7 +1079,7 @@ static int evaluate_misc_load_store(uint32_t opcode, } } else {/* unsigned */ suffix = "H"; - if (L) {/* load */ + if (l) {/* load */ operation = "LDR"; instruction->type = ARM_LDRH; } else {/* store */ @@ -1088,25 +1088,25 @@ static int evaluate_misc_load_store(uint32_t opcode, } } - if (I) {/* Immediate offset/index (#+-)*/ + if (i) {/* Immediate offset/index (#+-)*/ uint32_t offset_8 = ((opcode & 0xf00) >> 4) | (opcode & 0xf); - snprintf(offset, 32, "#%s0x%" PRIx32 "", (U) ? "" : "-", offset_8); + snprintf(offset, 32, "#%s0x%" PRIx32 "", (u) ? "" : "-", offset_8); instruction->info.load_store.offset_mode = 0; instruction->info.load_store.offset.offset = offset_8; } else {/* Register offset/index (+-) */ - uint8_t Rm; - Rm = (opcode & 0xf); - snprintf(offset, 32, "%sr%i", (U) ? "" : "-", Rm); + uint8_t rm; + rm = (opcode & 0xf); + snprintf(offset, 32, "%sr%i", (u) ? "" : "-", rm); instruction->info.load_store.offset_mode = 1; - instruction->info.load_store.offset.reg.Rm = Rm; + instruction->info.load_store.offset.reg.rm = rm; instruction->info.load_store.offset.reg.shift = 0x0; instruction->info.load_store.offset.reg.shift_imm = 0x0; } - if (P == 1) { - if (W == 0) { /* offset */ + if (p == 1) { + if (w == 0) { /* offset */ snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\t%s%s%s r%i, [r%i, %s]", @@ -1115,8 +1115,8 @@ static int evaluate_misc_load_store(uint32_t opcode, operation, COND(opcode), suffix, - Rd, - Rn, + rd, + rn, offset); instruction->info.load_store.index_mode = 0; @@ -1129,8 +1129,8 @@ static int evaluate_misc_load_store(uint32_t opcode, operation, COND(opcode), suffix, - Rd, - Rn, + rd, + rn, offset); instruction->info.load_store.index_mode = 1; @@ -1144,8 +1144,8 @@ static int evaluate_misc_load_store(uint32_t opcode, operation, COND(opcode), suffix, - Rd, - Rn, + rd, + rn, offset); instruction->info.load_store.index_mode = 2; @@ -1158,7 +1158,7 @@ static int evaluate_misc_load_store(uint32_t opcode, static int evaluate_ldm_stm(uint32_t opcode, uint32_t address, struct arm_instruction *instruction) { - uint8_t P, U, S, W, L, Rn; + uint8_t p, u, s, w, l, rn; uint32_t register_list; char *addressing_mode; char *mnemonic; @@ -1167,20 +1167,20 @@ static int evaluate_ldm_stm(uint32_t opcode, int i; int first_reg = 1; - P = (opcode & 0x01000000) >> 24; - U = (opcode & 0x00800000) >> 23; - S = (opcode & 0x00400000) >> 22; - W = (opcode & 0x00200000) >> 21; - L = (opcode & 0x00100000) >> 20; + p = (opcode & 0x01000000) >> 24; + u = (opcode & 0x00800000) >> 23; + s = (opcode & 0x00400000) >> 22; + w = (opcode & 0x00200000) >> 21; + l = (opcode & 0x00100000) >> 20; register_list = (opcode & 0xffff); - Rn = (opcode & 0xf0000) >> 16; + rn = (opcode & 0xf0000) >> 16; - instruction->info.load_store_multiple.Rn = Rn; + instruction->info.load_store_multiple.rn = rn; instruction->info.load_store_multiple.register_list = register_list; - instruction->info.load_store_multiple.S = S; - instruction->info.load_store_multiple.W = W; + instruction->info.load_store_multiple.s = s; + instruction->info.load_store_multiple.w = w; - if (L) { + if (l) { instruction->type = ARM_LDM; mnemonic = "LDM"; } else { @@ -1188,8 +1188,8 @@ static int evaluate_ldm_stm(uint32_t opcode, mnemonic = "STM"; } - if (P) { - if (U) { + if (p) { + if (u) { instruction->info.load_store_multiple.addressing_mode = 1; addressing_mode = "IB"; } else { @@ -1197,7 +1197,7 @@ static int evaluate_ldm_stm(uint32_t opcode, addressing_mode = "DB"; } } else { - if (U) { + if (u) { instruction->info.load_store_multiple.addressing_mode = 0; /* "IA" is the default in UAL syntax */ addressing_mode = ""; @@ -1229,7 +1229,7 @@ static int evaluate_ldm_stm(uint32_t opcode, "\t%s%s%s r%i%s, {%s}%s", address, opcode, mnemonic, addressing_mode, COND(opcode), - Rn, (W) ? "!" : "", reg_list, (S) ? "^" : ""); + rn, (w) ? "!" : "", reg_list, (s) ? "^" : ""); return ERROR_OK; } @@ -1242,12 +1242,12 @@ static int evaluate_mul_and_extra_ld_st(uint32_t opcode, if ((opcode & 0x000000f0) == 0x00000090) { /* Multiply (accumulate) */ if ((opcode & 0x0f800000) == 0x00000000) { - uint8_t Rm, Rs, Rn, Rd, S; - Rm = opcode & 0xf; - Rs = (opcode & 0xf00) >> 8; - Rn = (opcode & 0xf000) >> 12; - Rd = (opcode & 0xf0000) >> 16; - S = (opcode & 0x00100000) >> 20; + uint8_t rm, rs, rn, rd, s; + rm = opcode & 0xf; + rs = (opcode & 0xf00) >> 8; + rn = (opcode & 0xf000) >> 12; + rd = (opcode & 0xf0000) >> 16; + s = (opcode & 0x00100000) >> 20; /* examine A bit (accumulate) */ if (opcode & 0x00200000) { @@ -1258,11 +1258,11 @@ static int evaluate_mul_and_extra_ld_st(uint32_t opcode, address, opcode, COND(opcode), - (S) ? "S" : "", - Rd, - Rm, - Rs, - Rn); + (s) ? "S" : "", + rd, + rm, + rs, + rn); } else { instruction->type = ARM_MUL; snprintf(instruction->text, @@ -1271,10 +1271,10 @@ static int evaluate_mul_and_extra_ld_st(uint32_t opcode, address, opcode, COND(opcode), - (S) ? "S" : "", - Rd, - Rm, - Rs); + (s) ? "S" : "", + rd, + rm, + rs); } return ERROR_OK; @@ -1283,12 +1283,12 @@ static int evaluate_mul_and_extra_ld_st(uint32_t opcode, /* Multiply (accumulate) long */ if ((opcode & 0x0f800000) == 0x00800000) { char *mnemonic = NULL; - uint8_t Rm, Rs, RdHi, RdLow, S; - Rm = opcode & 0xf; - Rs = (opcode & 0xf00) >> 8; - RdHi = (opcode & 0xf000) >> 12; - RdLow = (opcode & 0xf0000) >> 16; - S = (opcode & 0x00100000) >> 20; + uint8_t rm, rs, rd_hi, rd_low, s; + rm = opcode & 0xf; + rs = (opcode & 0xf00) >> 8; + rd_hi = (opcode & 0xf000) >> 12; + rd_low = (opcode & 0xf0000) >> 16; + s = (opcode & 0x00100000) >> 20; switch ((opcode & 0x00600000) >> 21) { case 0x0: @@ -1316,21 +1316,21 @@ static int evaluate_mul_and_extra_ld_st(uint32_t opcode, opcode, mnemonic, COND(opcode), - (S) ? "S" : "", - RdLow, - RdHi, - Rm, - Rs); + (s) ? "S" : "", + rd_low, + rd_hi, + rm, + rs); return ERROR_OK; } /* Swap/swap byte */ if ((opcode & 0x0f800000) == 0x01000000) { - uint8_t Rm, Rd, Rn; - Rm = opcode & 0xf; - Rd = (opcode & 0xf000) >> 12; - Rn = (opcode & 0xf0000) >> 16; + uint8_t rm, rd, rn; + rm = opcode & 0xf; + rd = (opcode & 0xf000) >> 12; + rn = (opcode & 0xf0000) >> 16; /* examine B flag */ instruction->type = (opcode & 0x00400000) ? ARM_SWPB : ARM_SWP; @@ -1342,9 +1342,9 @@ static int evaluate_mul_and_extra_ld_st(uint32_t opcode, opcode, (opcode & 0x00400000) ? "SWPB" : "SWP", COND(opcode), - Rd, - Rm, - Rn); + rd, + rm, + rn); return ERROR_OK; } @@ -1356,8 +1356,8 @@ static int evaluate_mul_and_extra_ld_st(uint32_t opcode, static int evaluate_mrs_msr(uint32_t opcode, uint32_t address, struct arm_instruction *instruction) { - int R = (opcode & 0x00400000) >> 22; - char *PSR = (R) ? "SPSR" : "CPSR"; + int r = (opcode & 0x00400000) >> 22; + char *PSR = (r) ? "SPSR" : "CPSR"; /* Move register to status register (MSR) */ if (opcode & 0x00200000) { @@ -1382,7 +1382,7 @@ static int evaluate_mrs_msr(uint32_t opcode, ror(immediate, (rotate * 2)) ); } else {/* register variant */ - uint8_t Rm = opcode & 0xf; + uint8_t rm = opcode & 0xf; snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMSR%s %s_%s%s%s%s, r%i", @@ -1394,15 +1394,15 @@ static int evaluate_mrs_msr(uint32_t opcode, (opcode & 0x20000) ? "x" : "", (opcode & 0x40000) ? "s" : "", (opcode & 0x80000) ? "f" : "", - Rm + rm ); } } else {/* Move status register to register (MRS) */ - uint8_t Rd; + uint8_t rd; instruction->type = ARM_MRS; - Rd = (opcode & 0x0000f000) >> 12; + rd = (opcode & 0x0000f000) >> 12; snprintf(instruction->text, 128, @@ -1410,7 +1410,7 @@ static int evaluate_mrs_msr(uint32_t opcode, address, opcode, COND(opcode), - Rd, + rd, PSR); } @@ -1427,37 +1427,37 @@ static int evaluate_misc_instr(uint32_t opcode, /* BX */ if ((opcode & 0x006000f0) == 0x00200010) { - uint8_t Rm; + uint8_t rm; instruction->type = ARM_BX; - Rm = opcode & 0xf; + rm = opcode & 0xf; snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tBX%s r%i", - address, opcode, COND(opcode), Rm); + address, opcode, COND(opcode), rm); - instruction->info.b_bl_bx_blx.reg_operand = Rm; + instruction->info.b_bl_bx_blx.reg_operand = rm; instruction->info.b_bl_bx_blx.target_address = -1; } /* BXJ - "Jazelle" support (ARMv5-J) */ if ((opcode & 0x006000f0) == 0x00200020) { - uint8_t Rm; + uint8_t rm; instruction->type = ARM_BX; - Rm = opcode & 0xf; + rm = opcode & 0xf; snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tBXJ%s r%i", - address, opcode, COND(opcode), Rm); + address, opcode, COND(opcode), rm); - instruction->info.b_bl_bx_blx.reg_operand = Rm; + instruction->info.b_bl_bx_blx.reg_operand = rm; instruction->info.b_bl_bx_blx.target_address = -1; } /* CLZ */ if ((opcode & 0x006000f0) == 0x00600010) { - uint8_t Rm, Rd; + uint8_t rm, rd; instruction->type = ARM_CLZ; - Rm = opcode & 0xf; - Rd = (opcode & 0xf000) >> 12; + rm = opcode & 0xf; + rd = (opcode & 0xf000) >> 12; snprintf(instruction->text, 128, @@ -1465,30 +1465,30 @@ static int evaluate_misc_instr(uint32_t opcode, address, opcode, COND(opcode), - Rd, - Rm); + rd, + rm); } /* BLX(2) */ if ((opcode & 0x006000f0) == 0x00200030) { - uint8_t Rm; + uint8_t rm; instruction->type = ARM_BLX; - Rm = opcode & 0xf; + rm = opcode & 0xf; snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tBLX%s r%i", - address, opcode, COND(opcode), Rm); + address, opcode, COND(opcode), rm); - instruction->info.b_bl_bx_blx.reg_operand = Rm; + instruction->info.b_bl_bx_blx.reg_operand = rm; instruction->info.b_bl_bx_blx.target_address = -1; } /* Enhanced DSP add/subtracts */ if ((opcode & 0x0000000f0) == 0x00000050) { - uint8_t Rm, Rd, Rn; + uint8_t rm, rd, rn; char *mnemonic = NULL; - Rm = opcode & 0xf; - Rd = (opcode & 0xf000) >> 12; - Rn = (opcode & 0xf0000) >> 16; + rm = opcode & 0xf; + rd = (opcode & 0xf000) >> 12; + rn = (opcode & 0xf0000) >> 16; switch ((opcode & 0x00600000) >> 21) { case 0x0: @@ -1516,9 +1516,9 @@ static int evaluate_misc_instr(uint32_t opcode, opcode, mnemonic, COND(opcode), - Rd, - Rm, - Rn); + rd, + rm, + rn); } /* exception return */ @@ -1571,12 +1571,12 @@ static int evaluate_misc_instr(uint32_t opcode, /* SMLA < x> */ if ((opcode & 0x00600000) == 0x00000000) { - uint8_t Rd, Rm, Rs, Rn; - instruction->type = ARM_SMLAxy; - Rd = (opcode & 0xf0000) >> 16; - Rm = (opcode & 0xf); - Rs = (opcode & 0xf00) >> 8; - Rn = (opcode & 0xf000) >> 12; + uint8_t rd, rm, rs, rn; + instruction->type = ARM_SMLAXY; + rd = (opcode & 0xf0000) >> 16; + rm = (opcode & 0xf); + rs = (opcode & 0xf00) >> 8; + rn = (opcode & 0xf000) >> 12; snprintf(instruction->text, 128, @@ -1586,20 +1586,20 @@ static int evaluate_misc_instr(uint32_t opcode, (x) ? "T" : "B", (y) ? "T" : "B", COND(opcode), - Rd, - Rm, - Rs, - Rn); + rd, + rm, + rs, + rn); } /* SMLAL < x> */ if ((opcode & 0x00600000) == 0x00400000) { - uint8_t RdLow, RdHi, Rm, Rs; - instruction->type = ARM_SMLAxy; - RdHi = (opcode & 0xf0000) >> 16; - RdLow = (opcode & 0xf000) >> 12; - Rm = (opcode & 0xf); - Rs = (opcode & 0xf00) >> 8; + uint8_t rd_low, rd_hi, rm, rs; + instruction->type = ARM_SMLAXY; + rd_hi = (opcode & 0xf0000) >> 16; + rd_low = (opcode & 0xf000) >> 12; + rm = (opcode & 0xf); + rs = (opcode & 0xf00) >> 8; snprintf(instruction->text, 128, @@ -1609,20 +1609,20 @@ static int evaluate_misc_instr(uint32_t opcode, (x) ? "T" : "B", (y) ? "T" : "B", COND(opcode), - RdLow, - RdHi, - Rm, - Rs); + rd_low, + rd_hi, + rm, + rs); } /* SMLAW < y> */ if (((opcode & 0x00600000) == 0x00200000) && (x == 0)) { - uint8_t Rd, Rm, Rs, Rn; - instruction->type = ARM_SMLAWy; - Rd = (opcode & 0xf0000) >> 16; - Rm = (opcode & 0xf); - Rs = (opcode & 0xf00) >> 8; - Rn = (opcode & 0xf000) >> 12; + uint8_t rd, rm, rs, rn; + instruction->type = ARM_SMLAWY; + rd = (opcode & 0xf0000) >> 16; + rm = (opcode & 0xf); + rs = (opcode & 0xf00) >> 8; + rn = (opcode & 0xf000) >> 12; snprintf(instruction->text, 128, @@ -1631,19 +1631,19 @@ static int evaluate_misc_instr(uint32_t opcode, opcode, (y) ? "T" : "B", COND(opcode), - Rd, - Rm, - Rs, - Rn); + rd, + rm, + rs, + rn); } /* SMUL < x> */ if ((opcode & 0x00600000) == 0x00600000) { - uint8_t Rd, Rm, Rs; - instruction->type = ARM_SMULxy; - Rd = (opcode & 0xf0000) >> 16; - Rm = (opcode & 0xf); - Rs = (opcode & 0xf00) >> 8; + uint8_t rd, rm, rs; + instruction->type = ARM_SMULXY; + rd = (opcode & 0xf0000) >> 16; + rm = (opcode & 0xf); + rs = (opcode & 0xf00) >> 8; snprintf(instruction->text, 128, @@ -1653,18 +1653,18 @@ static int evaluate_misc_instr(uint32_t opcode, (x) ? "T" : "B", (y) ? "T" : "B", COND(opcode), - Rd, - Rm, - Rs); + rd, + rm, + rs); } /* SMULW < y> */ if (((opcode & 0x00600000) == 0x00200000) && (x == 1)) { - uint8_t Rd, Rm, Rs; - instruction->type = ARM_SMULWy; - Rd = (opcode & 0xf0000) >> 16; - Rm = (opcode & 0xf); - Rs = (opcode & 0xf00) >> 8; + uint8_t rd, rm, rs; + instruction->type = ARM_SMULWY; + rd = (opcode & 0xf0000) >> 16; + rm = (opcode & 0xf); + rs = (opcode & 0xf00) >> 8; snprintf(instruction->text, 128, @@ -1673,9 +1673,9 @@ static int evaluate_misc_instr(uint32_t opcode, opcode, (y) ? "T" : "B", COND(opcode), - Rd, - Rm, - Rs); + rd, + rm, + rs); } } @@ -1686,24 +1686,24 @@ static int evaluate_mov_imm(uint32_t opcode, uint32_t address, struct arm_instruction *instruction) { uint16_t immediate; - uint8_t Rd; - bool T; + uint8_t rd; + bool t; - Rd = (opcode & 0xf000) >> 12; - T = opcode & 0x00400000; + rd = (opcode & 0xf000) >> 12; + t = opcode & 0x00400000; immediate = (opcode & 0xf0000) >> 4 | (opcode & 0xfff); instruction->type = ARM_MOV; - instruction->info.data_proc.Rd = Rd; + instruction->info.data_proc.rd = rd; snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMOV%s%s r%i, #0x%" PRIx16, address, opcode, - T ? "T" : "W", + t ? "T" : "W", COND(opcode), - Rd, + rd, immediate); return ERROR_OK; @@ -1712,20 +1712,20 @@ static int evaluate_mov_imm(uint32_t opcode, static int evaluate_data_proc(uint32_t opcode, uint32_t address, struct arm_instruction *instruction) { - uint8_t I, op, S, Rn, Rd; + uint8_t i, op, s, rn, rd; char *mnemonic = NULL; char shifter_operand[32]; - I = (opcode & 0x02000000) >> 25; + i = (opcode & 0x02000000) >> 25; op = (opcode & 0x01e00000) >> 21; - S = (opcode & 0x00100000) >> 20; + s = (opcode & 0x00100000) >> 20; - Rd = (opcode & 0xf000) >> 12; - Rn = (opcode & 0xf0000) >> 16; + rd = (opcode & 0xf000) >> 12; + rn = (opcode & 0xf0000) >> 16; - instruction->info.data_proc.Rd = Rd; - instruction->info.data_proc.Rn = Rn; - instruction->info.data_proc.S = S; + instruction->info.data_proc.rd = rd; + instruction->info.data_proc.rn = rn; + instruction->info.data_proc.s = s; switch (op) { case 0x0: @@ -1794,7 +1794,7 @@ static int evaluate_data_proc(uint32_t opcode, break; } - if (I) {/* immediate shifter operand (#)*/ + if (i) {/* immediate shifter operand (#)*/ uint8_t immed_8 = opcode & 0xff; uint8_t rotate_imm = (opcode & 0xf00) >> 8; uint32_t immediate; @@ -1806,9 +1806,9 @@ static int evaluate_data_proc(uint32_t opcode, instruction->info.data_proc.variant = 0; instruction->info.data_proc.shifter_operand.immediate.immediate = immediate; } else {/* register-based shifter operand */ - uint8_t shift, Rm; + uint8_t shift, rm; shift = (opcode & 0x60) >> 5; - Rm = (opcode & 0xf); + rm = (opcode & 0xf); if ((opcode & 0x10) != 0x10) { /* Immediate shifts ("" or ", *#") */ @@ -1816,7 +1816,7 @@ static int evaluate_data_proc(uint32_t opcode, shift_imm = (opcode & 0xf80) >> 7; instruction->info.data_proc.variant = 1; - instruction->info.data_proc.shifter_operand.immediate_shift.Rm = Rm; + instruction->info.data_proc.shifter_operand.immediate_shift.rm = rm; instruction->info.data_proc.shifter_operand.immediate_shift.shift_imm = shift_imm; instruction->info.data_proc.shifter_operand.immediate_shift.shift = shift; @@ -1834,51 +1834,51 @@ static int evaluate_data_proc(uint32_t opcode, shift = 0x4; if ((shift_imm == 0x0) && (shift == 0x0)) - snprintf(shifter_operand, 32, "r%i", Rm); + snprintf(shifter_operand, 32, "r%i", rm); else { if (shift == 0x0) /* LSL */ snprintf(shifter_operand, 32, "r%i, LSL #0x%x", - Rm, + rm, shift_imm); else if (shift == 0x1) /* LSR */ snprintf(shifter_operand, 32, "r%i, LSR #0x%x", - Rm, + rm, shift_imm); else if (shift == 0x2) /* ASR */ snprintf(shifter_operand, 32, "r%i, ASR #0x%x", - Rm, + rm, shift_imm); else if (shift == 0x3) /* ROR */ snprintf(shifter_operand, 32, "r%i, ROR #0x%x", - Rm, + rm, shift_imm); else if (shift == 0x4) /* RRX */ - snprintf(shifter_operand, 32, "r%i, RRX", Rm); + snprintf(shifter_operand, 32, "r%i, RRX", rm); } } else {/* Register shifts (", ") */ - uint8_t Rs = (opcode & 0xf00) >> 8; + uint8_t rs = (opcode & 0xf00) >> 8; instruction->info.data_proc.variant = 2; - instruction->info.data_proc.shifter_operand.register_shift.Rm = Rm; - instruction->info.data_proc.shifter_operand.register_shift.Rs = Rs; + instruction->info.data_proc.shifter_operand.register_shift.rm = rm; + instruction->info.data_proc.shifter_operand.register_shift.rs = rs; instruction->info.data_proc.shifter_operand.register_shift.shift = shift; if (shift == 0x0) /* LSL */ - snprintf(shifter_operand, 32, "r%i, LSL r%i", Rm, Rs); + snprintf(shifter_operand, 32, "r%i, LSL r%i", rm, rs); else if (shift == 0x1) /* LSR */ - snprintf(shifter_operand, 32, "r%i, LSR r%i", Rm, Rs); + snprintf(shifter_operand, 32, "r%i, LSR r%i", rm, rs); else if (shift == 0x2) /* ASR */ - snprintf(shifter_operand, 32, "r%i, ASR r%i", Rm, Rs); + snprintf(shifter_operand, 32, "r%i, ASR r%i", rm, rs); else if (shift == 0x3) /* ROR */ - snprintf(shifter_operand, 32, "r%i, ROR r%i", Rm, Rs); + snprintf(shifter_operand, 32, "r%i, ROR r%i", rm, rs); } } @@ -1891,9 +1891,9 @@ static int evaluate_data_proc(uint32_t opcode, opcode, mnemonic, COND(opcode), - (S) ? "S" : "", - Rd, - Rn, + (s) ? "S" : "", + rd, + rn, shifter_operand); } else if ((op == 0xd) || (op == 0xf)) { /* {}{S} , * */ @@ -1911,13 +1911,13 @@ static int evaluate_data_proc(uint32_t opcode, opcode, mnemonic, COND(opcode), - (S) ? "S" : "", - Rd, + (s) ? "S" : "", + rd, shifter_operand); } else {/* {} , */ snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\t%s%s r%i, %s", address, opcode, mnemonic, COND(opcode), - Rn, shifter_operand); + rn, shifter_operand); } return ERROR_OK; @@ -2123,9 +2123,9 @@ static int evaluate_b_bl_blx_thumb(uint16_t opcode, static int evaluate_add_sub_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { - uint8_t Rd = (opcode >> 0) & 0x7; - uint8_t Rn = (opcode >> 3) & 0x7; - uint8_t Rm_imm = (opcode >> 6) & 0x7; + uint8_t rd = (opcode >> 0) & 0x7; + uint8_t rn = (opcode >> 3) & 0x7; + uint8_t rm_imm = (opcode >> 6) & 0x7; uint32_t opc = opcode & (1 << 9); uint32_t reg_imm = opcode & (1 << 10); char *mnemonic; @@ -2139,22 +2139,22 @@ static int evaluate_add_sub_thumb(uint16_t opcode, mnemonic = "ADDS"; } - instruction->info.data_proc.Rd = Rd; - instruction->info.data_proc.Rn = Rn; - instruction->info.data_proc.S = 1; + instruction->info.data_proc.rd = rd; + instruction->info.data_proc.rn = rn; + instruction->info.data_proc.s = 1; if (reg_imm) { instruction->info.data_proc.variant = 0;/*immediate*/ - instruction->info.data_proc.shifter_operand.immediate.immediate = Rm_imm; + instruction->info.data_proc.shifter_operand.immediate.immediate = rm_imm; snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \t%s\tr%i, r%i, #%d", - address, opcode, mnemonic, Rd, Rn, Rm_imm); + address, opcode, mnemonic, rd, rn, rm_imm); } else { instruction->info.data_proc.variant = 1;/*immediate shift*/ - instruction->info.data_proc.shifter_operand.immediate_shift.Rm = Rm_imm; + instruction->info.data_proc.shifter_operand.immediate_shift.rm = rm_imm; snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \t%s\tr%i, r%i, r%i", - address, opcode, mnemonic, Rd, Rn, Rm_imm); + address, opcode, mnemonic, rd, rn, rm_imm); } return ERROR_OK; @@ -2163,8 +2163,8 @@ static int evaluate_add_sub_thumb(uint16_t opcode, static int evaluate_shift_imm_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { - uint8_t Rd = (opcode >> 0) & 0x7; - uint8_t Rm = (opcode >> 3) & 0x7; + uint8_t rd = (opcode >> 0) & 0x7; + uint8_t rm = (opcode >> 3) & 0x7; uint8_t imm = (opcode >> 6) & 0x1f; uint8_t opc = (opcode >> 11) & 0x3; char *mnemonic = NULL; @@ -2190,17 +2190,17 @@ static int evaluate_shift_imm_thumb(uint16_t opcode, if ((imm == 0) && (opc != 0)) imm = 32; - instruction->info.data_proc.Rd = Rd; - instruction->info.data_proc.Rn = -1; - instruction->info.data_proc.S = 1; + instruction->info.data_proc.rd = rd; + instruction->info.data_proc.rn = -1; + instruction->info.data_proc.s = 1; instruction->info.data_proc.variant = 1;/*immediate_shift*/ - instruction->info.data_proc.shifter_operand.immediate_shift.Rm = Rm; + instruction->info.data_proc.shifter_operand.immediate_shift.rm = rm; instruction->info.data_proc.shifter_operand.immediate_shift.shift_imm = imm; snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \t%s\tr%i, r%i, #%#2.2x", - address, opcode, mnemonic, Rd, Rm, imm); + address, opcode, mnemonic, rd, rm, imm); return ERROR_OK; } @@ -2209,13 +2209,13 @@ static int evaluate_data_proc_imm_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { uint8_t imm = opcode & 0xff; - uint8_t Rd = (opcode >> 8) & 0x7; + uint8_t rd = (opcode >> 8) & 0x7; uint32_t opc = (opcode >> 11) & 0x3; char *mnemonic = NULL; - instruction->info.data_proc.Rd = Rd; - instruction->info.data_proc.Rn = Rd; - instruction->info.data_proc.S = 1; + instruction->info.data_proc.rd = rd; + instruction->info.data_proc.rn = rd; + instruction->info.data_proc.s = 1; instruction->info.data_proc.variant = 0;/*immediate*/ instruction->info.data_proc.shifter_operand.immediate.immediate = imm; @@ -2223,12 +2223,12 @@ static int evaluate_data_proc_imm_thumb(uint16_t opcode, case 0: instruction->type = ARM_MOV; mnemonic = "MOVS"; - instruction->info.data_proc.Rn = -1; + instruction->info.data_proc.rn = -1; break; case 1: instruction->type = ARM_CMP; mnemonic = "CMP"; - instruction->info.data_proc.Rd = -1; + instruction->info.data_proc.rd = -1; break; case 2: instruction->type = ARM_ADD; @@ -2242,7 +2242,7 @@ static int evaluate_data_proc_imm_thumb(uint16_t opcode, snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \t%s\tr%i, #%#2.2x", - address, opcode, mnemonic, Rd, imm); + address, opcode, mnemonic, rd, imm); return ERROR_OK; } @@ -2250,27 +2250,27 @@ static int evaluate_data_proc_imm_thumb(uint16_t opcode, static int evaluate_data_proc_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { - uint8_t high_reg, op, Rm, Rd, H1, H2; + uint8_t high_reg, op, rm, rd, h1, h2; char *mnemonic = NULL; bool nop = false; high_reg = (opcode & 0x0400) >> 10; op = (opcode & 0x03C0) >> 6; - Rd = (opcode & 0x0007); - Rm = (opcode & 0x0038) >> 3; - H1 = (opcode & 0x0080) >> 7; - H2 = (opcode & 0x0040) >> 6; + rd = (opcode & 0x0007); + rm = (opcode & 0x0038) >> 3; + h1 = (opcode & 0x0080) >> 7; + h2 = (opcode & 0x0040) >> 6; - instruction->info.data_proc.Rd = Rd; - instruction->info.data_proc.Rn = Rd; - instruction->info.data_proc.S = (!high_reg || (instruction->type == ARM_CMP)); + instruction->info.data_proc.rd = rd; + instruction->info.data_proc.rn = rd; + instruction->info.data_proc.s = (!high_reg || (instruction->type == ARM_CMP)); instruction->info.data_proc.variant = 1 /*immediate shift*/; - instruction->info.data_proc.shifter_operand.immediate_shift.Rm = Rm; + instruction->info.data_proc.shifter_operand.immediate_shift.rm = rm; if (high_reg) { - Rd |= H1 << 3; - Rm |= H2 << 3; + rd |= h1 << 3; + rm |= h2 << 3; op >>= 2; switch (op) { @@ -2285,24 +2285,24 @@ static int evaluate_data_proc_thumb(uint16_t opcode, case 0x2: instruction->type = ARM_MOV; mnemonic = "MOV"; - if (Rd == Rm) + if (rd == rm) nop = true; break; case 0x3: if ((opcode & 0x7) == 0x0) { - instruction->info.b_bl_bx_blx.reg_operand = Rm; - if (H1) { + instruction->info.b_bl_bx_blx.reg_operand = rm; + if (h1) { instruction->type = ARM_BLX; snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \tBLX\tr%i", - address, opcode, Rm); + address, opcode, rm); } else { instruction->type = ARM_BX; snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \tBX\tr%i", - address, opcode, Rm); + address, opcode, rm); } } else { instruction->type = ARM_UNDEFINED_INSTRUCTION; @@ -2329,24 +2329,24 @@ static int evaluate_data_proc_thumb(uint16_t opcode, mnemonic = "LSLS"; instruction->info.data_proc.variant = 2 /*register shift*/; instruction->info.data_proc.shifter_operand.register_shift.shift = 0; - instruction->info.data_proc.shifter_operand.register_shift.Rm = Rd; - instruction->info.data_proc.shifter_operand.register_shift.Rs = Rm; + instruction->info.data_proc.shifter_operand.register_shift.rm = rd; + instruction->info.data_proc.shifter_operand.register_shift.rs = rm; break; case 0x3: instruction->type = ARM_MOV; mnemonic = "LSRS"; instruction->info.data_proc.variant = 2 /*register shift*/; instruction->info.data_proc.shifter_operand.register_shift.shift = 1; - instruction->info.data_proc.shifter_operand.register_shift.Rm = Rd; - instruction->info.data_proc.shifter_operand.register_shift.Rs = Rm; + instruction->info.data_proc.shifter_operand.register_shift.rm = rd; + instruction->info.data_proc.shifter_operand.register_shift.rs = rm; break; case 0x4: instruction->type = ARM_MOV; mnemonic = "ASRS"; instruction->info.data_proc.variant = 2 /*register shift*/; instruction->info.data_proc.shifter_operand.register_shift.shift = 2; - instruction->info.data_proc.shifter_operand.register_shift.Rm = Rd; - instruction->info.data_proc.shifter_operand.register_shift.Rs = Rm; + instruction->info.data_proc.shifter_operand.register_shift.rm = rd; + instruction->info.data_proc.shifter_operand.register_shift.rs = rm; break; case 0x5: instruction->type = ARM_ADC; @@ -2361,8 +2361,8 @@ static int evaluate_data_proc_thumb(uint16_t opcode, mnemonic = "RORS"; instruction->info.data_proc.variant = 2 /*register shift*/; instruction->info.data_proc.shifter_operand.register_shift.shift = 3; - instruction->info.data_proc.shifter_operand.register_shift.Rm = Rd; - instruction->info.data_proc.shifter_operand.register_shift.Rs = Rm; + instruction->info.data_proc.shifter_operand.register_shift.rm = rd; + instruction->info.data_proc.shifter_operand.register_shift.rs = rm; break; case 0x8: instruction->type = ARM_TST; @@ -2373,7 +2373,7 @@ static int evaluate_data_proc_thumb(uint16_t opcode, mnemonic = "RSBS"; instruction->info.data_proc.variant = 0 /*immediate*/; instruction->info.data_proc.shifter_operand.immediate.immediate = 0; - instruction->info.data_proc.Rn = Rm; + instruction->info.data_proc.rn = rm; break; case 0xA: instruction->type = ARM_CMP; @@ -2406,11 +2406,11 @@ static int evaluate_data_proc_thumb(uint16_t opcode, snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \tNOP\t\t\t" "; (%s r%i, r%i)", - address, opcode, mnemonic, Rd, Rm); + address, opcode, mnemonic, rd, rm); else snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \t%s\tr%i, r%i", - address, opcode, mnemonic, Rd, Rm); + address, opcode, mnemonic, rd, rm); return ERROR_OK; } @@ -2425,14 +2425,14 @@ static int evaluate_load_literal_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { uint32_t immediate; - uint8_t Rd = (opcode >> 8) & 0x7; + uint8_t rd = (opcode >> 8) & 0x7; instruction->type = ARM_LDR; immediate = opcode & 0x000000ff; immediate *= 4; - instruction->info.load_store.Rd = Rd; - instruction->info.load_store.Rn = 15 /*PC*/; + instruction->info.load_store.rd = rd; + instruction->info.load_store.rn = 15 /*PC*/; instruction->info.load_store.index_mode = 0; /*offset*/ instruction->info.load_store.offset_mode = 0; /*immediate*/ instruction->info.load_store.offset.offset = immediate; @@ -2440,7 +2440,7 @@ static int evaluate_load_literal_thumb(uint16_t opcode, snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \t" "LDR\tr%i, [pc, #%#" PRIx32 "]\t; %#8.8" PRIx32, - address, opcode, Rd, immediate, + address, opcode, rd, immediate, thumb_alignpc4(address) + immediate); return ERROR_OK; @@ -2449,9 +2449,9 @@ static int evaluate_load_literal_thumb(uint16_t opcode, static int evaluate_load_store_reg_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { - uint8_t Rd = (opcode >> 0) & 0x7; - uint8_t Rn = (opcode >> 3) & 0x7; - uint8_t Rm = (opcode >> 6) & 0x7; + uint8_t rd = (opcode >> 0) & 0x7; + uint8_t rn = (opcode >> 3) & 0x7; + uint8_t rm = (opcode >> 6) & 0x7; uint8_t opc = (opcode >> 9) & 0x7; char *mnemonic = NULL; @@ -2492,13 +2492,13 @@ static int evaluate_load_store_reg_thumb(uint16_t opcode, snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \t%s\tr%i, [r%i, r%i]", - address, opcode, mnemonic, Rd, Rn, Rm); + address, opcode, mnemonic, rd, rn, rm); - instruction->info.load_store.Rd = Rd; - instruction->info.load_store.Rn = Rn; + instruction->info.load_store.rd = rd; + instruction->info.load_store.rn = rn; instruction->info.load_store.index_mode = 0; /*offset*/ instruction->info.load_store.offset_mode = 1; /*register*/ - instruction->info.load_store.offset.reg.Rm = Rm; + instruction->info.load_store.offset.reg.rm = rm; return ERROR_OK; } @@ -2507,15 +2507,15 @@ static int evaluate_load_store_imm_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { uint32_t offset = (opcode >> 6) & 0x1f; - uint8_t Rd = (opcode >> 0) & 0x7; - uint8_t Rn = (opcode >> 3) & 0x7; - uint32_t L = opcode & (1 << 11); - uint32_t B = opcode & (1 << 12); + uint8_t rd = (opcode >> 0) & 0x7; + uint8_t rn = (opcode >> 3) & 0x7; + uint32_t l = opcode & (1 << 11); + uint32_t b = opcode & (1 << 12); char *mnemonic; char suffix = ' '; uint32_t shift = 2; - if (L) { + if (l) { instruction->type = ARM_LDR; mnemonic = "LDR"; } else { @@ -2526,17 +2526,17 @@ static int evaluate_load_store_imm_thumb(uint16_t opcode, if ((opcode&0xF000) == 0x8000) { suffix = 'H'; shift = 1; - } else if (B) { + } else if (b) { suffix = 'B'; shift = 0; } snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \t%s%c\tr%i, [r%i, #%#" PRIx32 "]", - address, opcode, mnemonic, suffix, Rd, Rn, offset << shift); + address, opcode, mnemonic, suffix, rd, rn, offset << shift); - instruction->info.load_store.Rd = Rd; - instruction->info.load_store.Rn = Rn; + instruction->info.load_store.rd = rd; + instruction->info.load_store.rn = rn; instruction->info.load_store.index_mode = 0; /*offset*/ instruction->info.load_store.offset_mode = 0; /*immediate*/ instruction->info.load_store.offset.offset = offset << shift; @@ -2548,11 +2548,11 @@ static int evaluate_load_store_stack_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { uint32_t offset = opcode & 0xff; - uint8_t Rd = (opcode >> 8) & 0x7; - uint32_t L = opcode & (1 << 11); + uint8_t rd = (opcode >> 8) & 0x7; + uint32_t l = opcode & (1 << 11); char *mnemonic; - if (L) { + if (l) { instruction->type = ARM_LDR; mnemonic = "LDR"; } else { @@ -2562,10 +2562,10 @@ static int evaluate_load_store_stack_thumb(uint16_t opcode, snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \t%s\tr%i, [SP, #%#" PRIx32 "]", - address, opcode, mnemonic, Rd, offset*4); + address, opcode, mnemonic, rd, offset*4); - instruction->info.load_store.Rd = Rd; - instruction->info.load_store.Rn = 13 /*SP*/; + instruction->info.load_store.rd = rd; + instruction->info.load_store.rn = 13 /*SP*/; instruction->info.load_store.index_mode = 0; /*offset*/ instruction->info.load_store.offset_mode = 0; /*immediate*/ instruction->info.load_store.offset.offset = offset*4; @@ -2577,28 +2577,28 @@ static int evaluate_add_sp_pc_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { uint32_t imm = opcode & 0xff; - uint8_t Rd = (opcode >> 8) & 0x7; - uint8_t Rn; - uint32_t SP = opcode & (1 << 11); + uint8_t rd = (opcode >> 8) & 0x7; + uint8_t rn; + uint32_t sp = opcode & (1 << 11); const char *reg_name; instruction->type = ARM_ADD; - if (SP) { + if (sp) { reg_name = "SP"; - Rn = 13; + rn = 13; } else { reg_name = "PC"; - Rn = 15; + rn = 15; } snprintf(instruction->text, 128, "0x%8.8" PRIx32 " 0x%4.4x \tADD\tr%i, %s, #%#" PRIx32, - address, opcode, Rd, reg_name, imm * 4); + address, opcode, rd, reg_name, imm * 4); instruction->info.data_proc.variant = 0 /* immediate */; - instruction->info.data_proc.Rd = Rd; - instruction->info.data_proc.Rn = Rn; + instruction->info.data_proc.rd = rd; + instruction->info.data_proc.rn = rn; instruction->info.data_proc.shifter_operand.immediate.immediate = imm*4; return ERROR_OK; @@ -2625,8 +2625,8 @@ static int evaluate_adjust_stack_thumb(uint16_t opcode, address, opcode, mnemonic, imm*4); instruction->info.data_proc.variant = 0 /* immediate */; - instruction->info.data_proc.Rd = 13 /*SP*/; - instruction->info.data_proc.Rn = 13 /*SP*/; + instruction->info.data_proc.rd = 13 /*SP*/; + instruction->info.data_proc.rn = 13 /*SP*/; instruction->info.data_proc.shifter_operand.immediate.immediate = imm*4; return ERROR_OK; @@ -2650,9 +2650,9 @@ static int evaluate_load_store_multiple_thumb(uint16_t opcode, uint32_t address, struct arm_instruction *instruction) { uint32_t reg_list = opcode & 0xff; - uint32_t L = opcode & (1 << 11); - uint32_t R = opcode & (1 << 8); - uint8_t Rn = (opcode >> 8) & 7; + uint32_t l = opcode & (1 << 11); + uint32_t r = opcode & (1 << 8); + uint8_t rn = (opcode >> 8) & 7; uint8_t addr_mode = 0 /* IA */; char reg_names[40]; char *reg_names_p; @@ -2667,28 +2667,28 @@ static int evaluate_load_store_multiple_thumb(uint16_t opcode, if ((opcode & 0xf000) == 0xc000) { /* generic load/store multiple */ char *wback = "!"; - if (L) { + if (l) { instruction->type = ARM_LDM; mnemonic = "LDM"; - if (opcode & (1 << Rn)) + if (opcode & (1 << rn)) wback = ""; } else { instruction->type = ARM_STM; mnemonic = "STM"; } - snprintf(ptr_name, sizeof(ptr_name), "r%i%s, ", Rn, wback); + snprintf(ptr_name, sizeof(ptr_name), "r%i%s, ", rn, wback); } else {/* push/pop */ - Rn = 13;/* SP */ - if (L) { + rn = 13;/* SP */ + if (l) { instruction->type = ARM_LDM; mnemonic = "POP"; - if (R) + if (r) reg_list |= (1 << 15) /*PC*/; } else { instruction->type = ARM_STM; mnemonic = "PUSH"; addr_mode = 3; /*DB*/ - if (R) + if (r) reg_list |= (1 << 14) /*LR*/; } } @@ -2711,7 +2711,7 @@ static int evaluate_load_store_multiple_thumb(uint16_t opcode, address, opcode, mnemonic, ptr_name, reg_names); instruction->info.load_store_multiple.register_list = reg_list; - instruction->info.load_store_multiple.Rn = Rn; + instruction->info.load_store_multiple.rn = rn; instruction->info.load_store_multiple.addressing_mode = addr_mode; return ERROR_OK; diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h index beecb3f30..6f15f4b5e 100644 --- a/src/target/arm_disassembler.h +++ b/src/target/arm_disassembler.h @@ -112,11 +112,11 @@ enum arm_instruction_type { ARM_QDADD, ARM_QSUB, ARM_QDSUB, - ARM_SMLAxy, - ARM_SMLALxy, - ARM_SMLAWy, - ARM_SMULxy, - ARM_SMULWy, + ARM_SMLAXY, + ARM_SMLALXY, + ARM_SMLAWY, + ARM_SMULXY, + ARM_SMULWY, ARM_LDRD, ARM_STRD, @@ -133,35 +133,35 @@ union arm_shifter_operand { uint32_t immediate; } immediate; struct { - uint8_t Rm; + uint8_t rm; uint8_t shift; /* 0: LSL, 1: LSR, 2: ASR, 3: ROR, 4: RRX */ uint8_t shift_imm; } immediate_shift; struct { - uint8_t Rm; + uint8_t rm; uint8_t shift; - uint8_t Rs; + uint8_t rs; } register_shift; }; struct arm_data_proc_instr { int variant; /* 0: immediate, 1: immediate_shift, 2: register_shift */ - uint8_t S; - uint8_t Rn; - uint8_t Rd; + uint8_t s; + uint8_t rn; + uint8_t rd; union arm_shifter_operand shifter_operand; }; struct arm_load_store_instr { - uint8_t Rd; - uint8_t Rn; - uint8_t U; + uint8_t rd; + uint8_t rn; + uint8_t u; int index_mode; /* 0: offset, 1: pre-indexed, 2: post-indexed */ int offset_mode; /* 0: immediate, 1: (scaled) register */ union { uint32_t offset; struct { - uint8_t Rm; + uint8_t rm; uint8_t shift; /* 0: LSL, 1: LSR, 2: ASR, 3: ROR, 4: RRX */ uint8_t shift_imm; } reg; @@ -169,11 +169,11 @@ struct arm_load_store_instr { }; struct arm_load_store_multiple_instr { - uint8_t Rn; + uint8_t rn; uint32_t register_list; uint8_t addressing_mode; /* 0: IA, 1: IB, 2: DA, 3: DB */ - uint8_t S; - uint8_t W; + uint8_t s; + uint8_t w; }; struct arm_instruction { diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index d1f574856..3e55e2e3a 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -50,7 +50,7 @@ /* Read coprocessor */ static int dpm_mrc(struct target *target, int cpnum, - uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, + uint32_t op1, uint32_t op2, uint32_t crn, uint32_t crm, uint32_t *value) { struct arm *arm = target_to_arm(target); @@ -62,12 +62,12 @@ static int dpm_mrc(struct target *target, int cpnum, return retval; LOG_DEBUG("MRC p%d, %d, r0, c%d, c%d, %d", cpnum, - (int) op1, (int) CRn, - (int) CRm, (int) op2); + (int) op1, (int) crn, + (int) crm, (int) op2); /* read coprocessor register into R0; return via DCC */ retval = dpm->instr_read_data_r0(dpm, - ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2), + ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2), value); /* (void) */ dpm->finish(dpm); @@ -75,7 +75,7 @@ static int dpm_mrc(struct target *target, int cpnum, } static int dpm_mcr(struct target *target, int cpnum, - uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, + uint32_t op1, uint32_t op2, uint32_t crn, uint32_t crm, uint32_t value) { struct arm *arm = target_to_arm(target); @@ -87,12 +87,12 @@ static int dpm_mcr(struct target *target, int cpnum, return retval; LOG_DEBUG("MCR p%d, %d, r0, c%d, c%d, %d", cpnum, - (int) op1, (int) CRn, - (int) CRm, (int) op2); + (int) op1, (int) crn, + (int) crm, (int) op2); /* read DCC into r0; then write coprocessor register from R0 */ retval = dpm->instr_write_data_r0(dpm, - ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2), + ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2), value); /* (void) */ dpm->finish(dpm); @@ -1070,7 +1070,7 @@ int arm_dpm_setup(struct arm_dpm *dpm) arm->read_core_reg = arm_dpm_read_core_reg; arm->write_core_reg = arm_dpm_write_core_reg; - if (arm->core_cache == NULL) { + if (!arm->core_cache) { cache = arm_build_reg_cache(target, arm); if (!cache) return ERROR_FAIL; diff --git a/src/target/arm_dpm.h b/src/target/arm_dpm.h index 80587f5fe..0172d9a23 100644 --- a/src/target/arm_dpm.h +++ b/src/target/arm_dpm.h @@ -241,7 +241,7 @@ void arm_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dcsr); /* OSLSR (OS Lock Status Register) bits */ #define OSLSR_OSLM0 (1 << 0) #define OSLSR_OSLK (1 << 1) -#define OSLSR_nTT (1 << 2) +#define OSLSR_NTT (1 << 2) #define OSLSR_OSLM1 (1 << 3) #define OSLSR_OSLM (OSLSR_OSLM0|OSLSR_OSLM1) diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c index f9605acb1..6a27e323f 100644 --- a/src/target/arm_jtag.c +++ b/src/target/arm_jtag.c @@ -40,7 +40,7 @@ int arm_jtag_set_instr_inner(struct jtag_tap *tap, buf_set_u32(t, 0, field.num_bits, new_instr); field.in_value = NULL; - if (no_verify_capture == NULL) + if (!no_verify_capture) jtag_add_ir_scan(tap, &field, end_state); else { /* FIX!!!! this is a kludge!!! arm926ejs.c should reimplement this arm_jtag_set_instr to diff --git a/src/target/arm_opcodes.h b/src/target/arm_opcodes.h index 90f841600..00035f581 100644 --- a/src/target/arm_opcodes.h +++ b/src/target/arm_opcodes.h @@ -36,184 +36,184 @@ /* ARM mode instructions */ /* Store multiple increment after - * Rn: base register - * List: for each bit in list: store register - * S: in privileged mode: store user-mode registers - * W = 1: update the base register. W = 0: leave the base register untouched + * rn: base register + * list: for each bit in list: store register + * s: in privileged mode: store user-mode registers + * w = 1: update the base register. w = 0: leave the base register untouched */ -#define ARMV4_5_STMIA(Rn, List, S, W) \ - (0xe8800000 | ((S) << 22) | ((W) << 21) | ((Rn) << 16) | (List)) +#define ARMV4_5_STMIA(rn, list, s, w) \ + (0xe8800000 | ((s) << 22) | ((w) << 21) | ((rn) << 16) | (list)) /* Load multiple increment after - * Rn: base register - * List: for each bit in list: store register - * S: in privileged mode: store user-mode registers - * W = 1: update the base register. W = 0: leave the base register untouched + * rn: base register + * list: for each bit in list: store register + * s: in privileged mode: store user-mode registers + * w = 1: update the base register. w = 0: leave the base register untouched */ -#define ARMV4_5_LDMIA(Rn, List, S, W) \ - (0xe8900000 | ((S) << 22) | ((W) << 21) | ((Rn) << 16) | (List)) +#define ARMV4_5_LDMIA(rn, list, s, w) \ + (0xe8900000 | ((s) << 22) | ((w) << 21) | ((rn) << 16) | (list)) /* MOV r8, r8 */ #define ARMV4_5_NOP (0xe1a08008) /* Move PSR to general purpose register - * R = 1: SPSR R = 0: CPSR - * Rn: target register + * r = 1: SPSR r = 0: CPSR + * rn: target register */ -#define ARMV4_5_MRS(Rn, R) (0xe10f0000 | ((R) << 22) | ((Rn) << 12)) +#define ARMV4_5_MRS(rn, r) (0xe10f0000 | ((r) << 22) | ((rn) << 12)) /* Store register - * Rd: register to store - * Rn: base register + * rd: register to store + * rn: base register */ -#define ARMV4_5_STR(Rd, Rn) (0xe5800000 | ((Rd) << 12) | ((Rn) << 16)) +#define ARMV4_5_STR(rd, rn) (0xe5800000 | ((rd) << 12) | ((rn) << 16)) /* Load register - * Rd: register to load - * Rn: base register + * rd: register to load + * rn: base register */ -#define ARMV4_5_LDR(Rd, Rn) (0xe5900000 | ((Rd) << 12) | ((Rn) << 16)) +#define ARMV4_5_LDR(rd, rn) (0xe5900000 | ((rd) << 12) | ((rn) << 16)) /* Move general purpose register to PSR - * R = 1: SPSR R = 0: CPSR - * Field: Field mask + * r = 1: SPSR r = 0: CPSR + * field: Field mask * 1: control field 2: extension field 4: status field 8: flags field - * Rm: source register + * rm: source register */ -#define ARMV4_5_MSR_GP(Rm, Field, R) \ - (0xe120f000 | (Rm) | ((Field) << 16) | ((R) << 22)) -#define ARMV4_5_MSR_IM(Im, Rotate, Field, R) \ - (0xe320f000 | (Im) | ((Rotate) << 8) | ((Field) << 16) | ((R) << 22)) +#define ARMV4_5_MSR_GP(rm, field, r) \ + (0xe120f000 | (rm) | ((field) << 16) | ((r) << 22)) +#define ARMV4_5_MSR_IM(im, rotate, field, r) \ + (0xe320f000 | (im) | ((rotate) << 8) | ((field) << 16) | ((r) << 22)) /* Load Register Word Immediate Post-Index - * Rd: register to load - * Rn: base register + * rd: register to load + * rn: base register */ -#define ARMV4_5_LDRW_IP(Rd, Rn) (0xe4900004 | ((Rd) << 12) | ((Rn) << 16)) +#define ARMV4_5_LDRW_IP(rd, rn) (0xe4900004 | ((rd) << 12) | ((rn) << 16)) /* Load Register Halfword Immediate Post-Index - * Rd: register to load - * Rn: base register + * rd: register to load + * rn: base register */ -#define ARMV4_5_LDRH_IP(Rd, Rn) (0xe0d000b2 | ((Rd) << 12) | ((Rn) << 16)) +#define ARMV4_5_LDRH_IP(rd, rn) (0xe0d000b2 | ((rd) << 12) | ((rn) << 16)) /* Load Register Byte Immediate Post-Index - * Rd: register to load - * Rn: base register + * rd: register to load + * rn: base register */ -#define ARMV4_5_LDRB_IP(Rd, Rn) (0xe4d00001 | ((Rd) << 12) | ((Rn) << 16)) +#define ARMV4_5_LDRB_IP(rd, rn) (0xe4d00001 | ((rd) << 12) | ((rn) << 16)) /* Store register Word Immediate Post-Index - * Rd: register to store - * Rn: base register + * rd: register to store + * rn: base register */ -#define ARMV4_5_STRW_IP(Rd, Rn) (0xe4800004 | ((Rd) << 12) | ((Rn) << 16)) +#define ARMV4_5_STRW_IP(rd, rn) (0xe4800004 | ((rd) << 12) | ((rn) << 16)) /* Store register Halfword Immediate Post-Index - * Rd: register to store - * Rn: base register + * rd: register to store + * rn: base register */ -#define ARMV4_5_STRH_IP(Rd, Rn) (0xe0c000b2 | ((Rd) << 12) | ((Rn) << 16)) +#define ARMV4_5_STRH_IP(rd, rn) (0xe0c000b2 | ((rd) << 12) | ((rn) << 16)) /* Store register Byte Immediate Post-Index - * Rd: register to store - * Rn: base register + * rd: register to store + * rn: base register */ -#define ARMV4_5_STRB_IP(Rd, Rn) (0xe4c00001 | ((Rd) << 12) | ((Rn) << 16)) +#define ARMV4_5_STRB_IP(rd, rn) (0xe4c00001 | ((rd) << 12) | ((rn) << 16)) /* Branch (and Link) - * Im: Branch target (left-shifted by 2 bits, added to PC) - * L: 1: branch and link 0: branch only + * im: Branch target (left-shifted by 2 bits, added to PC) + * l: 1: branch and link 0: branch only */ -#define ARMV4_5_B(Im, L) (0xea000000 | (Im) | ((L) << 24)) +#define ARMV4_5_B(im, l) (0xea000000 | (im) | ((l) << 24)) /* Branch and exchange (ARM state) - * Rm: register holding branch target address + * rm: register holding branch target address */ -#define ARMV4_5_BX(Rm) (0xe12fff10 | (Rm)) +#define ARMV4_5_BX(rm) (0xe12fff10 | (rm)) /* Copies two words from two ARM core registers * into a doubleword extension register, or * from a doubleword extension register to two ARM core registers. * See Armv7-A arch reference manual section A8.8.345 - * Rt: Arm core register 1 - * Rt2: Arm core register 2 - * Vm: The doubleword extension register - * M: m = UInt(M:Vm); + * rt: Arm core register 1 + * rt2: Arm core register 2 + * vm: The doubleword extension register + * m: m = UInt(m:vm); * op: to_arm_registers = (op == ‘1’); */ -#define ARMV4_5_VMOV(op, Rt2, Rt, M, Vm) \ - (0xec400b10 | ((op) << 20) | ((Rt2) << 16) | \ - ((Rt) << 12) | ((M) << 5) | (Vm)) +#define ARMV4_5_VMOV(op, rt2, rt, m, vm) \ + (0xec400b10 | ((op) << 20) | ((rt2) << 16) | \ + ((rt) << 12) | ((m) << 5) | (vm)) /* Moves the value of the FPSCR to an ARM core register - * Rt: Arm core register + * rt: Arm core register */ -#define ARMV4_5_VMRS(Rt) (0xeef10a10 | ((Rt) << 12)) +#define ARMV4_5_VMRS(rt) (0xeef10a10 | ((rt) << 12)) /* Moves the value of an ARM core register to the FPSCR. - * Rt: Arm core register + * rt: Arm core register */ -#define ARMV4_5_VMSR(Rt) (0xeee10a10 | ((Rt) << 12)) +#define ARMV4_5_VMSR(rt) (0xeee10a10 | ((rt) << 12)) /* Store data from coprocessor to consecutive memory * See Armv7-A arch doc section A8.6.187 - * P: 1=index mode (offset from Rn) - * U: 1=add, 0=subtract Rn address with imm - * D: Opcode D encoding - * W: write back the offset start address to the Rn register - * CP: Coprocessor number (4 bits) - * CRd: Coprocessor source register (4 bits) - * Rn: Base register for memory address (4 bits) + * p: 1=index mode (offset from rn) + * u: 1=add, 0=subtract rn address with imm + * d: Opcode D encoding + * w: write back the offset start address to the rn register + * cp: Coprocessor number (4 bits) + * crd: Coprocessor source register (4 bits) + * rn: Base register for memory address (4 bits) * imm: Immediate value (0 - 1020, must be divisible by 4) */ -#define ARMV4_5_STC(P, U, D, W, CP, CRd, Rn, imm) \ - (0xec000000 | ((P) << 24) | ((U) << 23) | ((D) << 22) | \ - ((W) << 21) | ((Rn) << 16) | ((CRd) << 12) | ((CP) << 8) | ((imm)>>2)) +#define ARMV4_5_STC(p, u, d, w, cp, crd, rn, imm) \ + (0xec000000 | ((p) << 24) | ((u) << 23) | ((d) << 22) | \ + ((w) << 21) | ((rn) << 16) | ((crd) << 12) | ((cp) << 8) | ((imm)>>2)) /* Loads data from consecutive memory to coprocessor * See Armv7-A arch doc section A8.6.51 - * P: 1=index mode (offset from Rn) - * U: 1=add, 0=subtract Rn address with imm - * D: Opcode D encoding - * W: write back the offset start address to the Rn register - * CP: Coprocessor number (4 bits) - * CRd: Coprocessor dest register (4 bits) - * Rn: Base register for memory address (4 bits) + * p: 1=index mode (offset from rn) + * u: 1=add, 0=subtract rn address with imm + * d: Opcode D encoding + * w: write back the offset start address to the rn register + * cp: Coprocessor number (4 bits) + * crd: Coprocessor dest register (4 bits) + * rn: Base register for memory address (4 bits) * imm: Immediate value (0 - 1020, must be divisible by 4) */ -#define ARMV4_5_LDC(P, U, D, W, CP, CRd, Rn, imm) \ - (0xec100000 | ((P) << 24) | ((U) << 23) | ((D) << 22) | \ - ((W) << 21) | ((Rn) << 16) | ((CRd) << 12) | ((CP) << 8) | ((imm) >> 2)) +#define ARMV4_5_LDC(p, u, d, w, cp, crd, rn, imm) \ + (0xec100000 | ((p) << 24) | ((u) << 23) | ((d) << 22) | \ + ((w) << 21) | ((rn) << 16) | ((crd) << 12) | ((cp) << 8) | ((imm) >> 2)) /* Move to ARM register from coprocessor - * CP: Coprocessor number + * cp: Coprocessor number * op1: Coprocessor opcode - * Rd: destination register - * CRn: first coprocessor operand - * CRm: second coprocessor operand + * rd: destination register + * crn: first coprocessor operand + * crm: second coprocessor operand * op2: Second coprocessor opcode */ -#define ARMV4_5_MRC(CP, op1, Rd, CRn, CRm, op2) \ - (0xee100010 | (CRm) | ((op2) << 5) | ((CP) << 8) \ - | ((Rd) << 12) | ((CRn) << 16) | ((op1) << 21)) +#define ARMV4_5_MRC(cp, op1, rd, crn, crm, op2) \ + (0xee100010 | (crm) | ((op2) << 5) | ((cp) << 8) \ + | ((rd) << 12) | ((crn) << 16) | ((op1) << 21)) /* Move to coprocessor from ARM register - * CP: Coprocessor number + * cp: Coprocessor number * op1: Coprocessor opcode - * Rd: destination register - * CRn: first coprocessor operand - * CRm: second coprocessor operand + * rd: destination register + * crn: first coprocessor operand + * crm: second coprocessor operand * op2: Second coprocessor opcode */ -#define ARMV4_5_MCR(CP, op1, Rd, CRn, CRm, op2) \ - (0xee000010 | (CRm) | ((op2) << 5) | ((CP) << 8) \ - | ((Rd) << 12) | ((CRn) << 16) | ((op1) << 21)) +#define ARMV4_5_MCR(cp, op1, rd, crn, crm, op2) \ + (0xee000010 | (crm) | ((op2) << 5) | ((cp) << 8) \ + | ((rd) << 12) | ((crn) << 16) | ((op1) << 21)) /* Breakpoint instruction (ARMv5) - * Im: 16-bit immediate + * im: 16-bit immediate */ -#define ARMV5_BKPT(Im) (0xe1200070 | ((Im & 0xfff0) << 4) | (Im & 0xf)) +#define ARMV5_BKPT(im) (0xe1200070 | ((im & 0xfff0) << 4) | (im & 0xf)) /* Thumb mode instructions @@ -228,45 +228,45 @@ */ /* Store register (Thumb mode) - * Rd: source register - * Rn: base register + * rd: source register + * rn: base register */ -#define ARMV4_5_T_STR(Rd, Rn) \ - ((0x6000 | (Rd) | ((Rn) << 3)) | \ - ((0x6000 | (Rd) | ((Rn) << 3)) << 16)) +#define ARMV4_5_T_STR(rd, rn) \ + ((0x6000 | (rd) | ((rn) << 3)) | \ + ((0x6000 | (rd) | ((rn) << 3)) << 16)) /* Load register (Thumb state) - * Rd: destination register - * Rn: base register + * rd: destination register + * rn: base register */ -#define ARMV4_5_T_LDR(Rd, Rn) \ - ((0x6800 | ((Rn) << 3) | (Rd)) \ - | ((0x6800 | ((Rn) << 3) | (Rd)) << 16)) +#define ARMV4_5_T_LDR(rd, rn) \ + ((0x6800 | ((rn) << 3) | (rd)) \ + | ((0x6800 | ((rn) << 3) | (rd)) << 16)) /* Load multiple (Thumb state) - * Rn: base register - * List: for each bit in list: store register + * rn: base register + * list: for each bit in list: store register */ -#define ARMV4_5_T_LDMIA(Rn, List) \ - ((0xc800 | ((Rn) << 8) | (List)) \ - | ((0xc800 | ((Rn) << 8) | (List)) << 16)) +#define ARMV4_5_T_LDMIA(rn, list) \ + ((0xc800 | ((rn) << 8) | (list)) \ + | ((0xc800 | ((rn) << 8) | (list)) << 16)) /* Load register with PC relative addressing - * Rd: register to load + * rd: register to load */ -#define ARMV4_5_T_LDR_PCREL(Rd) \ - ((0x4800 | ((Rd) << 8)) \ - | ((0x4800 | ((Rd) << 8)) << 16)) +#define ARMV4_5_T_LDR_PCREL(rd) \ + ((0x4800 | ((rd) << 8)) \ + | ((0x4800 | ((rd) << 8)) << 16)) /* Move hi register (Thumb mode) - * Rd: destination register - * Rm: source register + * rd: destination register + * rm: source register */ -#define ARMV4_5_T_MOV(Rd, Rm) \ - ((0x4600 | ((Rd) & 0x7) | (((Rd) & 0x8) << 4) | \ - (((Rm) & 0x7) << 3) | (((Rm) & 0x8) << 3)) \ - | ((0x4600 | ((Rd) & 0x7) | (((Rd) & 0x8) << 4) | \ - (((Rm) & 0x7) << 3) | (((Rm) & 0x8) << 3)) << 16)) +#define ARMV4_5_T_MOV(rd, rm) \ + ((0x4600 | ((rd) & 0x7) | (((rd) & 0x8) << 4) | \ + (((rm) & 0x7) << 3) | (((rm) & 0x8) << 3)) \ + | ((0x4600 | ((rd) & 0x7) | (((rd) & 0x8) << 4) | \ + (((rm) & 0x7) << 3) | (((rm) & 0x8) << 3)) << 16)) /* No operation (Thumb mode) * NOTE: this is "MOV r8, r8" ... Thumb2 adds two @@ -275,63 +275,63 @@ #define ARMV4_5_T_NOP (0x46c0 | (0x46c0 << 16)) /* Move immediate to register (Thumb state) - * Rd: destination register - * Im: 8-bit immediate value + * rd: destination register + * im: 8-bit immediate value */ -#define ARMV4_5_T_MOV_IM(Rd, Im) \ - ((0x2000 | ((Rd) << 8) | (Im)) \ - | ((0x2000 | ((Rd) << 8) | (Im)) << 16)) +#define ARMV4_5_T_MOV_IM(rd, im) \ + ((0x2000 | ((rd) << 8) | (im)) \ + | ((0x2000 | ((rd) << 8) | (im)) << 16)) /* Branch and Exchange - * Rm: register containing branch target + * rm: register containing branch target */ -#define ARMV4_5_T_BX(Rm) \ - ((0x4700 | ((Rm) << 3)) \ - | ((0x4700 | ((Rm) << 3)) << 16)) +#define ARMV4_5_T_BX(rm) \ + ((0x4700 | ((rm) << 3)) \ + | ((0x4700 | ((rm) << 3)) << 16)) /* Branch (Thumb state) - * Imm: Branch target + * imm: Branch target */ -#define ARMV4_5_T_B(Imm) \ - ((0xe000 | (Imm)) \ - | ((0xe000 | (Imm)) << 16)) +#define ARMV4_5_T_B(imm) \ + ((0xe000 | (imm)) \ + | ((0xe000 | (imm)) << 16)) /* Breakpoint instruction (ARMv5) (Thumb state) * Im: 8-bit immediate */ -#define ARMV5_T_BKPT(Im) \ - ((0xbe00 | (Im)) \ - | ((0xbe00 | (Im)) << 16)) +#define ARMV5_T_BKPT(im) \ + ((0xbe00 | (im)) \ + | ((0xbe00 | (im)) << 16)) /* Move to Register from Special Register * 32 bit Thumb2 instruction - * Rd: destination register - * SYSm: source special register + * rd: destination register + * sysm: source special register */ -#define ARM_T2_MRS(Rd, SYSm) \ - ((0xF3EF) | ((0x8000 | (Rd << 8) | SYSm) << 16)) +#define ARM_T2_MRS(rd, sysm) \ + ((0xF3EF) | ((0x8000 | (rd << 8) | sysm) << 16)) /* Move from Register from Special Register * 32 bit Thumb2 instruction - * Rd: source register - * SYSm: destination special register + * rd: source register + * sysm: destination special register */ -#define ARM_T2_MSR(SYSm, Rn) \ - ((0xF380 | (Rn << 8)) | ((0x8800 | SYSm) << 16)) +#define ARM_T2_MSR(sysm, rn) \ + ((0xF380 | (rn << 8)) | ((0x8800 | sysm) << 16)) /* Change Processor State. * 16 bit Thumb2 instruction - * Rd: source register + * rd: source register * IF: A_FLAG and/or I_FLAG and/or F_FLAG */ #define A_FLAG 4 #define I_FLAG 2 #define F_FLAG 1 -#define ARM_T2_CPSID(IF) \ - ((0xB660 | (1 << 8) | ((IF)&0x3)) \ - | ((0xB660 | (1 << 8) | ((IF)&0x3)) << 16)) -#define ARM_T2_CPSIE(IF) \ - ((0xB660 | (0 << 8) | ((IF)&0x3)) \ - | ((0xB660 | (0 << 8) | ((IF)&0x3)) << 16)) +#define ARM_T2_CPSID(_if) \ + ((0xB660 | (1 << 8) | ((_if)&0x3)) \ + | ((0xB660 | (1 << 8) | ((_if)&0x3)) << 16)) +#define ARM_T2_CPSIE(_if) \ + ((0xB660 | (0 << 8) | ((_if)&0x3)) \ + | ((0xB660 | (0 << 8) | ((_if)&0x3)) << 16)) #endif /* OPENOCD_TARGET_ARM_OPCODES_H */ diff --git a/src/target/arm_semihosting.c b/src/target/arm_semihosting.c index 9de7048f4..1e5b5e252 100644 --- a/src/target/arm_semihosting.c +++ b/src/target/arm_semihosting.c @@ -367,7 +367,7 @@ int arm_semihosting(struct target *target, int *retval) } /* Check for ARM operation numbers. */ - if (0 <= semihosting->op && semihosting->op <= 0x31) { + if (semihosting->op >= 0 && semihosting->op <= 0x31) { *retval = semihosting_common(target); if (*retval != ERROR_OK) { LOG_ERROR("Failed semihosting operation (0x%02X)", semihosting->op); diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c index 245e108ac..480d9bc12 100644 --- a/src/target/arm_simulator.c +++ b/src/target/arm_simulator.c @@ -31,7 +31,7 @@ #include "register.h" #include -static uint32_t arm_shift(uint8_t shift, uint32_t Rm, +static uint32_t arm_shift(uint8_t shift, uint32_t rm, uint32_t shift_amount, uint8_t *carry) { uint32_t return_value = 0; @@ -39,22 +39,22 @@ static uint32_t arm_shift(uint8_t shift, uint32_t Rm, if (shift == 0x0) { /* LSL */ if ((shift_amount > 0) && (shift_amount <= 32)) { - return_value = Rm << shift_amount; - *carry = Rm >> (32 - shift_amount); + return_value = rm << shift_amount; + *carry = rm >> (32 - shift_amount); } else if (shift_amount > 32) { return_value = 0x0; *carry = 0x0; } else /* (shift_amount == 0) */ - return_value = Rm; + return_value = rm; } else if (shift == 0x1) { /* LSR */ if ((shift_amount > 0) && (shift_amount <= 32)) { - return_value = Rm >> shift_amount; - *carry = (Rm >> (shift_amount - 1)) & 1; + return_value = rm >> shift_amount; + *carry = (rm >> (shift_amount - 1)) & 1; } else if (shift_amount > 32) { return_value = 0x0; *carry = 0x0; } else /* (shift_amount == 0) */ - return_value = Rm; + return_value = rm; } else if (shift == 0x2) { /* ASR */ if ((shift_amount > 0) && (shift_amount <= 32)) { /* C right shifts of unsigned values are guaranteed to @@ -62,11 +62,11 @@ static uint32_t arm_shift(uint8_t shift, uint32_t Rm, * shift (shift in signed-bit) by adding the sign bit * manually */ - return_value = Rm >> shift_amount; - if (Rm & 0x80000000) + return_value = rm >> shift_amount; + if (rm & 0x80000000) return_value |= 0xffffffff << (32 - shift_amount); } else if (shift_amount > 32) { - if (Rm & 0x80000000) { + if (rm & 0x80000000) { return_value = 0xffffffff; *carry = 0x1; } else { @@ -74,20 +74,20 @@ static uint32_t arm_shift(uint8_t shift, uint32_t Rm, *carry = 0x0; } } else /* (shift_amount == 0) */ - return_value = Rm; + return_value = rm; } else if (shift == 0x3) { /* ROR */ if (shift_amount == 0) - return_value = Rm; + return_value = rm; else { shift_amount = shift_amount % 32; - return_value = (Rm >> shift_amount) | (Rm << (32 - shift_amount)); + return_value = (rm >> shift_amount) | (rm << (32 - shift_amount)); *carry = (return_value >> 31) & 0x1; } } else if (shift == 0x4) { /* RRX */ - return_value = Rm >> 1; + return_value = rm >> 1; if (*carry) - Rm |= 0x80000000; - *carry = Rm & 0x1; + rm |= 0x80000000; + *carry = rm & 0x1; } return return_value; @@ -111,25 +111,25 @@ static uint32_t arm_shifter_operand(struct arm_sim_interface *sim, if (variant == 0) /* 32-bit immediate */ return_value = shifter_operand.immediate.immediate; else if (variant == 1) {/* immediate shift */ - uint32_t Rm = sim->get_reg_mode(sim, shifter_operand.immediate_shift.Rm); + uint32_t rm = sim->get_reg_mode(sim, shifter_operand.immediate_shift.rm); /* adjust RM in case the PC is being read */ - if (shifter_operand.immediate_shift.Rm == 15) - Rm += 2 * instruction_size; + if (shifter_operand.immediate_shift.rm == 15) + rm += 2 * instruction_size; return_value = arm_shift(shifter_operand.immediate_shift.shift, - Rm, shifter_operand.immediate_shift.shift_imm, + rm, shifter_operand.immediate_shift.shift_imm, shifter_carry_out); } else if (variant == 2) { /* register shift */ - uint32_t Rm = sim->get_reg_mode(sim, shifter_operand.register_shift.Rm); - uint32_t Rs = sim->get_reg_mode(sim, shifter_operand.register_shift.Rs); + uint32_t rm = sim->get_reg_mode(sim, shifter_operand.register_shift.rm); + uint32_t rs = sim->get_reg_mode(sim, shifter_operand.register_shift.rs); /* adjust RM in case the PC is being read */ - if (shifter_operand.register_shift.Rm == 15) - Rm += 2 * instruction_size; + if (shifter_operand.register_shift.rm == 15) + rm += 2 * instruction_size; return_value = arm_shift(shifter_operand.immediate_shift.shift, - Rm, Rs, shifter_carry_out); + rm, rs, shifter_carry_out); } else { LOG_ERROR("BUG: shifter_operand.variant not 0, 1 or 2"); return_value = 0xffffffff; @@ -324,8 +324,8 @@ static int arm_simulate_step_core(struct target *target, sim->set_reg(sim, 15, target_address); else if (instruction.type == ARM_BL) { uint32_t old_pc = sim->get_reg(sim, 15); - int T = (sim->get_state(sim) == ARM_STATE_THUMB); - sim->set_reg_mode(sim, 14, old_pc + 4 + T); + int t = (sim->get_state(sim) == ARM_STATE_THUMB); + sim->set_reg_mode(sim, 14, old_pc + 4 + t); sim->set_reg(sim, 15, target_address); } else if (instruction.type == ARM_BX) { if (target_address & 0x1) @@ -335,8 +335,8 @@ static int arm_simulate_step_core(struct target *target, sim->set_reg(sim, 15, target_address & 0xfffffffe); } else if (instruction.type == ARM_BLX) { uint32_t old_pc = sim->get_reg(sim, 15); - int T = (sim->get_state(sim) == ARM_STATE_THUMB); - sim->set_reg_mode(sim, 14, old_pc + 4 + T); + int t = (sim->get_state(sim) == ARM_STATE_THUMB); + sim->set_reg_mode(sim, 14, old_pc + 4 + t); if (target_address & 0x1) sim->set_state(sim, ARM_STATE_THUMB); @@ -351,16 +351,16 @@ static int arm_simulate_step_core(struct target *target, /* data processing instructions, except compare instructions (CMP, CMN, TST, TEQ) */ else if (((instruction.type >= ARM_AND) && (instruction.type <= ARM_RSC)) || ((instruction.type >= ARM_ORR) && (instruction.type <= ARM_MVN))) { - uint32_t Rd, Rn, shifter_operand; - uint8_t C = sim->get_cpsr(sim, 29, 1); + uint32_t rd, rn, shifter_operand; + uint8_t c = sim->get_cpsr(sim, 29, 1); uint8_t carry_out; - Rd = 0x0; + rd = 0x0; /* ARM_MOV and ARM_MVN does not use Rn */ if ((instruction.type != ARM_MOV) && (instruction.type != ARM_MVN)) - Rn = sim->get_reg_mode(sim, instruction.info.data_proc.Rn); + rn = sim->get_reg_mode(sim, instruction.info.data_proc.rn); else - Rn = 0; + rn = 0; shifter_operand = arm_shifter_operand(sim, instruction.info.data_proc.variant, @@ -368,53 +368,53 @@ static int arm_simulate_step_core(struct target *target, &carry_out); /* adjust Rn in case the PC is being read */ - if (instruction.info.data_proc.Rn == 15) - Rn += 2 * instruction_size; + if (instruction.info.data_proc.rn == 15) + rn += 2 * instruction_size; if (instruction.type == ARM_AND) - Rd = Rn & shifter_operand; + rd = rn & shifter_operand; else if (instruction.type == ARM_EOR) - Rd = Rn ^ shifter_operand; + rd = rn ^ shifter_operand; else if (instruction.type == ARM_SUB) - Rd = Rn - shifter_operand; + rd = rn - shifter_operand; else if (instruction.type == ARM_RSB) - Rd = shifter_operand - Rn; + rd = shifter_operand - rn; else if (instruction.type == ARM_ADD) - Rd = Rn + shifter_operand; + rd = rn + shifter_operand; else if (instruction.type == ARM_ADC) - Rd = Rn + shifter_operand + (C & 1); + rd = rn + shifter_operand + (c & 1); else if (instruction.type == ARM_SBC) - Rd = Rn - shifter_operand - (C & 1) ? 0 : 1; + rd = rn - shifter_operand - (c & 1) ? 0 : 1; else if (instruction.type == ARM_RSC) - Rd = shifter_operand - Rn - (C & 1) ? 0 : 1; + rd = shifter_operand - rn - (c & 1) ? 0 : 1; else if (instruction.type == ARM_ORR) - Rd = Rn | shifter_operand; + rd = rn | shifter_operand; else if (instruction.type == ARM_BIC) - Rd = Rn & ~(shifter_operand); + rd = rn & ~(shifter_operand); else if (instruction.type == ARM_MOV) - Rd = shifter_operand; + rd = shifter_operand; else if (instruction.type == ARM_MVN) - Rd = ~shifter_operand; + rd = ~shifter_operand; else LOG_WARNING("unhandled instruction type"); if (dry_run_pc) { - if (instruction.info.data_proc.Rd == 15) - *dry_run_pc = Rd & ~1; + if (instruction.info.data_proc.rd == 15) + *dry_run_pc = rd & ~1; else *dry_run_pc = current_pc + instruction_size; return ERROR_OK; } else { - if (instruction.info.data_proc.Rd == 15) { - sim->set_reg_mode(sim, 15, Rd & ~1); - if (Rd & 1) + if (instruction.info.data_proc.rd == 15) { + sim->set_reg_mode(sim, 15, rd & ~1); + if (rd & 1) sim->set_state(sim, ARM_STATE_THUMB); else sim->set_state(sim, ARM_STATE_ARM); return ERROR_OK; } - sim->set_reg_mode(sim, instruction.info.data_proc.Rd, Rd); + sim->set_reg_mode(sim, instruction.info.data_proc.rd, rd); LOG_WARNING("no updating of flags yet"); } } @@ -429,31 +429,31 @@ static int arm_simulate_step_core(struct target *target, /* load register instructions */ else if ((instruction.type >= ARM_LDR) && (instruction.type <= ARM_LDRSH)) { uint32_t load_address = 0, modified_address = 0, load_value = 0; - uint32_t Rn = sim->get_reg_mode(sim, instruction.info.load_store.Rn); + uint32_t rn = sim->get_reg_mode(sim, instruction.info.load_store.rn); /* adjust Rn in case the PC is being read */ - if (instruction.info.load_store.Rn == 15) - Rn += 2 * instruction_size; + if (instruction.info.load_store.rn == 15) + rn += 2 * instruction_size; if (instruction.info.load_store.offset_mode == 0) { - if (instruction.info.load_store.U) - modified_address = Rn + instruction.info.load_store.offset.offset; + if (instruction.info.load_store.u) + modified_address = rn + instruction.info.load_store.offset.offset; else - modified_address = Rn - instruction.info.load_store.offset.offset; + modified_address = rn - instruction.info.load_store.offset.offset; } else if (instruction.info.load_store.offset_mode == 1) { uint32_t offset; - uint32_t Rm = sim->get_reg_mode(sim, - instruction.info.load_store.offset.reg.Rm); + uint32_t rm = sim->get_reg_mode(sim, + instruction.info.load_store.offset.reg.rm); uint8_t shift = instruction.info.load_store.offset.reg.shift; uint8_t shift_imm = instruction.info.load_store.offset.reg.shift_imm; uint8_t carry = sim->get_cpsr(sim, 29, 1); - offset = arm_shift(shift, Rm, shift_imm, &carry); + offset = arm_shift(shift, rm, shift_imm, &carry); - if (instruction.info.load_store.U) - modified_address = Rn + offset; + if (instruction.info.load_store.u) + modified_address = rn + offset; else - modified_address = Rn - offset; + modified_address = rn - offset; } else LOG_ERROR("BUG: offset_mode neither 0 (offset) nor 1 (scaled register)"); @@ -463,7 +463,7 @@ static int arm_simulate_step_core(struct target *target, * the base address register */ load_address = modified_address; - modified_address = Rn; + modified_address = rn; } else if (instruction.info.load_store.index_mode == 1) { /* pre-indexed mode * we load from the modified address, and write it @@ -475,17 +475,17 @@ static int arm_simulate_step_core(struct target *target, * we load from the unmodified address, and write the * modified address back */ - load_address = Rn; + load_address = rn; } - if ((!dry_run_pc) || (instruction.info.load_store.Rd == 15)) { + if ((!dry_run_pc) || (instruction.info.load_store.rd == 15)) { retval = target_read_u32(target, load_address, &load_value); if (retval != ERROR_OK) return retval; } if (dry_run_pc) { - if (instruction.info.load_store.Rd == 15) + if (instruction.info.load_store.rd == 15) *dry_run_pc = load_value & ~1; else *dry_run_pc = current_pc + instruction_size; @@ -494,10 +494,10 @@ static int arm_simulate_step_core(struct target *target, if ((instruction.info.load_store.index_mode == 1) || (instruction.info.load_store.index_mode == 2)) sim->set_reg_mode(sim, - instruction.info.load_store.Rn, + instruction.info.load_store.rn, modified_address); - if (instruction.info.load_store.Rd == 15) { + if (instruction.info.load_store.rd == 15) { sim->set_reg_mode(sim, 15, load_value & ~1); if (load_value & 1) sim->set_state(sim, ARM_STATE_THUMB); @@ -505,13 +505,13 @@ static int arm_simulate_step_core(struct target *target, sim->set_state(sim, ARM_STATE_ARM); return ERROR_OK; } - sim->set_reg_mode(sim, instruction.info.load_store.Rd, load_value); + sim->set_reg_mode(sim, instruction.info.load_store.rd, load_value); } } /* load multiple instruction */ else if (instruction.type == ARM_LDM) { int i; - uint32_t Rn = sim->get_reg_mode(sim, instruction.info.load_store_multiple.Rn); + uint32_t rn = sim->get_reg_mode(sim, instruction.info.load_store_multiple.rn); uint32_t load_values[16]; int bits_set = 0; @@ -522,24 +522,24 @@ static int arm_simulate_step_core(struct target *target, switch (instruction.info.load_store_multiple.addressing_mode) { case 0: /* Increment after */ - /* Rn = Rn; */ + /* rn = rn; */ break; case 1: /* Increment before */ - Rn = Rn + 4; + rn = rn + 4; break; case 2: /* Decrement after */ - Rn = Rn - (bits_set * 4) + 4; + rn = rn - (bits_set * 4) + 4; break; case 3: /* Decrement before */ - Rn = Rn - (bits_set * 4); + rn = rn - (bits_set * 4); break; } for (i = 0; i < 16; i++) { if (instruction.info.load_store_multiple.register_list & (1 << i)) { if ((!dry_run_pc) || (i == 15)) - target_read_u32(target, Rn, &load_values[i]); - Rn += 4; + target_read_u32(target, rn, &load_values[i]); + rn += 4; } } @@ -551,7 +551,7 @@ static int arm_simulate_step_core(struct target *target, } else { int update_cpsr = 0; - if (instruction.info.load_store_multiple.S) { + if (instruction.info.load_store_multiple.s) { if (instruction.info.load_store_multiple.register_list & 0x8000) update_cpsr = 1; } @@ -576,8 +576,8 @@ static int arm_simulate_step_core(struct target *target, } /* base register writeback */ - if (instruction.info.load_store_multiple.W) - sim->set_reg_mode(sim, instruction.info.load_store_multiple.Rn, Rn); + if (instruction.info.load_store_multiple.w) + sim->set_reg_mode(sim, instruction.info.load_store_multiple.rn, rn); if (instruction.info.load_store_multiple.register_list & 0x8000) @@ -591,8 +591,8 @@ static int arm_simulate_step_core(struct target *target, if (dry_run_pc) { /* STM wont affect PC (advance by instruction size */ } else { - uint32_t Rn = sim->get_reg_mode(sim, - instruction.info.load_store_multiple.Rn); + uint32_t rn = sim->get_reg_mode(sim, + instruction.info.load_store_multiple.rn); int bits_set = 0; for (i = 0; i < 16; i++) { @@ -602,30 +602,30 @@ static int arm_simulate_step_core(struct target *target, switch (instruction.info.load_store_multiple.addressing_mode) { case 0: /* Increment after */ - /* Rn = Rn; */ + /* rn = rn; */ break; case 1: /* Increment before */ - Rn = Rn + 4; + rn = rn + 4; break; case 2: /* Decrement after */ - Rn = Rn - (bits_set * 4) + 4; + rn = rn - (bits_set * 4) + 4; break; case 3: /* Decrement before */ - Rn = Rn - (bits_set * 4); + rn = rn - (bits_set * 4); break; } for (i = 0; i < 16; i++) { if (instruction.info.load_store_multiple.register_list & (1 << i)) { - target_write_u32(target, Rn, sim->get_reg_mode(sim, i)); - Rn += 4; + target_write_u32(target, rn, sim->get_reg_mode(sim, i)); + rn += 4; } } /* base register writeback */ - if (instruction.info.load_store_multiple.W) + if (instruction.info.load_store_multiple.w) sim->set_reg_mode(sim, - instruction.info.load_store_multiple.Rn, Rn); + instruction.info.load_store_multiple.rn, rn); } } else if (!dry_run_pc) { diff --git a/src/target/arm_tpiu_swo.c b/src/target/arm_tpiu_swo.c index 6d1e94fa1..746ab393e 100644 --- a/src/target/arm_tpiu_swo.c +++ b/src/target/arm_tpiu_swo.c @@ -351,7 +351,7 @@ static const struct jim_nvp nvp_arm_tpiu_swo_bool_opts[] = { static int arm_tpiu_swo_configure(struct jim_getopt_info *goi, struct arm_tpiu_swo_object *obj) { - assert(obj != NULL); + assert(obj); if (goi->isconfigure && obj->enabled) { Jim_SetResultFormatted(goi->interp, "Cannot configure TPIU/SWO; %s is enabled!", obj->name); @@ -866,7 +866,7 @@ static int arm_tpiu_swo_create(Jim_Interp *interp, struct arm_tpiu_swo_object *o int e; cmd_ctx = current_command_context(interp); - assert(cmd_ctx != NULL); + assert(cmd_ctx); /* does this command exist? */ cmd = Jim_GetCommand(interp, Jim_NewStringObj(interp, obj->name, -1), JIM_ERRMSG); @@ -887,7 +887,7 @@ static int arm_tpiu_swo_create(Jim_Interp *interp, struct arm_tpiu_swo_object *o COMMAND_REGISTRATION_DONE }; e = register_commands_with_data(cmd_ctx, NULL, obj_commands, obj); - if (ERROR_OK != e) + if (e != ERROR_OK) return JIM_ERR; list_add_tail(&obj->lh, &all_tpiu_swo); @@ -1037,7 +1037,7 @@ COMMAND_HANDLER(handle_tpiu_deprecated_config_command) } unsigned int cmd_idx = 0; - if (CMD_ARGC == cmd_idx) + if (cmd_idx == CMD_ARGC) return ERROR_COMMAND_SYNTAX_ERROR; if (!strcmp(CMD_ARGV[cmd_idx], "disable")) { @@ -1055,18 +1055,18 @@ COMMAND_HANDLER(handle_tpiu_deprecated_config_command) const char *pin_clk = NULL; if (!strcmp(CMD_ARGV[cmd_idx], "internal")) { cmd_idx++; - if (CMD_ARGC == cmd_idx) + if (cmd_idx == CMD_ARGC) return ERROR_COMMAND_SYNTAX_ERROR; output = CMD_ARGV[cmd_idx]; } else if (strcmp(CMD_ARGV[cmd_idx], "external")) return ERROR_COMMAND_SYNTAX_ERROR; cmd_idx++; - if (CMD_ARGC == cmd_idx) + if (cmd_idx == CMD_ARGC) return ERROR_COMMAND_SYNTAX_ERROR; if (!strcmp(CMD_ARGV[cmd_idx], "sync")) { protocol = CMD_ARGV[cmd_idx]; cmd_idx++; - if (CMD_ARGC == cmd_idx) + if (cmd_idx == CMD_ARGC) return ERROR_COMMAND_SYNTAX_ERROR; port_width = CMD_ARGV[cmd_idx]; } else { @@ -1074,20 +1074,20 @@ COMMAND_HANDLER(handle_tpiu_deprecated_config_command) return ERROR_COMMAND_SYNTAX_ERROR; protocol = CMD_ARGV[cmd_idx]; cmd_idx++; - if (CMD_ARGC == cmd_idx) + if (cmd_idx == CMD_ARGC) return ERROR_COMMAND_SYNTAX_ERROR; formatter = CMD_ARGV[cmd_idx]; } cmd_idx++; - if (CMD_ARGC == cmd_idx) + if (cmd_idx == CMD_ARGC) return ERROR_COMMAND_SYNTAX_ERROR; trace_clk = CMD_ARGV[cmd_idx]; cmd_idx++; - if (CMD_ARGC != cmd_idx) { + if (cmd_idx != CMD_ARGC) { pin_clk = CMD_ARGV[cmd_idx]; cmd_idx++; } - if (CMD_ARGC != cmd_idx) + if (cmd_idx != CMD_ARGC) return ERROR_COMMAND_SYNTAX_ERROR; LOG_INFO(MSG "Running: \'%s configure -protocol %s -traceclk %s" "%s%s" "%s%s" "%s%s" "%s%s\'", diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 4e1febe04..b861cf5db 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -949,7 +949,7 @@ COMMAND_HANDLER(handle_arm_disassemble_command) #if HAVE_CAPSTONE struct target *target = get_current_target(CMD_CTX); - if (target == NULL) { + if (!target) { LOG_ERROR("No target selected"); return ERROR_FAIL; } @@ -1007,10 +1007,10 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) int retval; context = current_command_context(interp); - assert(context != NULL); + assert(context); target = get_current_target(context); - if (target == NULL) { + if (!target) { LOG_ERROR("%s: no current target", __func__); return JIM_ERR; } @@ -1033,8 +1033,8 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) int cpnum; uint32_t op1; uint32_t op2; - uint32_t CRn; - uint32_t CRm; + uint32_t crn; + uint32_t crm; uint32_t value; long l; @@ -1071,7 +1071,7 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) "CRn", (int) l); return JIM_ERR; } - CRn = l; + crn = l; retval = Jim_GetLong(interp, argv[4], &l); if (retval != JIM_OK) @@ -1081,7 +1081,7 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) "CRm", (int) l); return JIM_ERR; } - CRm = l; + crm = l; retval = Jim_GetLong(interp, argv[5], &l); if (retval != JIM_OK) @@ -1110,14 +1110,14 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) value = l; /* NOTE: parameters reordered! */ - /* ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2) */ - retval = arm->mcr(target, cpnum, op1, op2, CRn, CRm, value); + /* ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2) */ + retval = arm->mcr(target, cpnum, op1, op2, crn, crm, value); if (retval != ERROR_OK) return JIM_ERR; } else { /* NOTE: parameters reordered! */ - /* ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2) */ - retval = arm->mrc(target, cpnum, op1, op2, CRn, CRm, &value); + /* ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2) */ + retval = arm->mrc(target, cpnum, op1, op2, crn, crm, &value); if (retval != ERROR_OK) return JIM_ERR; @@ -1690,7 +1690,7 @@ static int arm_full_context(struct target *target) static int arm_default_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t *value) { LOG_ERROR("%s doesn't implement MRC", target_type_name(target)); @@ -1699,7 +1699,7 @@ static int arm_default_mrc(struct target *target, int cpnum, static int arm_default_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, - uint32_t CRn, uint32_t CRm, + uint32_t crn, uint32_t crm, uint32_t value) { LOG_ERROR("%s doesn't implement MCR", target_type_name(target)); diff --git a/src/target/armv7a.c b/src/target/armv7a.c index 5f7b008a2..6de79c389 100644 --- a/src/target/armv7a.c +++ b/src/target/armv7a.c @@ -50,7 +50,7 @@ static void armv7a_show_fault_registers(struct target *target) if (retval != ERROR_OK) return; - /* ARMV4_5_MRC(cpnum, op1, r0, CRn, CRm, op2) */ + /* ARMV4_5_MRC(cpnum, op1, r0, crn, crm, op2) */ /* c5/c0 - {data, instruction} fault status registers */ retval = dpm->instr_read_data_r0(dpm, @@ -282,7 +282,7 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd, } } - if (l2x_cache != NULL) + if (l2x_cache) command_print(cmd, "Outer unified cache Base Address 0x%" PRIx32 ", %" PRIu32 " ways", l2x_cache->base, l2x_cache->way); @@ -483,7 +483,7 @@ int armv7a_identify_cache(struct target *target) goto done; /* if no l2 cache initialize l1 data cache flush function function */ - if (armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache == NULL) { + if (!armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache) { armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache = armv7a_cache_auto_flush_all_data; } diff --git a/src/target/armv7a.h b/src/target/armv7a.h index 7b6219821..c282554a5 100644 --- a/src/target/armv7a.h +++ b/src/target/armv7a.h @@ -104,7 +104,7 @@ struct armv7a_common { /* Core Debug Unit */ struct arm_dpm dpm; - uint32_t debug_base; + target_addr_t debug_base; struct adiv5_ap *debug_ap; /* mdir */ uint8_t multi_processor_system; diff --git a/src/target/armv7a_mmu.c b/src/target/armv7a_mmu.c index b4234b24e..98a006508 100644 --- a/src/target/armv7a_mmu.c +++ b/src/target/armv7a_mmu.c @@ -245,7 +245,7 @@ COMMAND_HANDLER(armv7a_mmu_dump_table) LOG_USER("Page Directory at (phys): %8.8" TARGET_PRIxADDR, ttb); first_lvl_ptbl = malloc(sizeof(uint32_t)*(max_pt_idx+1)); - if (first_lvl_ptbl == NULL) + if (!first_lvl_ptbl) return ERROR_FAIL; /* diff --git a/src/target/armv7m.c b/src/target/armv7m.c index a9a5a381d..68da020a1 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -474,7 +474,7 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], size = ARMV7M_NUM_CORE_REGS; *reg_list = malloc(sizeof(struct reg *) * size); - if (*reg_list == NULL) + if (!*reg_list) return ERROR_FAIL; for (i = 0; i < size; i++) @@ -967,7 +967,7 @@ int armv7m_blank_check_memory(struct target *target, blocks_to_check = num_blocks; struct algo_block *params = malloc((blocks_to_check+1)*sizeof(struct algo_block)); - if (params == NULL) { + if (!params) { retval = ERROR_FAIL; goto cleanup1; } diff --git a/src/target/armv8.c b/src/target/armv8.c index 6d60a1ce8..749ea8729 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -204,7 +204,7 @@ static int armv8_read_reg(struct armv8_common *armv8, int regnum, uint64_t *regv break; } - if (retval == ERROR_OK && regval != NULL) + if (retval == ERROR_OK && regval) *regval = value_64; else retval = ERROR_FAIL; @@ -430,7 +430,7 @@ static int armv8_read_reg32(struct armv8_common *armv8, int regnum, uint64_t *re break; } - if (retval == ERROR_OK && regval != NULL) + if (retval == ERROR_OK && regval) *regval = value; return retval; @@ -727,7 +727,7 @@ static void armv8_show_fault_registers32(struct armv8_common *armv8) if (retval != ERROR_OK) return; - /* ARMV4_5_MRC(cpnum, op1, r0, CRn, CRm, op2) */ + /* ARMV4_5_MRC(cpnum, op1, r0, crn, crm, op2) */ /* c5/c0 - {data, instruction} fault status registers */ retval = dpm->instr_read_data_r0(dpm, @@ -1046,14 +1046,14 @@ COMMAND_HANDLER(armv8_handle_exception_catch_command) return retval; n = jim_nvp_value2name_simple(nvp_ecatch_modes, edeccr & 0x0f); - if (n->name != NULL) + if (n->name) sec = n->name; n = jim_nvp_value2name_simple(nvp_ecatch_modes, edeccr & 0xf0); - if (n->name != NULL) + if (n->name) nsec = n->name; - if (sec == NULL || nsec == NULL) { + if (!sec || !nsec) { LOG_WARNING("Exception Catch: unknown exception catch configuration: EDECCR = %02" PRIx32, edeccr & 0xff); return ERROR_FAIL; } @@ -1062,9 +1062,9 @@ COMMAND_HANDLER(armv8_handle_exception_catch_command) return ERROR_OK; } - while (CMD_ARGC > argp) { + while (argp < CMD_ARGC) { n = jim_nvp_name2value_simple(nvp_ecatch_modes, CMD_ARGV[argp]); - if (n->name == NULL) { + if (!n->name) { LOG_ERROR("Unknown option: %s", CMD_ARGV[argp]); return ERROR_FAIL; } @@ -1644,7 +1644,7 @@ struct reg_cache *armv8_build_reg_cache(struct target *target) reg_list[i].reg_data_type = calloc(1, sizeof(struct reg_data_type)); if (reg_list[i].reg_data_type) { - if (armv8_regs[i].data_type == NULL) + if (!armv8_regs[i].data_type) reg_list[i].reg_data_type->type = armv8_regs[i].type; else *reg_list[i].reg_data_type = *armv8_regs[i].data_type; @@ -1730,7 +1730,7 @@ void armv8_free_reg_cache(struct target *target) struct reg_cache *cache = NULL, *cache32 = NULL; cache = arm->core_cache; - if (cache != NULL) + if (cache) cache32 = cache->next; armv8_free_cache(cache32, true); armv8_free_cache(cache, false); @@ -1823,7 +1823,7 @@ int armv8_set_dbgreg_bits(struct armv8_common *armv8, unsigned int reg, unsigned /* Read register */ int retval = mem_ap_read_atomic_u32(armv8->debug_ap, armv8->debug_base + reg, &tmp); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* clear bitfield */ diff --git a/src/target/armv8.h b/src/target/armv8.h index f09f3abfd..c30739c8c 100644 --- a/src/target/armv8.h +++ b/src/target/armv8.h @@ -196,7 +196,7 @@ struct armv8_common { /* Core Debug Unit */ struct arm_dpm dpm; - uint32_t debug_base; + target_addr_t debug_base; struct adiv5_ap *debug_ap; const uint32_t *opcodes; diff --git a/src/target/armv8_cache.c b/src/target/armv8_cache.c index 86e4a5961..b668b8422 100644 --- a/src/target/armv8_cache.c +++ b/src/target/armv8_cache.c @@ -417,7 +417,7 @@ int armv8_identify_cache(struct armv8_common *armv8) armv8->armv8_mmu.armv8_cache.info = 1; /* if no l2 cache initialize l1 data cache flush function function */ - if (armv8->armv8_mmu.armv8_cache.flush_all_data_cache == NULL) { + if (!armv8->armv8_mmu.armv8_cache.flush_all_data_cache) { armv8->armv8_mmu.armv8_cache.display_cache_info = armv8_handle_inner_cache_info_command; armv8->armv8_mmu.armv8_cache.flush_all_data_cache = diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c index b36ef835c..188e58822 100644 --- a/src/target/armv8_dpm.c +++ b/src/target/armv8_dpm.c @@ -490,7 +490,7 @@ static int dpmv8_bpwp_disable(struct arm_dpm *dpm, unsigned index_t) /* Read coprocessor */ static int dpmv8_mrc(struct target *target, int cpnum, - uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, + uint32_t op1, uint32_t op2, uint32_t crn, uint32_t crm, uint32_t *value) { struct arm *arm = target_to_arm(target); @@ -502,12 +502,12 @@ static int dpmv8_mrc(struct target *target, int cpnum, return retval; LOG_DEBUG("MRC p%d, %d, r0, c%d, c%d, %d", cpnum, - (int) op1, (int) CRn, - (int) CRm, (int) op2); + (int) op1, (int) crn, + (int) crm, (int) op2); /* read coprocessor register into R0; return via DCC */ retval = dpm->instr_read_data_r0(dpm, - ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2), + ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2), value); /* (void) */ dpm->finish(dpm); @@ -515,7 +515,7 @@ static int dpmv8_mrc(struct target *target, int cpnum, } static int dpmv8_mcr(struct target *target, int cpnum, - uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, + uint32_t op1, uint32_t op2, uint32_t crn, uint32_t crm, uint32_t value) { struct arm *arm = target_to_arm(target); @@ -527,12 +527,12 @@ static int dpmv8_mcr(struct target *target, int cpnum, return retval; LOG_DEBUG("MCR p%d, %d, r0, c%d, c%d, %d", cpnum, - (int) op1, (int) CRn, - (int) CRm, (int) op2); + (int) op1, (int) crn, + (int) crm, (int) op2); /* read DCC into r0; then write coprocessor register from R0 */ retval = dpm->instr_write_data_r0(dpm, - ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2), + ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2), value); /* (void) */ dpm->finish(dpm); @@ -1410,7 +1410,7 @@ int armv8_dpm_setup(struct arm_dpm *dpm) arm->read_core_reg = armv8_dpm_read_core_reg; arm->write_core_reg = armv8_dpm_write_core_reg; - if (arm->core_cache == NULL) { + if (!arm->core_cache) { cache = armv8_build_reg_cache(target); if (!cache) return ERROR_FAIL; diff --git a/src/target/armv8_opcodes.h b/src/target/armv8_opcodes.h index 239c4c5f1..8c213ef4d 100644 --- a/src/target/armv8_opcodes.h +++ b/src/target/armv8_opcodes.h @@ -26,13 +26,13 @@ #define SYSTEM_CUREL_NONCH 0xF #define SYSTEM_AARCH64 0x1 -#define SYSTEM_AAR64_MODE_EL0t 0x0 -#define SYSTEM_AAR64_MODE_EL1t 0x4 -#define SYSTEM_AAR64_MODE_EL1h 0x5 -#define SYSTEM_AAR64_MODE_EL2t 0x8 -#define SYSTEM_AAR64_MODE_EL2h 0x9 -#define SYSTEM_AAR64_MODE_EL3t 0xC -#define SYSTEM_AAR64_MODE_EL3h 0xd +#define SYSTEM_AAR64_MODE_EL0T 0x0 +#define SYSTEM_AAR64_MODE_EL1T 0x4 +#define SYSTEM_AAR64_MODE_EL1H 0x5 +#define SYSTEM_AAR64_MODE_EL2T 0x8 +#define SYSTEM_AAR64_MODE_EL2H 0x9 +#define SYSTEM_AAR64_MODE_EL3T 0xC +#define SYSTEM_AAR64_MODE_EL3H 0xd #define SYSTEM_DAIF 0b1101101000010001 #define SYSTEM_DAIF_MASK 0x3C0 @@ -109,26 +109,26 @@ #define SYSTEM_ESR_EL2 0b1110001010010000 #define SYSTEM_ESR_EL3 0b1111001010010000 -#define ARMV8_MRS_DSPSR(Rt) (0xd53b4500 | (Rt)) -#define ARMV8_MSR_DSPSR(Rt) (0xd51b4500 | (Rt)) -#define ARMV8_MRS_DLR(Rt) (0xd53b4520 | (Rt)) -#define ARMV8_MSR_DLR(Rt) (0xd51b4520 | (Rt)) +#define ARMV8_MRS_DSPSR(rt) (0xd53b4500 | (rt)) +#define ARMV8_MSR_DSPSR(rt) (0xd51b4500 | (rt)) +#define ARMV8_MRS_DLR(rt) (0xd53b4520 | (rt)) +#define ARMV8_MSR_DLR(rt) (0xd51b4520 | (rt)) /* T32 instruction to access coprocessor registers */ -#define ARMV8_MCR_T1(cp, CRn, opc1, CRm, opc2, Rt) ARMV4_5_MCR(cp, opc1, Rt, CRn, CRm, opc2) -#define ARMV8_MRC_T1(cp, CRn, opc1, CRm, opc2, Rt) ARMV4_5_MRC(cp, opc1, Rt, CRn, CRm, opc2) +#define ARMV8_MCR_T1(cp, crn, opc1, crm, opc2, rt) ARMV4_5_MCR(cp, opc1, rt, crn, crm, opc2) +#define ARMV8_MRC_T1(cp, crn, opc1, crm, opc2, rt) ARMV4_5_MRC(cp, opc1, rt, crn, crm, opc2) /* T32 instructions to access DSPSR and DLR */ -#define ARMV8_MRC_DSPSR(Rt) ARMV8_MRC_T1(15, 4, 3, 5, 0, Rt) -#define ARMV8_MCR_DSPSR(Rt) ARMV8_MCR_T1(15, 4, 3, 5, 0, Rt) -#define ARMV8_MRC_DLR(Rt) ARMV8_MRC_T1(15, 4, 3, 5, 1, Rt) -#define ARMV8_MCR_DLR(Rt) ARMV8_MCR_T1(15, 4, 3, 5, 1, Rt) +#define ARMV8_MRC_DSPSR(rt) ARMV8_MRC_T1(15, 4, 3, 5, 0, rt) +#define ARMV8_MCR_DSPSR(rt) ARMV8_MCR_T1(15, 4, 3, 5, 0, rt) +#define ARMV8_MRC_DLR(rt) ARMV8_MRC_T1(15, 4, 3, 5, 1, rt) +#define ARMV8_MCR_DLR(rt) ARMV8_MCR_T1(15, 4, 3, 5, 1, rt) -#define ARMV8_DCPS1(IM) (0xd4a00001 | (((IM) & 0xFFFF) << 5)) -#define ARMV8_DCPS2(IM) (0xd4a00002 | (((IM) & 0xFFFF) << 5)) -#define ARMV8_DCPS3(IM) (0xd4a00003 | (((IM) & 0xFFFF) << 5)) -#define ARMV8_DCPS(EL, IM) (0xd4a00000 | (((IM) & 0xFFFF) << 5) | EL) -#define ARMV8_DCPS_T1(EL) (0xf78f8000 | EL) +#define ARMV8_DCPS1(im) (0xd4a00001 | (((im) & 0xFFFF) << 5)) +#define ARMV8_DCPS2(im) (0xd4a00002 | (((im) & 0xFFFF) << 5)) +#define ARMV8_DCPS3(im) (0xd4a00003 | (((im) & 0xFFFF) << 5)) +#define ARMV8_DCPS(el, im) (0xd4a00000 | (((im) & 0xFFFF) << 5) | el) +#define ARMV8_DCPS_T1(el) (0xf78f8000 | el) #define ARMV8_DRPS 0xd6bf03e0 #define ARMV8_ERET_T1 0xf3de8f00 @@ -137,54 +137,54 @@ #define ARMV8_ISB 0xd5033fdf #define ARMV8_ISB_SY_T1 0xf3bf8f6f -#define ARMV8_MRS(System, Rt) (0xd5300000 | ((System) << 5) | (Rt)) +#define ARMV8_MRS(system, rt) (0xd5300000 | ((system) << 5) | (rt)) /* ARM V8 Move to system register. */ -#define ARMV8_MSR_GP(System, Rt) \ - (0xd5100000 | ((System) << 5) | (Rt)) +#define ARMV8_MSR_GP(system, rt) \ + (0xd5100000 | ((system) << 5) | (rt)) /* ARM V8 Move immediate to process state field. */ -#define ARMV8_MSR_IM(Op1, CRm, Op2) \ - (0xd500401f | ((Op1) << 16) | ((CRm) << 8) | ((Op2) << 5)) +#define ARMV8_MSR_IM(op1, crm, op2) \ + (0xd500401f | ((op1) << 16) | ((crm) << 8) | ((op2) << 5)) -#define ARMV8_MRS_T1(R, M1, Rd, M) (0xF3E08020 | (R << 20) | (M1 << 16) | (Rd << 8) | (M << 4)) -#define ARMV8_MRS_xPSR_T1(R, Rd) (0xF3EF8000 | (R << 20) | (Rd << 8)) -#define ARMV8_MSR_GP_T1(R, M1, Rd, M) (0xF3808020 | (R << 20) | (M1 << 8) | (Rd << 16) | (M << 4)) -#define ARMV8_MSR_GP_xPSR_T1(R, Rn, mask) (0xF3808000 | (R << 20) | (Rn << 16) | (mask << 8)) +#define ARMV8_MRS_T1(r, m1, rd, m) (0xF3E08020 | (r << 20) | (m1 << 16) | (rd << 8) | (m << 4)) +#define ARMV8_MRS_xPSR_T1(r, rd) (0xF3EF8000 | (r << 20) | (rd << 8)) +#define ARMV8_MSR_GP_T1(r, m1, rd, m) (0xF3808020 | (r << 20) | (m1 << 8) | (rd << 16) | (m << 4)) +#define ARMV8_MSR_GP_xPSR_T1(r, rn, mask) (0xF3808000 | (r << 20) | (rn << 16) | (mask << 8)) -#define ARMV8_BKPT(Im) (0xD4200000 | ((Im & 0xffff) << 5)) -#define ARMV8_HLT(Im) (0x0D4400000 | ((Im & 0xffff) << 5)) -#define ARMV8_HLT_A1(Im) (0xE1000070 | ((Im & 0xFFF0) << 4) | (Im & 0xF)) -#define ARMV8_HLT_T1(Im) (0xba80 | (Im & 0x3f)) +#define ARMV8_BKPT(im) (0xD4200000 | ((im & 0xffff) << 5)) +#define ARMV8_HLT(im) (0x0D4400000 | ((im & 0xffff) << 5)) +#define ARMV8_HLT_A1(im) (0xE1000070 | ((im & 0xFFF0) << 4) | (im & 0xF)) +#define ARMV8_HLT_T1(im) (0xba80 | (im & 0x3f)) -#define ARMV8_MOVFSP_64(Rt) ((1 << 31) | 0x11000000 | (0x1f << 5) | (Rt)) -#define ARMV8_MOVTSP_64(Rt) ((1 << 31) | 0x11000000 | (Rt << 5) | (0x1F)) -#define ARMV8_MOVFSP_32(Rt) (0x11000000 | (0x1f << 5) | (Rt)) -#define ARMV8_MOVTSP_32(Rt) (0x11000000 | (Rt << 5) | (0x1F)) +#define ARMV8_MOVFSP_64(rt) ((1 << 31) | 0x11000000 | (0x1f << 5) | (rt)) +#define ARMV8_MOVTSP_64(rt) ((1 << 31) | 0x11000000 | (rt << 5) | (0x1F)) +#define ARMV8_MOVFSP_32(rt) (0x11000000 | (0x1f << 5) | (rt)) +#define ARMV8_MOVTSP_32(rt) (0x11000000 | (rt << 5) | (0x1F)) -#define ARMV8_LDRB_IP(Rd, Rn) (0x38401400 | (Rn << 5) | Rd) -#define ARMV8_LDRH_IP(Rd, Rn) (0x78402400 | (Rn << 5) | Rd) -#define ARMV8_LDRW_IP(Rd, Rn) (0xb8404400 | (Rn << 5) | Rd) +#define ARMV8_LDRB_IP(rd, rn) (0x38401400 | (rn << 5) | rd) +#define ARMV8_LDRH_IP(rd, rn) (0x78402400 | (rn << 5) | rd) +#define ARMV8_LDRW_IP(rd, rn) (0xb8404400 | (rn << 5) | rd) -#define ARMV8_LDRB_IP_T3(Rd, Rn) (0xf8100b01 | (Rn << 16) | (Rd << 12)) -#define ARMV8_LDRH_IP_T3(Rd, Rn) (0xf8300b02 | (Rn << 16) | (Rd << 12)) -#define ARMV8_LDRW_IP_T3(Rd, Rn) (0xf8500b04 | (Rn << 16) | (Rd << 12)) +#define ARMV8_LDRB_IP_T3(rd, rn) (0xf8100b01 | (rn << 16) | (rd << 12)) +#define ARMV8_LDRH_IP_T3(rd, rn) (0xf8300b02 | (rn << 16) | (rd << 12)) +#define ARMV8_LDRW_IP_T3(rd, rn) (0xf8500b04 | (rn << 16) | (rd << 12)) -#define ARMV8_STRB_IP(Rd, Rn) (0x38001400 | (Rn << 5) | Rd) -#define ARMV8_STRH_IP(Rd, Rn) (0x78002400 | (Rn << 5) | Rd) -#define ARMV8_STRW_IP(Rd, Rn) (0xb8004400 | (Rn << 5) | Rd) +#define ARMV8_STRB_IP(rd, rn) (0x38001400 | (rn << 5) | rd) +#define ARMV8_STRH_IP(rd, rn) (0x78002400 | (rn << 5) | rd) +#define ARMV8_STRW_IP(rd, rn) (0xb8004400 | (rn << 5) | rd) -#define ARMV8_STRB_IP_T3(Rd, Rn) (0xf8000b01 | (Rn << 16) | (Rd << 12)) -#define ARMV8_STRH_IP_T3(Rd, Rn) (0xf8200b02 | (Rn << 16) | (Rd << 12)) -#define ARMV8_STRW_IP_T3(Rd, Rn) (0xf8400b04 | (Rn << 16) | (Rd << 12)) +#define ARMV8_STRB_IP_T3(rd, rn) (0xf8000b01 | (rn << 16) | (rd << 12)) +#define ARMV8_STRH_IP_T3(rd, rn) (0xf8200b02 | (rn << 16) | (rd << 12)) +#define ARMV8_STRW_IP_T3(rd, rn) (0xf8400b04 | (rn << 16) | (rd << 12)) -#define ARMV8_MOV_GPR_VFP(Rd, Rn, Index) (0x4e083c00 | (Index << 20) | (Rn << 5) | Rd) -#define ARMV8_MOV_VFP_GPR(Rd, Rn, Index) (0x4e081c00 | (Index << 20) | (Rn << 5) | Rd) +#define ARMV8_MOV_GPR_VFP(rd, rn, index) (0x4e083c00 | (index << 20) | (rn << 5) | rd) +#define ARMV8_MOV_VFP_GPR(rd, rn, index) (0x4e081c00 | (index << 20) | (rn << 5) | rd) -#define ARMV8_MRS_FPCR(Rt) (0xd53b4400 | (Rt)) -#define ARMV8_MRS_FPSR(Rt) (0xd53b4420 | (Rt)) -#define ARMV8_MSR_FPCR(Rt) (0xd51b4400 | (Rt)) -#define ARMV8_MSR_FPSR(Rt) (0xd51b4420 | (Rt)) +#define ARMV8_MRS_FPCR(rt) (0xd53b4400 | (rt)) +#define ARMV8_MRS_FPSR(rt) (0xd53b4420 | (rt)) +#define ARMV8_MSR_FPCR(rt) (0xd51b4400 | (rt)) +#define ARMV8_MSR_FPSR(rt) (0xd51b4420 | (rt)) -#define ARMV8_SYS(System, Rt) (0xD5080000 | ((System) << 5) | Rt) +#define ARMV8_SYS(system, rt) (0xD5080000 | ((system) << 5) | rt) enum armv8_opcode { READ_REG_CTR, diff --git a/src/target/avr32_ap7k.c b/src/target/avr32_ap7k.c index b0c08752d..4cf0276d6 100644 --- a/src/target/avr32_ap7k.c +++ b/src/target/avr32_ap7k.c @@ -526,7 +526,7 @@ static int avr32_ap7k_target_create(struct target *target, Jim_Interp *interp) struct avr32_ap7k_common *ap7k = calloc(1, sizeof(struct avr32_ap7k_common)); - ap7k->common_magic = AP7k_COMMON_MAGIC; + ap7k->common_magic = AP7K_COMMON_MAGIC; target->arch_info = ap7k; return ERROR_OK; diff --git a/src/target/avr32_ap7k.h b/src/target/avr32_ap7k.h index 3f27534a3..65b856ef1 100644 --- a/src/target/avr32_ap7k.h +++ b/src/target/avr32_ap7k.h @@ -20,7 +20,7 @@ struct target; -#define AP7k_COMMON_MAGIC 0x4150374b +#define AP7K_COMMON_MAGIC 0x4150374b struct avr32_ap7k_common { int common_magic; struct avr32_jtag jtag; diff --git a/src/target/avr32_jtag.c b/src/target/avr32_jtag.c index 62c8f98ca..a23ddf7b1 100644 --- a/src/target/avr32_jtag.c +++ b/src/target/avr32_jtag.c @@ -29,7 +29,7 @@ static int avr32_jtag_set_instr(struct avr32_jtag *jtag_info, int new_instr) int busy = 0; tap = jtag_info->tap; - if (tap == NULL) + if (!tap) return ERROR_FAIL; if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr) { diff --git a/src/target/avrt.c b/src/target/avrt.c index eb8d000c4..feceec636 100644 --- a/src/target/avrt.c +++ b/src/target/avrt.c @@ -160,7 +160,7 @@ int avr_jtag_sendinstr(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out) static int mcu_write_ir(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti) { - if (NULL == tap) { + if (!tap) { LOG_ERROR("invalid tap"); return ERROR_FAIL; } @@ -179,7 +179,7 @@ static int mcu_write_ir(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, static int mcu_write_dr(struct jtag_tap *tap, uint8_t *dr_in, uint8_t *dr_out, int dr_len, int rti) { - if (NULL == tap) { + if (!tap) { LOG_ERROR("invalid tap"); return ERROR_FAIL; } diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c index f37a20f7f..c7719ab84 100644 --- a/src/target/breakpoints.c +++ b/src/target/breakpoints.c @@ -379,7 +379,7 @@ static void breakpoint_clear_target_internal(struct target *target) { LOG_DEBUG("Delete all breakpoints for target: %s", target_name(target)); - while (target->breakpoints != NULL) + while (target->breakpoints) breakpoint_free(target, target->breakpoints); } @@ -564,7 +564,7 @@ void watchpoint_clear_target(struct target *target) { LOG_DEBUG("Delete all watchpoints for target: %s", target_name(target)); - while (target->watchpoints != NULL) + while (target->watchpoints) watchpoint_free(target, target->watchpoints); } diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 7af0d3d7e..b1f22067f 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -704,7 +704,7 @@ static int update_halt_gdb(struct target *target) } /* after all targets were updated, poll the gdb serving target */ - if (gdb_target != NULL && gdb_target != target) + if (gdb_target && gdb_target != target) cortex_a_poll(gdb_target); return retval; } @@ -726,7 +726,7 @@ static int cortex_a_poll(struct target *target) /* the next polling trigger an halt event sent to gdb */ if ((target->state == TARGET_HALTED) && (target->smp) && (target->gdb_service) && - (target->gdb_service->target == NULL)) { + (!target->gdb_service->target)) { target->gdb_service->target = get_cortex_a(target, target->gdb_service->core[1]); target_call_event_callbacks(target, TARGET_EVENT_HALTED); @@ -1138,7 +1138,7 @@ static int cortex_a_set_dscr_bits(struct target *target, /* Read DSCR */ int retval = mem_ap_read_atomic_u32(armv7a->debug_ap, armv7a->debug_base + CPUDBG_DSCR, &dscr); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; /* clear bitfield */ @@ -1197,7 +1197,7 @@ static int cortex_a_step(struct target *target, int current, target_addr_t addre /* Disable interrupts during single step if requested */ if (cortex_a->isrmasking_mode == CORTEX_A_ISRMASK_ON) { retval = cortex_a_set_dscr_bits(target, DSCR_INT_DIS, DSCR_INT_DIS); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } @@ -1228,7 +1228,7 @@ static int cortex_a_step(struct target *target, int current, target_addr_t addre /* Re-enable interrupts if they were disabled */ if (cortex_a->isrmasking_mode == CORTEX_A_ISRMASK_ON) { retval = cortex_a_set_dscr_bits(target, DSCR_INT_DIS, 0); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } @@ -1294,12 +1294,12 @@ static int cortex_a_set_breakpoint(struct target *target, brp_list[brp_i].value = (breakpoint->address & 0xFFFFFFFC); brp_list[brp_i].control = control; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].BRPn, + + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].brpn, brp_list[brp_i].value); if (retval != ERROR_OK) return retval; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].BRPn, + + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].brpn, brp_list[brp_i].control); if (retval != ERROR_OK) return retval; @@ -1388,12 +1388,12 @@ static int cortex_a_set_context_breakpoint(struct target *target, brp_list[brp_i].value = (breakpoint->asid); brp_list[brp_i].control = control; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].BRPn, + + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].brpn, brp_list[brp_i].value); if (retval != ERROR_OK) return retval; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].BRPn, + + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].brpn, brp_list[brp_i].control); if (retval != ERROR_OK) return retval; @@ -1409,11 +1409,11 @@ static int cortex_a_set_hybrid_breakpoint(struct target *target, struct breakpoi int retval = ERROR_FAIL; int brp_1 = 0; /* holds the contextID pair */ int brp_2 = 0; /* holds the IVA pair */ - uint32_t control_CTX, control_IVA; - uint8_t CTX_byte_addr_select = 0x0F; - uint8_t IVA_byte_addr_select = 0x0F; - uint8_t CTX_machmode = 0x03; - uint8_t IVA_machmode = 0x01; + uint32_t control_ctx, control_iva; + uint8_t ctx_byte_addr_select = 0x0F; + uint8_t iva_byte_addr_select = 0x0F; + uint8_t ctx_machmode = 0x03; + uint8_t iva_machmode = 0x01; struct cortex_a_common *cortex_a = target_to_cortex_a(target); struct armv7a_common *armv7a = &cortex_a->armv7a_common; struct cortex_a_brp *brp_list = cortex_a->brp_list; @@ -1427,7 +1427,7 @@ static int cortex_a_set_hybrid_breakpoint(struct target *target, struct breakpoi (brp_list[brp_1].type != BRP_CONTEXT)) && (brp_1 < cortex_a->brp_num)) brp_1++; - printf("brp(CTX) found num: %d\n", brp_1); + LOG_DEBUG("brp(CTX) found num: %d", brp_1); if (brp_1 >= cortex_a->brp_num) { LOG_ERROR("ERROR Can not find free Breakpoint Register Pair"); return ERROR_FAIL; @@ -1437,7 +1437,7 @@ static int cortex_a_set_hybrid_breakpoint(struct target *target, struct breakpoi (brp_list[brp_2].type != BRP_NORMAL)) && (brp_2 < cortex_a->brp_num)) brp_2++; - printf("brp(IVA) found num: %d\n", brp_2); + LOG_DEBUG("brp(IVA) found num: %d", brp_2); if (brp_2 >= cortex_a->brp_num) { LOG_ERROR("ERROR Can not find free Breakpoint Register Pair"); return ERROR_FAIL; @@ -1445,39 +1445,39 @@ static int cortex_a_set_hybrid_breakpoint(struct target *target, struct breakpoi breakpoint->set = brp_1 + 1; breakpoint->linked_brp = brp_2; - control_CTX = ((CTX_machmode & 0x7) << 20) + control_ctx = ((ctx_machmode & 0x7) << 20) | (brp_2 << 16) | (0 << 14) - | (CTX_byte_addr_select << 5) + | (ctx_byte_addr_select << 5) | (3 << 1) | 1; brp_list[brp_1].used = true; brp_list[brp_1].value = (breakpoint->asid); - brp_list[brp_1].control = control_CTX; + brp_list[brp_1].control = control_ctx; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BVR_BASE + 4 * brp_list[brp_1].BRPn, + + CPUDBG_BVR_BASE + 4 * brp_list[brp_1].brpn, brp_list[brp_1].value); if (retval != ERROR_OK) return retval; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BCR_BASE + 4 * brp_list[brp_1].BRPn, + + CPUDBG_BCR_BASE + 4 * brp_list[brp_1].brpn, brp_list[brp_1].control); if (retval != ERROR_OK) return retval; - control_IVA = ((IVA_machmode & 0x7) << 20) + control_iva = ((iva_machmode & 0x7) << 20) | (brp_1 << 16) - | (IVA_byte_addr_select << 5) + | (iva_byte_addr_select << 5) | (3 << 1) | 1; brp_list[brp_2].used = true; brp_list[brp_2].value = (breakpoint->address & 0xFFFFFFFC); - brp_list[brp_2].control = control_IVA; + brp_list[brp_2].control = control_iva; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BVR_BASE + 4 * brp_list[brp_2].BRPn, + + CPUDBG_BVR_BASE + 4 * brp_list[brp_2].brpn, brp_list[brp_2].value); if (retval != ERROR_OK) return retval; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BCR_BASE + 4 * brp_list[brp_2].BRPn, + + CPUDBG_BCR_BASE + 4 * brp_list[brp_2].brpn, brp_list[brp_2].control); if (retval != ERROR_OK) return retval; @@ -1511,12 +1511,12 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b brp_list[brp_i].value = 0; brp_list[brp_i].control = 0; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].BRPn, + + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].brpn, brp_list[brp_i].control); if (retval != ERROR_OK) return retval; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].BRPn, + + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].brpn, brp_list[brp_i].value); if (retval != ERROR_OK) return retval; @@ -1530,12 +1530,12 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b brp_list[brp_j].value = 0; brp_list[brp_j].control = 0; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BCR_BASE + 4 * brp_list[brp_j].BRPn, + + CPUDBG_BCR_BASE + 4 * brp_list[brp_j].brpn, brp_list[brp_j].control); if (retval != ERROR_OK) return retval; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BVR_BASE + 4 * brp_list[brp_j].BRPn, + + CPUDBG_BVR_BASE + 4 * brp_list[brp_j].brpn, brp_list[brp_j].value); if (retval != ERROR_OK) return retval; @@ -1555,12 +1555,12 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b brp_list[brp_i].value = 0; brp_list[brp_i].control = 0; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].BRPn, + + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].brpn, brp_list[brp_i].control); if (retval != ERROR_OK) return retval; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].BRPn, + + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].brpn, brp_list[brp_i].value); if (retval != ERROR_OK) return retval; @@ -1758,13 +1758,13 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat wrp_list[wrp_i].control = control; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_WVR_BASE + 4 * wrp_list[wrp_i].WRPn, + + CPUDBG_WVR_BASE + 4 * wrp_list[wrp_i].wrpn, wrp_list[wrp_i].value); if (retval != ERROR_OK) return retval; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_WCR_BASE + 4 * wrp_list[wrp_i].WRPn, + + CPUDBG_WCR_BASE + 4 * wrp_list[wrp_i].wrpn, wrp_list[wrp_i].control); if (retval != ERROR_OK) return retval; @@ -1807,12 +1807,12 @@ static int cortex_a_unset_watchpoint(struct target *target, struct watchpoint *w wrp_list[wrp_i].value = 0; wrp_list[wrp_i].control = 0; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_WCR_BASE + 4 * wrp_list[wrp_i].WRPn, + + CPUDBG_WCR_BASE + 4 * wrp_list[wrp_i].wrpn, wrp_list[wrp_i].control); if (retval != ERROR_OK) return retval; retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base - + CPUDBG_WVR_BASE + 4 * wrp_list[wrp_i].WRPn, + + CPUDBG_WVR_BASE + 4 * wrp_list[wrp_i].wrpn, wrp_list[wrp_i].value); if (retval != ERROR_OK) return retval; @@ -2886,16 +2886,21 @@ static int cortex_a_examine_first(struct target *target) struct cortex_a_common *cortex_a = target_to_cortex_a(target); struct armv7a_common *armv7a = &cortex_a->armv7a_common; struct adiv5_dap *swjdp = armv7a->arm.dap; + struct adiv5_private_config *pc = target->private_config; int i; int retval = ERROR_OK; uint32_t didr, cpuid, dbg_osreg, dbg_idpfr1; - /* Search for the APB-AP - it is needed for access to debug registers */ - retval = dap_find_ap(swjdp, AP_TYPE_APB_AP, &armv7a->debug_ap); - if (retval != ERROR_OK) { - LOG_ERROR("Could not find APB-AP for debug access"); - return retval; + if (pc->ap_num == DP_APSEL_INVALID) { + /* Search for the APB-AP - it is needed for access to debug registers */ + retval = dap_find_ap(swjdp, AP_TYPE_APB_AP, &armv7a->debug_ap); + if (retval != ERROR_OK) { + LOG_ERROR("Could not find APB-AP for debug access"); + return retval; + } + } else { + armv7a->debug_ap = dap_ap(swjdp, pc->ap_num); } retval = mem_ap_init(armv7a->debug_ap); @@ -2907,7 +2912,7 @@ static int cortex_a_examine_first(struct target *target) armv7a->debug_ap->memaccess_tck = 80; if (!target->dbgbase_set) { - uint32_t dbgbase; + target_addr_t dbgbase; /* Get ROM Table base */ uint32_t apid; int32_t coreidx = target->coreid; @@ -2924,7 +2929,7 @@ static int cortex_a_examine_first(struct target *target) target->cmd_name); return retval; } - LOG_DEBUG("Detected core %" PRId32 " dbgbase: %08" PRIx32, + LOG_DEBUG("Detected core %" PRId32 " dbgbase: " TARGET_ADDR_FMT, target->coreid, armv7a->debug_base); } else armv7a->debug_base = target->dbgbase; @@ -3040,7 +3045,7 @@ static int cortex_a_examine_first(struct target *target) cortex_a->brp_list[i].type = BRP_CONTEXT; cortex_a->brp_list[i].value = 0; cortex_a->brp_list[i].control = 0; - cortex_a->brp_list[i].BRPn = i; + cortex_a->brp_list[i].brpn = i; } LOG_DEBUG("Configured %i hw breakpoints", cortex_a->brp_num); @@ -3054,7 +3059,7 @@ static int cortex_a_examine_first(struct target *target) cortex_a->wrp_list[i].used = false; cortex_a->wrp_list[i].value = 0; cortex_a->wrp_list[i].control = 0; - cortex_a->wrp_list[i].WRPn = i; + cortex_a->wrp_list[i].wrpn = i; } LOG_DEBUG("Configured %i hw watchpoints", cortex_a->wrp_num); @@ -3126,13 +3131,13 @@ static int cortex_a_target_create(struct target *target, Jim_Interp *interp) struct cortex_a_common *cortex_a; struct adiv5_private_config *pc; - if (target->private_config == NULL) + if (!target->private_config) return ERROR_FAIL; pc = (struct adiv5_private_config *)target->private_config; cortex_a = calloc(1, sizeof(struct cortex_a_common)); - if (cortex_a == NULL) { + if (!cortex_a) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -3153,7 +3158,7 @@ static int cortex_r4_target_create(struct target *target, Jim_Interp *interp) return ERROR_FAIL; cortex_a = calloc(1, sizeof(struct cortex_a_common)); - if (cortex_a == NULL) { + if (!cortex_a) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -3268,7 +3273,7 @@ COMMAND_HANDLER(handle_cortex_a_mask_interrupts_command) if (CMD_ARGC > 0) { n = jim_nvp_name2value_simple(nvp_maskisr_modes, CMD_ARGV[0]); - if (n->name == NULL) { + if (!n->name) { LOG_ERROR("Unknown parameter: %s - should be off or on", CMD_ARGV[0]); return ERROR_COMMAND_SYNTAX_ERROR; } @@ -3296,7 +3301,7 @@ COMMAND_HANDLER(handle_cortex_a_dacrfixup_command) if (CMD_ARGC > 0) { n = jim_nvp_name2value_simple(nvp_dacrfixup_modes, CMD_ARGV[0]); - if (n->name == NULL) + if (!n->name) return ERROR_COMMAND_SYNTAX_ERROR; cortex_a->dacrfixup_mode = n->value; diff --git a/src/target/cortex_a.h b/src/target/cortex_a.h index 84e42a706..685621c6b 100644 --- a/src/target/cortex_a.h +++ b/src/target/cortex_a.h @@ -68,14 +68,14 @@ struct cortex_a_brp { int type; uint32_t value; uint32_t control; - uint8_t BRPn; + uint8_t brpn; }; struct cortex_a_wrp { bool used; uint32_t value; uint32_t control; - uint8_t WRPn; + uint8_t wrpn; }; struct cortex_a_common { diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index c30556c8a..f3c8527cf 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -169,7 +169,7 @@ static int cortex_m_store_core_reg_u32(struct target *target, if (retval != ERROR_OK) return retval; - retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRSR, regsel | DCRSR_WnR); + retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRSR, regsel | DCRSR_WNR); if (retval != ERROR_OK) return retval; @@ -975,8 +975,11 @@ static int cortex_m_step(struct target *target, int current, } /* current = 1: continue on current pc, otherwise continue at
*/ - if (!current) + if (!current) { buf_set_u32(pc->value, 0, 32, address); + pc->dirty = true; + pc->valid = true; + } uint32_t pc_value = buf_get_u32(pc->value, 0, 32); @@ -2318,7 +2321,7 @@ static int cortex_m_target_create(struct target *target, Jim_Interp *interp) return ERROR_FAIL; struct cortex_m_common *cortex_m = calloc(1, sizeof(struct cortex_m_common)); - if (cortex_m == NULL) { + if (!cortex_m) { LOG_ERROR("No memory creating target"); return ERROR_FAIL; } @@ -2465,7 +2468,7 @@ COMMAND_HANDLER(handle_cortex_m_mask_interrupts_command) if (CMD_ARGC > 0) { n = jim_nvp_name2value_simple(nvp_maskisr_modes, CMD_ARGV[0]); - if (n->name == NULL) + if (!n->name) return ERROR_COMMAND_SYNTAX_ERROR; cortex_m->isrmasking_mode = n->value; cortex_m_set_maskints_for_halt(target); diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h index 3ba8a016d..16fc8ab70 100644 --- a/src/target/cortex_m.h +++ b/src/target/cortex_m.h @@ -77,7 +77,7 @@ struct cortex_m_part_info { #define DCB_DEMCR 0xE000EDFC #define DCB_DSCSR 0xE000EE08 -#define DCRSR_WnR BIT(16) +#define DCRSR_WNR BIT(16) #define DWT_CTRL 0xE0001000 #define DWT_CYCCNT 0xE0001004 @@ -150,9 +150,9 @@ struct cortex_m_part_info { #define NVIC_AIRCR 0xE000ED0C #define NVIC_SHCSR 0xE000ED24 #define NVIC_CFSR 0xE000ED28 -#define NVIC_MMFSRb 0xE000ED28 -#define NVIC_BFSRb 0xE000ED29 -#define NVIC_USFSRh 0xE000ED2A +#define NVIC_MMFSRB 0xE000ED28 +#define NVIC_BFSRB 0xE000ED29 +#define NVIC_USFSRH 0xE000ED2A #define NVIC_HFSR 0xE000ED2C #define NVIC_DFSR 0xE000ED30 #define NVIC_MMFAR 0xE000ED34 diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c index fa12f9391..fdec95faf 100644 --- a/src/target/dsp563xx.c +++ b/src/target/dsp563xx.c @@ -96,10 +96,10 @@ /* * OBCR Register bit definitions */ -#define OBCR_b0_and_b1 ((0x0) << 10) -#define OBCR_b0_or_b1 ((0x1) << 10) -#define OBCR_b1_after_b0 ((0x2) << 10) -#define OBCR_b0_after_b1 ((0x3) << 10) +#define OBCR_B0_AND_B1 ((0x0) << 10) +#define OBCR_B0_OR_B1 ((0x1) << 10) +#define OBCR_B1_AFTER_B0 ((0x2) << 10) +#define OBCR_B0_AFTER_B1 ((0x3) << 10) #define OBCR_BP_DISABLED (0x0) #define OBCR_BP_MEM_P (0x1) @@ -1885,17 +1885,17 @@ static int dsp563xx_remove_watchpoint(struct target *target, struct watchpoint * return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } -static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t address, uint32_t memType, +static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t address, uint32_t mem_type, enum watchpoint_rw rw, enum watchpoint_condition cond) { int err = ERROR_OK; struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target); - bool wasRunning = false; + bool was_running = false; /* Only set breakpoint when halted */ if (target->state != TARGET_HALTED) { dsp563xx_halt(target); - wasRunning = true; + was_running = true; } if (dsp563xx->hardware_breakpoint[0].used) { @@ -1905,8 +1905,8 @@ static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t addres uint32_t obcr_value = 0; if (err == ERROR_OK) { - obcr_value |= OBCR_b0_or_b1; - switch (memType) { + obcr_value |= OBCR_B0_OR_B1; + switch (mem_type) { case MEM_X: obcr_value |= OBCR_BP_MEM_X; break; @@ -1917,7 +1917,7 @@ static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t addres obcr_value |= OBCR_BP_MEM_P; break; default: - LOG_ERROR("Unknown memType parameter (%" PRIu32 ")", memType); + LOG_ERROR("Unknown mem_type parameter (%" PRIu32 ")", mem_type); err = ERROR_TARGET_INVALID; } } @@ -1981,7 +1981,7 @@ static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t addres if (err == ERROR_OK) dsp563xx->hardware_breakpoint[0].used = BPU_WATCHPOINT; - if (err == ERROR_OK && wasRunning) { + if (err == ERROR_OK && was_running) { /* Resume from current PC */ err = dsp563xx_resume(target, 1, 0x0, 0, 0); } diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c index 62844ea3b..939b09d36 100644 --- a/src/target/dsp5680xx.c +++ b/src/target/dsp5680xx.c @@ -85,7 +85,7 @@ static int dsp5680xx_drscan(struct target *target, uint8_t *d_in, */ int retval = ERROR_OK; - if (NULL == target->tap) { + if (!target->tap) { retval = ERROR_FAIL; err_check(retval, DSP5680XX_ERROR_JTAG_INVALID_TAP, "Invalid tap"); @@ -104,7 +104,7 @@ static int dsp5680xx_drscan(struct target *target, uint8_t *d_in, err_check(retval, DSP5680XX_ERROR_JTAG_DRSCAN, "drscan failed!"); } - if (d_out != NULL) + if (d_out) LOG_DEBUG("Data read (%d bits): 0x%04X", len, *d_out); else LOG_DEBUG("Data read was discarded."); @@ -127,7 +127,7 @@ static int dsp5680xx_irscan(struct target *target, uint32_t *d_in, uint16_t tap_ir_len = DSP5680XX_JTAG_MASTER_TAP_IRLEN; - if (NULL == target->tap) { + if (!target->tap) { retval = ERROR_FAIL; err_check(retval, DSP5680XX_ERROR_JTAG_INVALID_TAP, "Invalid tap"); @@ -140,7 +140,7 @@ static int dsp5680xx_irscan(struct target *target, uint32_t *d_in, } else { struct jtag_tap *t = jtag_tap_by_string("dsp568013.chp"); - if ((t == NULL) + if ((!t) || ((t->enabled) && (ir_len != tap_ir_len))) { retval = ERROR_FAIL; err_check(retval, @@ -172,7 +172,7 @@ static int dsp5680xx_jtag_status(struct target *target, uint8_t *status) dsp5680xx_irscan(target, &instr, &read_from_ir, DSP5680XX_JTAG_CORE_TAP_IRLEN); err_check_propagate(retval); - if (status != NULL) + if (status) *status = (uint8_t) read_from_ir; return ERROR_OK; } @@ -205,7 +205,7 @@ static int jtag_data_write(struct target *target, uint32_t instr, int num_bits, dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &data_read_dummy, num_bits); err_check_propagate(retval); - if (data_read != NULL) + if (data_read) *data_read = data_read_dummy; return retval; } @@ -239,7 +239,7 @@ static int eonce_instruction_exec_single(struct target *target, uint8_t instr, retval = jtag_data_write(target, instr_with_flags, 8, &dr_out_tmp); err_check_propagate(retval); - if (eonce_status != NULL) + if (eonce_status) *eonce_status = (uint8_t) dr_out_tmp; return retval; } @@ -501,7 +501,7 @@ static int core_move_value_to_pc(struct target *target, uint32_t value) return retval; } -static int eonce_load_TX_RX_to_r0(struct target *target) +static int eonce_load_tx_rx_to_r0(struct target *target) { int retval; @@ -512,7 +512,7 @@ static int eonce_load_TX_RX_to_r0(struct target *target) return retval; } -static int core_load_TX_RX_high_addr_to_r0(struct target *target) +static int core_load_tx_rx_high_addr_to_r0(struct target *target) { int retval = 0; @@ -577,9 +577,9 @@ static int switch_tap(struct target *target, struct jtag_tap *master_tap, uint32_t ir_out; /* not used, just to make jtag happy. */ - if (master_tap == NULL) { + if (!master_tap) { master_tap = jtag_tap_by_string("dsp568013.chp"); - if (master_tap == NULL) { + if (!master_tap) { retval = ERROR_FAIL; const char *msg = "Failed to get master tap."; @@ -587,9 +587,9 @@ static int switch_tap(struct target *target, struct jtag_tap *master_tap, msg); } } - if (core_tap == NULL) { + if (!core_tap) { core_tap = jtag_tap_by_string("dsp568013.cpu"); - if (core_tap == NULL) { + if (!core_tap) { retval = ERROR_FAIL; err_check(retval, DSP5680XX_ERROR_JTAG_TAP_FIND_CORE, "Failed to get core tap."); @@ -695,7 +695,7 @@ static int eonce_enter_debug_mode_without_reset(struct target *target, */ err_check_propagate(retval); } - if (eonce_status != NULL) + if (eonce_status) *eonce_status = data_read_from_dr; return retval; } @@ -731,13 +731,13 @@ static int eonce_enter_debug_mode(struct target *target, struct jtag_tap *tap_cpu; tap_chp = jtag_tap_by_string("dsp568013.chp"); - if (tap_chp == NULL) { + if (!tap_chp) { retval = ERROR_FAIL; err_check(retval, DSP5680XX_ERROR_JTAG_TAP_FIND_MASTER, "Failed to get master tap."); } tap_cpu = jtag_tap_by_string("dsp568013.cpu"); - if (tap_cpu == NULL) { + if (!tap_cpu) { retval = ERROR_FAIL; err_check(retval, DSP5680XX_ERROR_JTAG_TAP_FIND_CORE, "Failed to get master tap."); @@ -833,7 +833,7 @@ static int eonce_enter_debug_mode(struct target *target, retval = ERROR_TARGET_FAILURE; err_check(retval, DSP5680XX_ERROR_ENTER_DEBUG_MODE, msg); } - if (eonce_status != NULL) + if (eonce_status) *eonce_status = data_read_from_dr; return retval; } @@ -855,7 +855,7 @@ static int eonce_pc_store(struct target *target) err_check_propagate(retval); retval = core_move_r4_to_y(target); err_check_propagate(retval); - retval = eonce_load_TX_RX_to_r0(target); + retval = eonce_load_tx_rx_to_r0(target); err_check_propagate(retval); retval = core_move_y0_at_r0(target); err_check_propagate(retval); @@ -1110,7 +1110,7 @@ static int dsp5680xx_read_16_single(struct target *t, uint32_t a, else retval = core_move_at_r0_to_y0(target); err_check_propagate(retval); - retval = eonce_load_TX_RX_to_r0(target); + retval = eonce_load_tx_rx_to_r0(target); err_check_propagate(retval); retval = core_move_y0_at_r0(target); err_check_propagate(retval); @@ -1147,7 +1147,7 @@ static int dsp5680xx_read_32_single(struct target *t, uint32_t a, err_check_propagate(retval); } /* Get lower part of data to TX/RX */ - retval = eonce_load_TX_RX_to_r0(target); + retval = eonce_load_tx_rx_to_r0(target); err_check_propagate(retval); retval = core_move_y0_at_r0_inc(target); /* This also load TX/RX high to r0 */ err_check_propagate(retval); @@ -1543,7 +1543,7 @@ static int perl_crc(const uint8_t *buff8, uint32_t word_count) * * @return */ -static int dsp5680xx_f_SIM_reset(struct target *target) +static int dsp5680xx_f_sim_reset(struct target *target) { int retval = ERROR_OK; @@ -1575,7 +1575,7 @@ static int dsp5680xx_soft_reset_halt(struct target *target) retval = dsp5680xx_halt(target); err_check_propagate(retval); - retval = dsp5680xx_f_SIM_reset(target); + retval = dsp5680xx_f_sim_reset(target); err_check_propagate(retval); return retval; } @@ -1585,7 +1585,7 @@ int dsp5680xx_f_protect_check(struct target *target, uint16_t *protected) int retval; check_halt_and_debug(target); - if (protected == NULL) { + if (!protected) { const char *msg = "NULL pointer not valid."; err_check(ERROR_FAIL, @@ -1617,7 +1617,7 @@ static int dsp5680xx_f_ex(struct target *target, uint16_t c, uint32_t address, u uint32_t command = c; int retval; - retval = core_load_TX_RX_high_addr_to_r0(target); + retval = core_load_tx_rx_high_addr_to_r0(target); err_check_propagate(retval); retval = core_move_long_to_r2(target, HFM_BASE_ADDR); err_check_propagate(retval); @@ -1727,7 +1727,7 @@ static int set_fm_ck_div(struct target *target) retval = core_move_long_to_r2(target, HFM_BASE_ADDR); err_check_propagate(retval); - retval = core_load_TX_RX_high_addr_to_r0(target); + retval = core_load_tx_rx_high_addr_to_r0(target); err_check_propagate(retval); /* read HFM_CLKD */ retval = core_move_at_r2_to_y0(target); @@ -1829,7 +1829,7 @@ int dsp5680xx_f_erase_check(struct target *target, uint8_t *erased, retval = dsp5680xx_f_ex(target, HFM_ERASE_VERIFY, tmp, 0, &hfm_ustat, 1); err_check_propagate(retval); - if (erased != NULL) + if (erased) *erased = (uint8_t) (hfm_ustat & HFM_USTAT_MASK_BLANK); return retval; } @@ -1882,7 +1882,7 @@ int dsp5680xx_f_erase(struct target *target, int first, int last) * Reset SIM * */ - retval = dsp5680xx_f_SIM_reset(target); + retval = dsp5680xx_f_sim_reset(target); err_check_propagate(retval); /* * Set hfmdiv @@ -2014,7 +2014,7 @@ int dsp5680xx_f_wr(struct target *t, const uint8_t *b, uint32_t a, uint32_t coun retval = core_move_long_to_r3(target, address); /* Destination address to r3 */ err_check_propagate(retval); - core_load_TX_RX_high_addr_to_r0(target); /* TX/RX reg address to r0 */ + core_load_tx_rx_high_addr_to_r0(target); /* TX/RX reg address to r0 */ err_check_propagate(retval); retval = core_move_long_to_r2(target, HFM_BASE_ADDR); /* FM base address to r2 */ err_check_propagate(retval); @@ -2118,13 +2118,13 @@ int dsp5680xx_f_unlock(struct target *target) struct jtag_tap *tap_cpu; tap_chp = jtag_tap_by_string("dsp568013.chp"); - if (tap_chp == NULL) { + if (!tap_chp) { retval = ERROR_FAIL; err_check(retval, DSP5680XX_ERROR_JTAG_TAP_ENABLE_MASTER, "Failed to get master tap."); } tap_cpu = jtag_tap_by_string("dsp568013.cpu"); - if (tap_cpu == NULL) { + if (!tap_cpu) { retval = ERROR_FAIL; err_check(retval, DSP5680XX_ERROR_JTAG_TAP_ENABLE_CORE, "Failed to get master tap."); @@ -2226,13 +2226,13 @@ int dsp5680xx_f_lock(struct target *target) jtag_add_sleep(TIME_DIV_FREESCALE * 300 * 1000); tap_chp = jtag_tap_by_string("dsp568013.chp"); - if (tap_chp == NULL) { + if (!tap_chp) { retval = ERROR_FAIL; err_check(retval, DSP5680XX_ERROR_JTAG_TAP_ENABLE_MASTER, "Failed to get master tap."); } tap_cpu = jtag_tap_by_string("dsp568013.cpu"); - if (tap_cpu == NULL) { + if (!tap_cpu) { retval = ERROR_FAIL; err_check(retval, DSP5680XX_ERROR_JTAG_TAP_ENABLE_CORE, "Failed to get master tap."); diff --git a/src/target/dsp5680xx.h b/src/target/dsp5680xx.h index 72557cea2..b969417f8 100644 --- a/src/target/dsp5680xx.h +++ b/src/target/dsp5680xx.h @@ -238,7 +238,7 @@ * ---------------------------------------------------------------- */ #define MC568013_SIM_BASE_ADDR 0xF140 -#define MC56803x_2x_SIM_BASE_ADDR 0xF100 +#define MC56803X_2X_SIM_BASE_ADDR 0xF100 #define SIM_CMD_RESET 0x10 /** diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h index 4a62cefaa..f57f141aa 100644 --- a/src/target/embeddedice.h +++ b/src/target/embeddedice.h @@ -69,11 +69,11 @@ enum { EICE_W_CTRL_RANGE = 0x80, EICE_W_CTRL_CHAIN = 0x40, EICE_W_CTRL_EXTERN = 0x20, - EICE_W_CTRL_nTRANS = 0x10, - EICE_W_CTRL_nOPC = 0x8, + EICE_W_CTRL_NTRANS = 0x10, + EICE_W_CTRL_NOPC = 0x8, EICE_W_CTRL_MAS = 0x6, EICE_W_CTRL_ITBIT = 0x2, - EICE_W_CTRL_nRW = 0x1 + EICE_W_CTRL_NRW = 0x1 }; enum { diff --git a/src/target/esirisc.c b/src/target/esirisc.c index c928445cc..e49f5f659 100644 --- a/src/target/esirisc.c +++ b/src/target/esirisc.c @@ -56,38 +56,38 @@ static const char * const esirisc_exception_strings[] = { [EID_SYSTEM_CALL] = "SystemCall", [EID_MEMORY_MANAGEMENT] = "MemoryManagement", [EID_UNRECOVERABLE] = "Unrecoverable", - [EID_INTERRUPTn+0] = "Interrupt0", - [EID_INTERRUPTn+1] = "Interrupt1", - [EID_INTERRUPTn+2] = "Interrupt2", - [EID_INTERRUPTn+3] = "Interrupt3", - [EID_INTERRUPTn+4] = "Interrupt4", - [EID_INTERRUPTn+5] = "Interrupt5", - [EID_INTERRUPTn+6] = "Interrupt6", - [EID_INTERRUPTn+7] = "Interrupt7", - [EID_INTERRUPTn+8] = "Interrupt8", - [EID_INTERRUPTn+9] = "Interrupt9", - [EID_INTERRUPTn+10] = "Interrupt10", - [EID_INTERRUPTn+11] = "Interrupt11", - [EID_INTERRUPTn+12] = "Interrupt12", - [EID_INTERRUPTn+13] = "Interrupt13", - [EID_INTERRUPTn+14] = "Interrupt14", - [EID_INTERRUPTn+15] = "Interrupt15", - [EID_INTERRUPTn+16] = "Interrupt16", - [EID_INTERRUPTn+17] = "Interrupt17", - [EID_INTERRUPTn+18] = "Interrupt18", - [EID_INTERRUPTn+19] = "Interrupt19", - [EID_INTERRUPTn+20] = "Interrupt20", - [EID_INTERRUPTn+21] = "Interrupt21", - [EID_INTERRUPTn+22] = "Interrupt22", - [EID_INTERRUPTn+23] = "Interrupt23", - [EID_INTERRUPTn+24] = "Interrupt24", - [EID_INTERRUPTn+25] = "Interrupt25", - [EID_INTERRUPTn+26] = "Interrupt26", - [EID_INTERRUPTn+27] = "Interrupt27", - [EID_INTERRUPTn+28] = "Interrupt28", - [EID_INTERRUPTn+29] = "Interrupt29", - [EID_INTERRUPTn+30] = "Interrupt30", - [EID_INTERRUPTn+31] = "Interrupt31", + [EID_INTERRUPT_N+0] = "Interrupt0", + [EID_INTERRUPT_N+1] = "Interrupt1", + [EID_INTERRUPT_N+2] = "Interrupt2", + [EID_INTERRUPT_N+3] = "Interrupt3", + [EID_INTERRUPT_N+4] = "Interrupt4", + [EID_INTERRUPT_N+5] = "Interrupt5", + [EID_INTERRUPT_N+6] = "Interrupt6", + [EID_INTERRUPT_N+7] = "Interrupt7", + [EID_INTERRUPT_N+8] = "Interrupt8", + [EID_INTERRUPT_N+9] = "Interrupt9", + [EID_INTERRUPT_N+10] = "Interrupt10", + [EID_INTERRUPT_N+11] = "Interrupt11", + [EID_INTERRUPT_N+12] = "Interrupt12", + [EID_INTERRUPT_N+13] = "Interrupt13", + [EID_INTERRUPT_N+14] = "Interrupt14", + [EID_INTERRUPT_N+15] = "Interrupt15", + [EID_INTERRUPT_N+16] = "Interrupt16", + [EID_INTERRUPT_N+17] = "Interrupt17", + [EID_INTERRUPT_N+18] = "Interrupt18", + [EID_INTERRUPT_N+19] = "Interrupt19", + [EID_INTERRUPT_N+20] = "Interrupt20", + [EID_INTERRUPT_N+21] = "Interrupt21", + [EID_INTERRUPT_N+22] = "Interrupt22", + [EID_INTERRUPT_N+23] = "Interrupt23", + [EID_INTERRUPT_N+24] = "Interrupt24", + [EID_INTERRUPT_N+25] = "Interrupt25", + [EID_INTERRUPT_N+26] = "Interrupt26", + [EID_INTERRUPT_N+27] = "Interrupt27", + [EID_INTERRUPT_N+28] = "Interrupt28", + [EID_INTERRUPT_N+29] = "Interrupt29", + [EID_INTERRUPT_N+30] = "Interrupt30", + [EID_INTERRUPT_N+31] = "Interrupt31", }; /* @@ -472,7 +472,7 @@ static int esirisc_next_breakpoint(struct target *target) LOG_DEBUG("-"); for (int bp_index = 0; breakpoints_p < breakpoints_e; ++breakpoints_p, ++bp_index) - if (*breakpoints_p == NULL) + if (!*breakpoints_p) return bp_index; return -1; @@ -508,7 +508,7 @@ static int esirisc_add_breakpoint(struct target *target, struct breakpoint *brea esirisc->breakpoints_p[bp_index] = breakpoint; /* specify instruction breakpoint address */ - retval = esirisc_jtag_write_csr(jtag_info, CSR_DEBUG, CSR_DEBUG_IBAn + bp_index, + retval = esirisc_jtag_write_csr(jtag_info, CSR_DEBUG, CSR_DEBUG_IBA_N + bp_index, breakpoint->address); if (retval != ERROR_OK) { LOG_ERROR("%s: failed to write Debug CSR: IBA", target_name(target)); @@ -539,7 +539,7 @@ static int esirisc_add_breakpoints(struct target *target) LOG_DEBUG("-"); - while (breakpoint != NULL) { + while (breakpoint) { if (breakpoint->set == 0) esirisc_add_breakpoint(target, breakpoint); @@ -608,7 +608,7 @@ static int esirisc_next_watchpoint(struct target *target) LOG_DEBUG("-"); for (int wp_index = 0; watchpoints_p < watchpoints_e; ++watchpoints_p, ++wp_index) - if (*watchpoints_p == NULL) + if (!*watchpoints_p) return wp_index; return -1; @@ -634,7 +634,7 @@ static int esirisc_add_watchpoint(struct target *target, struct watchpoint *watc esirisc->watchpoints_p[wp_index] = watchpoint; /* specify data breakpoint address */ - retval = esirisc_jtag_write_csr(jtag_info, CSR_DEBUG, CSR_DEBUG_DBAn + wp_index, + retval = esirisc_jtag_write_csr(jtag_info, CSR_DEBUG, CSR_DEBUG_DBA_N + wp_index, watchpoint->address); if (retval != ERROR_OK) { LOG_ERROR("%s: failed to write Debug CSR: DBA", target_name(target)); @@ -723,7 +723,7 @@ static int esirisc_add_watchpoints(struct target *target) LOG_DEBUG("-"); - while (watchpoint != NULL) { + while (watchpoint) { if (watchpoint->set == 0) esirisc_add_watchpoint(target, watchpoint); @@ -890,7 +890,7 @@ static int esirisc_resume_or_step(struct target *target, int current, target_add if (handle_breakpoints) { breakpoint = breakpoint_find(target, address); - if (breakpoint != NULL) + if (breakpoint) esirisc_remove_breakpoint(target, breakpoint); } @@ -1061,7 +1061,7 @@ static int esirisc_debug_entry(struct target *target) case EID_INST_BREAKPOINT: breakpoint = breakpoint_find(target, buf_get_u32(esirisc->epc->value, 0, esirisc->epc->size)); - target->debug_reason = (breakpoint != NULL) ? + target->debug_reason = (breakpoint) ? DBG_REASON_BREAKPOINT : DBG_REASON_DBGRQ; break; @@ -1267,7 +1267,7 @@ static const char *esirisc_get_gdb_arch(struct target *target) * requires additional configuration to properly interact with these * targets in GDB (also see: `esirisc cache_arch`). */ - if (esirisc->gdb_arch == NULL && target_was_examined(target)) + if (!esirisc->gdb_arch && target_was_examined(target)) esirisc->gdb_arch = alloc_printf("esirisc:%d_bit_%d_reg_%s", esirisc->num_bits, esirisc->num_regs, esirisc_cache_arch_name(esirisc)); @@ -1284,7 +1284,7 @@ static int esirisc_get_gdb_reg_list(struct target *target, struct reg **reg_list *reg_list_size = ESIRISC_NUM_REGS; *reg_list = calloc(*reg_list_size, sizeof(struct reg *)); - if (*reg_list == NULL) + if (!*reg_list) return ERROR_FAIL; if (reg_class == REG_CLASS_ALL) @@ -1561,7 +1561,7 @@ static int esirisc_target_create(struct target *target, Jim_Interp *interp) struct jtag_tap *tap = target->tap; struct esirisc_common *esirisc; - if (tap == NULL) + if (!tap) return ERROR_FAIL; if (tap->ir_length != INSTR_LENGTH) { @@ -1571,7 +1571,7 @@ static int esirisc_target_create(struct target *target, Jim_Interp *interp) } esirisc = calloc(1, sizeof(struct esirisc_common)); - if (esirisc == NULL) + if (!esirisc) return ERROR_FAIL; esirisc->target = target; diff --git a/src/target/esirisc.h b/src/target/esirisc.h index 57deba616..ad14223ad 100644 --- a/src/target/esirisc.h +++ b/src/target/esirisc.h @@ -47,7 +47,7 @@ #define EID_SYSTEM_CALL 0x0b #define EID_MEMORY_MANAGEMENT 0x0c #define EID_UNRECOVERABLE 0x0d -#define EID_INTERRUPTn 0x20 +#define EID_INTERRUPT_N 0x20 /* Exception Entry Points */ #define ENTRY_RESET 0x00 @@ -58,7 +58,7 @@ #define ENTRY_SYSCALL 0x05 #define ENTRY_DEBUG 0x06 #define ENTRY_NMI 0x07 -#define ENTRY_INTERRUPTn 0x08 +#define ENTRY_INTERRUPT_N 0x08 /* Hardware Debug Control */ #define HWDC_R (1<<4) /* Reset & Hardware Failure */ diff --git a/src/target/esirisc_jtag.c b/src/target/esirisc_jtag.c index 7fd35e5fd..dd5cd5a0e 100644 --- a/src/target/esirisc_jtag.c +++ b/src/target/esirisc_jtag.c @@ -57,7 +57,7 @@ static int esirisc_jtag_get_padding(void) int padding = 0; int bypass_devices = 0; - for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap != NULL; + for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap; tap = jtag_tap_next_enabled(tap)) if (tap->bypass) bypass_devices++; diff --git a/src/target/esirisc_regs.h b/src/target/esirisc_regs.h index a946a2ecc..6ccda500b 100644 --- a/src/target/esirisc_regs.h +++ b/src/target/esirisc_regs.h @@ -148,8 +148,8 @@ enum esirisc_reg_num { #define CSR_DEBUG_HWDC 0x03 /* Hardware Debug Control */ #define CSR_DEBUG_DBS 0x04 /* Data Breakpoint Size */ #define CSR_DEBUG_DBR 0x05 /* Data Breakpoint Range */ -#define CSR_DEBUG_IBAn 0x08 /* Instruction Breakpoint Address [0..7] */ -#define CSR_DEBUG_DBAn 0x10 /* Data Breakpoint Address [0..7] */ +#define CSR_DEBUG_IBA_N 0x08 /* Instruction Breakpoint Address [0..7] */ +#define CSR_DEBUG_DBA_N 0x10 /* Data Breakpoint Address [0..7] */ /* Configuration CSRs */ #define CSR_CONFIG_ARCH0 0x00 /* Architectural Configuration 0 */ @@ -160,12 +160,12 @@ enum esirisc_reg_num { #define CSR_CONFIG_IC 0x05 /* Instruction Cache Configuration */ #define CSR_CONFIG_DC 0x06 /* Data Cache Configuration */ #define CSR_CONFIG_INT 0x07 /* Interrupt Configuration */ -#define CSR_CONFIG_ISAn 0x08 /* Instruction Set Configuration [0..6] */ +#define CSR_CONFIG_ISA_N 0x08 /* Instruction Set Configuration [0..6] */ #define CSR_CONFIG_DBG 0x0f /* Debug Configuration */ #define CSR_CONFIG_MID 0x10 /* Manufacturer ID */ #define CSR_CONFIG_REV 0x11 /* Revision Number */ #define CSR_CONFIG_MPID 0x12 /* Multiprocessor ID */ -#define CSR_CONFIG_FREQn 0x13 /* Frequency [0..2] */ +#define CSR_CONFIG_FREQ_N 0x13 /* Frequency [0..2] */ #define CSR_CONFIG_TRACE 0x16 /* Trace Configuration */ /* Trace CSRs */ diff --git a/src/target/esirisc_trace.c b/src/target/esirisc_trace.c index 28d7536af..d17a65d63 100644 --- a/src/target/esirisc_trace.c +++ b/src/target/esirisc_trace.c @@ -551,7 +551,7 @@ static int esirisc_trace_analyze_buffer(struct command_invocation *cmd) size = esirisc_trace_buffer_size(trace_info); buffer = calloc(1, size); - if (buffer == NULL) { + if (!buffer) { command_print(cmd, "out of memory"); return ERROR_FAIL; } @@ -576,7 +576,7 @@ static int esirisc_trace_analyze_memory(struct command_invocation *cmd, int retval; buffer = calloc(1, size); - if (buffer == NULL) { + if (!buffer) { command_print(cmd, "out of memory"); return ERROR_FAIL; } @@ -628,7 +628,7 @@ static int esirisc_trace_dump_buffer(struct command_invocation *cmd, const char size = esirisc_trace_buffer_size(trace_info); buffer = calloc(1, size); - if (buffer == NULL) { + if (!buffer) { command_print(cmd, "out of memory"); return ERROR_FAIL; } @@ -653,7 +653,7 @@ static int esirisc_trace_dump_memory(struct command_invocation *cmd, const char int retval; buffer = calloc(1, size); - if (buffer == NULL) { + if (!buffer) { command_print(cmd, "out of memory"); return ERROR_FAIL; } diff --git a/src/target/etb.c b/src/target/etb.c index 0c03c4dbe..ce1bef968 100644 --- a/src/target/etb.c +++ b/src/target/etb.c @@ -44,7 +44,7 @@ static int etb_set_instr(struct etb *etb, uint32_t new_instr) struct jtag_tap *tap; tap = etb->tap; - if (tap == NULL) + if (!tap) return ERROR_FAIL; if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { @@ -349,7 +349,7 @@ COMMAND_HANDLER(handle_etb_config_command) } tap = jtag_tap_by_string(CMD_ARGV[1]); - if (tap == NULL) { + if (!tap) { command_print(CMD, "ETB: TAP %s does not exist", CMD_ARGV[1]); return ERROR_FAIL; } diff --git a/src/target/etm.c b/src/target/etm.c index 6dc2bd48c..e8bd20fef 100644 --- a/src/target/etm.c +++ b/src/target/etm.c @@ -298,7 +298,7 @@ struct reg_cache *etm_build_reg_cache(struct target *target, reg_list = calloc(128, sizeof(struct reg)); arch_info = calloc(128, sizeof(struct etm_reg)); - if (reg_cache == NULL || reg_list == NULL || arch_info == NULL) { + if (!reg_cache || !reg_list || !arch_info) { LOG_ERROR("No memory"); goto fail; } @@ -1418,7 +1418,7 @@ COMMAND_HANDLER(handle_etm_config_command) if (strcmp(CMD_ARGV[4], etm_capture_drivers[i]->name) == 0) { int retval = register_commands(CMD_CTX, NULL, etm_capture_drivers[i]->commands); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { free(etm_ctx); return retval; } @@ -1808,7 +1808,7 @@ COMMAND_HANDLER(handle_etm_load_command) fileio_read_u32(file, &etm_ctx->trace_depth); } etm_ctx->trace_data = malloc(sizeof(struct etmv1_trace_data) * etm_ctx->trace_depth); - if (etm_ctx->trace_data == NULL) { + if (!etm_ctx->trace_data) { command_print(CMD, "not enough memory to perform operation"); fileio_close(file); return ERROR_FAIL; diff --git a/src/target/feroceon.c b/src/target/feroceon.c index 1d1351bbc..bbb793aaa 100644 --- a/src/target/feroceon.c +++ b/src/target/feroceon.c @@ -373,14 +373,14 @@ static void feroceon_branch_resume_thumb(struct target *target) } static int feroceon_read_cp15(struct target *target, uint32_t op1, - uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) + uint32_t op2, uint32_t crn, uint32_t crm, uint32_t *value) { struct arm *arm = target->arch_info; struct arm7_9_common *arm7_9 = arm->arch_info; struct arm_jtag *jtag_info = &arm7_9->jtag_info; int err; - arm9tdmi_clock_out(jtag_info, ARMV4_5_MRC(15, op1, 0, CRn, CRm, op2), 0, NULL, 0); + arm9tdmi_clock_out(jtag_info, ARMV4_5_MRC(15, op1, 0, crn, crm, op2), 0, NULL, 0); arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); err = arm7_9_execute_sys_speed(target); if (err != ERROR_OK) @@ -396,7 +396,7 @@ static int feroceon_read_cp15(struct target *target, uint32_t op1, } static int feroceon_write_cp15(struct target *target, uint32_t op1, - uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) + uint32_t op2, uint32_t crn, uint32_t crm, uint32_t value) { struct arm *arm = target->arch_info; struct arm7_9_common *arm7_9 = arm->arch_info; @@ -410,7 +410,7 @@ static int feroceon_write_cp15(struct target *target, uint32_t op1, arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); - arm9tdmi_clock_out(jtag_info, ARMV4_5_MCR(15, op1, 0, CRn, CRm, op2), 0, NULL, 0); + arm9tdmi_clock_out(jtag_info, ARMV4_5_MCR(15, op1, 0, crn, crm, op2), 0, NULL, 0); arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); return arm7_9_execute_sys_speed(target); } diff --git a/src/target/hla_target.c b/src/target/hla_target.c index 7688927fe..91861054f 100644 --- a/src/target/hla_target.c +++ b/src/target/hla_target.c @@ -41,7 +41,7 @@ #include "target_request.h" #include -#define savedDCRDR dbgbase /* FIXME: using target->dbgbase to preserve DCRDR */ +#define SAVED_DCRDR dbgbase /* FIXME: using target->dbgbase to preserve DCRDR */ #define ARMV7M_SCS_DCRSR DCB_DCRSR #define ARMV7M_SCS_DCRDR DCB_DCRDR @@ -202,13 +202,13 @@ static int adapter_target_create(struct target *target, { LOG_DEBUG("%s", __func__); struct adiv5_private_config *pc = target->private_config; - if (pc != NULL && pc->ap_num > 0) { + if (pc && pc->ap_num > 0) { LOG_ERROR("hla_target: invalid parameter -ap-num (> 0)"); return ERROR_COMMAND_SYNTAX_ERROR; } struct cortex_m_common *cortex_m = calloc(1, sizeof(struct cortex_m_common)); - if (cortex_m == NULL) { + if (!cortex_m) { LOG_ERROR("No memory creating target"); return ERROR_FAIL; } @@ -243,7 +243,7 @@ static int adapter_debug_entry(struct target *target) int retval; /* preserve the DCRDR across halts */ - retval = target_read_u32(target, DCB_DCRDR, &target->savedDCRDR); + retval = target_read_u32(target, DCB_DCRDR, &target->SAVED_DCRDR); if (retval != ERROR_OK) return retval; @@ -405,7 +405,7 @@ static int hl_deassert_reset(struct target *target) if (jtag_reset_config & RESET_HAS_SRST) adapter_deassert_reset(); - target->savedDCRDR = 0; /* clear both DCC busy bits on initial resume */ + target->SAVED_DCRDR = 0; /* clear both DCC busy bits on initial resume */ return target->reset_halt ? ERROR_OK : target_resume(target, 1, 0, 0, 0); } @@ -481,8 +481,8 @@ static int adapter_resume(struct target *target, int current, armv7m_restore_context(target); - /* restore savedDCRDR */ - res = target_write_u32(target, DCB_DCRDR, target->savedDCRDR); + /* restore SAVED_DCRDR */ + res = target_write_u32(target, DCB_DCRDR, target->SAVED_DCRDR); if (res != ERROR_OK) return res; @@ -564,8 +564,8 @@ static int adapter_step(struct target *target, int current, armv7m_restore_context(target); - /* restore savedDCRDR */ - res = target_write_u32(target, DCB_DCRDR, target->savedDCRDR); + /* restore SAVED_DCRDR */ + res = target_write_u32(target, DCB_DCRDR, target->SAVED_DCRDR); if (res != ERROR_OK) return res; diff --git a/src/target/image.c b/src/target/image.c index 8f72329bd..eafa73eaa 100644 --- a/src/target/image.c +++ b/src/target/image.c @@ -123,7 +123,7 @@ static int identify_image_type(struct image *image, const char *type_string, con } static int image_ihex_buffer_complete_inner(struct image *image, - char *lpszLine, + char *lpsz_line, struct imagesection *section) { struct image_ihex *ihex = image->type_private; @@ -152,7 +152,7 @@ static int image_ihex_buffer_complete_inner(struct image *image, section[image->num_sections].size = 0x0; section[image->num_sections].flags = 0; - while (fileio_fgets(fileio, 1023, lpszLine) == ERROR_OK) { + while (fileio_fgets(fileio, 1023, lpsz_line) == ERROR_OK) { uint32_t count; uint32_t address; uint32_t record_type; @@ -161,10 +161,10 @@ static int image_ihex_buffer_complete_inner(struct image *image, size_t bytes_read = 0; /* skip comments and blank lines */ - if ((lpszLine[0] == '#') || (strlen(lpszLine + strspn(lpszLine, "\n\t\r ")) == 0)) + if ((lpsz_line[0] == '#') || (strlen(lpsz_line + strspn(lpsz_line, "\n\t\r ")) == 0)) continue; - if (sscanf(&lpszLine[bytes_read], ":%2" SCNx32 "%4" SCNx32 "%2" SCNx32, &count, + if (sscanf(&lpsz_line[bytes_read], ":%2" SCNx32 "%4" SCNx32 "%2" SCNx32, &count, &address, &record_type) != 3) return ERROR_IMAGE_FORMAT_ERROR; bytes_read += 9; @@ -199,7 +199,7 @@ static int image_ihex_buffer_complete_inner(struct image *image, while (count-- > 0) { unsigned value; - sscanf(&lpszLine[bytes_read], "%2x", &value); + sscanf(&lpsz_line[bytes_read], "%2x", &value); ihex->buffer[cooked_bytes] = (uint8_t)value; cal_checksum += (uint8_t)ihex->buffer[cooked_bytes]; bytes_read += 2; @@ -225,7 +225,7 @@ static int image_ihex_buffer_complete_inner(struct image *image, } else if (record_type == 2) { /* Linear Address Record */ uint16_t upper_address; - sscanf(&lpszLine[bytes_read], "%4hx", &upper_address); + sscanf(&lpsz_line[bytes_read], "%4hx", &upper_address); cal_checksum += (uint8_t)(upper_address >> 8); cal_checksum += (uint8_t)upper_address; bytes_read += 4; @@ -257,14 +257,14 @@ static int image_ihex_buffer_complete_inner(struct image *image, /* "Start Segment Address Record" will not be supported * but we must consume it, and do not create an error. */ while (count-- > 0) { - sscanf(&lpszLine[bytes_read], "%2" SCNx32, &dummy); + sscanf(&lpsz_line[bytes_read], "%2" SCNx32, &dummy); cal_checksum += (uint8_t)dummy; bytes_read += 2; } } else if (record_type == 4) { /* Extended Linear Address Record */ uint16_t upper_address; - sscanf(&lpszLine[bytes_read], "%4hx", &upper_address); + sscanf(&lpsz_line[bytes_read], "%4hx", &upper_address); cal_checksum += (uint8_t)(upper_address >> 8); cal_checksum += (uint8_t)upper_address; bytes_read += 4; @@ -293,7 +293,7 @@ static int image_ihex_buffer_complete_inner(struct image *image, } else if (record_type == 5) { /* Start Linear Address Record */ uint32_t start_address; - sscanf(&lpszLine[bytes_read], "%8" SCNx32, &start_address); + sscanf(&lpsz_line[bytes_read], "%8" SCNx32, &start_address); cal_checksum += (uint8_t)(start_address >> 24); cal_checksum += (uint8_t)(start_address >> 16); cal_checksum += (uint8_t)(start_address >> 8); @@ -307,7 +307,7 @@ static int image_ihex_buffer_complete_inner(struct image *image, return ERROR_IMAGE_FORMAT_ERROR; } - sscanf(&lpszLine[bytes_read], "%2" SCNx32, &checksum); + sscanf(&lpsz_line[bytes_read], "%2" SCNx32, &checksum); if ((uint8_t)checksum != (uint8_t)(~cal_checksum + 1)) { /* checksum failed */ @@ -317,7 +317,7 @@ static int image_ihex_buffer_complete_inner(struct image *image, if (end_rec) { end_rec = false; - LOG_WARNING("continuing after end-of-file record: %.40s", lpszLine); + LOG_WARNING("continuing after end-of-file record: %.40s", lpsz_line); } } } @@ -336,23 +336,23 @@ static int image_ihex_buffer_complete_inner(struct image *image, */ static int image_ihex_buffer_complete(struct image *image) { - char *lpszLine = malloc(1023); - if (lpszLine == NULL) { + char *lpsz_line = malloc(1023); + if (!lpsz_line) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } struct imagesection *section = malloc(sizeof(struct imagesection) * IMAGE_MAX_SECTIONS); - if (section == NULL) { - free(lpszLine); + if (!section) { + free(lpsz_line); LOG_ERROR("Out of memory"); return ERROR_FAIL; } int retval; - retval = image_ihex_buffer_complete_inner(image, lpszLine, section); + retval = image_ihex_buffer_complete_inner(image, lpsz_line, section); free(section); - free(lpszLine); + free(lpsz_line); return retval; } @@ -374,7 +374,7 @@ static int image_elf32_read_headers(struct image *image) elf->header32 = malloc(sizeof(Elf32_Ehdr)); - if (elf->header32 == NULL) { + if (!elf->header32) { LOG_ERROR("insufficient memory to perform operation"); return ERROR_FILEIO_OPERATION_FAILED; } @@ -402,7 +402,7 @@ static int image_elf32_read_headers(struct image *image) } elf->segments32 = malloc(elf->segment_count*sizeof(Elf32_Phdr)); - if (elf->segments32 == NULL) { + if (!elf->segments32) { LOG_ERROR("insufficient memory to perform operation"); return ERROR_FILEIO_OPERATION_FAILED; } @@ -454,7 +454,7 @@ static int image_elf32_read_headers(struct image *image) /* alloc and fill sections array with loadable segments */ image->sections = malloc(image->num_sections * sizeof(struct imagesection)); - if (image->sections == NULL) { + if (!image->sections) { LOG_ERROR("insufficient memory to perform operation"); return ERROR_FILEIO_OPERATION_FAILED; } @@ -499,7 +499,7 @@ static int image_elf64_read_headers(struct image *image) elf->header64 = malloc(sizeof(Elf64_Ehdr)); - if (elf->header64 == NULL) { + if (!elf->header64) { LOG_ERROR("insufficient memory to perform operation"); return ERROR_FILEIO_OPERATION_FAILED; } @@ -527,7 +527,7 @@ static int image_elf64_read_headers(struct image *image) } elf->segments64 = malloc(elf->segment_count*sizeof(Elf64_Phdr)); - if (elf->segments64 == NULL) { + if (!elf->segments64) { LOG_ERROR("insufficient memory to perform operation"); return ERROR_FILEIO_OPERATION_FAILED; } @@ -579,7 +579,7 @@ static int image_elf64_read_headers(struct image *image) /* alloc and fill sections array with loadable segments */ image->sections = malloc(image->num_sections * sizeof(struct imagesection)); - if (image->sections == NULL) { + if (!image->sections) { LOG_ERROR("insufficient memory to perform operation"); return ERROR_FILEIO_OPERATION_FAILED; } @@ -755,7 +755,7 @@ static int image_elf_read_section(struct image *image, } static int image_mot_buffer_complete_inner(struct image *image, - char *lpszLine, + char *lpsz_line, struct imagesection *section) { struct image_mot *mot = image->type_private; @@ -784,7 +784,7 @@ static int image_mot_buffer_complete_inner(struct image *image, section[image->num_sections].size = 0x0; section[image->num_sections].flags = 0; - while (fileio_fgets(fileio, 1023, lpszLine) == ERROR_OK) { + while (fileio_fgets(fileio, 1023, lpsz_line) == ERROR_OK) { uint32_t count; uint32_t address; uint32_t record_type; @@ -793,11 +793,11 @@ static int image_mot_buffer_complete_inner(struct image *image, uint32_t bytes_read = 0; /* skip comments and blank lines */ - if ((lpszLine[0] == '#') || (strlen(lpszLine + strspn(lpszLine, "\n\t\r ")) == 0)) + if ((lpsz_line[0] == '#') || (strlen(lpsz_line + strspn(lpsz_line, "\n\t\r ")) == 0)) continue; /* get record type and record length */ - if (sscanf(&lpszLine[bytes_read], "S%1" SCNx32 "%2" SCNx32, &record_type, + if (sscanf(&lpsz_line[bytes_read], "S%1" SCNx32 "%2" SCNx32, &record_type, &count) != 2) return ERROR_IMAGE_FORMAT_ERROR; @@ -809,18 +809,18 @@ static int image_mot_buffer_complete_inner(struct image *image, if (record_type == 0) { /* S0 - starting record (optional) */ - int iValue; + int value; while (count-- > 0) { - sscanf(&lpszLine[bytes_read], "%2x", &iValue); - cal_checksum += (uint8_t)iValue; + sscanf(&lpsz_line[bytes_read], "%2x", &value); + cal_checksum += (uint8_t)value; bytes_read += 2; } } else if (record_type >= 1 && record_type <= 3) { switch (record_type) { case 1: /* S1 - 16 bit address data record */ - sscanf(&lpszLine[bytes_read], "%4" SCNx32, &address); + sscanf(&lpsz_line[bytes_read], "%4" SCNx32, &address); cal_checksum += (uint8_t)(address >> 8); cal_checksum += (uint8_t)address; bytes_read += 4; @@ -829,7 +829,7 @@ static int image_mot_buffer_complete_inner(struct image *image, case 2: /* S2 - 24 bit address data record */ - sscanf(&lpszLine[bytes_read], "%6" SCNx32, &address); + sscanf(&lpsz_line[bytes_read], "%6" SCNx32, &address); cal_checksum += (uint8_t)(address >> 16); cal_checksum += (uint8_t)(address >> 8); cal_checksum += (uint8_t)address; @@ -839,7 +839,7 @@ static int image_mot_buffer_complete_inner(struct image *image, case 3: /* S3 - 32 bit address data record */ - sscanf(&lpszLine[bytes_read], "%8" SCNx32, &address); + sscanf(&lpsz_line[bytes_read], "%8" SCNx32, &address); cal_checksum += (uint8_t)(address >> 24); cal_checksum += (uint8_t)(address >> 16); cal_checksum += (uint8_t)(address >> 8); @@ -868,7 +868,7 @@ static int image_mot_buffer_complete_inner(struct image *image, while (count-- > 0) { unsigned value; - sscanf(&lpszLine[bytes_read], "%2x", &value); + sscanf(&lpsz_line[bytes_read], "%2x", &value); mot->buffer[cooked_bytes] = (uint8_t)value; cal_checksum += (uint8_t)mot->buffer[cooked_bytes]; bytes_read += 2; @@ -881,7 +881,7 @@ static int image_mot_buffer_complete_inner(struct image *image, uint32_t dummy; while (count-- > 0) { - sscanf(&lpszLine[bytes_read], "%2" SCNx32, &dummy); + sscanf(&lpsz_line[bytes_read], "%2" SCNx32, &dummy); cal_checksum += (uint8_t)dummy; bytes_read += 2; } @@ -906,7 +906,7 @@ static int image_mot_buffer_complete_inner(struct image *image, } /* account for checksum, will always be 0xFF */ - sscanf(&lpszLine[bytes_read], "%2" SCNx32, &checksum); + sscanf(&lpsz_line[bytes_read], "%2" SCNx32, &checksum); cal_checksum += (uint8_t)checksum; if (cal_checksum != 0xFF) { @@ -917,7 +917,7 @@ static int image_mot_buffer_complete_inner(struct image *image, if (end_rec) { end_rec = false; - LOG_WARNING("continuing after end-of-file record: %.40s", lpszLine); + LOG_WARNING("continuing after end-of-file record: %.40s", lpsz_line); } } } @@ -936,23 +936,23 @@ static int image_mot_buffer_complete_inner(struct image *image, */ static int image_mot_buffer_complete(struct image *image) { - char *lpszLine = malloc(1023); - if (lpszLine == NULL) { + char *lpsz_line = malloc(1023); + if (!lpsz_line) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } struct imagesection *section = malloc(sizeof(struct imagesection) * IMAGE_MAX_SECTIONS); - if (section == NULL) { - free(lpszLine); + if (!section) { + free(lpsz_line); LOG_ERROR("Out of memory"); return ERROR_FAIL; } int retval; - retval = image_mot_buffer_complete_inner(image, lpszLine, section); + retval = image_mot_buffer_complete_inner(image, lpsz_line, section); free(section); - free(lpszLine); + free(lpsz_line); return retval; } @@ -1018,7 +1018,7 @@ int image_open(struct image *image, const char *url, const char *type_string) } else if (image->type == IMAGE_MEMORY) { struct target *target = get_target(url); - if (target == NULL) { + if (!target) { LOG_ERROR("target '%s' not defined", url); return ERROR_FAIL; } diff --git a/src/target/lakemont.c b/src/target/lakemont.c index 31b521b3a..576956e31 100644 --- a/src/target/lakemont.c +++ b/src/target/lakemont.c @@ -227,7 +227,7 @@ static int irscan(struct target *t, uint8_t *out, { int retval = ERROR_OK; struct x86_32_common *x86_32 = target_to_x86_32(t); - if (NULL == t->tap) { + if (!t->tap) { retval = ERROR_FAIL; LOG_ERROR("%s invalid target tap", __func__); return retval; @@ -260,7 +260,7 @@ static int drscan(struct target *t, uint8_t *out, uint8_t *in, uint8_t len) int retval = ERROR_OK; uint64_t data = 0; struct x86_32_common *x86_32 = target_to_x86_32(t); - if (NULL == t->tap) { + if (!t->tap) { retval = ERROR_FAIL; LOG_ERROR("%s invalid target tap", __func__); return retval; @@ -283,7 +283,7 @@ static int drscan(struct target *t, uint8_t *out, uint8_t *in, uint8_t len) return retval; } } - if (in != NULL) { + if (in) { if (len >= 8) { for (int n = (len / 8) - 1 ; n >= 0; n--) data = (data << 8) + *(in+n); @@ -381,7 +381,7 @@ struct reg_cache *lakemont_build_reg_cache(struct target *t) struct reg_feature *feature; int i; - if (cache == NULL || reg_list == NULL || arch_info == NULL) { + if (!cache || !reg_list || !arch_info) { free(cache); free(reg_list); free(arch_info); @@ -611,7 +611,7 @@ static int read_all_core_hw_regs(struct target *t) unsigned i; struct x86_32_common *x86_32 = target_to_x86_32(t); for (i = 0; i < (x86_32->cache->num_regs); i++) { - if (NOT_AVAIL_REG == regs[i].pm_idx) + if (regs[i].pm_idx == NOT_AVAIL_REG) continue; err = read_hw_reg(t, regs[i].id, ®val, 1); if (err != ERROR_OK) { @@ -630,7 +630,7 @@ static int write_all_core_hw_regs(struct target *t) unsigned i; struct x86_32_common *x86_32 = target_to_x86_32(t); for (i = 0; i < (x86_32->cache->num_regs); i++) { - if (NOT_AVAIL_REG == regs[i].pm_idx) + if (regs[i].pm_idx == NOT_AVAIL_REG) continue; err = write_hw_reg(t, i, 0, 1); if (err != ERROR_OK) { @@ -940,7 +940,7 @@ int lakemont_poll(struct target *t) */ struct breakpoint *bp = NULL; bp = breakpoint_find(t, eip-1); - if (bp != NULL) { + if (bp) { t->debug_reason = DBG_REASON_BREAKPOINT; if (bp->type == BKPT_SOFT) { /* The EIP is now pointing the next byte after the @@ -1013,7 +1013,7 @@ int lakemont_resume(struct target *t, int current, target_addr_t address, /* running away for a software breakpoint needs some special handling */ uint32_t eip = buf_get_u32(x86_32->cache->reg_list[EIP].value, 0, 32); bp = breakpoint_find(t, eip); - if (bp != NULL /*&& bp->type == BKPT_SOFT*/) { + if (bp /*&& bp->type == BKPT_SOFT*/) { /* the step will step over the breakpoint */ if (lakemont_step(t, 0, 0, 1) != ERROR_OK) { LOG_ERROR("%s stepping over a software breakpoint at 0x%08" PRIx32 " " @@ -1024,12 +1024,12 @@ int lakemont_resume(struct target *t, int current, target_addr_t address, /* if breakpoints are enabled, we need to redirect these into probe mode */ struct breakpoint *activeswbp = t->breakpoints; - while (activeswbp != NULL && activeswbp->set == 0) + while (activeswbp && activeswbp->set == 0) activeswbp = activeswbp->next; struct watchpoint *activehwbp = t->watchpoints; - while (activehwbp != NULL && activehwbp->set == 0) + while (activehwbp && activehwbp->set == 0) activehwbp = activehwbp->next; - if (activeswbp != NULL || activehwbp != NULL) + if (activeswbp || activehwbp) buf_set_u32(x86_32->cache->reg_list[PMCR].value, 0, 32, 1); if (do_resume(t) != ERROR_OK) return ERROR_FAIL; @@ -1054,7 +1054,7 @@ int lakemont_step(struct target *t, int current, if (check_not_halted(t)) return ERROR_TARGET_NOT_HALTED; bp = breakpoint_find(t, eip); - if (retval == ERROR_OK && bp != NULL/*&& bp->type == BKPT_SOFT*/) { + if (retval == ERROR_OK && bp/*&& bp->type == BKPT_SOFT*/) { /* TODO: This should only be done for software breakpoints. * Stepping from hardware breakpoints should be possible with the resume flag * Needs testing. @@ -1105,7 +1105,7 @@ int lakemont_step(struct target *t, int current, /* try to re-apply the breakpoint, even of step failed * TODO: When a bp was set, we should try to stop the target - fix the return above */ - if (bp != NULL/*&& bp->type == BKPT_SOFT*/) { + if (bp/*&& bp->type == BKPT_SOFT*/) { /* TODO: This should only be done for software breakpoints. * Stepping from hardware breakpoints should be possible with the resume flag * Needs testing. @@ -1128,7 +1128,7 @@ static int lakemont_reset_break(struct target *t) /* prepare resetbreak setting the proper bits in CLTAPC_CPU_VPREQ */ x86_32->curr_tap = jtag_tap_by_position(1); - if (x86_32->curr_tap == NULL) { + if (!x86_32->curr_tap) { x86_32->curr_tap = saved_tap; LOG_ERROR("%s could not select quark_x10xx.cltap", __func__); return ERROR_FAIL; diff --git a/src/target/ls1_sap.c b/src/target/ls1_sap.c index 5e1218837..c167224d2 100644 --- a/src/target/ls1_sap.c +++ b/src/target/ls1_sap.c @@ -184,7 +184,7 @@ static int ls1_sap_read_memory(struct target *target, target_addr_t address, LOG_DEBUG("Reading memory at physical address 0x%" TARGET_PRIxADDR "; size %" PRIu32 "; count %" PRIu32, address, size, count); - if (count == 0 || buffer == NULL) + if (count == 0 || !buffer) return ERROR_COMMAND_SYNTAX_ERROR; ls1_sap_set_addr_high(target->tap, 0); @@ -207,7 +207,7 @@ static int ls1_sap_write_memory(struct target *target, target_addr_t address, "; size %" PRIu32 "; count %" PRIu32, address, size, count); - if (count == 0 || buffer == NULL) + if (count == 0 || !buffer) return ERROR_COMMAND_SYNTAX_ERROR; ls1_sap_set_addr_high(target->tap, 0); diff --git a/src/target/mem_ap.c b/src/target/mem_ap.c index 0c3d7f78a..eef05b44b 100644 --- a/src/target/mem_ap.c +++ b/src/target/mem_ap.c @@ -38,7 +38,7 @@ static int mem_ap_target_create(struct target *target, Jim_Interp *interp) struct adiv5_private_config *pc; pc = (struct adiv5_private_config *)target->private_config; - if (pc == NULL) + if (!pc) return ERROR_FAIL; if (pc->ap_num == DP_APSEL_INVALID) { @@ -47,7 +47,7 @@ static int mem_ap_target_create(struct target *target, Jim_Interp *interp) } mem_ap = calloc(1, sizeof(struct mem_ap)); - if (mem_ap == NULL) { + if (!mem_ap) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -238,7 +238,7 @@ static int mem_ap_read_memory(struct target *target, target_addr_t address, LOG_DEBUG("Reading memory at physical address " TARGET_ADDR_FMT "; size %" PRIu32 "; count %" PRIu32, address, size, count); - if (count == 0 || buffer == NULL) + if (count == 0 || !buffer) return ERROR_COMMAND_SYNTAX_ERROR; return mem_ap_read_buf(mem_ap->ap, buffer, size, count, address); @@ -253,7 +253,7 @@ static int mem_ap_write_memory(struct target *target, target_addr_t address, LOG_DEBUG("Writing memory at physical address " TARGET_ADDR_FMT "; size %" PRIu32 "; count %" PRIu32, address, size, count); - if (count == 0 || buffer == NULL) + if (count == 0 || !buffer) return ERROR_COMMAND_SYNTAX_ERROR; return mem_ap_write_buf(mem_ap->ap, buffer, size, count, address); diff --git a/src/target/mips32.h b/src/target/mips32.h index f107b57d5..5ca3b7e05 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -248,7 +248,7 @@ struct mips32_algorithm { /*MICRO MIPS INSTRUCTIONS, see doc MD00582 */ #define POOL32A 0X00u -#define POOL32AXf 0x3Cu +#define POOL32AXF 0x3Cu #define POOL32B 0x08u #define POOL32I 0x10u #define MMIPS32_OP_ADDI 0x04u @@ -300,24 +300,24 @@ struct mips32_algorithm { #define MMIPS32_CACHE(op, off, base) MIPS32_R_INST(POOL32B, op, base, MMIPS32_OP_CACHE << 1, 0, off) #define MMIPS32_J(tar) MIPS32_J_INST(MMIPS32_OP_J, ((0x07FFFFFFu & ((tar) >> 1)))) -#define MMIPS32_JR(reg) MIPS32_R_INST(POOL32A, 0, reg, 0, MMIPS32_OP_JALR, POOL32AXf) +#define MMIPS32_JR(reg) MIPS32_R_INST(POOL32A, 0, reg, 0, MMIPS32_OP_JALR, POOL32AXF) #define MMIPS32_LB(reg, off, base) MIPS32_I_INST(MMIPS32_OP_LB, reg, base, off) #define MMIPS32_LBU(reg, off, base) MIPS32_I_INST(MMIPS32_OP_LBU, reg, base, off) #define MMIPS32_LHU(reg, off, base) MIPS32_I_INST(MMIPS32_OP_LHU, reg, base, off) #define MMIPS32_LUI(reg, val) MIPS32_I_INST(POOL32I, MMIPS32_OP_LUI, reg, val) #define MMIPS32_LW(reg, off, base) MIPS32_I_INST(MMIPS32_OP_LW, reg, base, off) -#define MMIPS32_MFC0(gpr, cpr, sel) MIPS32_R_INST(POOL32A, gpr, cpr, sel, MMIPS32_OP_MFC0, POOL32AXf) -#define MMIPS32_MFLO(reg) MIPS32_R_INST(POOL32A, 0, reg, 0, MMIPS32_OP_MFLO, POOL32AXf) -#define MMIPS32_MFHI(reg) MIPS32_R_INST(POOL32A, 0, reg, 0, MMIPS32_OP_MFHI, POOL32AXf) -#define MMIPS32_MTC0(gpr, cpr, sel) MIPS32_R_INST(POOL32A, gpr, cpr, sel, MMIPS32_OP_MTC0, POOL32AXf) -#define MMIPS32_MTLO(reg) MIPS32_R_INST(POOL32A, 0, reg, 0, MMIPS32_OP_MTLO, POOL32AXf) -#define MMIPS32_MTHI(reg) MIPS32_R_INST(POOL32A, 0, reg, 0, MMIPS32_OP_MTHI, POOL32AXf) +#define MMIPS32_MFC0(gpr, cpr, sel) MIPS32_R_INST(POOL32A, gpr, cpr, sel, MMIPS32_OP_MFC0, POOL32AXF) +#define MMIPS32_MFLO(reg) MIPS32_R_INST(POOL32A, 0, reg, 0, MMIPS32_OP_MFLO, POOL32AXF) +#define MMIPS32_MFHI(reg) MIPS32_R_INST(POOL32A, 0, reg, 0, MMIPS32_OP_MFHI, POOL32AXF) +#define MMIPS32_MTC0(gpr, cpr, sel) MIPS32_R_INST(POOL32A, gpr, cpr, sel, MMIPS32_OP_MTC0, POOL32AXF) +#define MMIPS32_MTLO(reg) MIPS32_R_INST(POOL32A, 0, reg, 0, MMIPS32_OP_MTLO, POOL32AXF) +#define MMIPS32_MTHI(reg) MIPS32_R_INST(POOL32A, 0, reg, 0, MMIPS32_OP_MTHI, POOL32AXF) #define MMIPS32_MOVN(dst, src, tar) MIPS32_R_INST(POOL32A, tar, src, dst, 0, MMIPS32_OP_MOVN) #define MMIPS32_NOP 0 #define MMIPS32_ORI(tar, src, val) MIPS32_I_INST(MMIPS32_OP_ORI, tar, src, val) -#define MMIPS32_RDHWR(tar, dst) MIPS32_R_INST(POOL32A, dst, tar, 0, MMIPS32_OP_RDHWR, POOL32AXf) +#define MMIPS32_RDHWR(tar, dst) MIPS32_R_INST(POOL32A, dst, tar, 0, MMIPS32_OP_RDHWR, POOL32AXF) #define MMIPS32_SB(reg, off, base) MIPS32_I_INST(MMIPS32_OP_SB, reg, base, off) #define MMIPS32_SH(reg, off, base) MIPS32_I_INST(MMIPS32_OP_SH, reg, base, off) #define MMIPS32_SW(reg, off, base) MIPS32_I_INST(MMIPS32_OP_SW, reg, base, off) @@ -327,7 +327,7 @@ struct mips32_algorithm { #define MMIPS32_SYNCI(off, base) MIPS32_I_INST(POOL32I, MMIPS32_OP_SYNCI, base, off) #define MMIPS32_SLL(dst, src, sa) MIPS32_R_INST(POOL32A, dst, src, sa, 0, MMIPS32_OP_SLL) #define MMIPS32_SLTI(tar, src, val) MIPS32_I_INST(MMIPS32_OP_SLTI, tar, src, val) -#define MMIPS32_SYNC 0x00001A7Cu /* MIPS32_R_INST(POOL32A, 0, 0, 0, 0x1ADu, POOL32AXf) */ +#define MMIPS32_SYNC 0x00001A7Cu /* MIPS32_R_INST(POOL32A, 0, 0, 0, 0x1ADu, POOL32AXF) */ #define MMIPS32_XOR(reg, val1, val2) MIPS32_R_INST(POOL32A, val1, val2, reg, 0, MMIPS32_OP_XOR) #define MMIPS32_XORI(tar, src, val) MIPS32_I_INST(MMIPS32_OP_XORI, tar, src, val) @@ -336,8 +336,8 @@ struct mips32_algorithm { /* ejtag specific instructions */ -#define MMIPS32_DRET 0x0000E37Cu /* MIPS32_R_INST(POOL32A, 0, 0, 0, 0x38D, POOL32AXf) */ -#define MMIPS32_SDBBP 0x0000DB7Cu /* MIPS32_R_INST(POOL32A, 0, 0, 0, 0x1BD, POOL32AXf) */ +#define MMIPS32_DRET 0x0000E37Cu /* MIPS32_R_INST(POOL32A, 0, 0, 0, 0x38D, POOL32AXF) */ +#define MMIPS32_SDBBP 0x0000DB7Cu /* MIPS32_R_INST(POOL32A, 0, 0, 0, 0x1BD, POOL32AXF) */ #define MMIPS16_SDBBP 0x46C0u /* POOL16C instr */ /* instruction code with isa selection */ diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c index f8643fa2d..923cdf877 100644 --- a/src/target/mips32_pracc.c +++ b/src/target/mips32_pracc.c @@ -68,6 +68,7 @@ #include "config.h" #endif +#include #include #include "mips32.h" @@ -373,7 +374,7 @@ int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_in } scan_32; } *scan_in = malloc(sizeof(union scan_in) * (ctx->code_count + ctx->store_count)); - if (scan_in == NULL) { + if (!scan_in) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -483,7 +484,7 @@ int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size uint32_t *data = NULL; if (size != 4) { data = malloc(256 * sizeof(uint32_t)); - if (data == NULL) { + if (!data) { LOG_ERROR("Out of memory"); goto exit; } @@ -658,7 +659,7 @@ static int mips32_pracc_synchronize_cache(struct mips_ejtag *ejtag_info, goto exit; /* Nothing to do */ /* make sure clsiz is power of 2 */ - if (clsiz & (clsiz - 1)) { + if (!IS_PWR_OF_2(clsiz)) { LOG_DEBUG("clsiz must be power of 2"); ctx.retval = ERROR_FAIL; goto exit; diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c index dbad248fc..b2af39ced 100644 --- a/src/target/mips64_pracc.c +++ b/src/target/mips64_pracc.c @@ -79,7 +79,7 @@ static int mips64_pracc_exec_read(struct mips64_pracc_context *ctx, uint64_t add return ERROR_JTAG_DEVICE_ERROR; } - if (ctx->local_iparam == NULL) { + if (!ctx->local_iparam) { LOG_ERROR("Error: unexpected reading of input parameter"); return ERROR_JTAG_DEVICE_ERROR; } @@ -91,7 +91,7 @@ static int mips64_pracc_exec_read(struct mips64_pracc_context *ctx, uint64_t add && (address < MIPS64_PRACC_PARAM_OUT + ctx->num_oparam * MIPS64_PRACC_DATA_STEP)) { offset = (address - MIPS64_PRACC_PARAM_OUT) / MIPS64_PRACC_DATA_STEP; - if (ctx->local_oparam == NULL) { + if (!ctx->local_oparam) { LOG_ERROR("Error: unexpected reading of output parameter"); return ERROR_JTAG_DEVICE_ERROR; } @@ -179,7 +179,7 @@ static int mips64_pracc_exec_write(struct mips64_pracc_context *ctx, uint64_t ad if ((address >= MIPS64_PRACC_PARAM_IN) && (address < MIPS64_PRACC_PARAM_IN + ctx->num_iparam * MIPS64_PRACC_DATA_STEP)) { offset = (address - MIPS64_PRACC_PARAM_IN) / MIPS64_PRACC_DATA_STEP; - if (ctx->local_iparam == NULL) { + if (!ctx->local_iparam) { LOG_ERROR("Error: unexpected writing of input parameter"); return ERROR_JTAG_DEVICE_ERROR; } @@ -187,7 +187,7 @@ static int mips64_pracc_exec_write(struct mips64_pracc_context *ctx, uint64_t ad } else if ((address >= MIPS64_PRACC_PARAM_OUT) && (address < MIPS64_PRACC_PARAM_OUT + ctx->num_oparam * MIPS64_PRACC_DATA_STEP)) { offset = (address - MIPS64_PRACC_PARAM_OUT) / MIPS64_PRACC_DATA_STEP; - if (ctx->local_oparam == NULL) { + if (!ctx->local_oparam) { LOG_ERROR("Error: unexpected writing of output parameter"); return ERROR_JTAG_DEVICE_ERROR; } @@ -283,7 +283,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info, if (ejtag_ctrl & EJTAG_CTRL_PRNW) { retval = mips64_pracc_exec_write(&ctx, address); if (retval != ERROR_OK) { - printf("ERROR mips64_pracc_exec_write\n"); + LOG_ERROR("mips64_pracc_exec_write() failed"); return retval; } } else { @@ -296,7 +296,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info, } retval = mips64_pracc_exec_read(&ctx, address); if (retval != ERROR_OK) { - printf("ERROR mips64_pracc_exec_read\n"); + LOG_ERROR("mips64_pracc_exec_read() failed"); return retval; } diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c index d4c019fbe..b21a1bdc4 100644 --- a/src/target/mips_ejtag.c +++ b/src/target/mips_ejtag.c @@ -32,7 +32,7 @@ void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, uint32_t new_instr) { - assert(ejtag_info->tap != NULL); + assert(ejtag_info->tap); struct jtag_tap *tap = ejtag_info->tap; if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { @@ -68,7 +68,7 @@ static int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info) void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info, uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf) { - assert(ejtag_info->tap != NULL); + assert(ejtag_info->tap); struct jtag_tap *tap = ejtag_info->tap; struct scan_field field; @@ -94,7 +94,7 @@ int mips_ejtag_drscan_64(struct mips_ejtag *ejtag_info, uint64_t *data) struct jtag_tap *tap; tap = ejtag_info->tap; - if (tap == NULL) + if (!tap) return ERROR_FAIL; struct scan_field field; uint8_t t[8] = { 0 }, r[8]; @@ -122,7 +122,7 @@ int mips_ejtag_drscan_64(struct mips_ejtag *ejtag_info, uint64_t *data) static void mips_ejtag_drscan_32_queued(struct mips_ejtag *ejtag_info, uint32_t data_out, uint8_t *data_in) { - assert(ejtag_info->tap != NULL); + assert(ejtag_info->tap); struct jtag_tap *tap = ejtag_info->tap; struct scan_field field; @@ -160,7 +160,7 @@ void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data) int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint8_t *data) { - assert(ejtag_info->tap != NULL); + assert(ejtag_info->tap); struct jtag_tap *tap = ejtag_info->tap; struct scan_field field; @@ -181,7 +181,7 @@ int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint8_t *data) void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data) { - assert(ejtag_info->tap != NULL); + assert(ejtag_info->tap); struct jtag_tap *tap = ejtag_info->tap; struct scan_field field; @@ -296,8 +296,8 @@ static void mips_ejtag_init_mmr(struct mips_ejtag *ejtag_info) ejtag_info->ejtag_dbm_offs = EJTAG_V20_DBM_OFFS; ejtag_info->ejtag_dbv_offs = EJTAG_V20_DBV_OFFS; - ejtag_info->ejtag_iba_step_size = EJTAG_V20_IBAn_STEP; - ejtag_info->ejtag_dba_step_size = EJTAG_V20_DBAn_STEP; + ejtag_info->ejtag_iba_step_size = EJTAG_V20_IBAN_STEP; + ejtag_info->ejtag_dba_step_size = EJTAG_V20_DBAN_STEP; } else { ejtag_info->ejtag_ibs_addr = EJTAG_V25_IBS; ejtag_info->ejtag_iba0_addr = EJTAG_V25_IBA0; @@ -312,8 +312,8 @@ static void mips_ejtag_init_mmr(struct mips_ejtag *ejtag_info) ejtag_info->ejtag_dbc_offs = EJTAG_V25_DBC_OFFS; ejtag_info->ejtag_dbv_offs = EJTAG_V25_DBV_OFFS; - ejtag_info->ejtag_iba_step_size = EJTAG_V25_IBAn_STEP; - ejtag_info->ejtag_dba_step_size = EJTAG_V25_DBAn_STEP; + ejtag_info->ejtag_iba_step_size = EJTAG_V25_IBAN_STEP; + ejtag_info->ejtag_dba_step_size = EJTAG_V25_DBAN_STEP; } } @@ -421,7 +421,7 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info) int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_t *data) { - assert(ejtag_info->tap != NULL); + assert(ejtag_info->tap); struct jtag_tap *tap = ejtag_info->tap; struct scan_field fields[2]; @@ -530,7 +530,7 @@ int mips64_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, bool write_t, uint struct jtag_tap *tap; tap = ejtag_info->tap; - assert(tap != NULL); + assert(tap); struct scan_field fields[2]; uint8_t spracc = 0; diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h index ace3d281e..e50101b0f 100644 --- a/src/target/mips_ejtag.h +++ b/src/target/mips_ejtag.h @@ -147,33 +147,33 @@ #define EJTAG_V20_IBA0 0xFF300100 #define EJTAG_V20_IBC_OFFS 0x4 /* IBC Offset */ #define EJTAG_V20_IBM_OFFS 0x8 -#define EJTAG_V20_IBAn_STEP 0x10 /* Offset for next channel */ +#define EJTAG_V20_IBAN_STEP 0x10 /* Offset for next channel */ #define EJTAG_V20_DBS 0xFF300008 #define EJTAG_V20_DBA0 0xFF300200 #define EJTAG_V20_DBC_OFFS 0x4 #define EJTAG_V20_DBM_OFFS 0x8 #define EJTAG_V20_DBV_OFFS 0xc -#define EJTAG_V20_DBAn_STEP 0x10 +#define EJTAG_V20_DBAN_STEP 0x10 #define EJTAG_V25_IBS 0xFF301000 #define EJTAG_V25_IBA0 0xFF301100 #define EJTAG_V25_IBM_OFFS 0x8 #define EJTAG_V25_IBASID_OFFS 0x10 #define EJTAG_V25_IBC_OFFS 0x18 -#define EJTAG_V25_IBAn_STEP 0x100 +#define EJTAG_V25_IBAN_STEP 0x100 #define EJTAG_V25_DBS 0xFF302000 #define EJTAG_V25_DBA0 0xFF302100 #define EJTAG_V25_DBM_OFFS 0x8 #define EJTAG_V25_DBASID_OFFS 0x10 #define EJTAG_V25_DBC_OFFS 0x18 #define EJTAG_V25_DBV_OFFS 0x20 -#define EJTAG_V25_DBAn_STEP 0x100 +#define EJTAG_V25_DBAN_STEP 0x100 -#define EJTAG_DBCn_NOSB (1 << 13) -#define EJTAG_DBCn_NOLB (1 << 12) -#define EJTAG_DBCn_BLM_MASK 0xff -#define EJTAG_DBCn_BLM_SHIFT 4 -#define EJTAG_DBCn_BE (1 << 0) +#define EJTAG_DBCN_NOSB (1 << 13) +#define EJTAG_DBCN_NOLB (1 << 12) +#define EJTAG_DBCN_BLM_MASK 0xff +#define EJTAG_DBCN_BLM_SHIFT 4 +#define EJTAG_DBCN_BE (1 << 0) #define EJTAG_VERSION_20 0 #define EJTAG_VERSION_25 1 diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 52b4b3217..cd0689351 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -186,7 +186,7 @@ static int mips_m4k_poll(struct target *target) /* the next polling trigger an halt event sent to gdb */ if ((target->state == TARGET_HALTED) && (target->smp) && (target->gdb_service) && - (target->gdb_service->target == NULL)) { + (!target->gdb_service->target)) { target->gdb_service->target = get_mips_m4k(target, target->gdb_service->core[1]); target_call_event_callbacks(target, TARGET_EVENT_HALTED); @@ -880,8 +880,8 @@ static int mips_m4k_set_watchpoint(struct target *target, * and exclude both load and store accesses from watchpoint * condition evaluation */ - int enable = EJTAG_DBCn_NOSB | EJTAG_DBCn_NOLB | EJTAG_DBCn_BE | - (0xff << EJTAG_DBCn_BLM_SHIFT); + int enable = EJTAG_DBCN_NOSB | EJTAG_DBCN_NOLB | EJTAG_DBCN_BE | + (0xff << EJTAG_DBCN_BLM_SHIFT); if (watchpoint->set) { LOG_WARNING("watchpoint already set"); @@ -907,13 +907,13 @@ static int mips_m4k_set_watchpoint(struct target *target, switch (watchpoint->rw) { case WPT_READ: - enable &= ~EJTAG_DBCn_NOLB; + enable &= ~EJTAG_DBCN_NOLB; break; case WPT_WRITE: - enable &= ~EJTAG_DBCn_NOSB; + enable &= ~EJTAG_DBCN_NOSB; break; case WPT_ACCESS: - enable &= ~(EJTAG_DBCn_NOLB | EJTAG_DBCn_NOSB); + enable &= ~(EJTAG_DBCN_NOLB | EJTAG_DBCN_NOSB); break; default: LOG_ERROR("BUG: watchpoint->rw neither read, write nor access"); @@ -1045,7 +1045,7 @@ static int mips_m4k_read_memory(struct target *target, target_addr_t address, if (size > 1) { t = malloc(count * size * sizeof(uint8_t)); - if (t == NULL) { + if (!t) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -1061,7 +1061,7 @@ static int mips_m4k_read_memory(struct target *target, target_addr_t address, /* mips32_..._read_mem with size 4/2 returns uint32_t/uint16_t in host */ /* endianness, but byte array should represent target endianness */ - if (ERROR_OK == retval) { + if (retval == ERROR_OK) { switch (size) { case 4: target_buffer_set_u32_array(target, buffer, count, t); @@ -1112,7 +1112,7 @@ static int mips_m4k_write_memory(struct target *target, target_addr_t address, /* mips32_..._write_mem with size 4/2 requires uint32_t/uint16_t in host */ /* endianness, but byte array represents target endianness */ t = malloc(count * size * sizeof(uint8_t)); - if (t == NULL) { + if (!t) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -1137,7 +1137,7 @@ static int mips_m4k_write_memory(struct target *target, target_addr_t address, free(t); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; return ERROR_OK; @@ -1218,7 +1218,7 @@ static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t addre if (address & 0x3u) return ERROR_TARGET_UNALIGNED_ACCESS; - if (mips32->fast_data_area == NULL) { + if (!mips32->fast_data_area) { /* Get memory for block write handler * we preserve this area between calls and gain a speed increase * of about 3kb/sec when writing flash @@ -1250,7 +1250,7 @@ static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t addre /* but byte array represents target endianness */ uint32_t *t = NULL; t = malloc(count * sizeof(uint32_t)); - if (t == NULL) { + if (!t) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } diff --git a/src/target/mips_mips64.c b/src/target/mips_mips64.c index 0fc089726..56b0194e7 100644 --- a/src/target/mips_mips64.c +++ b/src/target/mips_mips64.c @@ -410,8 +410,8 @@ static int mips_mips64_set_watchpoint(struct target *target, * and exclude both load and store accesses from watchpoint * condition evaluation */ - int enable = EJTAG_DBCn_NOSB | EJTAG_DBCn_NOLB | EJTAG_DBCn_BE - | (0xff << EJTAG_DBCn_BLM_SHIFT); + int enable = EJTAG_DBCN_NOSB | EJTAG_DBCN_NOLB | EJTAG_DBCN_BE + | (0xff << EJTAG_DBCN_BLM_SHIFT); if (watchpoint->set) { LOG_WARNING("watchpoint already set"); @@ -438,13 +438,13 @@ static int mips_mips64_set_watchpoint(struct target *target, switch (watchpoint->rw) { case WPT_READ: - enable &= ~EJTAG_DBCn_NOLB; + enable &= ~EJTAG_DBCN_NOLB; break; case WPT_WRITE: - enable &= ~EJTAG_DBCn_NOSB; + enable &= ~EJTAG_DBCN_NOSB; break; case WPT_ACCESS: - enable &= ~(EJTAG_DBCn_NOLB | EJTAG_DBCn_NOSB); + enable &= ~(EJTAG_DBCN_NOLB | EJTAG_DBCN_NOSB); break; default: LOG_ERROR("BUG: watchpoint->rw neither read, write nor access"); @@ -923,7 +923,7 @@ static int mips_mips64_read_memory(struct target *target, uint64_t address, retval = mips64_pracc_read_mem(ejtag_info, address, size, count, (void *)t); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("mips64_pracc_read_mem filed"); goto read_done; } diff --git a/src/target/nds32.c b/src/target/nds32.c index d524fc288..12340ac2c 100644 --- a/src/target/nds32.c +++ b/src/target/nds32.c @@ -27,9 +27,6 @@ #include "nds32_tlb.h" #include "nds32_disassembler.h" -const int NDS32_BREAK_16 = 0x00EA; /* 0xEA00 */ -const int NDS32_BREAK_32 = 0x0A000064; /* 0x6400000A */ - struct nds32_edm_operation nds32_edm_ops[NDS32_EDM_OPERATION_MAX_NUM]; uint32_t nds32_edm_ops_num; @@ -47,7 +44,7 @@ const char *nds32_debug_type_name[11] = { "LOAD STORE GLOBAL STOP", }; -static const int NDS32_LM_SIZE_TABLE[16] = { +static const int nds32_lm_size_table[16] = { 4 * 1024, 8 * 1024, 16 * 1024, @@ -61,7 +58,7 @@ static const int NDS32_LM_SIZE_TABLE[16] = { 2 * 1024, }; -static const int NDS32_LINE_SIZE_TABLE[6] = { +static const int nds32_line_size_table[6] = { 0, 8, 16, @@ -98,10 +95,10 @@ static int nds32_get_core_reg(struct reg *reg) } else { uint32_t val = 0; if ((nds32->fpu_enable == false) - && (NDS32_REG_TYPE_FPU == nds32_reg_type(mapped_regnum))) { + && (nds32_reg_type(mapped_regnum) == NDS32_REG_TYPE_FPU)) { retval = ERROR_OK; } else if ((nds32->audio_enable == false) - && (NDS32_REG_TYPE_AUMR == nds32_reg_type(mapped_regnum))) { + && (nds32_reg_type(mapped_regnum) == NDS32_REG_TYPE_AUMR)) { retval = ERROR_OK; } else { retval = aice_read_register(aice, mapped_regnum, &val); @@ -142,7 +139,7 @@ static int nds32_get_core_reg_64(struct reg *reg) } else { uint64_t val = 0; if ((nds32->fpu_enable == false) - && ((FD0 <= reg_arch_info->num) && (reg_arch_info->num <= FD31))) { + && ((reg_arch_info->num >= FD0) && (reg_arch_info->num <= FD31))) { retval = ERROR_OK; } else { retval = aice_read_reg_64(aice, reg_arch_info->num, &val); @@ -196,7 +193,7 @@ static int nds32_update_cache_info(struct nds32 *nds32) { uint32_t value; - if (ERROR_OK == nds32_get_mapped_reg(nds32, MR8, &value)) { + if (nds32_get_mapped_reg(nds32, MR8, &value) == ERROR_OK) { if (value & 0x1) nds32->memory.icache.enable = true; else @@ -311,11 +308,11 @@ static int nds32_set_core_reg(struct reg *reg, uint8_t *buf) reg_arch_info->num, reg->name, value); if ((nds32->fpu_enable == false) && - (NDS32_REG_TYPE_FPU == nds32_reg_type(mapped_regnum))) { + (nds32_reg_type(mapped_regnum) == NDS32_REG_TYPE_FPU)) { buf_set_u32(reg->value, 0, 32, 0); } else if ((nds32->audio_enable == false) && - (NDS32_REG_TYPE_AUMR == nds32_reg_type(mapped_regnum))) { + (nds32_reg_type(mapped_regnum) == NDS32_REG_TYPE_AUMR)) { buf_set_u32(reg->value, 0, 32, 0); } else { @@ -333,16 +330,16 @@ static int nds32_set_core_reg(struct reg *reg, uint8_t *buf) reg->dirty = false; /* update registers to take effect right now */ - if (IR0 == mapped_regnum) { + if (mapped_regnum == IR0) { nds32_update_psw(nds32); - } else if (MR0 == mapped_regnum) { + } else if (mapped_regnum == MR0) { nds32_update_mmu_info(nds32); - } else if ((MR6 == mapped_regnum) || (MR7 == mapped_regnum)) { + } else if ((mapped_regnum == MR6) || (mapped_regnum == MR7)) { /* update lm information */ nds32_update_lm_info(nds32); - } else if (MR8 == mapped_regnum) { + } else if (mapped_regnum == MR8) { nds32_update_cache_info(nds32); - } else if (FUCPR == mapped_regnum) { + } else if (mapped_regnum == FUCPR) { /* update audio/fpu setting */ nds32_check_extension(nds32); } @@ -364,7 +361,7 @@ static int nds32_set_core_reg_64(struct reg *reg, uint8_t *buf) } if ((nds32->fpu_enable == false) && - ((FD0 <= reg_arch_info->num) && (reg_arch_info->num <= FD31))) { + ((reg_arch_info->num >= FD0) && (reg_arch_info->num <= FD31))) { buf_set_u32(reg->value, 0, 32, 0); buf_set_u32(reg->value, 32, 32, 0); @@ -425,7 +422,7 @@ static struct reg_cache *nds32_build_reg_cache(struct target *target, reg_list[i].reg_data_type = calloc(sizeof(struct reg_data_type), 1); - if (FD0 <= reg_arch_info[i].num && reg_arch_info[i].num <= FD31) { + if (reg_arch_info[i].num >= FD0 && reg_arch_info[i].num <= FD31) { reg_list[i].value = reg_arch_info[i].value; reg_list[i].type = &nds32_reg_access_type_64; @@ -437,7 +434,7 @@ static struct reg_cache *nds32_build_reg_cache(struct target *target, reg_list[i].type = &nds32_reg_access_type; reg_list[i].group = "general"; - if ((FS0 <= reg_arch_info[i].num) && (reg_arch_info[i].num <= FS31)) { + if ((reg_arch_info[i].num >= FS0) && (reg_arch_info[i].num <= FS31)) { reg_list[i].reg_data_type->type = REG_TYPE_IEEE_SINGLE; reg_list[i].reg_data_type->id = "ieee_single"; reg_list[i].group = "float"; @@ -459,20 +456,20 @@ static struct reg_cache *nds32_build_reg_cache(struct target *target, } } - if (R16 <= reg_arch_info[i].num && reg_arch_info[i].num <= R25) + if (reg_arch_info[i].num >= R16 && reg_arch_info[i].num <= R25) reg_list[i].caller_save = true; else reg_list[i].caller_save = false; reg_list[i].feature = malloc(sizeof(struct reg_feature)); - if (R0 <= reg_arch_info[i].num && reg_arch_info[i].num <= IFC_LP) + if (reg_arch_info[i].num >= R0 && reg_arch_info[i].num <= IFC_LP) reg_list[i].feature->name = "org.gnu.gdb.nds32.core"; - else if (CR0 <= reg_arch_info[i].num && reg_arch_info[i].num <= SECUR0) + else if (reg_arch_info[i].num >= CR0 && reg_arch_info[i].num <= SECUR0) reg_list[i].feature->name = "org.gnu.gdb.nds32.system"; - else if (D0L24 <= reg_arch_info[i].num && reg_arch_info[i].num <= CBE3) + else if (reg_arch_info[i].num >= D0L24 && reg_arch_info[i].num <= CBE3) reg_list[i].feature->name = "org.gnu.gdb.nds32.audio"; - else if (FPCSR <= reg_arch_info[i].num && reg_arch_info[i].num <= FD31) + else if (reg_arch_info[i].num >= FPCSR && reg_arch_info[i].num <= FD31) reg_list[i].feature->name = "org.gnu.gdb.nds32.fpu"; cache->num_regs++; @@ -534,7 +531,7 @@ int nds32_get_mapped_reg(struct nds32 *nds32, unsigned regnum, uint32_t *value) r = nds32_reg_current(nds32, regnum); - if (ERROR_OK != r->type->get(r)) + if (r->type->get(r) != ERROR_OK) return ERROR_FAIL; *value = buf_get_u32(r->value, 0, 32); @@ -639,7 +636,7 @@ static int nds32_select_memory_mode(struct target *target, uint32_t address, /* init end_address */ *end_address = address_end; - if (NDS_MEMORY_ACC_CPU == memory->access_channel) + if (memory->access_channel == NDS_MEMORY_ACC_CPU) return ERROR_OK; if (edm->access_control == false) { @@ -653,7 +650,7 @@ static int nds32_select_memory_mode(struct target *target, uint32_t address, return ERROR_OK; } - if (NDS_MEMORY_SELECT_AUTO != memory->mode) { + if (memory->mode != NDS_MEMORY_SELECT_AUTO) { LOG_DEBUG("Memory mode is not AUTO"); return ERROR_OK; } @@ -730,7 +727,7 @@ int nds32_read_buffer(struct target *target, uint32_t address, struct nds32 *nds32 = target_to_nds32(target); struct nds32_memory *memory = &(nds32->memory); - if ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_CPU) && (target->state != TARGET_HALTED)) { LOG_WARNING("target was not halted"); return ERROR_TARGET_NOT_HALTED; @@ -853,7 +850,7 @@ int nds32_write_buffer(struct target *target, uint32_t address, struct nds32 *nds32 = target_to_nds32(target); struct nds32_memory *memory = &(nds32->memory); - if ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_CPU) && (target->state != TARGET_HALTED)) { LOG_WARNING("target was not halted"); return ERROR_TARGET_NOT_HALTED; @@ -1134,7 +1131,7 @@ static void nds32_init_config(struct nds32 *nds32) misc_config->div_instruction = (value_cr4 >> 5) & 0x1; misc_config->mac_instruction = (value_cr4 >> 6) & 0x1; misc_config->audio_isa = (value_cr4 >> 7) & 0x3; - misc_config->L2_cache = (value_cr4 >> 9) & 0x1; + misc_config->l2_cache = (value_cr4 >> 9) & 0x1; misc_config->reduce_register = (value_cr4 >> 10) & 0x1; misc_config->addr_24 = (value_cr4 >> 11) & 0x1; misc_config->interruption_level = (value_cr4 >> 12) & 0x1; @@ -1548,7 +1545,7 @@ int nds32_restore_context(struct target *target) i, buf_get_u32(reg->value, 0, 32)); reg_arch_info = reg->arch_info; - if (FD0 <= reg_arch_info->num && reg_arch_info->num <= FD31) { + if (reg_arch_info->num >= FD0 && reg_arch_info->num <= FD31) { uint64_t val = buf_get_u64(reg_arch_info->value, 0, 64); aice_write_reg_64(aice, reg_arch_info->num, val); } else { @@ -1579,7 +1576,7 @@ int nds32_edm_config(struct nds32 *nds32) nds32->edm.breakpoint_num = (edm_cfg & 0x7) + 1; - if ((nds32->edm.version & 0x1000) || (0x60 <= nds32->edm.version)) + if ((nds32->edm.version & 0x1000) || (nds32->edm.version >= 0x60)) nds32->edm.access_control = true; else nds32->edm.access_control = false; @@ -1622,11 +1619,11 @@ int nds32_config(struct nds32 *nds32) uint32_t size_index; nds32_get_mapped_reg(nds32, MR6, &value_mr6); size_index = (value_mr6 >> 1) & 0xF; - nds32->memory.ilm_size = NDS32_LM_SIZE_TABLE[size_index]; + nds32->memory.ilm_size = nds32_lm_size_table[size_index]; nds32_get_mapped_reg(nds32, MR7, &value_mr7); size_index = (value_mr7 >> 1) & 0xF; - nds32->memory.dlm_size = NDS32_LM_SIZE_TABLE[size_index]; + nds32->memory.dlm_size = nds32_lm_size_table[size_index]; return ERROR_OK; } @@ -1664,10 +1661,10 @@ int nds32_init_arch_info(struct target *target, struct nds32 *nds32) nds32_reg_init(); - if (ERROR_FAIL == nds32_reg_cache_init(target, nds32)) + if (nds32_reg_cache_init(target, nds32) == ERROR_FAIL) return ERROR_FAIL; - if (ERROR_OK != nds32_init_register_table(nds32)) + if (nds32_init_register_table(nds32) != ERROR_OK) return ERROR_FAIL; return ERROR_OK; @@ -1682,10 +1679,10 @@ int nds32_virtual_to_physical(struct target *target, target_addr_t address, targ return ERROR_OK; } - if (ERROR_OK == nds32_probe_tlb(nds32, address, physical)) + if (nds32_probe_tlb(nds32, address, physical) == ERROR_OK) return ERROR_OK; - if (ERROR_OK == nds32_walk_page_table(nds32, address, physical)) + if (nds32_walk_page_table(nds32, address, physical) == ERROR_OK) return ERROR_OK; return ERROR_FAIL; @@ -1697,8 +1694,8 @@ int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t leng struct nds32 *nds32 = target_to_nds32(target); struct nds32_cache *dcache = &(nds32->memory.dcache); struct nds32_cache *icache = &(nds32->memory.icache); - uint32_t dcache_line_size = NDS32_LINE_SIZE_TABLE[dcache->line_size]; - uint32_t icache_line_size = NDS32_LINE_SIZE_TABLE[icache->line_size]; + uint32_t dcache_line_size = nds32_line_size_table[dcache->line_size]; + uint32_t icache_line_size = nds32_line_size_table[icache->line_size]; uint32_t cur_address; int result; uint32_t start_line, end_line; @@ -1738,8 +1735,7 @@ int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t leng * be physical address. L1I_VA_INVALIDATE uses PSW.IT to decide * address translation or not. */ target_addr_t physical_addr; - if (ERROR_FAIL == target->type->virt2phys(target, cur_address, - &physical_addr)) + if (target->type->virt2phys(target, cur_address, &physical_addr) == ERROR_FAIL) return ERROR_FAIL; /* I$ invalidate */ @@ -1803,7 +1799,7 @@ int nds32_step(struct target *target, int current, if (no_step == false) { struct aice_port_s *aice = target_to_aice(target); - if (ERROR_OK != aice_step(aice)) + if (aice_step(aice) != ERROR_OK) return ERROR_FAIL; } @@ -1846,7 +1842,7 @@ static int nds32_step_without_watchpoint(struct nds32 *nds32) struct aice_port_s *aice = target_to_aice(target); - if (ERROR_OK != aice_step(aice)) + if (aice_step(aice) != ERROR_OK) return ERROR_FAIL; /* save state */ @@ -1927,10 +1923,9 @@ int nds32_examine_debug_reason(struct nds32 *nds32) nds32_get_mapped_reg(nds32, PC, &value_pc); - if (ERROR_OK != nds32_read_opcode(nds32, value_pc, &opcode)) + if (nds32_read_opcode(nds32, value_pc, &opcode) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != nds32_evaluate_opcode(nds32, opcode, value_pc, - &instruction)) + if (nds32_evaluate_opcode(nds32, opcode, value_pc, &instruction) != ERROR_OK) return ERROR_FAIL; /* hit 'break 0x7FFF' */ @@ -1954,7 +1949,7 @@ int nds32_examine_debug_reason(struct nds32 *nds32) nds32_step_without_watchpoint(nds32); /* before single_step, save exception address */ - if (ERROR_OK != result) + if (result != ERROR_OK) return ERROR_FAIL; target->debug_reason = DBG_REASON_WATCHPOINT; @@ -1969,8 +1964,7 @@ int nds32_examine_debug_reason(struct nds32 *nds32) case NDS32_DEBUG_DATA_VALUE_WATCHPOINT_IMPRECISE: case NDS32_DEBUG_DATA_ADDR_WATCHPOINT_NEXT_PRECISE: case NDS32_DEBUG_DATA_VALUE_WATCHPOINT_NEXT_PRECISE: - if (ERROR_OK != nds32->get_watched_address(nds32, - &(nds32->watched_address), reason)) + if (nds32->get_watched_address(nds32, &(nds32->watched_address), reason) != ERROR_OK) return ERROR_FAIL; target->debug_reason = DBG_REASON_WATCHPOINT; @@ -1997,7 +1991,7 @@ int nds32_login(struct nds32 *nds32) LOG_DEBUG("nds32_login"); - if (nds32->edm_passcode != NULL) { + if (nds32->edm_passcode) { /* convert EDM passcode to command sequences */ passcode_length = strlen(nds32->edm_passcode); command_sequence[0] = '\0'; @@ -2015,7 +2009,7 @@ int nds32_login(struct nds32 *nds32) strcat(command_sequence, command_str); } - if (ERROR_OK != aice_program_edm(aice, command_sequence)) + if (aice_program_edm(aice, command_sequence) != ERROR_OK) return ERROR_FAIL; /* get current privilege level */ @@ -2037,7 +2031,7 @@ int nds32_login(struct nds32 *nds32) return ERROR_FAIL; sprintf(command_str, "write_misc %s 0x%" PRIx32 ";", reg_name, code); - if (ERROR_OK != aice_program_edm(aice, command_str)) + if (aice_program_edm(aice, command_str) != ERROR_OK) return ERROR_FAIL; } } @@ -2062,9 +2056,9 @@ int nds32_halt(struct target *target) if (nds32_target_state(nds32, &state) != ERROR_OK) return ERROR_FAIL; - if (TARGET_HALTED != state) + if (state != TARGET_HALTED) /* TODO: if state == TARGET_HALTED, check ETYPE is DBGI or not */ - if (ERROR_OK != aice_halt(aice)) + if (aice_halt(aice) != ERROR_OK) return ERROR_FAIL; CHECK_RETVAL(nds32->enter_debug_state(nds32, true)); @@ -2086,7 +2080,7 @@ int nds32_poll(struct target *target) if (state == TARGET_HALTED) { if (target->state != TARGET_HALTED) { /* if false_hit, continue free_run */ - if (ERROR_OK != nds32->enter_debug_state(nds32, true)) { + if (nds32->enter_debug_state(nds32, true) != ERROR_OK) { struct aice_port_s *aice = target_to_aice(target); aice_run(aice); return ERROR_OK; @@ -2314,7 +2308,7 @@ int nds32_init(struct nds32 *nds32) int nds32_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fileio_info) { /* fill syscall parameters to file-I/O info */ - if (NULL == fileio_info) { + if (!fileio_info) { LOG_ERROR("Target has not initial file-I/O data structure"); return ERROR_FAIL; } @@ -2516,8 +2510,8 @@ int nds32_profiling(struct target *target, uint32_t *samples, int nds32_gdb_fileio_write_memory(struct nds32 *nds32, uint32_t address, uint32_t size, const uint8_t *buffer) { - if ((NDS32_SYSCALL_FSTAT == nds32->active_syscall_id) || - (NDS32_SYSCALL_STAT == nds32->active_syscall_id)) { + if ((nds32->active_syscall_id == NDS32_SYSCALL_FSTAT) || + (nds32->active_syscall_id == NDS32_SYSCALL_STAT)) { /* If doing GDB file-I/O, target should convert 'struct stat' * from gdb-format to target-format */ uint8_t stat_buffer[NDS32_STRUCT_STAT_SIZE]; @@ -2600,7 +2594,7 @@ int nds32_gdb_fileio_write_memory(struct nds32 *nds32, uint32_t address, stat_buffer[59] = 0; return nds32_write_buffer(nds32->target, address, NDS32_STRUCT_STAT_SIZE, stat_buffer); - } else if (NDS32_SYSCALL_GETTIMEOFDAY == nds32->active_syscall_id) { + } else if (nds32->active_syscall_id == NDS32_SYSCALL_GETTIMEOFDAY) { /* If doing GDB file-I/O, target should convert 'struct timeval' * from gdb-format to target-format */ uint8_t timeval_buffer[NDS32_STRUCT_TIMEVAL_SIZE]; diff --git a/src/target/nds32.h b/src/target/nds32.h index 3670fd289..c44767343 100644 --- a/src/target/nds32.h +++ b/src/target/nds32.h @@ -217,7 +217,7 @@ struct nds32_misc_config { bool div_instruction; bool mac_instruction; int audio_isa; - bool L2_cache; + bool l2_cache; bool reduce_register; bool addr_24; bool interruption_level; @@ -431,26 +431,26 @@ extern int nds32_profiling(struct target *target, uint32_t *samples, /** Convert target handle to generic Andes target state handle. */ static inline struct nds32 *target_to_nds32(struct target *target) { - assert(target != NULL); + assert(target); return target->arch_info; } /** */ static inline struct aice_port_s *target_to_aice(struct target *target) { - assert(target != NULL); + assert(target); return target->tap->priv; } static inline bool is_nds32(struct nds32 *nds32) { - assert(nds32 != NULL); + assert(nds32); return nds32->common_magic == NDS32_COMMON_MAGIC; } static inline bool nds32_reach_max_interrupt_level(struct nds32 *nds32) { - assert(nds32 != NULL); + assert(nds32); return nds32->max_interrupt_level == nds32->current_interrupt_level; } diff --git a/src/target/nds32_aice.c b/src/target/nds32_aice.c index e494a3e1c..b01f8c09e 100644 --- a/src/target/nds32_aice.c +++ b/src/target/nds32_aice.c @@ -24,7 +24,7 @@ int aice_read_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t *val) { - if (aice->port->api->read_reg_64 == NULL) { + if (!aice->port->api->read_reg_64) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -34,7 +34,7 @@ int aice_read_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t *val) int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val) { - if (aice->port->api->write_reg_64 == NULL) { + if (!aice->port->api->write_reg_64) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -45,7 +45,7 @@ int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val) int aice_read_tlb(struct aice_port_s *aice, target_addr_t virtual_address, target_addr_t *physical_address) { - if (aice->port->api->read_tlb == NULL) { + if (!aice->port->api->read_tlb) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -55,7 +55,7 @@ int aice_read_tlb(struct aice_port_s *aice, target_addr_t virtual_address, int aice_cache_ctl(struct aice_port_s *aice, uint32_t subtype, uint32_t address) { - if (aice->port->api->cache_ctl == NULL) { + if (!aice->port->api->cache_ctl) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -65,7 +65,7 @@ int aice_cache_ctl(struct aice_port_s *aice, uint32_t subtype, uint32_t address) int aice_set_retry_times(struct aice_port_s *aice, uint32_t a_retry_times) { - if (aice->port->api->set_retry_times == NULL) { + if (!aice->port->api->set_retry_times) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -75,7 +75,7 @@ int aice_set_retry_times(struct aice_port_s *aice, uint32_t a_retry_times) int aice_program_edm(struct aice_port_s *aice, char *command_sequence) { - if (aice->port->api->program_edm == NULL) { + if (!aice->port->api->program_edm) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -86,7 +86,7 @@ int aice_program_edm(struct aice_port_s *aice, char *command_sequence) int aice_set_command_mode(struct aice_port_s *aice, enum aice_command_mode command_mode) { - if (aice->port->api->set_command_mode == NULL) { + if (!aice->port->api->set_command_mode) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -97,7 +97,7 @@ int aice_set_command_mode(struct aice_port_s *aice, int aice_execute(struct aice_port_s *aice, uint32_t *instructions, uint32_t instruction_num) { - if (aice->port->api->execute == NULL) { + if (!aice->port->api->execute) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -107,7 +107,7 @@ int aice_execute(struct aice_port_s *aice, uint32_t *instructions, int aice_set_custom_srst_script(struct aice_port_s *aice, const char *script) { - if (aice->port->api->set_custom_srst_script == NULL) { + if (!aice->port->api->set_custom_srst_script) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -117,7 +117,7 @@ int aice_set_custom_srst_script(struct aice_port_s *aice, const char *script) int aice_set_custom_trst_script(struct aice_port_s *aice, const char *script) { - if (aice->port->api->set_custom_trst_script == NULL) { + if (!aice->port->api->set_custom_trst_script) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -127,7 +127,7 @@ int aice_set_custom_trst_script(struct aice_port_s *aice, const char *script) int aice_set_custom_restart_script(struct aice_port_s *aice, const char *script) { - if (aice->port->api->set_custom_restart_script == NULL) { + if (!aice->port->api->set_custom_restart_script) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -137,7 +137,7 @@ int aice_set_custom_restart_script(struct aice_port_s *aice, const char *script) int aice_set_count_to_check_dbger(struct aice_port_s *aice, uint32_t count_to_check) { - if (aice->port->api->set_count_to_check_dbger == NULL) { + if (!aice->port->api->set_count_to_check_dbger) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } @@ -148,7 +148,7 @@ int aice_set_count_to_check_dbger(struct aice_port_s *aice, uint32_t count_to_ch int aice_profiling(struct aice_port_s *aice, uint32_t interval, uint32_t iteration, uint32_t reg_no, uint32_t *samples, uint32_t *num_samples) { - if (aice->port->api->profiling == NULL) { + if (!aice->port->api->profiling) { LOG_WARNING("Not implemented: %s", __func__); return ERROR_FAIL; } diff --git a/src/target/nds32_cmd.c b/src/target/nds32_cmd.c index f7647c385..69c28ac78 100644 --- a/src/target/nds32_cmd.c +++ b/src/target/nds32_cmd.c @@ -28,12 +28,12 @@ extern struct nds32_edm_operation nds32_edm_ops[NDS32_EDM_OPERATION_MAX_NUM]; extern uint32_t nds32_edm_ops_num; -static const char *const NDS_MEMORY_ACCESS_NAME[] = { +static const char *const nds_memory_access_name[] = { "BUS", "CPU", }; -static const char *const NDS_MEMORY_SELECT_NAME[] = { +static const char *const nds_memory_select_name[] = { "AUTO", "MEM", "ILM", @@ -84,13 +84,13 @@ COMMAND_HANDLER(handle_nds32_memory_access_command) memory->access_channel = NDS_MEMORY_ACC_CPU; LOG_DEBUG("memory access channel is changed to %s", - NDS_MEMORY_ACCESS_NAME[memory->access_channel]); + nds_memory_access_name[memory->access_channel]); aice_memory_access(aice, memory->access_channel); } else { command_print(CMD, "%s: memory access channel: %s", target_name(target), - NDS_MEMORY_ACCESS_NAME[memory->access_channel]); + nds_memory_access_name[memory->access_channel]); } return ERROR_OK; @@ -147,7 +147,7 @@ COMMAND_HANDLER(handle_nds32_memory_mode_command) command_print(CMD, "%s: memory mode: %s", target_name(target), - NDS_MEMORY_SELECT_NAME[nds32->memory.mode]); + nds_memory_select_name[nds32->memory.mode]); return ERROR_OK; } @@ -575,10 +575,9 @@ COMMAND_HANDLER(handle_nds32_decode_command) read_addr = addr; i = 0; while (i < insn_count) { - if (ERROR_OK != nds32_read_opcode(nds32, read_addr, &opcode)) + if (nds32_read_opcode(nds32, read_addr, &opcode) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != nds32_evaluate_opcode(nds32, opcode, - read_addr, &instruction)) + if (nds32_evaluate_opcode(nds32, opcode, read_addr, &instruction) != ERROR_OK) return ERROR_FAIL; command_print(CMD, "%s", instruction.text); @@ -594,9 +593,9 @@ COMMAND_HANDLER(handle_nds32_decode_command) COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr); - if (ERROR_OK != nds32_read_opcode(nds32, addr, &opcode)) + if (nds32_read_opcode(nds32, addr, &opcode) != ERROR_OK) return ERROR_FAIL; - if (ERROR_OK != nds32_evaluate_opcode(nds32, opcode, addr, &instruction)) + if (nds32_evaluate_opcode(nds32, opcode, addr, &instruction) != ERROR_OK) return ERROR_FAIL; command_print(CMD, "%s", instruction.text); @@ -702,7 +701,7 @@ static int jim_nds32_bulk_write(Jim_Interp *interp, int argc, Jim_Obj * const *a return e; uint32_t *data = malloc(count * sizeof(uint32_t)); - if (data == NULL) + if (!data) return JIM_ERR; jim_wide i; diff --git a/src/target/nds32_disassembler.c b/src/target/nds32_disassembler.c index 0cfd197d2..0bf74e178 100644 --- a/src/target/nds32_disassembler.c +++ b/src/target/nds32_disassembler.c @@ -2849,7 +2849,7 @@ static uint32_t field_mask[9] = { static uint8_t nds32_extract_field_8u(uint16_t opcode, uint32_t start, uint32_t length) { - if (0 < length && length < 9) + if (length > 0 && length < 9) return (opcode >> start) & field_mask[length]; return 0; diff --git a/src/target/nds32_insn.h b/src/target/nds32_insn.h index eb6664517..4e0b2d53b 100644 --- a/src/target/nds32_insn.h +++ b/src/target/nds32_insn.h @@ -72,7 +72,7 @@ #define FMTDR(a, b) (0x6A000049 | ((a) << 20) | ((b) << 15)) /* break instructions */ -extern const int NDS32_BREAK_16; -extern const int NDS32_BREAK_32; +#define NDS32_BREAK_16 (0x00EA) +#define NDS32_BREAK_32 (0x0A000064) #endif /* OPENOCD_TARGET_NDS32_INSN_H */ diff --git a/src/target/nds32_tlb.c b/src/target/nds32_tlb.c index 93a924109..81734e0c1 100644 --- a/src/target/nds32_tlb.c +++ b/src/target/nds32_tlb.c @@ -44,34 +44,34 @@ int nds32_walk_page_table(struct nds32 *nds32, const target_addr_t virtual_addre struct target *target = nds32->target; uint32_t value_mr1; uint32_t load_address; - uint32_t L1_page_table_entry; - uint32_t L2_page_table_entry; + uint32_t l1_page_table_entry; + uint32_t l2_page_table_entry; uint32_t page_size_index = nds32->mmu_config.default_min_page_size; struct page_table_walker_info_s *page_table_info_p = &(page_table_info[page_size_index]); /* Read L1 Physical Page Table */ nds32_get_mapped_reg(nds32, MR1, &value_mr1); - load_address = (value_mr1 & page_table_info_p->L1_base_mask) | - ((virtual_address & page_table_info_p->L1_offset_mask) >> - page_table_info_p->L1_offset_shift); + load_address = (value_mr1 & page_table_info_p->l1_base_mask) | + ((virtual_address & page_table_info_p->l1_offset_mask) >> + page_table_info_p->l1_offset_shift); /* load_address is physical address */ - nds32_read_buffer(target, load_address, 4, (uint8_t *)&L1_page_table_entry); + nds32_read_buffer(target, load_address, 4, (uint8_t *)&l1_page_table_entry); /* Read L2 Physical Page Table */ - if (L1_page_table_entry & 0x1) /* L1_PTE not present */ + if (l1_page_table_entry & 0x1) /* L1_PTE not present */ return ERROR_FAIL; - load_address = (L1_page_table_entry & page_table_info_p->L2_base_mask) | - ((virtual_address & page_table_info_p->L2_offset_mask) >> - page_table_info_p->L2_offset_shift); + load_address = (l1_page_table_entry & page_table_info_p->l2_base_mask) | + ((virtual_address & page_table_info_p->l2_offset_mask) >> + page_table_info_p->l2_offset_shift); /* load_address is physical address */ - nds32_read_buffer(target, load_address, 4, (uint8_t *)&L2_page_table_entry); + nds32_read_buffer(target, load_address, 4, (uint8_t *)&l2_page_table_entry); - if ((L2_page_table_entry & 0x1) != 0x1) /* L2_PTE not valid */ + if ((l2_page_table_entry & 0x1) != 0x1) /* L2_PTE not valid */ return ERROR_FAIL; - *physical_address = (L2_page_table_entry & page_table_info_p->ppn_mask) | + *physical_address = (l2_page_table_entry & page_table_info_p->ppn_mask) | (virtual_address & page_table_info_p->va_offset_mask); return ERROR_OK; diff --git a/src/target/nds32_tlb.h b/src/target/nds32_tlb.h index 62512c111..c22ed7335 100644 --- a/src/target/nds32_tlb.h +++ b/src/target/nds32_tlb.h @@ -29,13 +29,13 @@ enum { struct page_table_walker_info_s { - uint32_t L1_offset_mask; - uint32_t L1_offset_shift; - uint32_t L2_offset_mask; - uint32_t L2_offset_shift; + uint32_t l1_offset_mask; + uint32_t l1_offset_shift; + uint32_t l2_offset_mask; + uint32_t l2_offset_shift; uint32_t va_offset_mask; - uint32_t L1_base_mask; - uint32_t L2_base_mask; + uint32_t l1_base_mask; + uint32_t l2_base_mask; uint32_t ppn_mask; }; diff --git a/src/target/nds32_v2.c b/src/target/nds32_v2.c index 392bd6eb9..49a5758f7 100644 --- a/src/target/nds32_v2.c +++ b/src/target/nds32_v2.c @@ -36,36 +36,36 @@ static int nds32_v2_register_mapping(struct nds32 *nds32, int reg_no) uint32_t max_level = nds32->max_interrupt_level; uint32_t cur_level = nds32->current_interrupt_level; - if ((1 <= cur_level) && (cur_level < max_level)) { - if (IR0 == reg_no) { + if ((cur_level >= 1) && (cur_level < max_level)) { + if (reg_no == IR0) { LOG_DEBUG("Map PSW to IPSW"); return IR1; - } else if (PC == reg_no) { + } else if (reg_no == PC) { LOG_DEBUG("Map PC to IPC"); return IR9; } - } else if ((2 <= cur_level) && (cur_level < max_level)) { - if (R26 == reg_no) { + } else if ((cur_level >= 2) && (cur_level < max_level)) { + if (reg_no == R26) { LOG_DEBUG("Mapping P0 to P_P0"); return IR12; - } else if (R27 == reg_no) { + } else if (reg_no == R27) { LOG_DEBUG("Mapping P1 to P_P1"); return IR13; - } else if (IR1 == reg_no) { + } else if (reg_no == IR1) { LOG_DEBUG("Mapping IPSW to P_IPSW"); return IR2; - } else if (IR4 == reg_no) { + } else if (reg_no == IR4) { LOG_DEBUG("Mapping EVA to P_EVA"); return IR5; - } else if (IR6 == reg_no) { + } else if (reg_no == IR6) { LOG_DEBUG("Mapping ITYPE to P_ITYPE"); return IR7; - } else if (IR9 == reg_no) { + } else if (reg_no == IR9) { LOG_DEBUG("Mapping IPC to P_IPC"); return IR10; } } else if (cur_level == max_level) { - if (PC == reg_no) { + if (reg_no == PC) { LOG_DEBUG("Mapping PC to O_IPC"); return IR11; } @@ -308,7 +308,7 @@ static int nds32_v2_debug_entry(struct nds32 *nds32, bool enable_watchpoint) if (enable_watchpoint) CHECK_RETVAL(nds32_v2_deactivate_hardware_watchpoint(nds32->target)); - if (ERROR_OK != nds32_examine_debug_reason(nds32)) { + if (nds32_examine_debug_reason(nds32) != ERROR_OK) { nds32->target->state = backup_state; /* re-activate all hardware breakpoints & watchpoints */ @@ -436,7 +436,7 @@ static int nds32_v2_add_breakpoint(struct target *target, return ERROR_OK; } else if (breakpoint->type == BKPT_SOFT) { result = nds32_add_software_breakpoint(target, breakpoint); - if (ERROR_OK != result) { + if (result != ERROR_OK) { /* auto convert to hardware breakpoint if failed */ if (nds32->auto_convert_hw_bp) { /* convert to hardware breakpoint */ @@ -644,10 +644,10 @@ static int nds32_v2_translate_address(struct target *target, target_addr_t *addr /* Following conditions need to do address translation * 1. BUS mode * 2. CPU mode under maximum interrupt level */ - if ((NDS_MEMORY_ACC_BUS == memory->access_channel) || - ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_BUS) || + ((memory->access_channel == NDS_MEMORY_ACC_CPU) && nds32_reach_max_interrupt_level(nds32))) { - if (ERROR_OK == target->type->virt2phys(target, *address, &physical_address)) + if (target->type->virt2phys(target, *address, &physical_address) == ERROR_OK) *address = physical_address; else return ERROR_FAIL; @@ -662,7 +662,7 @@ static int nds32_v2_read_buffer(struct target *target, target_addr_t address, struct nds32 *nds32 = target_to_nds32(target); struct nds32_memory *memory = &(nds32->memory); - if ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_CPU) && (target->state != TARGET_HALTED)) { LOG_WARNING("target was not halted"); return ERROR_TARGET_NOT_HALTED; @@ -682,7 +682,7 @@ static int nds32_v2_write_buffer(struct target *target, target_addr_t address, struct nds32 *nds32 = target_to_nds32(target); struct nds32_memory *memory = &(nds32->memory); - if ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_CPU) && (target->state != TARGET_HALTED)) { LOG_WARNING("target was not halted"); return ERROR_TARGET_NOT_HALTED; @@ -702,7 +702,7 @@ static int nds32_v2_read_memory(struct target *target, target_addr_t address, struct nds32 *nds32 = target_to_nds32(target); struct nds32_memory *memory = &(nds32->memory); - if ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_CPU) && (target->state != TARGET_HALTED)) { LOG_WARNING("target was not halted"); return ERROR_TARGET_NOT_HALTED; @@ -722,7 +722,7 @@ static int nds32_v2_write_memory(struct target *target, target_addr_t address, struct nds32 *nds32 = target_to_nds32(target); struct nds32_memory *memory = &(nds32->memory); - if ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_CPU) && (target->state != TARGET_HALTED)) { LOG_WARNING("target was not halted"); return ERROR_TARGET_NOT_HALTED; diff --git a/src/target/nds32_v3.c b/src/target/nds32_v3.c index f9cd47a40..fde86d6e8 100644 --- a/src/target/nds32_v3.c +++ b/src/target/nds32_v3.c @@ -310,7 +310,7 @@ static int nds32_v3_add_breakpoint(struct target *target, return ERROR_OK; } else if (breakpoint->type == BKPT_SOFT) { result = nds32_add_software_breakpoint(target, breakpoint); - if (ERROR_OK != result) { + if (result != ERROR_OK) { /* auto convert to hardware breakpoint if failed */ if (nds32->auto_convert_hw_bp) { /* convert to hardware breakpoint */ diff --git a/src/target/nds32_v3_common.c b/src/target/nds32_v3_common.c index 271ffdd1c..b0c3de622 100644 --- a/src/target/nds32_v3_common.c +++ b/src/target/nds32_v3_common.c @@ -93,7 +93,7 @@ static int nds32_v3_debug_entry(struct nds32 *nds32, bool enable_watchpoint) } } - if (ERROR_OK != nds32_examine_debug_reason(nds32)) { + if (nds32_examine_debug_reason(nds32) != ERROR_OK) { nds32->target->state = backup_state; /* re-activate all hardware breakpoints & watchpoints */ @@ -268,8 +268,8 @@ static int nds32_v3_get_exception_address(struct nds32 *nds32, nds32_get_mapped_reg(nds32, PC, &val_pc); - if ((NDS32_DEBUG_DATA_ADDR_WATCHPOINT_NEXT_PRECISE == reason) || - (NDS32_DEBUG_DATA_VALUE_WATCHPOINT_NEXT_PRECISE == reason)) { + if ((reason == NDS32_DEBUG_DATA_ADDR_WATCHPOINT_NEXT_PRECISE) || + (reason == NDS32_DEBUG_DATA_VALUE_WATCHPOINT_NEXT_PRECISE)) { if (edmsw & 0x4) /* check EDMSW.IS_16BIT */ val_pc -= 2; else @@ -320,7 +320,7 @@ static int nds32_v3_get_exception_address(struct nds32 *nds32, return ERROR_FAIL; } else if (match_count == 0) { /* global stop is precise exception */ - if ((NDS32_DEBUG_LOAD_STORE_GLOBAL_STOP == reason) && nds32->global_stop) { + if ((reason == NDS32_DEBUG_LOAD_STORE_GLOBAL_STOP) && nds32->global_stop) { /* parse instruction to get correct access address */ uint32_t val_pc; uint32_t opcode; @@ -450,7 +450,7 @@ int nds32_v3_read_buffer(struct target *target, target_addr_t address, struct nds32 *nds32 = target_to_nds32(target); struct nds32_memory *memory = &(nds32->memory); - if ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_CPU) && (target->state != TARGET_HALTED)) { LOG_WARNING("target was not halted"); return ERROR_TARGET_NOT_HALTED; @@ -474,7 +474,7 @@ int nds32_v3_read_buffer(struct target *target, target_addr_t address, * Because hardware will turn off IT/DT by default, it MUST translate virtual address * to physical address. */ - if (ERROR_OK == target->type->virt2phys(target, address, &physical_address)) + if (target->type->virt2phys(target, address, &physical_address) == ERROR_OK) address = physical_address; else return ERROR_FAIL; @@ -508,7 +508,7 @@ int nds32_v3_write_buffer(struct target *target, target_addr_t address, struct nds32 *nds32 = target_to_nds32(target); struct nds32_memory *memory = &(nds32->memory); - if ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_CPU) && (target->state != TARGET_HALTED)) { LOG_WARNING("target was not halted"); return ERROR_TARGET_NOT_HALTED; @@ -532,7 +532,7 @@ int nds32_v3_write_buffer(struct target *target, target_addr_t address, * Because hardware will turn off IT/DT by default, it MUST translate virtual address * to physical address. */ - if (ERROR_OK == target->type->virt2phys(target, address, &physical_address)) + if (target->type->virt2phys(target, address, &physical_address) == ERROR_OK) address = physical_address; else return ERROR_FAIL; @@ -553,7 +553,7 @@ int nds32_v3_write_buffer(struct target *target, target_addr_t address, int result; result = nds32_gdb_fileio_write_memory(nds32, address, size, buffer); - if (NDS_MEMORY_ACC_CPU == origin_access_channel) { + if (origin_access_channel == NDS_MEMORY_ACC_CPU) { memory->access_channel = NDS_MEMORY_ACC_CPU; aice_memory_access(aice, NDS_MEMORY_ACC_CPU); } @@ -570,7 +570,7 @@ int nds32_v3_read_memory(struct target *target, target_addr_t address, struct nds32 *nds32 = target_to_nds32(target); struct nds32_memory *memory = &(nds32->memory); - if ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_CPU) && (target->state != TARGET_HALTED)) { LOG_WARNING("target was not halted"); return ERROR_TARGET_NOT_HALTED; @@ -594,7 +594,7 @@ int nds32_v3_read_memory(struct target *target, target_addr_t address, * Because hardware will turn off IT/DT by default, it MUST translate virtual address * to physical address. */ - if (ERROR_OK == target->type->virt2phys(target, address, &physical_address)) + if (target->type->virt2phys(target, address, &physical_address) == ERROR_OK) address = physical_address; else return ERROR_FAIL; @@ -628,7 +628,7 @@ int nds32_v3_write_memory(struct target *target, target_addr_t address, struct nds32 *nds32 = target_to_nds32(target); struct nds32_memory *memory = &(nds32->memory); - if ((NDS_MEMORY_ACC_CPU == memory->access_channel) && + if ((memory->access_channel == NDS_MEMORY_ACC_CPU) && (target->state != TARGET_HALTED)) { LOG_WARNING("target was not halted"); return ERROR_TARGET_NOT_HALTED; @@ -652,7 +652,7 @@ int nds32_v3_write_memory(struct target *target, target_addr_t address, * Because hardware will turn off IT/DT by default, it MUST translate virtual address * to physical address. */ - if (ERROR_OK == target->type->virt2phys(target, address, &physical_address)) + if (target->type->virt2phys(target, address, &physical_address) == ERROR_OK) address = physical_address; else return ERROR_FAIL; diff --git a/src/target/nds32_v3m.c b/src/target/nds32_v3m.c index 952d0ebb4..ffd646f33 100644 --- a/src/target/nds32_v3m.c +++ b/src/target/nds32_v3m.c @@ -267,7 +267,7 @@ static int nds32_v3m_add_breakpoint(struct target *target, return ERROR_OK; } else if (breakpoint->type == BKPT_SOFT) { result = nds32_add_software_breakpoint(target, breakpoint); - if (ERROR_OK != result) { + if (result != ERROR_OK) { /* auto convert to hardware breakpoint if failed */ if (nds32->auto_convert_hw_bp) { /* convert to hardware breakpoint */ diff --git a/src/target/openrisc/jsp_server.c b/src/target/openrisc/jsp_server.c index 4dbe63527..e0a4475cf 100644 --- a/src/target/openrisc/jsp_server.c +++ b/src/target/openrisc/jsp_server.c @@ -103,7 +103,7 @@ static int jsp_new_connection(struct connection *connection) int retval = target_register_timer_callback(&jsp_poll_read, 1, TARGET_TIMER_TYPE_PERIODIC, jsp_service); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; return ERROR_OK; @@ -187,7 +187,7 @@ static int jsp_connection_closed(struct connection *connection) struct jsp_service *jsp_service = connection->service->priv; int retval = target_unregister_timer_callback(&jsp_poll_read, jsp_service); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; free(connection->priv); diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c index 5b8d7ded7..8fbcd9620 100644 --- a/src/target/openrisc/or1k.c +++ b/src/target/openrisc/or1k.c @@ -1089,12 +1089,12 @@ static int or1k_init_target(struct command_context *cmd_ctx, struct or1k_du *du_core = or1k_to_du(or1k); struct or1k_jtag *jtag = &or1k->jtag; - if (du_core == NULL) { + if (!du_core) { LOG_ERROR("No debug unit selected"); return ERROR_FAIL; } - if (jtag->tap_ip == NULL) { + if (!jtag->tap_ip) { LOG_ERROR("No tap selected"); return ERROR_FAIL; } @@ -1111,7 +1111,7 @@ static int or1k_init_target(struct command_context *cmd_ctx, static int or1k_target_create(struct target *target, Jim_Interp *interp) { - if (target->tap == NULL) + if (!target->tap) return ERROR_FAIL; struct or1k_common *or1k = calloc(1, sizeof(struct or1k_common)); diff --git a/src/target/openrisc/or1k_du_adv.c b/src/target/openrisc/or1k_du_adv.c index 31b248776..885fcb9c1 100644 --- a/src/target/openrisc/or1k_du_adv.c +++ b/src/target/openrisc/or1k_du_adv.c @@ -946,7 +946,7 @@ static int or1k_adv_jtag_write_memory(struct or1k_jtag *jtag_info, struct target *target = jtag_info->target; if ((target->endianness == TARGET_BIG_ENDIAN) && (size != 1)) { t = malloc(count * size * sizeof(uint8_t)); - if (t == NULL) { + if (!t) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } diff --git a/src/target/quark_d20xx.c b/src/target/quark_d20xx.c index 9169379bb..211245d7d 100644 --- a/src/target/quark_d20xx.c +++ b/src/target/quark_d20xx.c @@ -46,7 +46,7 @@ static int quark_d20xx_target_create(struct target *t, Jim_Interp *interp) { struct x86_32_common *x86_32 = calloc(1, sizeof(struct x86_32_common)); - if (x86_32 == NULL) { + if (!x86_32) { LOG_ERROR("%s out of memory", __func__); return ERROR_FAIL; } diff --git a/src/target/riscv/batch.c b/src/target/riscv/batch.c index 073f80888..26068fdbb 100644 --- a/src/target/riscv/batch.c +++ b/src/target/riscv/batch.c @@ -185,7 +185,7 @@ void dump_field(int idle, const struct scan_field *field) if (debug_level < LOG_LVL_DEBUG) return; - assert(field->out_value != NULL); + assert(field->out_value); uint64_t out = buf_get_u64(field->out_value, 0, field->num_bits); unsigned int out_op = get_field(out, DTM_DMI_OP); unsigned int out_data = get_field(out, DTM_DMI_DATA); diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index b02ea7e70..00405e94b 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1101,7 +1101,7 @@ static int old_or_new_riscv_step(struct target *target, int current, { RISCV_INFO(r); LOG_DEBUG("handle_breakpoints=%d", handle_breakpoints); - if (r->is_halted == NULL) + if (!r->is_halted) return oldriscv_step(target, current, address, handle_breakpoints); else return riscv_openocd_step(target, current, address, handle_breakpoints); @@ -1125,7 +1125,7 @@ static int riscv_examine(struct target *target) LOG_DEBUG(" version=0x%x", info->dtm_version); struct target_type *tt = get_target_type(target); - if (tt == NULL) + if (!tt) return ERROR_FAIL; int result = tt->init_target(info->cmd_ctx, target); @@ -1144,7 +1144,7 @@ static int oldriscv_poll(struct target *target) static int old_or_new_riscv_poll(struct target *target) { RISCV_INFO(r); - if (r->is_halted == NULL) + if (!r->is_halted) return oldriscv_poll(target); else return riscv_openocd_poll(target); @@ -1197,7 +1197,7 @@ int halt_go(struct target *target) { riscv_info_t *r = riscv_info(target); int result; - if (r->is_halted == NULL) { + if (!r->is_halted) { struct target_type *tt = get_target_type(target); result = tt->halt(target); } else { @@ -1219,7 +1219,7 @@ int riscv_halt(struct target *target) { RISCV_INFO(r); - if (r->is_halted == NULL) { + if (!r->is_halted) { struct target_type *tt = get_target_type(target); return tt->halt(target); } @@ -1430,7 +1430,7 @@ static int resume_go(struct target *target, int current, { riscv_info_t *r = riscv_info(target); int result; - if (r->is_halted == NULL) { + if (!r->is_halted) { struct target_type *tt = get_target_type(target); result = tt->resume(target, current, address, handle_breakpoints, debug_execution); @@ -2177,7 +2177,7 @@ int riscv_openocd_poll(struct target *target) unsigned should_remain_halted = 0; unsigned should_resume = 0; unsigned i = 0; - for (struct target_list *list = target->head; list != NULL; + for (struct target_list *list = target->head; list; list = list->next, i++) { struct target *t = list->target; riscv_info_t *r = riscv_info(t); @@ -3508,10 +3508,10 @@ int riscv_current_hartid(const struct target *target) int riscv_count_harts(struct target *target) { - if (target == NULL) + if (!target) return 1; RISCV_INFO(r); - if (r == NULL || r->hart_count == NULL) + if (!r || !r->hart_count) return 1; return r->hart_count(target); } diff --git a/src/target/riscv/riscv_semihosting.c b/src/target/riscv/riscv_semihosting.c index c39f03076..11f4a7ebf 100644 --- a/src/target/riscv/riscv_semihosting.c +++ b/src/target/riscv/riscv_semihosting.c @@ -140,7 +140,7 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval) semihosting->word_size_bytes = riscv_xlen(target) / 8; /* Check for ARM operation numbers. */ - if (0 <= semihosting->op && semihosting->op <= 0x31) { + if (semihosting->op >= 0 && semihosting->op <= 0x31) { *retval = semihosting_common(target); if (*retval != ERROR_OK) { LOG_ERROR("Failed semihosting operation (0x%02X)", semihosting->op); diff --git a/src/target/semihosting_common.c b/src/target/semihosting_common.c index 61a69d1bd..5c96e1cd6 100644 --- a/src/target/semihosting_common.c +++ b/src/target/semihosting_common.c @@ -99,7 +99,7 @@ int semihosting_common_init(struct target *target, void *setup, LOG_DEBUG(" "); target->fileio_info = malloc(sizeof(*target->fileio_info)); - if (target->fileio_info == NULL) { + if (!target->fileio_info) { LOG_ERROR("out of memory"); return ERROR_FAIL; } @@ -107,7 +107,7 @@ int semihosting_common_init(struct target *target, void *setup, struct semihosting *semihosting; semihosting = malloc(sizeof(*target->semihosting)); - if (semihosting == NULL) { + if (!semihosting) { LOG_ERROR("out of memory"); return ERROR_FAIL; } @@ -226,18 +226,28 @@ int semihosting_common(struct target *target) return retval; else { int fd = semihosting_get_field(target, 0, fields); - if (semihosting->is_fileio) { - if (fd == 0 || fd == 1 || fd == 2) { + /* Do not allow to close OpenOCD's own standard streams */ + if (fd == 0 || fd == 1 || fd == 2) { + LOG_DEBUG("ignoring semihosting attempt to close %s", + (fd == 0) ? "stdin" : + (fd == 1) ? "stdout" : "stderr"); + /* Just pretend success */ + if (semihosting->is_fileio) { semihosting->result = 0; - break; + } else { + semihosting->result = 0; + semihosting->sys_errno = 0; } + break; + } + /* Close the descriptor */ + if (semihosting->is_fileio) { semihosting->hit_fileio = true; fileio_info->identifier = "close"; fileio_info->param_1 = fd; } else { semihosting->result = close(fd); semihosting->sys_errno = errno; - LOG_DEBUG("close(%d)=%d", fd, (int)semihosting->result); } } @@ -506,7 +516,7 @@ int semihosting_common(struct target *target) uint64_t addr = semihosting_get_field(target, 0, fields); size_t size = semihosting_get_field(target, 1, fields); - char *arg = semihosting->cmdline != NULL ? + char *arg = semihosting->cmdline ? semihosting->cmdline : ""; uint32_t len = strlen(arg) + 1; if (len > size) @@ -615,6 +625,7 @@ int semihosting_common(struct target *target) return retval; int fd = semihosting_get_field(target, 0, fields); semihosting->result = isatty(fd); + semihosting->sys_errno = errno; LOG_DEBUG("isatty(%d)=%d", fd, (int)semihosting->result); } break; @@ -1467,7 +1478,7 @@ static __COMMAND_HANDLER(handle_common_semihosting_command) { struct target *target = get_current_target(CMD_CTX); - if (target == NULL) { + if (!target) { LOG_ERROR("No target selected"); return ERROR_FAIL; } @@ -1508,7 +1519,7 @@ static __COMMAND_HANDLER(handle_common_semihosting_fileio_command) { struct target *target = get_current_target(CMD_CTX); - if (target == NULL) { + if (!target) { LOG_ERROR("No target selected"); return ERROR_FAIL; } @@ -1539,7 +1550,7 @@ static __COMMAND_HANDLER(handle_common_semihosting_cmdline) struct target *target = get_current_target(CMD_CTX); unsigned int i; - if (target == NULL) { + if (!target) { LOG_ERROR("No target selected"); return ERROR_FAIL; } @@ -1555,7 +1566,7 @@ static __COMMAND_HANDLER(handle_common_semihosting_cmdline) for (i = 1; i < CMD_ARGC; i++) { char *cmdline = alloc_printf("%s %s", semihosting->cmdline, CMD_ARGV[i]); - if (cmdline == NULL) + if (!cmdline) break; free(semihosting->cmdline); semihosting->cmdline = cmdline; @@ -1571,7 +1582,7 @@ static __COMMAND_HANDLER(handle_common_semihosting_resumable_exit_command) { struct target *target = get_current_target(CMD_CTX); - if (target == NULL) { + if (!target) { LOG_ERROR("No target selected"); return ERROR_FAIL; } diff --git a/src/target/smp.c b/src/target/smp.c index 6501dc08a..94c4da5a8 100644 --- a/src/target/smp.c +++ b/src/target/smp.c @@ -141,7 +141,7 @@ COMMAND_HANDLER(handle_smp_gdb_command) if (CMD_ARGC == 1) { int coreid = 0; COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], coreid); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; target->gdb_service->core[1] = coreid; diff --git a/src/target/smp.h b/src/target/smp.h index f024b4023..3338240ad 100644 --- a/src/target/smp.h +++ b/src/target/smp.h @@ -22,7 +22,7 @@ #include "server/server.h" #define foreach_smp_target(pos, head) \ - for (pos = head; (pos != NULL); pos = pos->next) + for (pos = head; (pos); pos = pos->next) extern const struct command_registration smp_command_handlers[]; diff --git a/src/target/stm8.c b/src/target/stm8.c index a1653bc57..21fc8c54f 100644 --- a/src/target/stm8.c +++ b/src/target/stm8.c @@ -159,7 +159,6 @@ struct stm8_algorithm { struct stm8_core_reg { uint32_t num; struct target *target; - struct stm8_common *stm8_common; }; enum hw_break_type { @@ -1221,7 +1220,6 @@ static struct reg_cache *stm8_build_reg_cache(struct target *target) for (i = 0; i < num_regs; i++) { arch_info[i].num = stm8_regs[i].id; arch_info[i].target = target; - arch_info[i].stm8_common = stm8; reg_list[i].name = stm8_regs[i].name; reg_list[i].size = stm8_regs[i].bits; diff --git a/src/target/target.c b/src/target/target.c index ed5527c31..5777b6a43 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -41,6 +41,7 @@ #include "config.h" #endif +#include #include #include #include @@ -154,6 +155,7 @@ static struct target_type *target_types[] = { struct target *all_targets; static struct target_event_callback *target_event_callbacks; static struct target_timer_callback *target_timer_callbacks; +static int64_t target_timer_next_event_value; static LIST_HEAD(target_reset_callback_list); static LIST_HEAD(target_trace_callback_list); static const int polling_interval = TARGET_DEFAULT_POLLING_INTERVAL; @@ -188,7 +190,7 @@ static const char *target_strerror_safe(int err) const struct jim_nvp *n; n = jim_nvp_value2name_simple(nvp_error_target, err); - if (n->name == NULL) + if (!n->name) return "unknown"; else return n->name; @@ -484,7 +486,7 @@ struct target *get_target(const char *id) /* try as tcltarget name */ for (target = all_targets; target; target = target->next) { - if (target_name(target) == NULL) + if (!target_name(target)) continue; if (strcmp(id, target_name(target)) == 0) return target; @@ -526,7 +528,7 @@ struct target *get_current_target(struct command_context *cmd_ctx) { struct target *target = get_current_target_or_null(cmd_ctx); - if (target == NULL) { + if (!target) { LOG_ERROR("BUG: current_target out of bounds"); exit(-1); } @@ -663,7 +665,7 @@ static int target_process_reset(struct command_invocation *cmd, enum target_rese int retval; struct jim_nvp *n; n = jim_nvp_value2name_simple(nvp_reset_modes, reset_mode); - if (n->name == NULL) { + if (!n->name) { LOG_ERROR("invalid reset mode"); return ERROR_FAIL; } @@ -1003,7 +1005,7 @@ int target_run_flash_async_algorithm(struct target *target, uint32_t rp = fifo_start_addr; /* validate block_size is 2^n */ - assert(!block_size || !(block_size & (block_size - 1))); + assert(IS_PWR_OF_2(block_size)); retval = target_write_u32(target, wp_addr, wp); if (retval != ERROR_OK) @@ -1041,7 +1043,7 @@ int target_run_flash_async_algorithm(struct target *target, break; } - if (((rp - fifo_start_addr) & (block_size - 1)) || rp < fifo_start_addr || rp >= fifo_end_addr) { + if (!IS_ALIGNED(rp - fifo_start_addr, block_size) || rp < fifo_start_addr || rp >= fifo_end_addr) { LOG_ERROR("corrupted fifo read pointer 0x%" PRIx32, rp); break; } @@ -1156,7 +1158,7 @@ int target_run_read_async_algorithm(struct target *target, uint32_t rp = fifo_start_addr; /* validate block_size is 2^n */ - assert(!block_size || !(block_size & (block_size - 1))); + assert(IS_PWR_OF_2(block_size)); retval = target_write_u32(target, wp_addr, wp); if (retval != ERROR_OK) @@ -1193,7 +1195,7 @@ int target_run_read_async_algorithm(struct target *target, break; } - if (((wp - fifo_start_addr) & (block_size - 1)) || wp < fifo_start_addr || wp >= fifo_end_addr) { + if (!IS_ALIGNED(wp - fifo_start_addr, block_size) || wp < fifo_start_addr || wp >= fifo_end_addr) { LOG_ERROR("corrupted fifo write pointer 0x%" PRIx32, wp); break; } @@ -1397,7 +1399,7 @@ int target_hit_watchpoint(struct target *target, return ERROR_TARGET_NOT_HALTED; } - if (target->type->hit_watchpoint == NULL) { + if (!target->type->hit_watchpoint) { /* For backward compatible, if hit_watchpoint is not implemented, * return ERROR_FAIL such that gdb_server will not take the nonsense * information. */ @@ -1409,7 +1411,7 @@ int target_hit_watchpoint(struct target *target, const char *target_get_gdb_arch(struct target *target) { - if (target->type->get_gdb_arch == NULL) + if (!target->type->get_gdb_arch) return NULL; return target->type->get_gdb_arch(target); } @@ -1537,16 +1539,16 @@ static int target_init_one(struct command_context *cmd_ctx, target_reset_examined(target); struct target_type *type = target->type; - if (type->examine == NULL) + if (!type->examine) type->examine = default_examine; - if (type->check_reset == NULL) + if (!type->check_reset) type->check_reset = default_check_reset; - assert(type->init_target != NULL); + assert(type->init_target); int retval = type->init_target(cmd_ctx, target); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("target '%s' init failed", target_name(target)); return retval; } @@ -1555,7 +1557,7 @@ static int target_init_one(struct command_context *cmd_ctx, * implement it in stages, but warn if we need to do so. */ if (type->mmu) { - if (type->virt2phys == NULL) { + if (!type->virt2phys) { LOG_ERROR("type '%s' is missing virt2phys", type->name); type->virt2phys = identity_virt2phys; } @@ -1573,19 +1575,19 @@ static int target_init_one(struct command_context *cmd_ctx, type->virt2phys = identity_virt2phys; } - if (target->type->read_buffer == NULL) + if (!target->type->read_buffer) target->type->read_buffer = target_read_buffer_default; - if (target->type->write_buffer == NULL) + if (!target->type->write_buffer) target->type->write_buffer = target_write_buffer_default; - if (target->type->get_gdb_fileio_info == NULL) + if (!target->type->get_gdb_fileio_info) target->type->get_gdb_fileio_info = target_get_gdb_fileio_info_default; - if (target->type->gdb_fileio_end == NULL) + if (!target->type->gdb_fileio_end) target->type->gdb_fileio_end = target_gdb_fileio_end_default; - if (target->type->profiling == NULL) + if (!target->type->profiling) target->type->profiling = target_profiling_default; return ERROR_OK; @@ -1598,7 +1600,7 @@ static int target_init(struct command_context *cmd_ctx) for (target = all_targets; target; target = target->next) { retval = target_init_one(cmd_ctx, target); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; } @@ -1606,12 +1608,12 @@ static int target_init(struct command_context *cmd_ctx) return ERROR_OK; retval = target_register_user_commands(cmd_ctx); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = target_register_timer_callback(&handle_target, polling_interval, TARGET_TIMER_TYPE_PERIODIC, cmd_ctx->interp); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; return ERROR_OK; @@ -1632,15 +1634,15 @@ COMMAND_HANDLER(handle_target_init_command) target_initialized = true; retval = command_run_line(CMD_CTX, "init_targets"); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = command_run_line(CMD_CTX, "init_target_events"); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; retval = command_run_line(CMD_CTX, "init_board"); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; LOG_DEBUG("Initializing targets..."); @@ -1652,7 +1654,7 @@ int target_register_event_callback(int (*callback)(struct target *target, { struct target_event_callback **callbacks_p = &target_event_callbacks; - if (callback == NULL) + if (!callback) return ERROR_COMMAND_SYNTAX_ERROR; if (*callbacks_p) { @@ -1674,11 +1676,11 @@ int target_register_reset_callback(int (*callback)(struct target *target, { struct target_reset_callback *entry; - if (callback == NULL) + if (!callback) return ERROR_COMMAND_SYNTAX_ERROR; entry = malloc(sizeof(struct target_reset_callback)); - if (entry == NULL) { + if (!entry) { LOG_ERROR("error allocating buffer for reset callback entry"); return ERROR_COMMAND_SYNTAX_ERROR; } @@ -1696,11 +1698,11 @@ int target_register_trace_callback(int (*callback)(struct target *target, { struct target_trace_callback *entry; - if (callback == NULL) + if (!callback) return ERROR_COMMAND_SYNTAX_ERROR; entry = malloc(sizeof(struct target_trace_callback)); - if (entry == NULL) { + if (!entry) { LOG_ERROR("error allocating buffer for trace callback entry"); return ERROR_COMMAND_SYNTAX_ERROR; } @@ -1718,7 +1720,7 @@ int target_register_timer_callback(int (*callback)(void *priv), { struct target_timer_callback **callbacks_p = &target_timer_callbacks; - if (callback == NULL) + if (!callback) return ERROR_COMMAND_SYNTAX_ERROR; if (*callbacks_p) { @@ -1734,6 +1736,7 @@ int target_register_timer_callback(int (*callback)(void *priv), (*callbacks_p)->removed = false; (*callbacks_p)->when = timeval_ms() + time_ms; + target_timer_next_event_value = MIN(target_timer_next_event_value, (*callbacks_p)->when); (*callbacks_p)->priv = priv; (*callbacks_p)->next = NULL; @@ -1747,7 +1750,7 @@ int target_unregister_event_callback(int (*callback)(struct target *target, struct target_event_callback **p = &target_event_callbacks; struct target_event_callback *c = target_event_callbacks; - if (callback == NULL) + if (!callback) return ERROR_COMMAND_SYNTAX_ERROR; while (c) { @@ -1769,7 +1772,7 @@ int target_unregister_reset_callback(int (*callback)(struct target *target, { struct target_reset_callback *entry; - if (callback == NULL) + if (!callback) return ERROR_COMMAND_SYNTAX_ERROR; list_for_each_entry(entry, &target_reset_callback_list, list) { @@ -1788,7 +1791,7 @@ int target_unregister_trace_callback(int (*callback)(struct target *target, { struct target_trace_callback *entry; - if (callback == NULL) + if (!callback) return ERROR_COMMAND_SYNTAX_ERROR; list_for_each_entry(entry, &target_trace_callback_list, list) { @@ -1804,7 +1807,7 @@ int target_unregister_trace_callback(int (*callback)(struct target *target, int target_unregister_timer_callback(int (*callback)(void *priv), void *priv) { - if (callback == NULL) + if (!callback) return ERROR_COMMAND_SYNTAX_ERROR; for (struct target_timer_callback *c = target_timer_callbacks; @@ -1897,8 +1900,11 @@ static int target_call_timer_callbacks_check_time(int64_t *next_event, int check keep_alive(); int64_t now = timeval_ms(); - if (next_event) - *next_event = now + 1000; + + /* Initialize to a default value that's a ways into the future. + * The loop below will make it closer to now if there are + * callbacks that want to be called sooner. */ + target_timer_next_event_value = now + 1000; /* Store an address of the place containing a pointer to the * next item; initially, that's a standalone "root of the @@ -1919,8 +1925,8 @@ static int target_call_timer_callbacks_check_time(int64_t *next_event, int check if (call_it) target_call_timer_callback(*callback, &now); - if (next_event && (*callback)->when < *next_event) - *next_event = (*callback)->when; + if (!(*callback)->removed && (*callback)->when < target_timer_next_event_value) + target_timer_next_event_value = (*callback)->when; callback = &(*callback)->next; } @@ -1929,21 +1935,22 @@ static int target_call_timer_callbacks_check_time(int64_t *next_event, int check return ERROR_OK; } -/** - * This function updates *next_event with the time (according to timeval_ms()) - * that it would next need to be called in order to run all callbacks on time. - */ -int target_call_timer_callbacks(int64_t *next_event) +int target_call_timer_callbacks() { return target_call_timer_callbacks_check_time(next_event, 1); } /* invoke periodic callbacks immediately */ -int target_call_timer_callbacks_now(int64_t *next_event) +int target_call_timer_callbacks_now() { return target_call_timer_callbacks_check_time(next_event, 0); } +int64_t target_timer_next_event(void) +{ + return target_timer_next_event_value; +} + /* Prints the working area layout for debug purposes */ static void print_wa_layout(struct target *target) { @@ -1967,7 +1974,7 @@ static void target_split_working_area(struct working_area *area, uint32_t size) if (size < area->size) { struct working_area *new_wa = malloc(sizeof(*new_wa)); - if (new_wa == NULL) + if (!new_wa) return; new_wa->next = area->next; @@ -2019,7 +2026,7 @@ static void target_merge_working_areas(struct target *target) int target_alloc_working_area_try(struct target *target, uint32_t size, struct working_area **area) { /* Reevaluate working area address based on MMU state*/ - if (target->working_areas == NULL) { + if (!target->working_areas) { int retval; int enabled; @@ -2078,7 +2085,7 @@ int target_alloc_working_area_try(struct target *target, uint32_t size, struct w c = c->next; } - if (c == NULL) + if (!c) return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; /* Split the working area into the requested size */ @@ -2088,9 +2095,9 @@ int target_alloc_working_area_try(struct target *target, uint32_t size, struct w size, c->address); if (target->backup_working_area) { - if (c->backup == NULL) { + if (!c->backup) { c->backup = malloc(c->size); - if (c->backup == NULL) + if (!c->backup) return ERROR_FAIL; } @@ -2126,7 +2133,7 @@ static int target_restore_working_area(struct target *target, struct working_are { int retval = ERROR_OK; - if (target->backup_working_area && area->backup != NULL) { + if (target->backup_working_area && area->backup) { retval = target_write_memory(target, area->address, 4, area->size / 4, area->backup); if (retval != ERROR_OK) LOG_ERROR("failed to restore %" PRIu32 " bytes of working area at address " TARGET_ADDR_FMT, @@ -2221,7 +2228,7 @@ uint32_t target_get_working_area_avail(struct target *target) struct working_area *c = target->working_areas; uint32_t max_size = 0; - if (c == NULL) + if (!c) return target->working_area_size; while (c) { @@ -2256,7 +2263,7 @@ static void target_destroy(struct target *target) /* release the targets SMP list */ if (target->smp) { struct target_list *head = target->head; - while (head != NULL) { + while (head) { struct target_list *pos = head->next; head->target->smp = 0; free(head); @@ -2307,7 +2314,7 @@ void target_quit(void) int target_arch_state(struct target *target) { int retval; - if (target == NULL) { + if (!target) { LOG_WARNING("No target has been configured"); return ERROR_OK; } @@ -2526,7 +2533,7 @@ int target_checksum_memory(struct target *target, target_addr_t address, uint32_ retval = target->type->checksum_memory(target, address, size, &checksum); if (retval != ERROR_OK) { buffer = malloc(size); - if (buffer == NULL) { + if (!buffer) { LOG_ERROR("error allocating buffer for section (%" PRIu32 " bytes)", size); return ERROR_COMMAND_SYNTAX_ERROR; } @@ -2561,7 +2568,7 @@ int target_blank_check_memory(struct target *target, return ERROR_FAIL; } - if (target->type->blank_check_memory == NULL) + if (!target->type->blank_check_memory) return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; return target->type->blank_check_memory(target, blocks, num_blocks, erased_value); @@ -2826,7 +2833,7 @@ int target_write_phys_u8(struct target *target, target_addr_t address, uint8_t v static int find_target(struct command_invocation *cmd, const char *name) { struct target *target = get_target(name); - if (target == NULL) { + if (!target) { command_print(cmd, "Target: %s is unknown, try one of:\n", name); return ERROR_FAIL; } @@ -2890,57 +2897,57 @@ COMMAND_HANDLER(handle_targets_command) /* every 300ms we check for reset & powerdropout and issue a "reset halt" if so. */ -static int powerDropout; -static int srstAsserted; +static int power_dropout; +static int srst_asserted; -static int runPowerRestore; -static int runPowerDropout; -static int runSrstAsserted; -static int runSrstDeasserted; +static int run_power_restore; +static int run_power_dropout; +static int run_srst_asserted; +static int run_srst_deasserted; static int sense_handler(void) { - static int prevSrstAsserted; - static int prevPowerdropout; + static int prev_srst_asserted; + static int prev_power_dropout; - int retval = jtag_power_dropout(&powerDropout); + int retval = jtag_power_dropout(&power_dropout); if (retval != ERROR_OK) return retval; - int powerRestored; - powerRestored = prevPowerdropout && !powerDropout; - if (powerRestored) - runPowerRestore = 1; + int power_restored; + power_restored = prev_power_dropout && !power_dropout; + if (power_restored) + run_power_restore = 1; int64_t current = timeval_ms(); - static int64_t lastPower; - bool waitMore = lastPower + 2000 > current; - if (powerDropout && !waitMore) { - runPowerDropout = 1; - lastPower = current; + static int64_t last_power; + bool wait_more = last_power + 2000 > current; + if (power_dropout && !wait_more) { + run_power_dropout = 1; + last_power = current; } - retval = jtag_srst_asserted(&srstAsserted); + retval = jtag_srst_asserted(&srst_asserted); if (retval != ERROR_OK) return retval; - int srstDeasserted; - srstDeasserted = prevSrstAsserted && !srstAsserted; + int srst_deasserted; + srst_deasserted = prev_srst_asserted && !srst_asserted; - static int64_t lastSrst; - waitMore = lastSrst + 2000 > current; - if (srstDeasserted && !waitMore) { - runSrstDeasserted = 1; - lastSrst = current; + static int64_t last_srst; + wait_more = last_srst + 2000 > current; + if (srst_deasserted && !wait_more) { + run_srst_deasserted = 1; + last_srst = current; } - if (!prevSrstAsserted && srstAsserted) - runSrstAsserted = 1; + if (!prev_srst_asserted && srst_asserted) + run_srst_asserted = 1; - prevSrstAsserted = srstAsserted; - prevPowerdropout = powerDropout; + prev_srst_asserted = srst_asserted; + prev_power_dropout = power_dropout; - if (srstDeasserted || powerRestored) { + if (srst_deasserted || power_restored) { /* Other than logging the event we can't do anything here. * Issuing a reset is a particularly bad idea as we might * be inside a reset already. @@ -2971,21 +2978,21 @@ static int handle_target(void *priv) * clearing the flags after running these events. */ int did_something = 0; - if (runSrstAsserted) { + if (run_srst_asserted) { LOG_INFO("srst asserted detected, running srst_asserted proc."); Jim_Eval(interp, "srst_asserted"); did_something = 1; } - if (runSrstDeasserted) { + if (run_srst_deasserted) { Jim_Eval(interp, "srst_deasserted"); did_something = 1; } - if (runPowerDropout) { + if (run_power_dropout) { LOG_INFO("Power dropout detected, running power_dropout proc."); Jim_Eval(interp, "power_dropout"); did_something = 1; } - if (runPowerRestore) { + if (run_power_restore) { Jim_Eval(interp, "power_restore"); did_something = 1; } @@ -2997,10 +3004,10 @@ static int handle_target(void *priv) /* clear action flags */ - runSrstAsserted = 0; - runSrstDeasserted = 0; - runPowerRestore = 0; - runPowerDropout = 0; + run_srst_asserted = 0; + run_srst_deasserted = 0; + run_power_restore = 0; + run_power_dropout = 0; recursive = 0; } @@ -3026,7 +3033,7 @@ static int handle_target(void *priv) target->backoff.count = 0; /* only poll target if we've got power and srst isn't asserted */ - if (!powerDropout && !srstAsserted) { + if (!power_dropout && !srst_asserted) { /* polling may fail silently until the target has been examined */ retval = target_poll(target); if (retval != ERROR_OK) { @@ -3065,21 +3072,16 @@ static int handle_target(void *priv) COMMAND_HANDLER(handle_reg_command) { - struct target *target; - struct reg *reg = NULL; - unsigned count = 0; - char *value; - int retval; - LOG_DEBUG("-"); - target = get_current_target(CMD_CTX); + struct target *target = get_current_target(CMD_CTX); + struct reg *reg = NULL; /* list all available registers for the current target */ if (CMD_ARGC == 0) { struct reg_cache *cache = target->reg_cache; - count = 0; + unsigned int count = 0; while (cache) { unsigned i; @@ -3093,7 +3095,7 @@ COMMAND_HANDLER(handle_reg_command) /* only print cached values if they are valid */ if (reg->exist) { if (reg->valid) { - value = buf_to_hex_str(reg->value, + char *value = buf_to_hex_str(reg->value, reg->size); command_print(CMD, "(%i) %s (/%" PRIu32 "): 0x%s%s", @@ -3122,7 +3124,7 @@ COMMAND_HANDLER(handle_reg_command) COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num); struct reg_cache *cache = target->reg_cache; - count = 0; + unsigned int count = 0; while (cache) { unsigned i; for (i = 0; i < cache->num_regs; i++) { @@ -3149,7 +3151,7 @@ COMMAND_HANDLER(handle_reg_command) goto not_found; } - assert(reg != NULL); /* give clang a hint that we *know* reg is != NULL here */ + assert(reg); /* give clang a hint that we *know* reg is != NULL here */ if (!reg->exist) goto not_found; @@ -3167,7 +3169,7 @@ COMMAND_HANDLER(handle_reg_command) return retval; } } - value = buf_to_hex_str(reg->value, reg->size); + char *value = buf_to_hex_str(reg->value, reg->size); command_print(CMD, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value); free(value); return ERROR_OK; @@ -3176,24 +3178,22 @@ COMMAND_HANDLER(handle_reg_command) /* set register value */ if (CMD_ARGC == 2) { uint8_t *buf = malloc(DIV_ROUND_UP(reg->size, 8)); - if (buf == NULL) + if (!buf) return ERROR_FAIL; str_to_buf(CMD_ARGV[1], strlen(CMD_ARGV[1]), buf, reg->size, 0); - retval = reg->type->set(reg, buf); + int retval = reg->type->set(reg, buf); if (retval != ERROR_OK) { - LOG_DEBUG("Couldn't set register %s.", reg->name); - free(buf); - return retval; + LOG_ERROR("Could not write to register '%s'", reg->name); + } else { + char *value = buf_to_hex_str(reg->value, reg->size); + command_print(CMD, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value); + free(value); } - value = buf_to_hex_str(reg->value, reg->size); - command_print(CMD, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value); - free(value); - free(buf); - return ERROR_OK; + return retval; } return ERROR_COMMAND_SYNTAX_ERROR; @@ -3240,7 +3240,7 @@ COMMAND_HANDLER(handle_wait_halt_command) unsigned ms = DEFAULT_HALT_TIMEOUT; if (1 == CMD_ARGC) { int retval = parse_uint(CMD_ARGV[0], &ms); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return ERROR_COMMAND_SYNTAX_ERROR; } @@ -3296,13 +3296,13 @@ COMMAND_HANDLER(handle_halt_command) target->verbose_halt_msg = true; int retval = target_halt(target); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (CMD_ARGC == 1) { unsigned wait_local; retval = parse_uint(CMD_ARGV[0], &wait_local); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return ERROR_COMMAND_SYNTAX_ERROR; if (!wait_local) return ERROR_OK; @@ -3331,7 +3331,7 @@ COMMAND_HANDLER(handle_reset_command) if (CMD_ARGC == 1) { const struct jim_nvp *n; n = jim_nvp_name2value_simple(nvp_reset_modes, CMD_ARGV[0]); - if ((n->name == NULL) || (n->value == RESET_UNKNOWN)) + if ((!n->name) || (n->value == RESET_UNKNOWN)) return ERROR_COMMAND_SYNTAX_ERROR; reset_mode = n->value; } @@ -3490,14 +3490,14 @@ COMMAND_HANDLER(handle_md_command) COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], count); uint8_t *buffer = calloc(count, size); - if (buffer == NULL) { + if (!buffer) { LOG_ERROR("Failed to allocate md read buffer"); return ERROR_FAIL; } struct target *target = get_current_target(CMD_CTX); int retval = fn(target, address, size, count, buffer); - if (ERROR_OK == retval) + if (retval == ERROR_OK) target_handle_md_output(CMD, target, address, size, count, buffer, true); @@ -3522,7 +3522,7 @@ static int target_fill_mem(struct target *target, * to fill large memory areas with any sane speed */ const unsigned chunk_size = 16384; uint8_t *target_buf = malloc(chunk_size * data_size); - if (target_buf == NULL) { + if (!target_buf) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } @@ -3612,7 +3612,7 @@ COMMAND_HANDLER(handle_mw_command) return target_fill_mem(target, address, fn, wordsize, value, count); } -static COMMAND_HELPER(parse_load_image_command_CMD_ARGV, struct image *image, +static COMMAND_HELPER(parse_load_image_command, struct image *image, target_addr_t *min_address, target_addr_t *max_address) { if (CMD_ARGC < 1 || CMD_ARGC > 5) @@ -3653,9 +3653,9 @@ COMMAND_HANDLER(handle_load_image_command) target_addr_t max_address = -1; struct image image; - int retval = CALL_COMMAND_HANDLER(parse_load_image_command_CMD_ARGV, + int retval = CALL_COMMAND_HANDLER(parse_load_image_command, &image, &min_address, &max_address); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct target *target = get_current_target(CMD_CTX); @@ -3670,7 +3670,7 @@ COMMAND_HANDLER(handle_load_image_command) retval = ERROR_OK; for (unsigned int i = 0; i < image.num_sections; i++) { buffer = malloc(image.sections[i].size); - if (buffer == NULL) { + if (!buffer) { command_print(CMD, "error allocating buffer for section (%d bytes)", (int)(image.sections[i].size)); @@ -3716,7 +3716,7 @@ COMMAND_HANDLER(handle_load_image_command) free(buffer); } - if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { + if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) { command_print(CMD, "downloaded %" PRIu32 " bytes " "in %fs (%0.3f KiB/s)", image_size, duration_elapsed(&bench), duration_kbps(&bench, image_size)); @@ -3773,7 +3773,7 @@ COMMAND_HANDLER(handle_dump_image_command) free(buffer); - if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { + if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) { size_t filesize; retval = fileio_size(fileio, &filesize); if (retval != ERROR_OK) @@ -3841,7 +3841,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver retval = ERROR_OK; for (unsigned int i = 0; i < image.num_sections; i++) { buffer = malloc(image.sections[i].size); - if (buffer == NULL) { + if (!buffer) { command_print(CMD, "error allocating buffer for section (%" PRIu32 " bytes)", image.sections[i].size); @@ -3918,7 +3918,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver done: if (diffs > 0) retval = ERROR_FAIL; - if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { + if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) { command_print(CMD, "verified %" PRIu32 " bytes " "in %fs (%0.3f KiB/s)", image_size, duration_elapsed(&bench), duration_kbps(&bench, image_size)); @@ -3988,27 +3988,27 @@ static int handle_bp_command_set(struct command_invocation *cmd, if (asid == 0) { retval = breakpoint_add(target, addr, length, hw); /* error is always logged in breakpoint_add(), do not print it again */ - if (ERROR_OK == retval) + if (retval == ERROR_OK) command_print(cmd, "breakpoint set at " TARGET_ADDR_FMT "", addr); } else if (addr == 0) { - if (target->type->add_context_breakpoint == NULL) { + if (!target->type->add_context_breakpoint) { LOG_ERROR("Context breakpoint not available"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } retval = context_breakpoint_add(target, asid, length, hw); /* error is always logged in context_breakpoint_add(), do not print it again */ - if (ERROR_OK == retval) + if (retval == ERROR_OK) command_print(cmd, "Context breakpoint set at 0x%8.8" PRIx32 "", asid); } else { - if (target->type->add_hybrid_breakpoint == NULL) { + if (!target->type->add_hybrid_breakpoint) { LOG_ERROR("Hybrid breakpoint not available"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } retval = hybrid_breakpoint_add(target, addr, asid, length, hw); /* error is always logged in hybrid_breakpoint_add(), do not print it again */ - if (ERROR_OK == retval) + if (retval == ERROR_OK) command_print(cmd, "Hybrid breakpoint set at 0x%8.8" PRIx32 "", asid); } return retval; @@ -4139,7 +4139,7 @@ COMMAND_HANDLER(handle_wp_command) int retval = watchpoint_add(target, addr, length, type, data_value, data_mask); - if (ERROR_OK != retval) + if (retval != ERROR_OK) LOG_ERROR("Failure setting watchpoints"); return retval; @@ -4182,44 +4182,44 @@ COMMAND_HANDLER(handle_virt2phys_command) return retval; } -static void writeData(FILE *f, const void *data, size_t len) +static void write_data(FILE *f, const void *data, size_t len) { size_t written = fwrite(data, 1, len, f); if (written != len) LOG_ERROR("failed to write %zu bytes: %s", len, strerror(errno)); } -static void writeLong(FILE *f, int l, struct target *target) +static void write_long(FILE *f, int l, struct target *target) { uint8_t val[4]; target_buffer_set_u32(target, val, l); - writeData(f, val, 4); + write_data(f, val, 4); } -static void writeString(FILE *f, char *s) +static void write_string(FILE *f, char *s) { - writeData(f, s, strlen(s)); + write_data(f, s, strlen(s)); } typedef unsigned char UNIT[2]; /* unit of profiling */ /* Dump a gmon.out histogram file. */ -static void write_gmon(uint32_t *samples, uint32_t sampleNum, const char *filename, bool with_range, +static void write_gmon(uint32_t *samples, uint32_t sample_num, const char *filename, bool with_range, uint32_t start_address, uint32_t end_address, struct target *target, uint32_t duration_ms) { uint32_t i; FILE *f = fopen(filename, "w"); - if (f == NULL) + if (!f) return; - writeString(f, "gmon"); - writeLong(f, 0x00000001, target); /* Version */ - writeLong(f, 0, target); /* padding */ - writeLong(f, 0, target); /* padding */ - writeLong(f, 0, target); /* padding */ + write_string(f, "gmon"); + write_long(f, 0x00000001, target); /* Version */ + write_long(f, 0, target); /* padding */ + write_long(f, 0, target); /* padding */ + write_long(f, 0, target); /* padding */ uint8_t zero = 0; /* GMON_TAG_TIME_HIST */ - writeData(f, &zero, 1); + write_data(f, &zero, 1); /* figure out bucket size */ uint32_t min; @@ -4230,7 +4230,7 @@ static void write_gmon(uint32_t *samples, uint32_t sampleNum, const char *filena } else { min = samples[0]; max = samples[0]; - for (i = 0; i < sampleNum; i++) { + for (i = 0; i < sample_num; i++) { if (min > samples[i]) min = samples[i]; if (max < samples[i]) @@ -4242,50 +4242,50 @@ static void write_gmon(uint32_t *samples, uint32_t sampleNum, const char *filena max++; } - int addressSpace = max - min; - assert(addressSpace >= 2); + int address_space = max - min; + assert(address_space >= 2); /* FIXME: What is the reasonable number of buckets? * The profiling result will be more accurate if there are enough buckets. */ - static const uint32_t maxBuckets = 128 * 1024; /* maximum buckets. */ - uint32_t numBuckets = addressSpace / sizeof(UNIT); - if (numBuckets > maxBuckets) - numBuckets = maxBuckets; - int *buckets = malloc(sizeof(int) * numBuckets); - if (buckets == NULL) { + static const uint32_t max_buckets = 128 * 1024; /* maximum buckets. */ + uint32_t num_buckets = address_space / sizeof(UNIT); + if (num_buckets > max_buckets) + num_buckets = max_buckets; + int *buckets = malloc(sizeof(int) * num_buckets); + if (!buckets) { fclose(f); return; } - memset(buckets, 0, sizeof(int) * numBuckets); - for (i = 0; i < sampleNum; i++) { + memset(buckets, 0, sizeof(int) * num_buckets); + for (i = 0; i < sample_num; i++) { uint32_t address = samples[i]; if ((address < min) || (max <= address)) continue; long long a = address - min; - long long b = numBuckets; - long long c = addressSpace; + long long b = num_buckets; + long long c = address_space; int index_t = (a * b) / c; /* danger!!!! int32 overflows */ buckets[index_t]++; } /* append binary memory gmon.out &profile_hist_hdr ((char*)&profile_hist_hdr + sizeof(struct gmon_hist_hdr)) */ - writeLong(f, min, target); /* low_pc */ - writeLong(f, max, target); /* high_pc */ - writeLong(f, numBuckets, target); /* # of buckets */ - float sample_rate = sampleNum / (duration_ms / 1000.0); - writeLong(f, sample_rate, target); - writeString(f, "seconds"); + write_long(f, min, target); /* low_pc */ + write_long(f, max, target); /* high_pc */ + write_long(f, num_buckets, target); /* # of buckets */ + float sample_rate = sample_num / (duration_ms / 1000.0); + write_long(f, sample_rate, target); + write_string(f, "seconds"); for (i = 0; i < (15-strlen("seconds")); i++) - writeData(f, &zero, 1); - writeString(f, "s"); + write_data(f, &zero, 1); + write_string(f, "s"); /*append binary memory gmon.out profile_hist_data (profile_hist_data + profile_hist_hdr.hist_size) */ - char *data = malloc(2 * numBuckets); - if (data != NULL) { - for (i = 0; i < numBuckets; i++) { + char *data = malloc(2 * num_buckets); + if (data) { + for (i = 0; i < num_buckets; i++) { int val; val = buckets[i]; if (val > 65535) @@ -4294,7 +4294,7 @@ static void write_gmon(uint32_t *samples, uint32_t sampleNum, const char *filena data[i * 2 + 1] = (val >> 8) & 0xff; } free(buckets); - writeData(f, data, numBuckets * 2); + write_data(f, data, num_buckets * 2); free(data); } else free(buckets); @@ -4320,7 +4320,7 @@ COMMAND_HANDLER(handle_profile_command) COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], offset); uint32_t *samples = malloc(sizeof(uint32_t) * MAX_PROFILE_SAMPLE_NUM); - if (samples == NULL) { + if (!samples) { LOG_ERROR("No memory to store samples."); return ERROR_FAIL; } @@ -4388,28 +4388,29 @@ COMMAND_HANDLER(handle_profile_command) return retval; } -static int new_int_array_element(Jim_Interp *interp, const char *varname, int idx, uint32_t val) +static int new_u64_array_element(Jim_Interp *interp, const char *varname, int idx, uint64_t val) { char *namebuf; - Jim_Obj *nameObjPtr, *valObjPtr; + Jim_Obj *obj_name, *obj_val; int result; namebuf = alloc_printf("%s(%d)", varname, idx); if (!namebuf) return JIM_ERR; - nameObjPtr = Jim_NewStringObj(interp, namebuf, -1); - valObjPtr = Jim_NewIntObj(interp, val); - if (!nameObjPtr || !valObjPtr) { + obj_name = Jim_NewStringObj(interp, namebuf, -1); + jim_wide wide_val = val; + obj_val = Jim_NewWideObj(interp, wide_val); + if (!obj_name || !obj_val) { free(namebuf); return JIM_ERR; } - Jim_IncrRefCount(nameObjPtr); - Jim_IncrRefCount(valObjPtr); - result = Jim_SetVariable(interp, nameObjPtr, valObjPtr); - Jim_DecrRefCount(interp, nameObjPtr); - Jim_DecrRefCount(interp, valObjPtr); + Jim_IncrRefCount(obj_name); + Jim_IncrRefCount(obj_val); + result = Jim_SetVariable(interp, obj_name, obj_val); + Jim_DecrRefCount(interp, obj_name); + Jim_DecrRefCount(interp, obj_val); free(namebuf); /* printf("%s(%d) <= 0%08x\n", varname, idx, val); */ return result; @@ -4421,10 +4422,10 @@ static int jim_mem2array(Jim_Interp *interp, int argc, Jim_Obj *const *argv) struct target *target; context = current_command_context(interp); - assert(context != NULL); + assert(context); target = get_current_target(context); - if (target == NULL) { + if (!target) { LOG_ERROR("mem2array: no current target"); return JIM_ERR; } @@ -4434,68 +4435,65 @@ static int jim_mem2array(Jim_Interp *interp, int argc, Jim_Obj *const *argv) static int target_mem2array(Jim_Interp *interp, struct target *target, int argc, Jim_Obj *const *argv) { - long l; - uint32_t width; - int len; - target_addr_t addr; - uint32_t count; - uint32_t v; - const char *varname; - const char *phys; - bool is_phys; - int n, e, retval; - uint32_t i; + int e; - /* argv[1] = name of array to receive the data - * argv[2] = desired width - * argv[3] = memory address - * argv[4] = count of times to read + /* argv[0] = name of array to receive the data + * argv[1] = desired element width in bits + * argv[2] = memory address + * argv[3] = count of times to read + * argv[4] = optional "phys" */ - if (argc < 4 || argc > 5) { Jim_WrongNumArgs(interp, 0, argv, "varname width addr nelems [phys]"); return JIM_ERR; } - varname = Jim_GetString(argv[0], &len); - /* given "foo" get space for worse case "foo(%d)" .. add 20 */ + /* Arg 0: Name of the array variable */ + const char *varname = Jim_GetString(argv[0], NULL); + + /* Arg 1: Bit width of one element */ + long l; e = Jim_GetLong(interp, argv[1], &l); - width = l; if (e != JIM_OK) return e; + const unsigned int width_bits = l; - jim_wide w; - e = Jim_GetWide(interp, argv[2], &w); - addr = w; + if (width_bits != 8 && + width_bits != 16 && + width_bits != 32 && + width_bits != 64) { + Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); + Jim_AppendStrings(interp, Jim_GetResult(interp), + "Invalid width param. Must be one of: 8, 16, 32 or 64.", NULL); + return JIM_ERR; + } + const unsigned int width = width_bits / 8; + + /* Arg 2: Memory address */ + jim_wide wide_addr; + e = Jim_GetWide(interp, argv[2], &wide_addr); if (e != JIM_OK) return e; + target_addr_t addr = (target_addr_t)wide_addr; + + /* Arg 3: Number of elements to read */ e = Jim_GetLong(interp, argv[3], &l); - len = l; if (e != JIM_OK) return e; - is_phys = false; + size_t len = l; + + /* Arg 4: phys */ + bool is_phys = false; if (argc > 4) { - phys = Jim_GetString(argv[4], &n); - if (!strncmp(phys, "phys", n)) + int str_len = 0; + const char *phys = Jim_GetString(argv[4], &str_len); + if (!strncmp(phys, "phys", str_len)) is_phys = true; else return JIM_ERR; } - switch (width) { - case 8: - width = 1; - break; - case 16: - width = 2; - break; - case 32: - width = 4; - break; - default: - Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); - Jim_AppendStrings(interp, Jim_GetResult(interp), "Invalid width param, must be 8/16/32", NULL); - return JIM_ERR; - } + + /* Argument checks */ if (len == 0) { Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); Jim_AppendStrings(interp, Jim_GetResult(interp), "mem2array: zero width read?", NULL); @@ -4506,17 +4504,18 @@ static int target_mem2array(Jim_Interp *interp, struct target *target, int argc, Jim_AppendStrings(interp, Jim_GetResult(interp), "mem2array: addr + len - wraps to zero?", NULL); return JIM_ERR; } - /* absurd transfer size? */ if (len > 65536) { Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); - Jim_AppendStrings(interp, Jim_GetResult(interp), "mem2array: absurd > 64K item request", NULL); + Jim_AppendStrings(interp, Jim_GetResult(interp), + "mem2array: too large read request, exceeds 64K items", NULL); return JIM_ERR; } if ((width == 1) || ((width == 2) && ((addr & 1) == 0)) || - ((width == 4) && ((addr & 3) == 0))) { - /* all is well */ + ((width == 4) && ((addr & 3) == 0)) || + ((width == 8) && ((addr & 7) == 0))) { + /* alignment correct */ } else { char buf[100]; Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); @@ -4530,40 +4529,42 @@ static int target_mem2array(Jim_Interp *interp, struct target *target, int argc, /* Transfer loop */ /* index counter */ - n = 0; + size_t idx = 0; - size_t buffersize = 4096; + const size_t buffersize = 4096; uint8_t *buffer = malloc(buffersize); - if (buffer == NULL) + if (!buffer) return JIM_ERR; /* assume ok */ e = JIM_OK; while (len) { /* Slurp... in buffer size chunks */ + const unsigned int max_chunk_len = buffersize / width; + const size_t chunk_len = MIN(len, max_chunk_len); /* in elements.. */ - count = len; /* in objects.. */ - if (count > (buffersize / width)) - count = (buffersize / width); - + int retval; if (is_phys) - retval = target_read_phys_memory(target, addr, width, count, buffer); + retval = target_read_phys_memory(target, addr, width, chunk_len, buffer); else - retval = target_read_memory(target, addr, width, count, buffer); + retval = target_read_memory(target, addr, width, chunk_len, buffer); if (retval != ERROR_OK) { /* BOO !*/ - LOG_ERROR("mem2array: Read @ " TARGET_ADDR_FMT ", w=%" PRIu32 ", cnt=%" PRIu32 ", failed", + LOG_ERROR("mem2array: Read @ " TARGET_ADDR_FMT ", w=%u, cnt=%zu, failed", addr, width, - count); + chunk_len); Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); Jim_AppendStrings(interp, Jim_GetResult(interp), "mem2array: cannot read memory", NULL); e = JIM_ERR; break; } else { - v = 0; /* shut up gcc */ - for (i = 0; i < count ; i++, n++) { + for (size_t i = 0; i < chunk_len ; i++, idx++) { + uint64_t v = 0; switch (width) { + case 8: + v = target_buffer_get_u64(target, &buffer[i*width]); + break; case 4: v = target_buffer_get_u32(target, &buffer[i*width]); break; @@ -4574,10 +4575,10 @@ static int target_mem2array(Jim_Interp *interp, struct target *target, int argc, v = buffer[i] & 0x0ff; break; } - new_int_array_element(interp, varname, n, v); + new_u64_array_element(interp, varname, idx, v); } - len -= count; - addr += count * width; + len -= chunk_len; + addr += chunk_len * width; } } @@ -4588,33 +4589,28 @@ static int target_mem2array(Jim_Interp *interp, struct target *target, int argc, return e; } -static int get_int_array_element(Jim_Interp *interp, const char *varname, int idx, uint32_t *val) +static int get_u64_array_element(Jim_Interp *interp, const char *varname, size_t idx, uint64_t *val) { - char *namebuf; - Jim_Obj *nameObjPtr, *valObjPtr; - int result; - long l; - - namebuf = alloc_printf("%s(%d)", varname, idx); + char *namebuf = alloc_printf("%s(%zu)", varname, idx); if (!namebuf) return JIM_ERR; - nameObjPtr = Jim_NewStringObj(interp, namebuf, -1); - if (!nameObjPtr) { + Jim_Obj *obj_name = Jim_NewStringObj(interp, namebuf, -1); + if (!obj_name) { free(namebuf); return JIM_ERR; } - Jim_IncrRefCount(nameObjPtr); - valObjPtr = Jim_GetVariable(interp, nameObjPtr, JIM_ERRMSG); - Jim_DecrRefCount(interp, nameObjPtr); + Jim_IncrRefCount(obj_name); + Jim_Obj *obj_val = Jim_GetVariable(interp, obj_name, JIM_ERRMSG); + Jim_DecrRefCount(interp, obj_name); free(namebuf); - if (valObjPtr == NULL) + if (!obj_val) return JIM_ERR; - result = Jim_GetLong(interp, valObjPtr, &l); - /* printf("%s(%d) => 0%08x\n", varname, idx, val); */ - *val = l; + jim_wide wide_val; + int result = Jim_GetWide(interp, obj_val, &wide_val); + *val = wide_val; return result; } @@ -4624,10 +4620,10 @@ static int jim_array2mem(Jim_Interp *interp, int argc, Jim_Obj *const *argv) struct target *target; context = current_command_context(interp); - assert(context != NULL); + assert(context); target = get_current_target(context); - if (target == NULL) { + if (!target) { LOG_ERROR("array2mem: no current target"); return JIM_ERR; } @@ -4638,95 +4634,95 @@ static int jim_array2mem(Jim_Interp *interp, int argc, Jim_Obj *const *argv) static int target_array2mem(Jim_Interp *interp, struct target *target, int argc, Jim_Obj *const *argv) { - long l; - uint32_t width; - int len; - uint32_t addr; - uint32_t count; - uint32_t v; - const char *varname; - const char *phys; - bool is_phys; - int n, e, retval; - uint32_t i; + int e; - /* argv[1] = name of array to get the data - * argv[2] = desired width - * argv[3] = memory address - * argv[4] = count to write + /* argv[0] = name of array from which to read the data + * argv[1] = desired element width in bits + * argv[2] = memory address + * argv[3] = number of elements to write + * argv[4] = optional "phys" */ if (argc < 4 || argc > 5) { Jim_WrongNumArgs(interp, 0, argv, "varname width addr nelems [phys]"); return JIM_ERR; } - varname = Jim_GetString(argv[0], &len); - /* given "foo" get space for worse case "foo(%d)" .. add 20 */ + /* Arg 0: Name of the array variable */ + const char *varname = Jim_GetString(argv[0], NULL); + + /* Arg 1: Bit width of one element */ + long l; e = Jim_GetLong(interp, argv[1], &l); - width = l; if (e != JIM_OK) return e; + const unsigned int width_bits = l; - e = Jim_GetLong(interp, argv[2], &l); - addr = l; + if (width_bits != 8 && + width_bits != 16 && + width_bits != 32 && + width_bits != 64) { + Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); + Jim_AppendStrings(interp, Jim_GetResult(interp), + "Invalid width param. Must be one of: 8, 16, 32 or 64.", NULL); + return JIM_ERR; + } + const unsigned int width = width_bits / 8; + + /* Arg 2: Memory address */ + jim_wide wide_addr; + e = Jim_GetWide(interp, argv[2], &wide_addr); if (e != JIM_OK) return e; + target_addr_t addr = (target_addr_t)wide_addr; + + /* Arg 3: Number of elements to write */ e = Jim_GetLong(interp, argv[3], &l); - len = l; if (e != JIM_OK) return e; - is_phys = false; + size_t len = l; + + /* Arg 4: Phys */ + bool is_phys = false; if (argc > 4) { - phys = Jim_GetString(argv[4], &n); - if (!strncmp(phys, "phys", n)) + int str_len = 0; + const char *phys = Jim_GetString(argv[4], &str_len); + if (!strncmp(phys, "phys", str_len)) is_phys = true; else return JIM_ERR; } - switch (width) { - case 8: - width = 1; - break; - case 16: - width = 2; - break; - case 32: - width = 4; - break; - default: - Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); - Jim_AppendStrings(interp, Jim_GetResult(interp), - "Invalid width param, must be 8/16/32", NULL); - return JIM_ERR; - } + + /* Argument checks */ if (len == 0) { Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); Jim_AppendStrings(interp, Jim_GetResult(interp), "array2mem: zero width read?", NULL); return JIM_ERR; } + if ((addr + (len * width)) < addr) { Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); Jim_AppendStrings(interp, Jim_GetResult(interp), "array2mem: addr + len - wraps to zero?", NULL); return JIM_ERR; } - /* absurd transfer size? */ + if (len > 65536) { Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); Jim_AppendStrings(interp, Jim_GetResult(interp), - "array2mem: absurd > 64K item request", NULL); + "array2mem: too large memory write request, exceeds 64K items", NULL); return JIM_ERR; } if ((width == 1) || ((width == 2) && ((addr & 1) == 0)) || - ((width == 4) && ((addr & 3) == 0))) { - /* all is well */ + ((width == 4) && ((addr & 3) == 0)) || + ((width == 8) && ((addr & 7) == 0))) { + /* alignment correct */ } else { char buf[100]; Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); - sprintf(buf, "array2mem address: 0x%08" PRIx32 " is not aligned for %" PRIu32 " byte reads", + sprintf(buf, "array2mem address: " TARGET_ADDR_FMT " is not aligned for %" PRIu32 " byte reads", addr, width); Jim_AppendStrings(interp, Jim_GetResult(interp), buf, NULL); @@ -4735,27 +4731,34 @@ static int target_array2mem(Jim_Interp *interp, struct target *target, /* Transfer loop */ - /* index counter */ - n = 0; /* assume ok */ e = JIM_OK; - size_t buffersize = 4096; + const size_t buffersize = 4096; uint8_t *buffer = malloc(buffersize); - if (buffer == NULL) + if (!buffer) return JIM_ERR; + /* index counter */ + size_t idx = 0; + while (len) { /* Slurp... in buffer size chunks */ + const unsigned int max_chunk_len = buffersize / width; - count = len; /* in objects.. */ - if (count > (buffersize / width)) - count = (buffersize / width); + const size_t chunk_len = MIN(len, max_chunk_len); /* in elements.. */ - v = 0; /* shut up gcc */ - for (i = 0; i < count; i++, n++) { - get_int_array_element(interp, varname, n, &v); + /* Fill the buffer */ + for (size_t i = 0; i < chunk_len; i++, idx++) { + uint64_t v = 0; + if (get_u64_array_element(interp, varname, idx, &v) != JIM_OK) { + free(buffer); + return JIM_ERR; + } switch (width) { + case 8: + target_buffer_set_u64(target, &buffer[i * width], v); + break; case 4: target_buffer_set_u32(target, &buffer[i * width], v); break; @@ -4767,24 +4770,26 @@ static int target_array2mem(Jim_Interp *interp, struct target *target, break; } } - len -= count; + len -= chunk_len; + /* Write the buffer to memory */ + int retval; if (is_phys) - retval = target_write_phys_memory(target, addr, width, count, buffer); + retval = target_write_phys_memory(target, addr, width, chunk_len, buffer); else - retval = target_write_memory(target, addr, width, count, buffer); + retval = target_write_memory(target, addr, width, chunk_len, buffer); if (retval != ERROR_OK) { /* BOO !*/ - LOG_ERROR("array2mem: Write @ 0x%08" PRIx32 ", w=%" PRIu32 ", cnt=%" PRIu32 ", failed", + LOG_ERROR("array2mem: Write @ " TARGET_ADDR_FMT ", w=%u, cnt=%zu, failed", addr, width, - count); + chunk_len); Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); Jim_AppendStrings(interp, Jim_GetResult(interp), "array2mem: cannot read memory", NULL); e = JIM_ERR; break; } - addr += count * width; + addr += chunk_len * width; } free(buffer); @@ -4802,7 +4807,7 @@ void target_handle_event(struct target *target, enum target_event e) struct target_event_action *teap; int retval; - for (teap = target->event_action; teap != NULL; teap = teap->next) { + for (teap = target->event_action; teap; teap = teap->next) { if (teap->event == e) { LOG_DEBUG("target(%d): %s (%s) event: %d (%s) action: %s", target->target_number, @@ -4850,7 +4855,7 @@ bool target_has_event_action(struct target *target, enum target_event event) { struct target_event_action *teap; - for (teap = target->event_action; teap != NULL; teap = teap->next) { + for (teap = target->event_action; teap; teap = teap->next) { if (teap->event == event) return true; } @@ -4985,7 +4990,7 @@ no_params: /* END_DEPRECATED_TPIU */ bool replace = true; - if (teap == NULL) { + if (!teap) { /* create new */ teap = calloc(1, sizeof(*teap)); replace = false; @@ -5016,7 +5021,7 @@ no_params: Jim_SetEmptyResult(goi->interp); } else { /* get */ - if (teap == NULL) + if (!teap) Jim_SetEmptyResult(goi->interp); else Jim_SetResult(goi->interp, Jim_DuplicateObj(goi->interp, teap->body)); @@ -5102,7 +5107,7 @@ no_params: goto no_params; } n = jim_nvp_value2name_simple(nvp_target_endian, target->endianness); - if (n->name == NULL) { + if (!n->name) { target->endianness = TARGET_LITTLE_ENDIAN; n = jim_nvp_value2name_simple(nvp_target_endian, target->endianness); } @@ -5140,7 +5145,7 @@ no_params: if (e != JIM_OK) return e; tap = jtag_tap_by_jim_obj(goi->interp, o_t); - if (tap == NULL) + if (!tap) return JIM_ERR; target->tap = tap; target->tap_configured = true; @@ -5467,11 +5472,11 @@ static int jim_target_wait_state(Jim_Interp *interp, int argc, Jim_Obj *const *a e = target_wait_state(target, n->value, a); if (e != ERROR_OK) { - Jim_Obj *eObj = Jim_NewIntObj(interp, e); + Jim_Obj *obj = Jim_NewIntObj(interp, e); Jim_SetResultFormatted(goi.interp, "target: %s wait %s fails (%#s) %s", target_name(target), n->name, - eObj, target_strerror_safe(e)); + obj, target_strerror_safe(e)); return JIM_ERR; } return JIM_OK; @@ -5703,7 +5708,7 @@ static int target_create(struct jim_getopt_info *goi) struct command_context *cmd_ctx; cmd_ctx = current_command_context(goi->interp); - assert(cmd_ctx != NULL); + assert(cmd_ctx); if (goi->argc < 3) { Jim_WrongNumArgs(goi->interp, 1, goi->argv, "?name? ?type? ..options..."); @@ -5735,12 +5740,12 @@ static int target_create(struct jim_getopt_info *goi) } /* now does target type exist */ for (x = 0 ; target_types[x] ; x++) { - if (0 == strcmp(cp, target_types[x]->name)) { + if (strcmp(cp, target_types[x]->name) == 0) { /* found */ break; } } - if (target_types[x] == NULL) { + if (!target_types[x]) { Jim_SetResultFormatted(goi->interp, "Unknown target type %s, try one of ", cp); for (x = 0 ; target_types[x] ; x++) { if (target_types[x + 1]) { @@ -5835,7 +5840,7 @@ static int target_create(struct jim_getopt_info *goi) } } /* tap must be set after target was configured */ - if (target->tap == NULL) + if (!target->tap) e = JIM_ERR; } @@ -5882,7 +5887,7 @@ static int target_create(struct jim_getopt_info *goi) /* create the target specific commands */ if (target->type->commands) { e = register_commands(cmd_ctx, NULL, target->type->commands); - if (ERROR_OK != e) + if (e != ERROR_OK) LOG_ERROR("unable to register '%s' commands", cp); } @@ -5933,7 +5938,7 @@ static int jim_target_current(Jim_Interp *interp, int argc, Jim_Obj *const *argv return JIM_ERR; } struct command_context *cmd_ctx = current_command_context(interp); - assert(cmd_ctx != NULL); + assert(cmd_ctx); struct target *target = get_current_target_or_null(cmd_ctx); if (target) @@ -5948,7 +5953,7 @@ static int jim_target_types(Jim_Interp *interp, int argc, Jim_Obj *const *argv) return JIM_ERR; } Jim_SetResult(interp, Jim_NewListObj(interp, NULL, 0)); - for (unsigned x = 0; NULL != target_types[x]; x++) { + for (unsigned x = 0; target_types[x]; x++) { Jim_ListAppendElement(interp, Jim_GetResult(interp), Jim_NewStringObj(interp, target_types[x]->name, -1)); } @@ -6082,7 +6087,7 @@ static const struct command_registration target_subcommand_handlers[] = { COMMAND_REGISTRATION_DONE }; -struct FastLoad { +struct fast_load { target_addr_t address; uint8_t *data; int length; @@ -6090,11 +6095,11 @@ struct FastLoad { }; static int fastload_num; -static struct FastLoad *fastload; +static struct fast_load *fastload; static void free_fastload(void) { - if (fastload != NULL) { + if (fastload) { for (int i = 0; i < fastload_num; i++) free(fastload[i].data); free(fastload); @@ -6112,9 +6117,9 @@ COMMAND_HANDLER(handle_fast_load_image_command) struct image image; - int retval = CALL_COMMAND_HANDLER(parse_load_image_command_CMD_ARGV, + int retval = CALL_COMMAND_HANDLER(parse_load_image_command, &image, &min_address, &max_address); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; struct duration bench; @@ -6127,16 +6132,16 @@ COMMAND_HANDLER(handle_fast_load_image_command) image_size = 0x0; retval = ERROR_OK; fastload_num = image.num_sections; - fastload = malloc(sizeof(struct FastLoad)*image.num_sections); - if (fastload == NULL) { + fastload = malloc(sizeof(struct fast_load)*image.num_sections); + if (!fastload) { command_print(CMD, "out of memory"); image_close(&image); return ERROR_FAIL; } - memset(fastload, 0, sizeof(struct FastLoad)*image.num_sections); + memset(fastload, 0, sizeof(struct fast_load)*image.num_sections); for (unsigned int i = 0; i < image.num_sections; i++) { buffer = malloc(image.sections[i].size); - if (buffer == NULL) { + if (!buffer) { command_print(CMD, "error allocating buffer for section (%d bytes)", (int)(image.sections[i].size)); retval = ERROR_FAIL; @@ -6167,7 +6172,7 @@ COMMAND_HANDLER(handle_fast_load_image_command) fastload[i].address = image.sections[i].base_address + offset; fastload[i].data = malloc(length); - if (fastload[i].data == NULL) { + if (!fastload[i].data) { free(buffer); command_print(CMD, "error allocating buffer for section (%" PRIu32 " bytes)", length); @@ -6186,7 +6191,7 @@ COMMAND_HANDLER(handle_fast_load_image_command) free(buffer); } - if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { + if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) { command_print(CMD, "Loaded %" PRIu32 " bytes " "in %fs (%0.3f KiB/s)", image_size, duration_elapsed(&bench), duration_kbps(&bench, image_size)); @@ -6208,7 +6213,7 @@ COMMAND_HANDLER(handle_fast_load_command) { if (CMD_ARGC > 0) return ERROR_COMMAND_SYNTAX_ERROR; - if (fastload == NULL) { + if (!fastload) { LOG_ERROR("No image in memory"); return ERROR_FAIL; } @@ -6294,7 +6299,7 @@ COMMAND_HANDLER(handle_ps_command) static void binprint(struct command_invocation *cmd, const char *text, const uint8_t *buf, int size) { - if (text != NULL) + if (text) command_print_sameline(cmd, "%s", text); for (int i = 0; i < size; i++) command_print_sameline(cmd, " %02x", buf[i]); @@ -6394,7 +6399,7 @@ next: out: free(test_pattern); - if (wa != NULL) + if (wa) target_free_working_area(target, wa); /* Test writes */ @@ -6479,7 +6484,7 @@ nextw: free(test_pattern); - if (wa != NULL) + if (wa) target_free_working_area(target, wa); return retval; } diff --git a/src/target/target.h b/src/target/target.h index 2dc9e9cec..4fa8ed1c8 100644 --- a/src/target/target.h +++ b/src/target/target.h @@ -406,7 +406,12 @@ int target_call_timer_callbacks(int64_t *next_event); * Invoke this to ensure that e.g. polling timer callbacks happen before * a synchronous command completes. */ -int target_call_timer_callbacks_now(int64_t *next_event); +int target_call_timer_callbacks_now(void); +/** + * Returns when the next registered event will take place. Callers can use this + * to go to sleep until that time occurs. + */ +int64_t target_timer_next_event(void); struct target *get_target_by_num(int num); struct target *get_current_target(struct command_context *cmd_ctx); diff --git a/src/target/target_request.c b/src/target/target_request.c index 32a907233..562b046aa 100644 --- a/src/target/target_request.c +++ b/src/target/target_request.c @@ -158,7 +158,7 @@ static int add_debug_msg_receiver(struct command_context *cmd_ctx, struct target { struct debug_msg_receiver **p = &target->dbgmsg; - if (target == NULL) + if (!target) return ERROR_COMMAND_SYNTAX_ERROR; /* see if there's already a list */ @@ -186,9 +186,9 @@ static struct debug_msg_receiver *find_debug_msg_receiver(struct command_context int do_all_targets = 0; /* if no target has been specified search all of them */ - if (target == NULL) { + if (!target) { /* if no targets haven been specified */ - if (all_targets == NULL) + if (!all_targets) return NULL; target = all_targets; @@ -217,9 +217,9 @@ int delete_debug_msg_receiver(struct command_context *cmd_ctx, struct target *ta int do_all_targets = 0; /* if no target has been specified search all of them */ - if (target == NULL) { + if (!target) { /* if no targets haven been specified */ - if (all_targets == NULL) + if (!all_targets) return ERROR_OK; target = all_targets; @@ -234,7 +234,7 @@ int delete_debug_msg_receiver(struct command_context *cmd_ctx, struct target *ta if (c->cmd_ctx == cmd_ctx) { *p = next; free(c); - if (*p == NULL) { + if (!*p) { /* disable callback */ target->dbg_msg_enabled = 0; } @@ -256,13 +256,13 @@ COMMAND_HANDLER(handle_target_request_debugmsgs_command) int receiving = 0; - if (target->type->target_request_data == NULL) { + if (!target->type->target_request_data) { LOG_ERROR("Target %s does not support target requests", target_name(target)); return ERROR_OK; } /* see if receiver is already registered */ - if (find_debug_msg_receiver(CMD_CTX, target) != NULL) + if (find_debug_msg_receiver(CMD_CTX, target)) receiving = 1; if (CMD_ARGC > 0) { diff --git a/src/target/x86_32_common.c b/src/target/x86_32_common.c index b85e45119..a009bfe92 100644 --- a/src/target/x86_32_common.c +++ b/src/target/x86_32_common.c @@ -75,7 +75,7 @@ int x86_32_get_gdb_reg_list(struct target *t, *reg_list_size = x86_32->cache->num_regs; LOG_DEBUG("num_regs=%d, reg_class=%d", (*reg_list_size), reg_class); *reg_list = malloc(sizeof(struct reg *) * (*reg_list_size)); - if (*reg_list == NULL) { + if (!*reg_list) { LOG_ERROR("%s out of memory", __func__); return ERROR_FAIL; } @@ -95,7 +95,7 @@ int x86_32_common_init_arch_info(struct target *t, struct x86_32_common *x86_32) x86_32->num_hw_bpoints = MAX_DEBUG_REGS; x86_32->hw_break_list = calloc(x86_32->num_hw_bpoints, sizeof(struct x86_32_dbg_reg)); - if (x86_32->hw_break_list == NULL) { + if (!x86_32->hw_break_list) { LOG_ERROR("%s out of memory", __func__); return ERROR_FAIL; } @@ -157,7 +157,7 @@ int x86_32_common_read_phys_mem(struct target *t, target_addr_t phys_address, * with the original instructions again. */ struct swbp_mem_patch *iter = x86_32->swbbp_mem_patch_list; - while (iter != NULL) { + while (iter) { if (iter->physaddr >= phys_address && iter->physaddr < phys_address+(size*count)) { uint32_t offset = iter->physaddr - phys_address; buffer[offset] = iter->orig_byte; @@ -245,20 +245,20 @@ int x86_32_common_write_phys_mem(struct target *t, target_addr_t phys_address, * breakpoint instruction. */ newbuffer = malloc(size*count); - if (newbuffer == NULL) { + if (!newbuffer) { LOG_ERROR("%s out of memory", __func__); return ERROR_FAIL; } memcpy(newbuffer, buffer, size*count); struct swbp_mem_patch *iter = x86_32->swbbp_mem_patch_list; - while (iter != NULL) { + while (iter) { if (iter->physaddr >= phys_address && iter->physaddr < phys_address+(size*count)) { uint32_t offset = iter->physaddr - phys_address; newbuffer[offset] = SW_BP_OPCODE; /* update the breakpoint */ struct breakpoint *pbiter = t->breakpoints; - while (pbiter != NULL && pbiter->unique_id != iter->swbp_unique_id) + while (pbiter && pbiter->unique_id != iter->swbp_unique_id) pbiter = pbiter->next; if (pbiter) pbiter->orig_instr[0] = buffer[offset]; @@ -456,7 +456,7 @@ int calcaddr_physfromlin(struct target *t, target_addr_t addr, target_addr_t *ph { uint8_t entry_buffer[8]; - if (physaddr == NULL || t == NULL) + if (!physaddr || !t) return ERROR_FAIL; struct x86_32_common *x86_32 = target_to_x86_32(t); @@ -472,10 +472,10 @@ int calcaddr_physfromlin(struct target *t, target_addr_t addr, target_addr_t *ph } uint32_t cr4 = buf_get_u32(x86_32->cache->reg_list[CR4].value, 0, 32); - bool isPAE = cr4 & 0x00000020; /* PAE - Physical Address Extension */ + bool is_pae = cr4 & 0x00000020; /* PAE - Physical Address Extension */ uint32_t cr3 = buf_get_u32(x86_32->cache->reg_list[CR3].value, 0, 32); - if (isPAE) { + if (is_pae) { uint32_t pdpt_base = cr3 & 0xFFFFF000; /* lower 12 bits of CR3 must always be 0 */ uint32_t pdpt_index = (addr & 0xC0000000) >> 30; /* A[31:30] index to PDPT */ uint32_t pdpt_addr = pdpt_base + (8 * pdpt_index); @@ -1059,7 +1059,7 @@ static int set_swbp(struct target *t, struct breakpoint *bp) /* add the memory patch */ struct swbp_mem_patch *new_patch = malloc(sizeof(struct swbp_mem_patch)); - if (new_patch == NULL) { + if (!new_patch) { LOG_ERROR("%s out of memory", __func__); return ERROR_FAIL; } @@ -1069,10 +1069,10 @@ static int set_swbp(struct target *t, struct breakpoint *bp) new_patch->swbp_unique_id = bp->unique_id; struct swbp_mem_patch *addto = x86_32->swbbp_mem_patch_list; - if (addto == NULL) + if (!addto) x86_32->swbbp_mem_patch_list = new_patch; else { - while (addto->next != NULL) + while (addto->next) addto = addto->next; addto->next = new_patch; } @@ -1107,15 +1107,15 @@ static int unset_swbp(struct target *t, struct breakpoint *bp) /* remove from patch */ struct swbp_mem_patch *iter = x86_32->swbbp_mem_patch_list; - if (iter != NULL) { + if (iter) { if (iter->swbp_unique_id == bp->unique_id) { /* it's the first item */ x86_32->swbbp_mem_patch_list = iter->next; free(iter); } else { - while (iter->next != NULL && iter->next->swbp_unique_id != bp->unique_id) + while (iter->next && iter->next->swbp_unique_id != bp->unique_id) iter = iter->next; - if (iter->next != NULL) { + if (iter->next) { /* it's the next one */ struct swbp_mem_patch *freeme = iter->next; iter->next = iter->next->next; @@ -1428,7 +1428,7 @@ COMMAND_HANDLER(handle_iod_command) uint8_t *buffer = calloc(count, size); struct target *target = get_current_target(CMD_CTX); int retval = x86_32_common_read_io(target, address, size, buffer); - if (ERROR_OK == retval) + if (retval == ERROR_OK) handle_iod_output(CMD, target, address, size, count, buffer); free(buffer); return retval; diff --git a/src/target/xscale.c b/src/target/xscale.c index b25999d3c..dd383b6e4 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -150,7 +150,7 @@ static int xscale_verify_pointer(struct command_invocation *cmd, static int xscale_jtag_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end_state) { - assert(tap != NULL); + assert(tap); if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { struct scan_field field; @@ -1158,7 +1158,7 @@ static int xscale_resume(struct target *target, int current, struct breakpoint *breakpoint; breakpoint = breakpoint_find(target, buf_get_u32(arm->pc->value, 0, 32)); - if (breakpoint != NULL) { + if (breakpoint) { uint32_t next_pc; enum trace_mode saved_trace_mode; @@ -1421,7 +1421,7 @@ static int xscale_step(struct target *target, int current, if (handle_breakpoints) breakpoint = breakpoint_find(target, buf_get_u32(arm->pc->value, 0, 32)); - if (breakpoint != NULL) { + if (breakpoint) { retval = xscale_unset_breakpoint(target, breakpoint); if (retval != ERROR_OK) return retval; @@ -3048,7 +3048,7 @@ COMMAND_HANDLER(xscale_handle_debug_handler_command) return ERROR_COMMAND_SYNTAX_ERROR; target = get_target(CMD_ARGV[0]); - if (target == NULL) { + if (!target) { LOG_ERROR("target '%s' not defined", CMD_ARGV[0]); return ERROR_FAIL; } @@ -3083,7 +3083,7 @@ COMMAND_HANDLER(xscale_handle_cache_clean_address_command) return ERROR_COMMAND_SYNTAX_ERROR; target = get_target(CMD_ARGV[0]); - if (target == NULL) { + if (!target) { LOG_ERROR("target '%s' not defined", CMD_ARGV[0]); return ERROR_FAIL; } diff --git a/src/transport/transport.c b/src/transport/transport.c index ba1f9e9f7..ba1af3398 100644 --- a/src/transport/transport.c +++ b/src/transport/transport.c @@ -106,7 +106,7 @@ int allow_transports(struct command_context *ctx, const char * const *vector) * of one transport; C code should be definitive about what * can be used when all goes well. */ - if (allowed_transports != NULL || session) { + if (allowed_transports || session) { LOG_ERROR("Can't modify the set of allowed transports."); return ERROR_FAIL; } @@ -197,7 +197,7 @@ COMMAND_HELPER(transport_list_parse, char ***vector) /* our return vector must be NULL terminated */ argv = calloc(n + 1, sizeof(char *)); - if (argv == NULL) + if (!argv) return ERROR_FAIL; for (unsigned i = 0; i < n; i++) { diff --git a/src/xsvf/xsvf.c b/src/xsvf/xsvf.c index 823784908..c4ce55adc 100644 --- a/src/xsvf/xsvf.c +++ b/src/xsvf/xsvf.c @@ -487,7 +487,7 @@ COMMAND_HANDLER(handle_xsvf_command) field.out_value = dr_out_buf; field.in_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1); - if (tap == NULL) + if (!tap) jtag_add_plain_dr_scan(field.num_bits, field.out_value, field.in_value, @@ -696,7 +696,7 @@ COMMAND_HANDLER(handle_xsvf_command) field.in_value = NULL; - if (tap == NULL) + if (!tap) jtag_add_plain_ir_scan(field.num_bits, field.out_value, field.in_value, my_end_state); else @@ -930,7 +930,7 @@ COMMAND_HANDLER(handle_xsvf_command) if (attempt > 0 && verbose) LOG_USER("LSDR retry %d", attempt); - if (tap == NULL) + if (!tap) jtag_add_plain_dr_scan(field.num_bits, field.out_value, field.in_value, diff --git a/tcl/board/altera_sockit.cfg b/tcl/board/altera_sockit.cfg index b7c7993fe..4d10aef7b 100644 --- a/tcl/board/altera_sockit.cfg +++ b/tcl/board/altera_sockit.cfg @@ -12,7 +12,7 @@ adapter driver usb_blaster source [find target/altera_fpgasoc.cfg] # If the USB Blaster II were supported, these settings would be needed -#usb_blaster_vid_pid 0x09fb 0x6810 -#usb_blaster_device_desc "USB-Blaster II" +#usb_blaster vid_pid 0x09fb 0x6810 +#usb_blaster device_desc "USB-Blaster II" adapter speed 100 diff --git a/tcl/board/digilent_analog_discovery.cfg b/tcl/board/digilent_analog_discovery.cfg index 954e54008..64cdacfa8 100644 --- a/tcl/board/digilent_analog_discovery.cfg +++ b/tcl/board/digilent_analog_discovery.cfg @@ -8,10 +8,10 @@ # adapter driver ftdi -ftdi_device_desc "Digilent USB Device" -ftdi_vid_pid 0x0403 0x6014 +ftdi device_desc "Digilent USB Device" +ftdi vid_pid 0x0403 0x6014 -ftdi_layout_init 0x8008 0x800b +ftdi layout_init 0x8008 0x800b adapter speed 25000 diff --git a/tcl/board/digilent_nexys_video.cfg b/tcl/board/digilent_nexys_video.cfg index f171e2403..b60ec912f 100644 --- a/tcl/board/digilent_nexys_video.cfg +++ b/tcl/board/digilent_nexys_video.cfg @@ -6,19 +6,19 @@ adapter driver ftdi adapter speed 30000 -ftdi_device_desc "Digilent USB Device" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Digilent USB Device" +ftdi vid_pid 0x0403 0x6010 # channel 0 is dedicated for Digilent's DPTI Interface # channel 1 is used for JTAG -ftdi_channel 1 +ftdi channel 1 # just TCK TDI TDO TMS, no reset -ftdi_layout_init 0x0088 0x008b +ftdi layout_init 0x0088 0x008b reset_config none # Enable sampling on falling edge for high JTAG speeds. -ftdi_tdo_sample_edge falling +ftdi tdo_sample_edge falling transport select jtag diff --git a/tcl/board/dp_busblaster_v3.cfg b/tcl/board/dp_busblaster_v3.cfg index a9974d9bc..b94b43a0b 100644 --- a/tcl/board/dp_busblaster_v3.cfg +++ b/tcl/board/dp_busblaster_v3.cfg @@ -8,6 +8,6 @@ # source [find interface/ftdi/dp_busblaster.cfg] -ftdi_channel 1 +ftdi channel 1 jtag newtap xc2c32a tap -expected-id 0x06e1c093 -irlen 8 diff --git a/tcl/board/dp_busblaster_v4.cfg b/tcl/board/dp_busblaster_v4.cfg index 7b3bee8fc..2c2f0e9d1 100644 --- a/tcl/board/dp_busblaster_v4.cfg +++ b/tcl/board/dp_busblaster_v4.cfg @@ -14,6 +14,6 @@ # source [find interface/ftdi/dp_busblaster.cfg] -ftdi_channel 1 +ftdi channel 1 jtag newtap xc2c64a tap -expected-id 0x06e5c093 -irlen 8 diff --git a/tcl/board/gumstix-aerocore.cfg b/tcl/board/gumstix-aerocore.cfg index f0103ed45..565df4cf8 100644 --- a/tcl/board/gumstix-aerocore.cfg +++ b/tcl/board/gumstix-aerocore.cfg @@ -1,10 +1,10 @@ # JTAG for the STM32F4x chip used on the Gumstix AeroCore is available on # the first interface of a Quad FTDI chip. nTRST is bit 4. adapter driver ftdi -ftdi_vid_pid 0x0403 0x6011 +ftdi vid_pid 0x0403 0x6011 -ftdi_layout_init 0x0000 0x001b -ftdi_layout_signal nTRST -data 0x0010 +ftdi layout_init 0x0000 0x001b +ftdi layout_signal nTRST -data 0x0010 source [find target/stm32f4x.cfg] reset_config trst_only diff --git a/tcl/board/kasli.cfg b/tcl/board/kasli.cfg index d492249ba..7cfdcf20e 100644 --- a/tcl/board/kasli.cfg +++ b/tcl/board/kasli.cfg @@ -1,8 +1,8 @@ adapter driver ftdi -ftdi_device_desc "Quad RS232-HS" -ftdi_vid_pid 0x0403 0x6011 -ftdi_channel 0 -ftdi_layout_init 0x0008 0x000b +ftdi device_desc "Quad RS232-HS" +ftdi vid_pid 0x0403 0x6011 +ftdi channel 0 +ftdi layout_init 0x0008 0x000b # adapter usb location 1:8 reset_config none diff --git a/tcl/board/kindle2.cfg b/tcl/board/kindle2.cfg index a39f15c67..71dca741c 100644 --- a/tcl/board/kindle2.cfg +++ b/tcl/board/kindle2.cfg @@ -37,7 +37,7 @@ jtag_ntrst_delay 30 arm11 memwrite burst disable adapter speed 1000 -ftdi_tdo_sample_edge falling +ftdi tdo_sample_edge falling proc kindle2_init {} { imx3x_reset diff --git a/tcl/board/lambdaconcept_ecpix-5.cfg b/tcl/board/lambdaconcept_ecpix-5.cfg new file mode 100644 index 000000000..19b9c1cb4 --- /dev/null +++ b/tcl/board/lambdaconcept_ecpix-5.cfg @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# LambdaConcept ECPIX-5 +# http://docs.lambdaconcept.com/ecpix-5/ +# Currently there are following board variants: +# ECPIX-5 45F - LFE5UM5G-45F +# ECPIX-5 85F - LFE5UM5G-85F +# +# This boards have two JTAG interfaces: +# - CN4, micro USB port connected to FT2232HQ chip: +# ADBUS0 TCK +# ADBUS1 TDI +# ADBUS2 TDO +# ADBUS3 TMS +# BDBUS0 UART_TXD +# BDBUS1 UART_RXD +# This interface should be used with following config: +# interface/ftdi/lambdaconcept_ecpix-5.cfg +# - CN3, 6 pin connector +# See schematics for more details: +# http://docs.lambdaconcept.com/ecpix-5/_static/resources/SCH_ECPIX-5_R02.PDF +# +# No reset lines are implemented. So it is not possible to remote reset the FPGA +# by using any of this interfaces + +source [find interface/ftdi/lambdaconcept_ecpix-5.cfg] +source [find fpga/lattice_ecp5.cfg] diff --git a/tcl/board/microchip_sama5d27_som1_kit1.cfg b/tcl/board/microchip_sama5d27_som1_kit1.cfg new file mode 100644 index 000000000..8e920405c --- /dev/null +++ b/tcl/board/microchip_sama5d27_som1_kit1.cfg @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Microchip SAMA5D27-SOM1-EK1 +# https://www.microchip.com/DevelopmentTools/ProductDetails/PartNO/ATSAMA5D27-SOM1-EK1 +# This board provide two jtag interfaces: +# J11 - 10 pin interface +# J10 - USB interface connected to the J-Link-OB. +# This functionality is implemented with an ATSAM3U4C microcontroller and +# provides JTAG functions and a bridge USB/Serial debug port (CDC). +# +# Jumper J7 disables the J-Link-OB-ATSAM3U4C JTAG functionality. +# - Jumper J7 not installed: J-Link-OB-ATSAM3U4C is enabled and fully functional. +# - Jumper J7 installed: J-Link-OB-ATSAM3U4C is disabled and an external JTAG +# controller can be used through the 10-pin JTAG port J11. + +source [find interface/jlink.cfg] +reset_config srst_only + +source [find target/at91sama5d2.cfg] diff --git a/tcl/board/nds32_corvettef1.cfg b/tcl/board/nds32_corvettef1.cfg index cec172342..7300ce04a 100644 --- a/tcl/board/nds32_corvettef1.cfg +++ b/tcl/board/nds32_corvettef1.cfg @@ -7,12 +7,12 @@ adapter speed 10000 adapter driver ftdi -ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0c08 0x0f1b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_init 0x0c08 0x0f1b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 reset_config srst_only source [find target/nds32v5.cfg] diff --git a/tcl/board/novena-internal-fpga.cfg b/tcl/board/novena-internal-fpga.cfg index 0e9ff5b1f..780586223 100644 --- a/tcl/board/novena-internal-fpga.cfg +++ b/tcl/board/novena-internal-fpga.cfg @@ -19,6 +19,6 @@ adapter driver sysfsgpio transport select jtag # TCK TMS TDI TDO -sysfsgpio_jtag_nums 136 139 137 138 +sysfsgpio jtag_nums 136 139 137 138 source [find cpld/xilinx-xc6s.cfg] diff --git a/tcl/board/numato_mimas_a7.cfg b/tcl/board/numato_mimas_a7.cfg index d4012bada..12df8913d 100644 --- a/tcl/board/numato_mimas_a7.cfg +++ b/tcl/board/numato_mimas_a7.cfg @@ -8,13 +8,13 @@ # Therefore, prefer external power supply. adapter driver ftdi -ftdi_device_desc "Mimas Artix 7 FPGA Module" -ftdi_vid_pid 0x2a19 0x1009 +ftdi device_desc "Mimas Artix 7 FPGA Module" +ftdi vid_pid 0x2a19 0x1009 # channel 0 is for custom purpose by users (like uart, fifo etc) # channel 1 is reserved for JTAG (by-default) or SPI (possible via changing solder jumpers) -ftdi_channel 1 -ftdi_tdo_sample_edge falling +ftdi channel 1 +ftdi tdo_sample_edge falling # FTDI Pin Layout @@ -28,7 +28,7 @@ ftdi_tdo_sample_edge falling # OE_N is JTAG buffer output enable signal (active-low) # PROG_B is not used, so left as input to FTDI. # -ftdi_layout_init 0x0008 0x004b +ftdi layout_init 0x0008 0x004b reset_config none adapter speed 30000 diff --git a/tcl/board/quark_d2000_refboard.cfg b/tcl/board/quark_d2000_refboard.cfg index 8b8314a0e..a89895d89 100644 --- a/tcl/board/quark_d2000_refboard.cfg +++ b/tcl/board/quark_d2000_refboard.cfg @@ -2,11 +2,11 @@ # the board has an onboard FTDI FT232H chip adapter driver ftdi -ftdi_vid_pid 0x0403 0x6014 -ftdi_channel 0 +ftdi vid_pid 0x0403 0x6014 +ftdi channel 0 -ftdi_layout_init 0x0000 0x030b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0100 +ftdi layout_init 0x0000 0x030b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0100 source [find target/quark_d20xx.cfg] diff --git a/tcl/board/radiona_ulx3s.cfg b/tcl/board/radiona_ulx3s.cfg new file mode 100644 index 000000000..eb9b02719 --- /dev/null +++ b/tcl/board/radiona_ulx3s.cfg @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Radiona ULX3S +# https://radiona.org/ulx3s/ +# Currently there are following board variants: +# CS-ULX3S-01 - LFE5U 12F +# CS-ULX3S-02 - LFE5U 45F +# CS-ULX3S-03 - LFE5U 85F +# +# two JTAG interfaces: +# - US1, micro USB port connected to FT231XQ +# This interface should be used with following config: +# interface/ft232r/radiona_ulx3s.cfg +# - J4, 6 pin connector +# +# Both of this interfaces share the JTAG lines (TDI, TMS, TCK, TDO) between +# Lattice ECP5 FPGA chip and ESP32 WiFi controller. +# Note: TRST_N of the ESP32 is pulled up by default and can be pulled down over +# J3 interface. +# See schematics for more information: +# https://github.com/emard/ulx3s/blob/master/doc/schematics_v308.pdf +# https://github.com/emard/ulx3s/blob/master/doc/schematics_v314.pdf +# https://github.com/emard/ulx3s/blob/master/doc/schematics_v315.pdf +# https://github.com/emard/ulx3s/blob/master/doc/schematics_v316.pdf + +source [find interface/ft232r/radiona_ulx3s.cfg] +source [find fpga/lattice_ecp5.cfg] diff --git a/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg b/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg index a6e80650e..c9f8d3695 100644 --- a/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg +++ b/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg @@ -6,7 +6,7 @@ if { [info exists USE_EXTERNAL_DEBUGGER] } { echo "Using external debugger" } else { source [find interface/altera-usb-blaster2.cfg] - usb_blaster_device_desc "Arria10 IDK" + usb_blaster device_desc "Arria10 IDK" } source [find fpga/altera-10m50.cfg] diff --git a/tcl/board/rpi3.cfg b/tcl/board/rpi3.cfg new file mode 100644 index 000000000..fd93a9d9d --- /dev/null +++ b/tcl/board/rpi3.cfg @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# This is the Raspberry Pi 3 board with BCM2837 chip +# https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2837/README.md +# +# Enable JTAG GPIO on Raspberry Pi boards +# https://www.raspberrypi.org/documentation/configuration/config-txt/gpio.md + +source [find target/bcm2837.cfg] +transport select jtag + +# Raspberry Pi boards only expose Test Reset (TRST) pin, no System Reset (SRST) +reset_config trst_only diff --git a/tcl/board/rpi4b.cfg b/tcl/board/rpi4b.cfg new file mode 100644 index 000000000..5b046af7b --- /dev/null +++ b/tcl/board/rpi4b.cfg @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# This is the Raspberry Pi 4 model B board with BCM2711 chip +# https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2711/README.md +# +# Enable JTAG GPIO on Raspberry Pi boards +# https://www.raspberrypi.org/documentation/configuration/config-txt/gpio.md + +source [find target/bcm2711.cfg] +transport select jtag + +# Raspberry Pi boards only expose Test Reset (TRST) pin, no System Reset (SRST) +reset_config trst_only diff --git a/tcl/board/sayma_amc.cfg b/tcl/board/sayma_amc.cfg index 64c085428..0bd76ba01 100644 --- a/tcl/board/sayma_amc.cfg +++ b/tcl/board/sayma_amc.cfg @@ -11,19 +11,19 @@ # which features an Artix 7 FPGA. adapter driver ftdi -ftdi_device_desc "Quad RS232-HS" -ftdi_vid_pid 0x0403 0x6011 -ftdi_channel 0 +ftdi device_desc "Quad RS232-HS" +ftdi vid_pid 0x0403 0x6011 +ftdi channel 0 # Use this to distinguish multiple boards by topology #adapter usb location 5:1 # sampling on falling edge generally seems to work and accelerates things but # is not fully tested -#ftdi_tdo_sample_edge falling +#ftdi tdo_sample_edge falling # EN_USB_JTAG on ADBUS7: out, high # USB_nTRST on ADBUS4: out, high, but R46 is DNP -ftdi_layout_init 0x0098 0x008b -#ftdi_layout_signal EN_USB -data 0x0080 -#ftdi_layout_signal nTRST -data 0x0010 +ftdi layout_init 0x0098 0x008b +#ftdi layout_signal EN_USB -data 0x0080 +#ftdi layout_signal nTRST -data 0x0010 reset_config none adapter speed 5000 diff --git a/tcl/board/sifive-e31arty.cfg b/tcl/board/sifive-e31arty.cfg index b7a255ea2..8e701f156 100644 --- a/tcl/board/sifive-e31arty.cfg +++ b/tcl/board/sifive-e31arty.cfg @@ -14,8 +14,8 @@ $_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work- flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000 init if {[ info exists pulse_srst]} { - ftdi_set_signal nSRST 0 - ftdi_set_signal nSRST z + ftdi set_signal nSRST 0 + ftdi set_signal nSRST z } halt flash protect 0 64 last off diff --git a/tcl/board/sifive-e51arty.cfg b/tcl/board/sifive-e51arty.cfg index 20ad57551..a543987bb 100644 --- a/tcl/board/sifive-e51arty.cfg +++ b/tcl/board/sifive-e51arty.cfg @@ -14,8 +14,8 @@ $_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work- flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000 init if {[ info exists pulse_srst]} { - ftdi_set_signal nSRST 0 - ftdi_set_signal nSRST z + ftdi set_signal nSRST 0 + ftdi set_signal nSRST z } halt flash protect 0 64 last off diff --git a/tcl/board/sifive-hifive1.cfg b/tcl/board/sifive-hifive1.cfg index 196f540bb..c47485bf2 100644 --- a/tcl/board/sifive-hifive1.cfg +++ b/tcl/board/sifive-hifive1.cfg @@ -1,15 +1,15 @@ adapter speed 10000 adapter driver ftdi -ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0008 0x001b -ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020 +ftdi layout_init 0x0008 0x001b +ftdi layout_signal nSRST -oe 0x0020 -data 0x0020 #Reset Stretcher logic on FE310 is ~1 second long #This doesn't apply if you use -# ftdi_set_signal, but still good to document +# ftdi set_signal, but still good to document #adapter srst delay 1500 set _CHIPNAME riscv @@ -23,8 +23,8 @@ flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME init #reset -- This type of reset is not implemented yet if {[ info exists pulse_srst]} { - ftdi_set_signal nSRST 0 - ftdi_set_signal nSRST z + ftdi set_signal nSRST 0 + ftdi set_signal nSRST z #Wait for the reset stretcher #It will work without this, but #will incur lots of delays for later commands. diff --git a/tcl/board/ti_tmdx570ls20susb.cfg b/tcl/board/ti_tmdx570ls20susb.cfg index 87cab2690..e71136cfe 100644 --- a/tcl/board/ti_tmdx570ls20susb.cfg +++ b/tcl/board/ti_tmdx570ls20susb.cfg @@ -12,5 +12,5 @@ reset_config trst_only # xds100v2 config says add this to the end init -ftdi_set_signal PWR_RST 1 +ftdi set_signal PWR_RST 1 jtag arp_init diff --git a/tcl/fpga/lattice_ecp5.cfg b/tcl/fpga/lattice_ecp5.cfg new file mode 100644 index 000000000..a94ada740 --- /dev/null +++ b/tcl/fpga/lattice_ecp5.cfg @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +if { [info exists CHIPNAME] } { + set _CHIPNAME $_CHIPNAME +} else { + set _CHIPNAME ecp5 +} + +# Lattice ECP5 family +# TAP IDs are extracted from BSDL files found on this page: +# https://www.latticesemi.com/Products/FPGAandCPLD/ECP5 +# +# 0x01111043 - LAE5UM_25F/LFE5UM_25F +# 0x01112043 - LAE5UM_45F/LFE5UM_45F +# 0x01113043 - LAE5UM_85F/LFE5UM_85 +# 0x21111043 - LFE5U_12F +# 0x41111043 - LFE5U_25F +# 0x41112043 - LFE5U_45F +# 0x41113043 - LFE5U_85F +# 0x81111043 - LFE5UM5G-25 +# 0x81112043 - LFE5UM5G-45 +# 0x81113043 - LFE5UM5G-85 + +jtag newtap $_CHIPNAME tap -irlen 8 -irmask 0x83 -ircapture 0x1 \ + -expected-id 0x01111043 -expected-id 0x01112043 -expected-id 0x01113043 \ + -expected-id 0x21111043 -expected-id 0x41111043 -expected-id 0x41112043 \ + -expected-id 0x41113043 -expected-id 0x81111043 -expected-id 0x81112043 \ + -expected-id 0x81113043 diff --git a/tcl/interface/altera-usb-blaster.cfg b/tcl/interface/altera-usb-blaster.cfg index 84e77b13c..cb4ca9a78 100644 --- a/tcl/interface/altera-usb-blaster.cfg +++ b/tcl/interface/altera-usb-blaster.cfg @@ -5,7 +5,7 @@ # adapter driver usb_blaster -usb_blaster_lowlevel_driver ftdi +usb_blaster lowlevel_driver ftdi # These are already the defaults. -# usb_blaster_vid_pid 0x09FB 0x6001 -# usb_blaster_device_desc "USB-Blaster" +# usb_blaster vid_pid 0x09FB 0x6001 +# usb_blaster device_desc "USB-Blaster" diff --git a/tcl/interface/altera-usb-blaster2.cfg b/tcl/interface/altera-usb-blaster2.cfg index 4642b1dcf..05b0519b8 100644 --- a/tcl/interface/altera-usb-blaster2.cfg +++ b/tcl/interface/altera-usb-blaster2.cfg @@ -3,6 +3,6 @@ # adapter driver usb_blaster -usb_blaster_vid_pid 0x09fb 0x6010 0x09fb 0x6810 -usb_blaster_lowlevel_driver ublast2 -usb_blaster_firmware /path/to/quartus/blaster_6810.hex +usb_blaster vid_pid 0x09fb 0x6010 0x09fb 0x6810 +usb_blaster lowlevel_driver ublast2 +usb_blaster firmware /path/to/quartus/blaster_6810.hex diff --git a/tcl/interface/buspirate.cfg b/tcl/interface/buspirate.cfg index 265e37e06..20761d152 100644 --- a/tcl/interface/buspirate.cfg +++ b/tcl/interface/buspirate.cfg @@ -7,19 +7,19 @@ adapter driver buspirate # you need to specify port on which BP lives -#buspirate_port /dev/ttyUSB0 +#buspirate port /dev/ttyUSB0 # communication speed setting -buspirate_speed normal ;# or fast +buspirate speed normal ;# or fast # voltage regulator Enabled = 1 Disabled = 0 -#buspirate_vreg 0 +#buspirate vreg 0 # pin mode normal or open-drain (jtag only) -#buspirate_mode normal +#buspirate mode normal # pullup state Enabled = 1 Disabled = 0 -#buspirate_pullup 0 +#buspirate pullup 0 # this depends on the cable, you are safe with this option reset_config srst_only diff --git a/tcl/interface/chameleon.cfg b/tcl/interface/chameleon.cfg index 1cb1d6151..97bf98d27 100644 --- a/tcl/interface/chameleon.cfg +++ b/tcl/interface/chameleon.cfg @@ -5,4 +5,4 @@ # adapter driver parport -parport_cable chameleon +parport cable chameleon diff --git a/tcl/interface/dln-2-gpiod.cfg b/tcl/interface/dln-2-gpiod.cfg index 5407a244e..cd6061fd9 100644 --- a/tcl/interface/dln-2-gpiod.cfg +++ b/tcl/interface/dln-2-gpiod.cfg @@ -17,11 +17,11 @@ adapter driver linuxgpiod -linuxgpiod_gpiochip 0 -linuxgpiod_jtag_nums 2 3 4 1 -linuxgpiod_trst_num 5 -linuxgpiod_swd_nums 2 3 -linuxgpiod_srst_num 0 -linuxgpiod_led_num 6 +linuxgpiod gpiochip 0 +linuxgpiod jtag_nums 2 3 4 1 +linuxgpiod trst_num 5 +linuxgpiod swd_nums 2 3 +linuxgpiod srst_num 0 +linuxgpiod led_num 6 reset_config trst_and_srst separate srst_push_pull diff --git a/tcl/interface/flashlink.cfg b/tcl/interface/flashlink.cfg index e0a4b97d0..b7ec0bb24 100644 --- a/tcl/interface/flashlink.cfg +++ b/tcl/interface/flashlink.cfg @@ -12,5 +12,5 @@ if { [info exists PARPORTADDR] } { } adapter driver parport -parport_port $_PARPORTADDR -parport_cable flashlink +parport port $_PARPORTADDR +parport cable flashlink diff --git a/tcl/interface/ft232r/radiona_ulx3s.cfg b/tcl/interface/ft232r/radiona_ulx3s.cfg new file mode 100644 index 000000000..424777e9e --- /dev/null +++ b/tcl/interface/ft232r/radiona_ulx3s.cfg @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# This adapter is integrated in to Radiona ULX3S board: +# board/radiona_ulx3s.cfg +# See schematics for the ft232r layout: +# https://github.com/emard/ulx3s/blob/master/doc/schematics_v316.pdf + +adapter driver ft232r +adapter speed 1000 +ft232r_vid_pid 0x0403 0x6015 +ft232r_tck_num DSR +ft232r_tms_num DCD +ft232r_tdi_num RI +ft232r_tdo_num CTS +ft232r_trst_num RTS +ft232r_srst_num DTR diff --git a/tcl/interface/ftdi/100ask-openjtag.cfg b/tcl/interface/ftdi/100ask-openjtag.cfg index 3cbd37e06..a12df97af 100644 --- a/tcl/interface/ftdi/100ask-openjtag.cfg +++ b/tcl/interface/ftdi/100ask-openjtag.cfg @@ -8,9 +8,9 @@ # adapter driver ftdi -ftdi_device_desc "USB<=>JTAG&RS232" -ftdi_vid_pid 0x1457 0x5118 +ftdi device_desc "USB<=>JTAG&RS232" +ftdi vid_pid 0x1457 0x5118 -ftdi_layout_init 0x0f08 0x0f1b -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_init 0x0f08 0x0f1b +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 diff --git a/tcl/interface/ftdi/ashling-opella-ld-jtag.cfg b/tcl/interface/ftdi/ashling-opella-ld-jtag.cfg new file mode 100755 index 000000000..6256aa0c2 --- /dev/null +++ b/tcl/interface/ftdi/ashling-opella-ld-jtag.cfg @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Ashling Opella-LD +# +# https://www.ashling.com/Opella-LD/ +# + +adapter driver ftdi +ftdi device_desc "Opella-LD Debug Probe" +ftdi vid_pid 0x0B6B 0x0040 +ftdi tdo_sample_edge falling +ftdi layout_init 0x0A68 0xFF7B +ftdi channel 0 +ftdi layout_signal JTAGOE -ndata 0x0010 +ftdi layout_signal nTRST -data 0x0020 +ftdi layout_signal nSRST -data 0x0040 +ftdi layout_signal SWD_EN -data 0x0100 +ftdi layout_signal SWDIO_OE -data 0x0200 +ftdi layout_signal LED -ndata 0x0800 +transport select jtag diff --git a/tcl/interface/ftdi/ashling-opella-ld-swd.cfg b/tcl/interface/ftdi/ashling-opella-ld-swd.cfg new file mode 100755 index 000000000..4a4e4e068 --- /dev/null +++ b/tcl/interface/ftdi/ashling-opella-ld-swd.cfg @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Ashling Opella-LD +# +# https://www.ashling.com/Opella-LD/ +# + +adapter driver ftdi +ftdi device_desc "Opella-LD Debug Probe" +ftdi vid_pid 0x0B6B 0x0040 +ftdi layout_init 0x0860 0x0b7b +ftdi channel 0 +ftdi layout_signal JTAGOE -data 0x0010 +ftdi layout_signal nTRST -data 0x0020 +ftdi layout_signal nSRST -data 0x0040 +ftdi layout_signal SWD_EN -data 0x0100 +ftdi layout_signal SWDIO_OE -data 0x0200 +ftdi layout_signal LED -ndata 0x0800 +transport select swd diff --git a/tcl/interface/ftdi/axm0432.cfg b/tcl/interface/ftdi/axm0432.cfg index 6cc1752e2..84b77a69a 100644 --- a/tcl/interface/ftdi/axm0432.cfg +++ b/tcl/interface/ftdi/axm0432.cfg @@ -10,9 +10,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "Symphony SoundBite" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Symphony SoundBite" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0c08 0x0c2b -ftdi_layout_signal nTRST -data 0x0800 -ftdi_layout_signal nSRST -data 0x0400 +ftdi layout_init 0x0c08 0x0c2b +ftdi layout_signal nTRST -data 0x0800 +ftdi layout_signal nSRST -data 0x0400 diff --git a/tcl/interface/ftdi/c232hm.cfg b/tcl/interface/ftdi/c232hm.cfg index 27cf76674..25fcae1b0 100644 --- a/tcl/interface/ftdi/c232hm.cfg +++ b/tcl/interface/ftdi/c232hm.cfg @@ -14,18 +14,18 @@ # http://www.ftdichip.com/Support/Documents/AppNotes/AN_129_FTDI_Hi_Speed_USB_To_JTAG_Example.pdf adapter driver ftdi -#ftdi_device_desc "C232HM-DDHSL-0" -#ftdi_device_desc "C232HM-EDHSL-0" +#ftdi device_desc "C232HM-DDHSL-0" +#ftdi device_desc "C232HM-EDHSL-0" # Common PID for FT232H -ftdi_vid_pid 0x0403 0x6014 +ftdi vid_pid 0x0403 0x6014 # Layout # High data byte 0x40 configures red LED on ACBUS6 initially high (unlit, since active-low) # Low data byte 0x08 configures TMS on ACBUS3 initially high (asserted); TCK, TDI low # High direction byte 0x40 configures red LED on ACBUS6 as high (output) # Low direction byte 0x0b configures TDO on ACBUS2 as low (input) -ftdi_layout_init 0x4008 0x400b +ftdi layout_init 0x4008 0x400b # ---A*BUS-------CCCCCCCC|DDDDDDDD # --------\______76543210|76543210 @@ -35,12 +35,12 @@ ftdi_layout_init 0x4008 0x400b #GPIOL2 0x0040 = 00000000|01000000 = ADBUS6 #GPIOL3 0x0080 = 00000000|10000000 = ADBUS7 # -ndata treats the LED as active-low for expected behavior (toggle when transferring) -ftdi_layout_signal LED -ndata 0x4000 +ftdi layout_signal LED -ndata 0x4000 # Available for aliasing as desired -ftdi_layout_signal GPIOL0 -data 0x0010 -oe 0x0010 -ftdi_layout_signal GPIOL1 -data 0x0020 -oe 0x0020 -ftdi_layout_signal GPIOL2 -data 0x0040 -oe 0x0040 -ftdi_layout_signal GPIOL3 -data 0x0080 -oe 0x0080 +ftdi layout_signal GPIOL0 -data 0x0010 -oe 0x0010 +ftdi layout_signal GPIOL1 -data 0x0020 -oe 0x0020 +ftdi layout_signal GPIOL2 -data 0x0040 -oe 0x0040 +ftdi layout_signal GPIOL3 -data 0x0080 -oe 0x0080 # C232HM FT232H JTAG/Other # Num Color Name Func diff --git a/tcl/interface/ftdi/calao-usb-a9260-c01.cfg b/tcl/interface/ftdi/calao-usb-a9260-c01.cfg index a23ddbfb5..41e597391 100644 --- a/tcl/interface/ftdi/calao-usb-a9260-c01.cfg +++ b/tcl/interface/ftdi/calao-usb-a9260-c01.cfg @@ -11,12 +11,12 @@ echo "experience with this file to openocd-devel mailing list, so it could be ma echo "as working or fixed." adapter driver ftdi -ftdi_device_desc "USB-A9260" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "USB-A9260" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0c08 0x0f1b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_init 0x0c08 0x0f1b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 script interface/calao-usb-a9260.cfg script target/at91sam9260minimal.cfg diff --git a/tcl/interface/ftdi/calao-usb-a9260-c02.cfg b/tcl/interface/ftdi/calao-usb-a9260-c02.cfg index 67427c5c0..001aef59c 100644 --- a/tcl/interface/ftdi/calao-usb-a9260-c02.cfg +++ b/tcl/interface/ftdi/calao-usb-a9260-c02.cfg @@ -11,12 +11,12 @@ echo "experience with this file to openocd-devel mailing list, so it could be ma echo "as working or fixed." adapter driver ftdi -ftdi_device_desc "USB-A9260" -ftdi_vid_pid 0x0403 0x6001 +ftdi device_desc "USB-A9260" +ftdi vid_pid 0x0403 0x6001 -ftdi_layout_init 0x0c08 0x0f1b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_init 0x0c08 0x0f1b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 script interface/calao-usb-a9260.cfg script target/at91sam9260minimal.cfg diff --git a/tcl/interface/ftdi/cortino.cfg b/tcl/interface/ftdi/cortino.cfg index 2bc516cc6..c0eae3105 100644 --- a/tcl/interface/ftdi/cortino.cfg +++ b/tcl/interface/ftdi/cortino.cfg @@ -5,9 +5,9 @@ # adapter driver ftdi -ftdi_device_desc "Cortino" -ftdi_vid_pid 0x0640 0x0032 +ftdi device_desc "Cortino" +ftdi vid_pid 0x0640 0x0032 -ftdi_layout_init 0x0108 0x010b -ftdi_layout_signal nTRST -data 0x0100 -ftdi_layout_signal nSRST -data 0x0200 -oe 0x0200 +ftdi layout_init 0x0108 0x010b +ftdi layout_signal nTRST -data 0x0100 +ftdi layout_signal nSRST -data 0x0200 -oe 0x0200 diff --git a/tcl/interface/ftdi/digilent-hs1.cfg b/tcl/interface/ftdi/digilent-hs1.cfg index dfba3393a..55391b9d3 100644 --- a/tcl/interface/ftdi/digilent-hs1.cfg +++ b/tcl/interface/ftdi/digilent-hs1.cfg @@ -2,10 +2,10 @@ # (the later being the OEM on-board version) adapter driver ftdi -ftdi_device_desc "Digilent Adept USB Device" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Digilent Adept USB Device" +ftdi vid_pid 0x0403 0x6010 # channel 1 does not have any functionality -ftdi_channel 0 +ftdi channel 0 # just TCK TDI TDO TMS, no reset -ftdi_layout_init 0x0088 0x008b +ftdi layout_init 0x0088 0x008b reset_config none diff --git a/tcl/interface/ftdi/digilent-hs2.cfg b/tcl/interface/ftdi/digilent-hs2.cfg index ae6ba01bb..269eca0f3 100644 --- a/tcl/interface/ftdi/digilent-hs2.cfg +++ b/tcl/interface/ftdi/digilent-hs2.cfg @@ -1,10 +1,10 @@ # this supports JTAG-HS2 (and apparently Nexys4 as well) adapter driver ftdi -ftdi_device_desc "Digilent Adept USB Device" -ftdi_vid_pid 0x0403 0x6014 +ftdi device_desc "Digilent Adept USB Device" +ftdi vid_pid 0x0403 0x6014 -ftdi_channel 0 -ftdi_layout_init 0x00e8 0x60eb +ftdi channel 0 +ftdi layout_init 0x00e8 0x60eb reset_config none diff --git a/tcl/interface/ftdi/digilent_jtag_hs3.cfg b/tcl/interface/ftdi/digilent_jtag_hs3.cfg index 7160bed8e..ca2807f80 100644 --- a/tcl/interface/ftdi/digilent_jtag_hs3.cfg +++ b/tcl/interface/ftdi/digilent_jtag_hs3.cfg @@ -3,11 +3,11 @@ # adapter driver ftdi -ftdi_vid_pid 0x0403 0x6014 -ftdi_device_desc "Digilent USB Device" +ftdi vid_pid 0x0403 0x6014 +ftdi device_desc "Digilent USB Device" # From Digilent support: # The SRST pin is [...] 0x20 and 0x10 is the /OE (active low output enable) -ftdi_layout_init 0x2088 0x308b -ftdi_layout_signal nSRST -data 0x2000 -noe 0x1000 +ftdi layout_init 0x2088 0x308b +ftdi layout_signal nSRST -data 0x2000 -noe 0x1000 diff --git a/tcl/interface/ftdi/digilent_jtag_smt2.cfg b/tcl/interface/ftdi/digilent_jtag_smt2.cfg index 493ed6af5..f4ba27bef 100644 --- a/tcl/interface/ftdi/digilent_jtag_smt2.cfg +++ b/tcl/interface/ftdi/digilent_jtag_smt2.cfg @@ -8,10 +8,10 @@ # adapter driver ftdi -ftdi_vid_pid 0x0403 0x6014 +ftdi vid_pid 0x0403 0x6014 -ftdi_layout_init 0x2088 0x3f8b -ftdi_layout_signal nSRST -data 0x2000 -ftdi_layout_signal GPIO2 -data 0x2000 -ftdi_layout_signal GPIO1 -data 0x0200 -ftdi_layout_signal GPIO0 -data 0x0100 +ftdi layout_init 0x20e8 0x3feb +ftdi layout_signal nSRST -data 0x2000 +ftdi layout_signal GPIO2 -data 0x2000 +ftdi layout_signal GPIO1 -data 0x0200 +ftdi layout_signal GPIO0 -data 0x0100 diff --git a/tcl/interface/ftdi/digilent_jtag_smt2_nc.cfg b/tcl/interface/ftdi/digilent_jtag_smt2_nc.cfg index bc783a46c..a143cd772 100644 --- a/tcl/interface/ftdi/digilent_jtag_smt2_nc.cfg +++ b/tcl/interface/ftdi/digilent_jtag_smt2_nc.cfg @@ -8,11 +8,11 @@ # https://www.xilinx.com/products/boards-and-kits/kcu105.html#documentation # # Note that the digilent_jtag_smt2 layout does not work and hangs while -# the ftdi_device_desc from digilent_hs2 is wrong. +# the ftdi device_desc from digilent_hs2 is wrong. adapter driver ftdi -ftdi_device_desc "Digilent USB Device" -ftdi_vid_pid 0x0403 0x6014 -ftdi_channel 0 -ftdi_layout_init 0x00e8 0x60eb +ftdi device_desc "Digilent USB Device" +ftdi vid_pid 0x0403 0x6014 +ftdi channel 0 +ftdi layout_init 0x00e8 0x60eb reset_config none diff --git a/tcl/interface/ftdi/dlp-usb1232h.cfg b/tcl/interface/ftdi/dlp-usb1232h.cfg index 9ddc2c80a..e9651dd99 100644 --- a/tcl/interface/ftdi/dlp-usb1232h.cfg +++ b/tcl/interface/ftdi/dlp-usb1232h.cfg @@ -13,9 +13,9 @@ echo "in ft2232.c. Please report your experience with this file to openocd-devel echo "mailing list, so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0008 0x000b -ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 +ftdi layout_init 0x0008 0x000b +ftdi layout_signal nTRST -data 0x0010 -oe 0x0010 +ftdi layout_signal nSRST -data 0x0040 -oe 0x0040 diff --git a/tcl/interface/ftdi/dp_busblaster.cfg b/tcl/interface/ftdi/dp_busblaster.cfg index 86ab4d840..420f788d2 100644 --- a/tcl/interface/ftdi/dp_busblaster.cfg +++ b/tcl/interface/ftdi/dp_busblaster.cfg @@ -12,9 +12,9 @@ echo "Info : If you need SWD support, flash KT-Link buffer from https://github.c and use dp_busblaster_kt-link.cfg instead" adapter driver ftdi -ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0c08 0x0f1b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_init 0x0c08 0x0f1b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 diff --git a/tcl/interface/ftdi/dp_busblaster_kt-link.cfg b/tcl/interface/ftdi/dp_busblaster_kt-link.cfg index d49a4c98f..4924d2619 100644 --- a/tcl/interface/ftdi/dp_busblaster_kt-link.cfg +++ b/tcl/interface/ftdi/dp_busblaster_kt-link.cfg @@ -10,12 +10,12 @@ # adapter driver ftdi -ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x8c28 0xff3b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 -ftdi_layout_signal LED -ndata 0x8000 -ftdi_layout_signal SWD_EN -ndata 0x0020 -oe 0x2000 -ftdi_layout_signal SWDIO_OE -ndata 0x1000 +ftdi layout_init 0x8c28 0xff3b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_signal LED -ndata 0x8000 +ftdi layout_signal SWD_EN -ndata 0x0020 -oe 0x2000 +ftdi layout_signal SWDIO_OE -ndata 0x1000 diff --git a/tcl/interface/ftdi/flossjtag-noeeprom.cfg b/tcl/interface/ftdi/flossjtag-noeeprom.cfg index 42ed18ec3..7083e6388 100644 --- a/tcl/interface/ftdi/flossjtag-noeeprom.cfg +++ b/tcl/interface/ftdi/flossjtag-noeeprom.cfg @@ -18,9 +18,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0008 0x000b -ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 +ftdi layout_init 0x0008 0x000b +ftdi layout_signal nTRST -data 0x0010 -oe 0x0010 +ftdi layout_signal nSRST -data 0x0040 -oe 0x0040 diff --git a/tcl/interface/ftdi/flossjtag.cfg b/tcl/interface/ftdi/flossjtag.cfg index c4ad81dcc..2e3cfca48 100644 --- a/tcl/interface/ftdi/flossjtag.cfg +++ b/tcl/interface/ftdi/flossjtag.cfg @@ -18,12 +18,12 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_vid_pid 0x0403 0x6010 -ftdi_device_desc "FLOSS-JTAG" -#ftdi_serial "FJ000001" +ftdi vid_pid 0x0403 0x6010 +ftdi device_desc "FLOSS-JTAG" +#ftdi serial "FJ000001" -ftdi_layout_init 0x0008 0x180b -ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 -ftdi_layout_signal LED -data 0x0800 -ftdi_layout_signal LED2 -data 0x1000 +ftdi layout_init 0x0008 0x180b +ftdi layout_signal nTRST -data 0x0010 -oe 0x0010 +ftdi layout_signal nSRST -data 0x0040 -oe 0x0040 +ftdi layout_signal LED -data 0x0800 +ftdi layout_signal LED2 -data 0x1000 diff --git a/tcl/interface/ftdi/flyswatter.cfg b/tcl/interface/ftdi/flyswatter.cfg index 5e9d4816d..bfa015b2c 100644 --- a/tcl/interface/ftdi/flyswatter.cfg +++ b/tcl/interface/ftdi/flyswatter.cfg @@ -1,14 +1,14 @@ # # TinCanTools Flyswatter # -# http://www.tincantools.com/product.php?productid=16134 +# http://web.archive.org/web/20150419072034/http://www.tincantools.com/JTAG/Flyswatter.html # adapter driver ftdi -ftdi_device_desc "Flyswatter" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Flyswatter" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0818 0x0cfb -ftdi_layout_signal nTRST -data 0x0010 -ftdi_layout_signal nSRST -oe 0x0020 -ftdi_layout_signal LED -data 0x0c00 +ftdi layout_init 0x0818 0x0cfb +ftdi layout_signal nTRST -data 0x0010 +ftdi layout_signal nSRST -oe 0x0020 +ftdi layout_signal LED -data 0x0c00 diff --git a/tcl/interface/ftdi/flyswatter2.cfg b/tcl/interface/ftdi/flyswatter2.cfg index 45dd0bacb..0b4a8ef9f 100644 --- a/tcl/interface/ftdi/flyswatter2.cfg +++ b/tcl/interface/ftdi/flyswatter2.cfg @@ -1,14 +1,14 @@ # # TinCanTools Flyswatter2 # -# http://www.tincantools.com/product.php?productid=16153 +# https://www.tincantools.com/product/flyswatter2/ # adapter driver ftdi -ftdi_device_desc "Flyswatter2" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Flyswatter2" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0538 0x057b -ftdi_layout_signal LED -ndata 0x0400 -ftdi_layout_signal nTRST -data 0x0010 -ftdi_layout_signal nSRST -data 0x0020 -noe 0x0100 +ftdi layout_init 0x0538 0x057b +ftdi layout_signal LED -ndata 0x0400 +ftdi layout_signal nTRST -data 0x0010 +ftdi layout_signal nSRST -data 0x0020 -noe 0x0100 diff --git a/tcl/interface/ftdi/ft232h-module-swd.cfg b/tcl/interface/ftdi/ft232h-module-swd.cfg index 98a8c844f..7fa428359 100644 --- a/tcl/interface/ftdi/ft232h-module-swd.cfg +++ b/tcl/interface/ftdi/ft232h-module-swd.cfg @@ -8,27 +8,27 @@ adapter driver ftdi -ftdi_vid_pid 0x0403 0x6014 +ftdi vid_pid 0x0403 0x6014 # data MSB..LSB direction (1:out) MSB..LSB # 0000'0000'0011'0000 0000'0000'0011'1011 -ftdi_layout_init 0x0030 0x003b +ftdi layout_init 0x0030 0x003b # 0xfff8 0xfffb # Those signal are only required on some platforms or may required to be # enabled explicitly (e.g. nrf5x chips). -ftdi_layout_signal nSRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal nTRST -data 0x0020 -oe 0x0020 +ftdi layout_signal nSRST -data 0x0010 -oe 0x0010 +ftdi layout_signal nTRST -data 0x0020 -oe 0x0020 # swd enable -ftdi_layout_signal SWD_EN -data 0 +ftdi layout_signal SWD_EN -data 0 # tri-state (configure as input) TDO/TIO when reading -ftdi_layout_signal SWDIO_OE -data 0 +ftdi layout_signal SWDIO_OE -data 0 transport select swd # re-configure TDO as tri-state -#ftdi_layout_signal TDO -data 0x0002 -oe 0x0002 -#ftdi_layout_signal TDI -data 0x0004 +#ftdi layout_signal TDO -data 0x0002 -oe 0x0002 +#ftdi layout_signal TDI -data 0x0004 # Adafruit FT232H JTAG SWD # Name Pin Name Func Func diff --git a/tcl/interface/ftdi/gw16042.cfg b/tcl/interface/ftdi/gw16042.cfg index 1288f77b1..ef3182938 100644 --- a/tcl/interface/ftdi/gw16042.cfg +++ b/tcl/interface/ftdi/gw16042.cfg @@ -18,9 +18,9 @@ # adapter driver ftdi -ftdi_device_desc "USB-JTAG" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "USB-JTAG" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0058 0x007b -ftdi_layout_signal nTRST -data 0x0010 -ftdi_layout_signal nSRST -oe 0x0020 +ftdi layout_init 0x0058 0x007b +ftdi layout_signal nTRST -data 0x0010 +ftdi layout_signal nSRST -oe 0x0020 diff --git a/tcl/interface/ftdi/hie-jtag.cfg b/tcl/interface/ftdi/hie-jtag.cfg index 39af87d89..6694df048 100644 --- a/tcl/interface/ftdi/hie-jtag.cfg +++ b/tcl/interface/ftdi/hie-jtag.cfg @@ -6,15 +6,15 @@ # adapter driver ftdi -ftdi_channel 0 -ftdi_vid_pid 0x0403 0x6014 -ftdi_device_desc "HIE JTAG Debugger" +ftdi channel 0 +ftdi vid_pid 0x0403 0x6014 +ftdi device_desc "HIE JTAG Debugger" -ftdi_layout_init 0x0c08 0x4f1b +ftdi layout_init 0x0c08 0x4f1b # define both Reset signals -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 # Toggle USB LED -ftdi_layout_signal LED -ndata 0x4000 +ftdi layout_signal LED -ndata 0x4000 diff --git a/tcl/interface/ftdi/hilscher_nxhx10_etm.cfg b/tcl/interface/ftdi/hilscher_nxhx10_etm.cfg index 3802f6d2c..d55f636de 100644 --- a/tcl/interface/ftdi/hilscher_nxhx10_etm.cfg +++ b/tcl/interface/ftdi/hilscher_nxhx10_etm.cfg @@ -10,9 +10,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "NXHX 10-ETM" -ftdi_vid_pid 0x0640 0x0028 +ftdi device_desc "NXHX 10-ETM" +ftdi vid_pid 0x0640 0x0028 -ftdi_layout_init 0x0308 0x030b -ftdi_layout_signal nTRST -data 0x0100 -ftdi_layout_signal nSRST -data 0x0200 +ftdi layout_init 0x0308 0x030b +ftdi layout_signal nTRST -data 0x0100 +ftdi layout_signal nSRST -data 0x0200 diff --git a/tcl/interface/ftdi/hilscher_nxhx500_etm.cfg b/tcl/interface/ftdi/hilscher_nxhx500_etm.cfg index f2e64b4f5..8c7981561 100644 --- a/tcl/interface/ftdi/hilscher_nxhx500_etm.cfg +++ b/tcl/interface/ftdi/hilscher_nxhx500_etm.cfg @@ -10,9 +10,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "NXHX 500-ETM" -ftdi_vid_pid 0x0640 0x0028 +ftdi device_desc "NXHX 500-ETM" +ftdi vid_pid 0x0640 0x0028 -ftdi_layout_init 0x0308 0x030b -ftdi_layout_signal nTRST -data 0x0100 -ftdi_layout_signal nSRST -data 0x0200 +ftdi layout_init 0x0308 0x030b +ftdi layout_signal nTRST -data 0x0100 +ftdi layout_signal nSRST -data 0x0200 diff --git a/tcl/interface/ftdi/hilscher_nxhx500_re.cfg b/tcl/interface/ftdi/hilscher_nxhx500_re.cfg index 38f3c690e..9aa2cd516 100644 --- a/tcl/interface/ftdi/hilscher_nxhx500_re.cfg +++ b/tcl/interface/ftdi/hilscher_nxhx500_re.cfg @@ -10,9 +10,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "NXHX 500-RE" -ftdi_vid_pid 0x0640 0x0028 +ftdi device_desc "NXHX 500-RE" +ftdi vid_pid 0x0640 0x0028 -ftdi_layout_init 0x0308 0x030b -ftdi_layout_signal nTRST -data 0x0100 -ftdi_layout_signal nSRST -data 0x0200 +ftdi layout_init 0x0308 0x030b +ftdi layout_signal nTRST -data 0x0100 +ftdi layout_signal nSRST -data 0x0200 diff --git a/tcl/interface/ftdi/hilscher_nxhx50_etm.cfg b/tcl/interface/ftdi/hilscher_nxhx50_etm.cfg index bff081f18..a64d0e8a4 100644 --- a/tcl/interface/ftdi/hilscher_nxhx50_etm.cfg +++ b/tcl/interface/ftdi/hilscher_nxhx50_etm.cfg @@ -10,9 +10,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "NXHX 50-ETM" -ftdi_vid_pid 0x0640 0x0028 +ftdi device_desc "NXHX 50-ETM" +ftdi vid_pid 0x0640 0x0028 -ftdi_layout_init 0x0308 0x030b -ftdi_layout_signal nTRST -data 0x0100 -ftdi_layout_signal nSRST -data 0x0200 +ftdi layout_init 0x0308 0x030b +ftdi layout_signal nTRST -data 0x0100 +ftdi layout_signal nSRST -data 0x0200 diff --git a/tcl/interface/ftdi/hilscher_nxhx50_re.cfg b/tcl/interface/ftdi/hilscher_nxhx50_re.cfg index f9fbd015a..277883675 100644 --- a/tcl/interface/ftdi/hilscher_nxhx50_re.cfg +++ b/tcl/interface/ftdi/hilscher_nxhx50_re.cfg @@ -10,9 +10,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "NXHX50-RE" -ftdi_vid_pid 0x0640 0x0028 +ftdi device_desc "NXHX50-RE" +ftdi vid_pid 0x0640 0x0028 -ftdi_layout_init 0x0308 0x030b -ftdi_layout_signal nTRST -data 0x0100 -ftdi_layout_signal nSRST -data 0x0200 +ftdi layout_init 0x0308 0x030b +ftdi layout_signal nTRST -data 0x0100 +ftdi layout_signal nSRST -data 0x0200 diff --git a/tcl/interface/ftdi/hitex_lpc1768stick.cfg b/tcl/interface/ftdi/hitex_lpc1768stick.cfg index 9fe80f126..87affe84a 100644 --- a/tcl/interface/ftdi/hitex_lpc1768stick.cfg +++ b/tcl/interface/ftdi/hitex_lpc1768stick.cfg @@ -6,9 +6,9 @@ adapter driver ftdi -ftdi_device_desc "LPC1768-Stick" -ftdi_vid_pid 0x0640 0x0026 +ftdi device_desc "LPC1768-Stick" +ftdi vid_pid 0x0640 0x0026 -ftdi_layout_init 0x0388 0x038b -ftdi_layout_signal nTRST -data 0x0100 -ftdi_layout_signal nSRST -data 0x0080 -noe 0x200 +ftdi layout_init 0x0388 0x038b +ftdi layout_signal nTRST -data 0x0100 +ftdi layout_signal nSRST -data 0x0080 -noe 0x200 diff --git a/tcl/interface/ftdi/hitex_str9-comstick.cfg b/tcl/interface/ftdi/hitex_str9-comstick.cfg index 2b3dc3690..6490d65f4 100644 --- a/tcl/interface/ftdi/hitex_str9-comstick.cfg +++ b/tcl/interface/ftdi/hitex_str9-comstick.cfg @@ -5,9 +5,9 @@ # adapter driver ftdi -ftdi_device_desc "STR9-comStick" -ftdi_vid_pid 0x0640 0x002c +ftdi device_desc "STR9-comStick" +ftdi vid_pid 0x0640 0x002c -ftdi_layout_init 0x0108 0x010b -ftdi_layout_signal nTRST -data 0x0100 -ftdi_layout_signal nSRST -data 0x0200 -oe 0x0200 +ftdi layout_init 0x0108 0x010b +ftdi layout_signal nTRST -data 0x0100 +ftdi layout_signal nSRST -data 0x0200 -oe 0x0200 diff --git a/tcl/interface/ftdi/icebear.cfg b/tcl/interface/ftdi/icebear.cfg index 04c27319e..76b2102a5 100644 --- a/tcl/interface/ftdi/icebear.cfg +++ b/tcl/interface/ftdi/icebear.cfg @@ -10,9 +10,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "ICEbear JTAG adapter" -ftdi_vid_pid 0x0403 0xc140 +ftdi device_desc "ICEbear JTAG adapter" +ftdi vid_pid 0x0403 0xc140 -ftdi_layout_init 0x0028 0x002b -ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal nSRST -data 0x0020 +ftdi layout_init 0x0028 0x002b +ftdi layout_signal nTRST -data 0x0010 -oe 0x0010 +ftdi layout_signal nSRST -data 0x0020 diff --git a/tcl/interface/ftdi/imx8mp-evk.cfg b/tcl/interface/ftdi/imx8mp-evk.cfg index 4e04e8cd7..64f3f3db0 100644 --- a/tcl/interface/ftdi/imx8mp-evk.cfg +++ b/tcl/interface/ftdi/imx8mp-evk.cfg @@ -11,18 +11,18 @@ # adapter driver ftdi -ftdi_vid_pid 0x0403 0x6011 -ftdi_channel 0 +ftdi vid_pid 0x0403 0x6011 +ftdi channel 0 -ftdi_layout_init 0x00f8 0x000b +ftdi layout_init 0x00f8 0x000b -ftdi_layout_signal RESET_B -data 0x0010 -oe 0x0010 +ftdi layout_signal RESET_B -data 0x0010 -oe 0x0010 # Called SYS_nRST in schematics -ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 -ftdi_layout_signal IO_nRST -data 0x0040 -oe 0x0040 -ftdi_layout_signal ONOFF_B -data 0x0080 -oe 0x0080 +ftdi layout_signal nSRST -data 0x0020 -oe 0x0020 +ftdi layout_signal IO_nRST -data 0x0040 -oe 0x0040 +ftdi layout_signal ONOFF_B -data 0x0080 -oe 0x0080 -ftdi_layout_signal GPIO1 -data 0x0100 -oe 0x0100 -ftdi_layout_signal GPIO2 -data 0x0200 -oe 0x0200 -ftdi_layout_signal GPIO3 -data 0x0400 -oe 0x0400 -ftdi_layout_signal GPIO4 -data 0x0800 -oe 0x0800 +ftdi layout_signal GPIO1 -data 0x0100 -oe 0x0100 +ftdi layout_signal GPIO2 -data 0x0200 -oe 0x0200 +ftdi layout_signal GPIO3 -data 0x0400 -oe 0x0400 +ftdi layout_signal GPIO4 -data 0x0800 -oe 0x0800 diff --git a/tcl/interface/ftdi/incircuit-icprog.cfg b/tcl/interface/ftdi/incircuit-icprog.cfg index e0bd5ef59..a20095446 100644 --- a/tcl/interface/ftdi/incircuit-icprog.cfg +++ b/tcl/interface/ftdi/incircuit-icprog.cfg @@ -7,8 +7,8 @@ # adapter driver ftdi -ftdi_vid_pid 0x0403 0x6010 +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0508 0x0f1b -ftdi_layout_signal nSRST -noe 0x0400 -data 0x0800 -ftdi_layout_signal nTRST -noe 0x0100 -data 0x0200 +ftdi layout_init 0x0508 0x0f1b +ftdi layout_signal nSRST -noe 0x0400 -data 0x0800 +ftdi layout_signal nTRST -noe 0x0100 -data 0x0200 diff --git a/tcl/interface/ftdi/iotlab-usb.cfg b/tcl/interface/ftdi/iotlab-usb.cfg index caa0596fd..92ffa840b 100644 --- a/tcl/interface/ftdi/iotlab-usb.cfg +++ b/tcl/interface/ftdi/iotlab-usb.cfg @@ -4,8 +4,8 @@ # adapter driver ftdi -ftdi_vid_pid 0x0403 0x6010 +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0008 0x000b -ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 +ftdi layout_init 0x0008 0x000b +ftdi layout_signal nTRST -data 0x0010 -oe 0x0010 +ftdi layout_signal nSRST -data 0x0040 -oe 0x0040 diff --git a/tcl/interface/ftdi/isodebug.cfg b/tcl/interface/ftdi/isodebug.cfg index ead28644c..018998963 100644 --- a/tcl/interface/ftdi/isodebug.cfg +++ b/tcl/interface/ftdi/isodebug.cfg @@ -2,26 +2,26 @@ # 5 kV isolated JTAG/SWD + UART adapter by Unjo AB adapter driver ftdi -ftdi_vid_pid 0x22b7 0x150d +ftdi vid_pid 0x22b7 0x150d -ftdi_layout_init 0x0ff8 0xfffb +ftdi layout_init 0x0ff8 0xfffb -ftdi_layout_signal LED -ndata 0x0100 -ftdi_layout_signal nTRST -data 0x0200 -ftdi_layout_signal nSRST -noe 0x0400 -ftdi_layout_signal SWDIO_OE -data 0x0008 +ftdi layout_signal LED -ndata 0x0100 +ftdi layout_signal nTRST -data 0x0200 +ftdi layout_signal nSRST -noe 0x0400 +ftdi layout_signal SWDIO_OE -data 0x0008 # Mode signals, either of these needs to be high to drive the JTAG/SWD pins. # The power-on state is low for both signals but the init setting above sets # JTAG_EN high. -ftdi_layout_signal SWD_EN -data 0x1000 -ftdi_layout_signal JTAG_EN -data 0x0800 +ftdi layout_signal SWD_EN -data 0x1000 +ftdi layout_signal JTAG_EN -data 0x0800 # In SWD mode, the JTAG_EN signal doubles as SWO_EN_N which switches the # second FTDI channel UART RxD to the SWO pin instead of the separate RxD # pin. Note that the default init state has this pin high so when OpenOCD # starts in SWD mode, SWO is by default disabled. To enable SWO tracing, -# issue the command 'ftdi_set_signal SWO_EN 1' where tracing is configured. +# issue the command 'ftdi set_signal SWO_EN 1' where tracing is configured. # To switch back to using the separate UART, SWO_EN needs to be disabled # before exiting OpenOCD, or the adapter replugged. -ftdi_layout_signal SWO_EN -nalias JTAG_EN +ftdi layout_signal SWO_EN -nalias JTAG_EN diff --git a/tcl/interface/ftdi/jtag-lock-pick_tiny_2.cfg b/tcl/interface/ftdi/jtag-lock-pick_tiny_2.cfg index 82eeaa7b5..3eefecf83 100644 --- a/tcl/interface/ftdi/jtag-lock-pick_tiny_2.cfg +++ b/tcl/interface/ftdi/jtag-lock-pick_tiny_2.cfg @@ -5,12 +5,12 @@ # adapter driver ftdi -ftdi_device_desc "JTAG-lock-pick Tiny 2" -ftdi_vid_pid 0x0403 0x8220 +ftdi device_desc "JTAG-lock-pick Tiny 2" +ftdi vid_pid 0x0403 0x8220 -ftdi_layout_init 0x8c28 0xff3b -ftdi_layout_signal SWD_EN -ndata 0x0020 -oe 0x2000 -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 -ftdi_layout_signal SWDIO_OE -ndata 0x1000 -ftdi_layout_signal LED -ndata 0x8000 +ftdi layout_init 0x8c28 0xff3b +ftdi layout_signal SWD_EN -ndata 0x0020 -oe 0x2000 +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_signal SWDIO_OE -ndata 0x1000 +ftdi layout_signal LED -ndata 0x8000 diff --git a/tcl/interface/ftdi/jtagkey.cfg b/tcl/interface/ftdi/jtagkey.cfg index 06463ab91..511244b3f 100644 --- a/tcl/interface/ftdi/jtagkey.cfg +++ b/tcl/interface/ftdi/jtagkey.cfg @@ -5,9 +5,9 @@ # adapter driver ftdi -ftdi_device_desc "Amontec JTAGkey" -ftdi_vid_pid 0x0403 0xcff8 +ftdi device_desc "Amontec JTAGkey" +ftdi vid_pid 0x0403 0xcff8 -ftdi_layout_init 0x0c08 0x0f1b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_init 0x0c08 0x0f1b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 diff --git a/tcl/interface/ftdi/jtagkey2.cfg b/tcl/interface/ftdi/jtagkey2.cfg index ba151d3b5..aa33a7528 100644 --- a/tcl/interface/ftdi/jtagkey2.cfg +++ b/tcl/interface/ftdi/jtagkey2.cfg @@ -5,9 +5,9 @@ # adapter driver ftdi -ftdi_device_desc "Amontec JTAGkey-2" -ftdi_vid_pid 0x0403 0xcff8 +ftdi device_desc "Amontec JTAGkey-2" +ftdi vid_pid 0x0403 0xcff8 -ftdi_layout_init 0x0c08 0x0f1b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_init 0x0c08 0x0f1b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 diff --git a/tcl/interface/ftdi/jtagkey2p.cfg b/tcl/interface/ftdi/jtagkey2p.cfg index acb5047e9..dbfca66c4 100644 --- a/tcl/interface/ftdi/jtagkey2p.cfg +++ b/tcl/interface/ftdi/jtagkey2p.cfg @@ -5,9 +5,9 @@ # adapter driver ftdi -ftdi_device_desc "Amontec JTAGkey-2P" -ftdi_vid_pid 0x0403 0xcff8 +ftdi device_desc "Amontec JTAGkey-2P" +ftdi vid_pid 0x0403 0xcff8 -ftdi_layout_init 0x0c08 0x0f1b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_init 0x0c08 0x0f1b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 diff --git a/tcl/interface/ftdi/kt-link.cfg b/tcl/interface/ftdi/kt-link.cfg index 5fc5db9d0..112ecf154 100644 --- a/tcl/interface/ftdi/kt-link.cfg +++ b/tcl/interface/ftdi/kt-link.cfg @@ -5,12 +5,12 @@ # adapter driver ftdi -ftdi_device_desc "KT-LINK" -ftdi_vid_pid 0x0403 0xbbe2 +ftdi device_desc "KT-LINK" +ftdi vid_pid 0x0403 0xbbe2 -ftdi_layout_init 0x8c28 0xff3b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 -ftdi_layout_signal LED -data 0x8000 -ftdi_layout_signal SWD_EN -ndata 0x0020 -oe 0x2000 -ftdi_layout_signal SWDIO_OE -ndata 0x1000 +ftdi layout_init 0x8c28 0xff3b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_signal LED -data 0x8000 +ftdi layout_signal SWD_EN -ndata 0x0020 -oe 0x2000 +ftdi layout_signal SWDIO_OE -ndata 0x1000 diff --git a/tcl/interface/ftdi/lambdaconcept_ecpix-5.cfg b/tcl/interface/ftdi/lambdaconcept_ecpix-5.cfg new file mode 100644 index 000000000..b61caff64 --- /dev/null +++ b/tcl/interface/ftdi/lambdaconcept_ecpix-5.cfg @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# This adapter is integrated in to LambdaConcept ECPIX-5 board: +# interface/ftdi/lambdaconcept_ecpix-5.cfg +# See schematics for the ftdi layout: +# http://docs.lambdaconcept.com/ecpix-5/_static/resources/SCH_ECPIX-5_R02.PDF + +adapter driver ftdi +adapter speed 10000 +ftdi_device_desc "Dual RS232-HS" +ftdi_vid_pid 0x0403 0x6010 + +ftdi_layout_init 0xfff8 0xfffb +transport select jtag diff --git a/tcl/interface/ftdi/lisa-l.cfg b/tcl/interface/ftdi/lisa-l.cfg index 4e52f7b7e..3da64a00e 100644 --- a/tcl/interface/ftdi/lisa-l.cfg +++ b/tcl/interface/ftdi/lisa-l.cfg @@ -10,11 +10,11 @@ echo "in ft2232.c. Please report your experience with this file to openocd-devel echo "mailing list, so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "Lisa/L" -ftdi_vid_pid 0x0403 0x6010 -ftdi_channel 1 +ftdi device_desc "Lisa/L" +ftdi vid_pid 0x0403 0x6010 +ftdi channel 1 -ftdi_layout_init 0x0008 0x180b -ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 -ftdi_layout_signal LED -data 0x1800 +ftdi layout_init 0x0008 0x180b +ftdi layout_signal nTRST -data 0x0010 -oe 0x0010 +ftdi layout_signal nSRST -data 0x0040 -oe 0x0040 +ftdi layout_signal LED -data 0x1800 diff --git a/tcl/interface/ftdi/luminary-icdi.cfg b/tcl/interface/ftdi/luminary-icdi.cfg index 8bc783e92..08676a348 100644 --- a/tcl/interface/ftdi/luminary-icdi.cfg +++ b/tcl/interface/ftdi/luminary-icdi.cfg @@ -16,10 +16,10 @@ # adapter driver ftdi -ftdi_device_desc "Luminary Micro ICDI Board" -ftdi_vid_pid 0x0403 0xbcda +ftdi device_desc "Luminary Micro ICDI Board" +ftdi vid_pid 0x0403 0xbcda -ftdi_layout_init 0x00a8 0x00eb -ftdi_layout_signal nSRST -noe 0x0020 -ftdi_layout_signal SWD_EN -ndata 0x0080 -ftdi_layout_signal SWDIO_OE -data 0x0008 +ftdi layout_init 0x00a8 0x00eb +ftdi layout_signal nSRST -noe 0x0020 +ftdi layout_signal SWD_EN -ndata 0x0080 +ftdi layout_signal SWDIO_OE -data 0x0008 diff --git a/tcl/interface/ftdi/luminary-lm3s811.cfg b/tcl/interface/ftdi/luminary-lm3s811.cfg index aac915e34..90f454ef0 100644 --- a/tcl/interface/ftdi/luminary-lm3s811.cfg +++ b/tcl/interface/ftdi/luminary-lm3s811.cfg @@ -12,10 +12,10 @@ # adapter driver ftdi -ftdi_device_desc "LM3S811 Evaluation Board" -ftdi_vid_pid 0x0403 0xbcd9 +ftdi device_desc "LM3S811 Evaluation Board" +ftdi vid_pid 0x0403 0xbcd9 -ftdi_layout_init 0x0088 0x008b -ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 -ftdi_layout_signal SWD_EN -ndata 0x0080 -ftdi_layout_signal SWDIO_OE -data 0x0008 +ftdi layout_init 0x0088 0x008b +ftdi layout_signal nSRST -data 0x0020 -oe 0x0020 +ftdi layout_signal SWD_EN -ndata 0x0080 +ftdi layout_signal SWDIO_OE -data 0x0008 diff --git a/tcl/interface/ftdi/luminary.cfg b/tcl/interface/ftdi/luminary.cfg index 5e34f8cea..3258b214c 100644 --- a/tcl/interface/ftdi/luminary.cfg +++ b/tcl/interface/ftdi/luminary.cfg @@ -25,10 +25,10 @@ # adapter driver ftdi -ftdi_device_desc "Stellaris Evaluation Board" -ftdi_vid_pid 0x0403 0xbcd9 +ftdi device_desc "Stellaris Evaluation Board" +ftdi vid_pid 0x0403 0xbcd9 -ftdi_layout_init 0x00a8 0x00eb -ftdi_layout_signal nSRST -noe 0x0020 -ftdi_layout_signal SWD_EN -ndata 0x0080 -ftdi_layout_signal SWDIO_OE -data 0x0008 +ftdi layout_init 0x00a8 0x00eb +ftdi layout_signal nSRST -noe 0x0020 +ftdi layout_signal SWD_EN -ndata 0x0080 +ftdi layout_signal SWDIO_OE -data 0x0008 diff --git a/tcl/interface/ftdi/m53evk.cfg b/tcl/interface/ftdi/m53evk.cfg index 6597f2d30..2b7c43445 100644 --- a/tcl/interface/ftdi/m53evk.cfg +++ b/tcl/interface/ftdi/m53evk.cfg @@ -5,10 +5,10 @@ # adapter driver ftdi -ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 -ftdi_channel 0 -ftdi_layout_init 0x0008 0x000b -ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 +ftdi channel 0 +ftdi layout_init 0x0008 0x000b +ftdi layout_signal nTRST -data 0x0010 -oe 0x0010 +ftdi layout_signal nSRST -data 0x0020 -oe 0x0020 diff --git a/tcl/interface/ftdi/mbftdi.cfg b/tcl/interface/ftdi/mbftdi.cfg index c0ff86574..a34390ba7 100644 --- a/tcl/interface/ftdi/mbftdi.cfg +++ b/tcl/interface/ftdi/mbftdi.cfg @@ -10,7 +10,7 @@ # adapter driver ftdi -ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0008 0x000b +ftdi layout_init 0x0008 0x000b diff --git a/tcl/interface/ftdi/minimodule-swd.cfg b/tcl/interface/ftdi/minimodule-swd.cfg index 4bc331edb..15b007afb 100644 --- a/tcl/interface/ftdi/minimodule-swd.cfg +++ b/tcl/interface/ftdi/minimodule-swd.cfg @@ -38,17 +38,17 @@ adapter driver ftdi #Select your module type and channel -#ftdi_device_desc "FT2232H MiniModule" -ftdi_vid_pid 0x0403 0x6010 -#ftdi_channel 1 +#ftdi device_desc "FT2232H MiniModule" +ftdi vid_pid 0x0403 0x6010 +#ftdi channel 1 -#ftdi_device_desc "FT4232H MiniModule" -#ftdi_vid_pid 0x0403 0x6011 -#ftdi_channel 1 +#ftdi device_desc "FT4232H MiniModule" +#ftdi vid_pid 0x0403 0x6011 +#ftdi channel 1 -ftdi_layout_init 0x0000 0x000b -ftdi_layout_signal nSRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal SWD_EN -data 0 -ftdi_layout_signal SWDIO_OE -data 0 +ftdi layout_init 0x0000 0x000b +ftdi layout_signal nSRST -data 0x0010 -oe 0x0010 +ftdi layout_signal SWD_EN -data 0 +ftdi layout_signal SWDIO_OE -data 0 transport select swd diff --git a/tcl/interface/ftdi/minimodule.cfg b/tcl/interface/ftdi/minimodule.cfg index 5dcce1fcf..6b2d60c07 100644 --- a/tcl/interface/ftdi/minimodule.cfg +++ b/tcl/interface/ftdi/minimodule.cfg @@ -5,12 +5,12 @@ # adapter driver ftdi -ftdi_device_desc "FT2232H MiniModule" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "FT2232H MiniModule" +ftdi vid_pid 0x0403 0x6010 # Every pin set as high impedance except TCK, TDI, TDO and TMS -ftdi_layout_init 0x0008 0x000b +ftdi layout_init 0x0008 0x000b # nSRST defined on pin CN2-13 of the MiniModule (pin ADBUS5 [AD5] on the FT2232H chip) # This choice is arbitrary. Use other GPIO pin if desired. -ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 +ftdi layout_signal nSRST -data 0x0020 -oe 0x0020 diff --git a/tcl/interface/ftdi/minispartan6.cfg b/tcl/interface/ftdi/minispartan6.cfg index 97a6abe04..faf820d7a 100644 --- a/tcl/interface/ftdi/minispartan6.cfg +++ b/tcl/interface/ftdi/minispartan6.cfg @@ -3,12 +3,12 @@ adapter driver ftdi # The miniSpartan6+ sadly doesn't have a custom device description, so we just # have to hope you got it right. -#ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 +#ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 # interface 1 is the uart -ftdi_channel 0 +ftdi channel 0 # just TCK TDI TDO TMS, no reset -ftdi_layout_init 0x0008 0x000b +ftdi layout_init 0x0008 0x000b reset_config none # this generally works fast: the fpga can handle 30MHz, the spi flash can handle # 54MHz with simple read, no dummy cycles, and wait-for-write-completion diff --git a/tcl/interface/ftdi/miniwiggler.cfg b/tcl/interface/ftdi/miniwiggler.cfg index 6e53daede..ebaa97920 100644 --- a/tcl/interface/ftdi/miniwiggler.cfg +++ b/tcl/interface/ftdi/miniwiggler.cfg @@ -25,10 +25,10 @@ # adapter driver ftdi -ftdi_device_desc "DAS JDS miniWiggler V3.1" -ftdi_vid_pid 0x058b 0x0043 +ftdi device_desc "DAS JDS miniWiggler V3.1" +ftdi vid_pid 0x058b 0x0043 -ftdi_channel 0 -ftdi_layout_init 0x0008 0x001b -ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 -ftdi_layout_signal nSRST -data 0x0200 -oe 0x0200 +ftdi channel 0 +ftdi layout_init 0x0008 0x001b +ftdi layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi layout_signal nSRST -data 0x0200 -oe 0x0200 diff --git a/tcl/interface/ftdi/neodb.cfg b/tcl/interface/ftdi/neodb.cfg index 1cfb3526c..426f5c4c7 100644 --- a/tcl/interface/ftdi/neodb.cfg +++ b/tcl/interface/ftdi/neodb.cfg @@ -5,10 +5,10 @@ # adapter driver ftdi -ftdi_device_desc "Debug Board for Neo1973" -ftdi_vid_pid 0x1457 0x5118 +ftdi device_desc "Debug Board for Neo1973" +ftdi vid_pid 0x1457 0x5118 -ftdi_layout_init 0x0508 0x0f1b -ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 -ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 -ftdi_layout_signal nNOR_WP -data 0x0010 -oe 0x0010 +ftdi layout_init 0x0508 0x0f1b +ftdi layout_signal nTRST -data 0x0200 -noe 0x0100 +ftdi layout_signal nSRST -data 0x0800 -noe 0x0400 +ftdi layout_signal nNOR_WP -data 0x0010 -oe 0x0010 diff --git a/tcl/interface/ftdi/ngxtech.cfg b/tcl/interface/ftdi/ngxtech.cfg index 3aa79ab31..962f25baa 100644 --- a/tcl/interface/ftdi/ngxtech.cfg +++ b/tcl/interface/ftdi/ngxtech.cfg @@ -11,9 +11,9 @@ echo "experience with this file to openocd-devel mailing list, so it could be ma echo "as working or fixed." adapter driver ftdi -ftdi_device_desc "NGX JTAG" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "NGX JTAG" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0508 0x0f1b -ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 -ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 +ftdi layout_init 0x0508 0x0f1b +ftdi layout_signal nTRST -data 0x0200 -noe 0x0100 +ftdi layout_signal nSRST -data 0x0800 -noe 0x0400 diff --git a/tcl/interface/ftdi/olimex-arm-jtag-swd.cfg b/tcl/interface/ftdi/olimex-arm-jtag-swd.cfg index 2153fd65f..ace0df98d 100644 --- a/tcl/interface/ftdi/olimex-arm-jtag-swd.cfg +++ b/tcl/interface/ftdi/olimex-arm-jtag-swd.cfg @@ -5,5 +5,5 @@ transport select swd -ftdi_layout_signal SWD_EN -nalias nTRST -ftdi_layout_signal SWDIO_OE -alias TMS +ftdi layout_signal SWD_EN -nalias nTRST +ftdi layout_signal SWDIO_OE -alias TMS diff --git a/tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg b/tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg index c8e3befb7..ca014a4d4 100644 --- a/tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg +++ b/tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg @@ -5,10 +5,10 @@ # adapter driver ftdi -ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-OCD-H" -ftdi_vid_pid 0x15ba 0x002b +ftdi device_desc "Olimex OpenOCD JTAG ARM-USB-OCD-H" +ftdi vid_pid 0x15ba 0x002b -ftdi_layout_init 0x0908 0x0b1b -ftdi_layout_signal nSRST -oe 0x0200 -ftdi_layout_signal nTRST -data 0x0100 -ftdi_layout_signal LED -data 0x0800 +ftdi layout_init 0x0908 0x0b1b +ftdi layout_signal nSRST -oe 0x0200 +ftdi layout_signal nTRST -data 0x0100 +ftdi layout_signal LED -data 0x0800 diff --git a/tcl/interface/ftdi/olimex-arm-usb-ocd.cfg b/tcl/interface/ftdi/olimex-arm-usb-ocd.cfg index f9126d40d..6b9257583 100644 --- a/tcl/interface/ftdi/olimex-arm-usb-ocd.cfg +++ b/tcl/interface/ftdi/olimex-arm-usb-ocd.cfg @@ -5,10 +5,10 @@ # adapter driver ftdi -ftdi_device_desc "Olimex OpenOCD JTAG" -ftdi_vid_pid 0x15ba 0x0003 +ftdi device_desc "Olimex OpenOCD JTAG" +ftdi vid_pid 0x15ba 0x0003 -ftdi_layout_init 0x0c08 0x0f1b -ftdi_layout_signal nSRST -oe 0x0200 -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal LED -data 0x0800 +ftdi layout_init 0x0c08 0x0f1b +ftdi layout_signal nSRST -oe 0x0200 +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal LED -data 0x0800 diff --git a/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg b/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg index eac25b6da..98fe36784 100644 --- a/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg +++ b/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg @@ -5,10 +5,10 @@ # adapter driver ftdi -ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" -ftdi_vid_pid 0x15ba 0x002a +ftdi device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" +ftdi vid_pid 0x15ba 0x002a -ftdi_layout_init 0x0808 0x0a1b -ftdi_layout_signal nSRST -oe 0x0200 -ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 -ftdi_layout_signal LED -data 0x0800 +ftdi layout_init 0x0808 0x0a1b +ftdi layout_signal nSRST -oe 0x0200 +ftdi layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi layout_signal LED -data 0x0800 diff --git a/tcl/interface/ftdi/olimex-jtag-tiny.cfg b/tcl/interface/ftdi/olimex-jtag-tiny.cfg index 4811f4dda..ebca496d2 100644 --- a/tcl/interface/ftdi/olimex-jtag-tiny.cfg +++ b/tcl/interface/ftdi/olimex-jtag-tiny.cfg @@ -5,10 +5,10 @@ # adapter driver ftdi -ftdi_device_desc "Olimex OpenOCD JTAG TINY" -ftdi_vid_pid 0x15ba 0x0004 +ftdi device_desc "Olimex OpenOCD JTAG TINY" +ftdi vid_pid 0x15ba 0x0004 -ftdi_layout_init 0x0808 0x0a1b -ftdi_layout_signal nSRST -oe 0x0200 -ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 -ftdi_layout_signal LED -data 0x0800 +ftdi layout_init 0x0808 0x0a1b +ftdi layout_signal nSRST -oe 0x0200 +ftdi layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi layout_signal LED -data 0x0800 diff --git a/tcl/interface/ftdi/oocdlink.cfg b/tcl/interface/ftdi/oocdlink.cfg index deba4a504..367112a6c 100644 --- a/tcl/interface/ftdi/oocdlink.cfg +++ b/tcl/interface/ftdi/oocdlink.cfg @@ -11,9 +11,9 @@ echo "experience with this file to openocd-devel mailing list, so it could be ma echo "as working or fixed." adapter driver ftdi -ftdi_device_desc "OOCDLink" -ftdi_vid_pid 0x0403 0xbaf8 +ftdi device_desc "OOCDLink" +ftdi vid_pid 0x0403 0xbaf8 -ftdi_layout_init 0x0508 0x0f1b -ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 -ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 +ftdi layout_init 0x0508 0x0f1b +ftdi layout_signal nTRST -data 0x0200 -noe 0x0100 +ftdi layout_signal nSRST -data 0x0800 -noe 0x0400 diff --git a/tcl/interface/ftdi/opendous_ftdi.cfg b/tcl/interface/ftdi/opendous_ftdi.cfg index 50f32fb3a..f212bf561 100644 --- a/tcl/interface/ftdi/opendous_ftdi.cfg +++ b/tcl/interface/ftdi/opendous_ftdi.cfg @@ -8,10 +8,10 @@ # adapter driver ftdi -ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 -ftdi_channel 1 +ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 +ftdi channel 1 -ftdi_layout_init 0x0c08 0x0f1b -ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 -ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +ftdi layout_init 0x0c08 0x0f1b +ftdi layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi layout_signal nSRST -data 0x0200 -noe 0x0800 diff --git a/tcl/interface/ftdi/openocd-usb-hs.cfg b/tcl/interface/ftdi/openocd-usb-hs.cfg index 6f67689f6..d1a3ff0a2 100644 --- a/tcl/interface/ftdi/openocd-usb-hs.cfg +++ b/tcl/interface/ftdi/openocd-usb-hs.cfg @@ -5,9 +5,9 @@ # adapter driver ftdi -ftdi_device_desc "Dual RS232-HS" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Dual RS232-HS" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0508 0x0f1b -ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 -ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 +ftdi layout_init 0x0508 0x0f1b +ftdi layout_signal nTRST -data 0x0200 -noe 0x0100 +ftdi layout_signal nSRST -data 0x0800 -noe 0x0400 diff --git a/tcl/interface/ftdi/openocd-usb.cfg b/tcl/interface/ftdi/openocd-usb.cfg index ed80a05d9..620d20436 100644 --- a/tcl/interface/ftdi/openocd-usb.cfg +++ b/tcl/interface/ftdi/openocd-usb.cfg @@ -5,9 +5,9 @@ # adapter driver ftdi -ftdi_device_desc "Dual RS232" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Dual RS232" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0508 0x0f1b -ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 -ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 +ftdi layout_init 0x0508 0x0f1b +ftdi layout_signal nTRST -data 0x0200 -noe 0x0100 +ftdi layout_signal nSRST -data 0x0800 -noe 0x0400 diff --git a/tcl/interface/ftdi/openrd.cfg b/tcl/interface/ftdi/openrd.cfg index 535c5e896..88b2a6e51 100644 --- a/tcl/interface/ftdi/openrd.cfg +++ b/tcl/interface/ftdi/openrd.cfg @@ -5,10 +5,10 @@ # adapter driver ftdi -ftdi_device_desc "OpenRD JTAGKey FT2232D B" -ftdi_vid_pid 0x0403 0x9e90 -ftdi_channel 0 +ftdi device_desc "OpenRD JTAGKey FT2232D B" +ftdi vid_pid 0x0403 0x9e90 +ftdi channel 0 -ftdi_layout_init 0x0608 0x0f1b -ftdi_layout_signal nTRST -data 0x0200 -ftdi_layout_signal nSRST -noe 0x0400 +ftdi layout_init 0x0608 0x0f1b +ftdi layout_signal nTRST -data 0x0200 +ftdi layout_signal nSRST -noe 0x0400 diff --git a/tcl/interface/ftdi/pipistrello.cfg b/tcl/interface/ftdi/pipistrello.cfg index 2074924a3..11fcf077c 100644 --- a/tcl/interface/ftdi/pipistrello.cfg +++ b/tcl/interface/ftdi/pipistrello.cfg @@ -1,12 +1,12 @@ # http://pipistrello.saanlima.com/ # http://www.saanlima.com/download/pipistrello-v2.0/pipistrello_v2_schematic.pdf adapter driver ftdi -ftdi_device_desc "Pipistrello LX45" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "Pipistrello LX45" +ftdi vid_pid 0x0403 0x6010 # interface 1 is the uart -ftdi_channel 0 +ftdi channel 0 # just TCK TDI TDO TMS, no reset -ftdi_layout_init 0x0008 0x000b +ftdi layout_init 0x0008 0x000b reset_config none # this generally works fast: the fpga can handle 30MHz, the spi flash can handle # 54MHz with simple read, no dummy cycles, and wait-for-write-completion diff --git a/tcl/interface/ftdi/pls_spc5.cfg b/tcl/interface/ftdi/pls_spc5.cfg index 806f920fe..3b3c2d647 100644 --- a/tcl/interface/ftdi/pls_spc5.cfg +++ b/tcl/interface/ftdi/pls_spc5.cfg @@ -27,10 +27,10 @@ # adapter driver ftdi -ftdi_device_desc "PLS USB/JTAG Adapter for SPC5xxx" -ftdi_vid_pid 0x263d 0x4001 +ftdi device_desc "PLS USB/JTAG Adapter for SPC5xxx" +ftdi vid_pid 0x263d 0x4001 -ftdi_channel 0 -ftdi_layout_init 0x0008 0x000b -ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 -ftdi_layout_signal nSRST -ndata 0x2000 -oe 0x2000 +ftdi channel 0 +ftdi layout_init 0x0008 0x000b +ftdi layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi layout_signal nSRST -ndata 0x2000 -oe 0x2000 diff --git a/tcl/interface/ftdi/redbee-econotag.cfg b/tcl/interface/ftdi/redbee-econotag.cfg index b6f6d23ba..35bedfa7e 100644 --- a/tcl/interface/ftdi/redbee-econotag.cfg +++ b/tcl/interface/ftdi/redbee-econotag.cfg @@ -14,8 +14,8 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_vid_pid 0x0403 0x6010 +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0c08 0x0c2b -ftdi_layout_signal nTRST -data 0x0800 -ftdi_layout_signal nSRST -data 0x0400 +ftdi layout_init 0x0c08 0x0c2b +ftdi layout_signal nTRST -data 0x0800 +ftdi layout_signal nSRST -data 0x0400 diff --git a/tcl/interface/ftdi/redbee-usb.cfg b/tcl/interface/ftdi/redbee-usb.cfg index 52ab93e02..a57176610 100644 --- a/tcl/interface/ftdi/redbee-usb.cfg +++ b/tcl/interface/ftdi/redbee-usb.cfg @@ -14,9 +14,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_vid_pid 0x0403 0x6010 -ftdi_channel 1 +ftdi vid_pid 0x0403 0x6010 +ftdi channel 1 -ftdi_layout_init 0x0c08 0x0c2b -ftdi_layout_signal nTRST -data 0x0800 -ftdi_layout_signal nSRST -data 0x0400 +ftdi layout_init 0x0c08 0x0c2b +ftdi layout_signal nTRST -data 0x0800 +ftdi layout_signal nSRST -data 0x0400 diff --git a/tcl/interface/ftdi/rowley-cc-arm-swd.cfg b/tcl/interface/ftdi/rowley-cc-arm-swd.cfg index 9a96dbd92..fb416db56 100644 --- a/tcl/interface/ftdi/rowley-cc-arm-swd.cfg +++ b/tcl/interface/ftdi/rowley-cc-arm-swd.cfg @@ -6,5 +6,5 @@ transport select swd -ftdi_layout_signal SWD_EN -nalias nTRST -ftdi_layout_signal SWDIO_OE -alias TMS +ftdi layout_signal SWD_EN -nalias nTRST +ftdi layout_signal SWDIO_OE -alias TMS diff --git a/tcl/interface/ftdi/sheevaplug.cfg b/tcl/interface/ftdi/sheevaplug.cfg index d4ec72e66..5929453c1 100644 --- a/tcl/interface/ftdi/sheevaplug.cfg +++ b/tcl/interface/ftdi/sheevaplug.cfg @@ -5,10 +5,10 @@ # adapter driver ftdi -ftdi_device_desc "SheevaPlug JTAGKey FT2232D B" -ftdi_vid_pid 0x9e88 0x9e8f -ftdi_channel 0 +ftdi device_desc "SheevaPlug JTAGKey FT2232D B" +ftdi vid_pid 0x9e88 0x9e8f +ftdi channel 0 -ftdi_layout_init 0x0608 0x0f1b -ftdi_layout_signal nTRST -data 0x0200 -ftdi_layout_signal nSRST -noe 0x0400 +ftdi layout_init 0x0608 0x0f1b +ftdi layout_signal nTRST -data 0x0200 -noe 0x0100 +ftdi layout_signal nSRST -data 0x0800 -noe 0x0400 diff --git a/tcl/interface/ftdi/signalyzer-lite.cfg b/tcl/interface/ftdi/signalyzer-lite.cfg index 477842005..9e010d394 100644 --- a/tcl/interface/ftdi/signalyzer-lite.cfg +++ b/tcl/interface/ftdi/signalyzer-lite.cfg @@ -10,9 +10,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "Signalyzer LITE" -ftdi_vid_pid 0x0403 0xbca1 +ftdi device_desc "Signalyzer LITE" +ftdi vid_pid 0x0403 0xbca1 -ftdi_layout_init 0x0008 0x000b -ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 +ftdi layout_init 0x0008 0x000b +ftdi layout_signal nTRST -data 0x0010 -oe 0x0010 +ftdi layout_signal nSRST -data 0x0020 -oe 0x0020 diff --git a/tcl/interface/ftdi/signalyzer.cfg b/tcl/interface/ftdi/signalyzer.cfg index 243929835..d94c6bc7f 100644 --- a/tcl/interface/ftdi/signalyzer.cfg +++ b/tcl/interface/ftdi/signalyzer.cfg @@ -10,9 +10,9 @@ echo "Please report your experience with this file to openocd-devel mailing list echo "so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "Signalyzer" -ftdi_vid_pid 0x0403 0xbca0 +ftdi device_desc "Signalyzer" +ftdi vid_pid 0x0403 0xbca0 -ftdi_layout_init 0x0008 0x000b -ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 -ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 +ftdi layout_init 0x0008 0x000b +ftdi layout_signal nTRST -data 0x0010 -oe 0x0010 +ftdi layout_signal nSRST -data 0x0020 -oe 0x0020 diff --git a/tcl/interface/ftdi/snps_sdp.cfg b/tcl/interface/ftdi/snps_sdp.cfg index 3aed2ae20..7bd8387b7 100644 --- a/tcl/interface/ftdi/snps_sdp.cfg +++ b/tcl/interface/ftdi/snps_sdp.cfg @@ -11,8 +11,8 @@ # adapter driver ftdi -ftdi_vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0088 0x008b -ftdi_channel 1 +ftdi vid_pid 0x0403 0x6010 +ftdi layout_init 0x0088 0x008b +ftdi channel 1 diff --git a/tcl/interface/ftdi/steppenprobe.cfg b/tcl/interface/ftdi/steppenprobe.cfg index 7b5b9a034..f84efe61e 100644 --- a/tcl/interface/ftdi/steppenprobe.cfg +++ b/tcl/interface/ftdi/steppenprobe.cfg @@ -6,10 +6,10 @@ # adapter driver ftdi -ftdi_vid_pid 0x0403 0x6010 +ftdi vid_pid 0x0403 0x6010 # Initial Layout -ftdi_layout_init 0x0058 0x99fb +ftdi layout_init 0x0058 0x99fb # Signal Data Direction Notes # TCK 0 1 (out) # TDI 0 1 (out) @@ -30,12 +30,12 @@ ftdi_layout_init 0x0058 0x99fb # Unused 0 1 (out) # Signals definition -ftdi_layout_signal LED -ndata 0x0010 -ftdi_layout_signal SWD_EN -data 0x0020 -ftdi_layout_signal SWDIO_OE -ndata 0x0040 -ftdi_layout_signal nSRST -oe 0x0080 +ftdi layout_signal LED -ndata 0x0010 +ftdi layout_signal SWD_EN -data 0x0020 +ftdi layout_signal SWDIO_OE -ndata 0x0040 +ftdi layout_signal nSRST -oe 0x0080 -ftdi_layout_signal GPIO_A -data 0x0200 -oe 0x0200 -input 0x0200 -ftdi_layout_signal GPIO_B -data 0x0400 -oe 0x0400 -input 0x0400 -ftdi_layout_signal GPIO_C -data 0x2000 -oe 0x2000 -input 0x2000 -ftdi_layout_signal GPIO_D -data 0x4000 -oe 0x4000 -input 0x4000 +ftdi layout_signal GPIO_A -data 0x0200 -oe 0x0200 -input 0x0200 +ftdi layout_signal GPIO_B -data 0x0400 -oe 0x0400 -input 0x0400 +ftdi layout_signal GPIO_C -data 0x2000 -oe 0x2000 -input 0x2000 +ftdi layout_signal GPIO_D -data 0x4000 -oe 0x4000 -input 0x4000 diff --git a/tcl/interface/ftdi/stm32-stick.cfg b/tcl/interface/ftdi/stm32-stick.cfg index 7ae02bd80..fd877ec77 100644 --- a/tcl/interface/ftdi/stm32-stick.cfg +++ b/tcl/interface/ftdi/stm32-stick.cfg @@ -5,9 +5,9 @@ # adapter driver ftdi -ftdi_device_desc "STM32-PerformanceStick" -ftdi_vid_pid 0x0640 0x002d +ftdi device_desc "STM32-PerformanceStick" +ftdi vid_pid 0x0640 0x002d -ftdi_layout_init 0x0388 0x038b -ftdi_layout_signal nTRST -data 0x0100 -ftdi_layout_signal nSRST -data 0x0080 -noe 0x200 +ftdi layout_init 0x0388 0x038b +ftdi layout_signal nTRST -data 0x0100 +ftdi layout_signal nSRST -data 0x0080 -noe 0x200 diff --git a/tcl/interface/ftdi/swd-resistor-hack.cfg b/tcl/interface/ftdi/swd-resistor-hack.cfg index 26eb44c5f..5bdb87c18 100644 --- a/tcl/interface/ftdi/swd-resistor-hack.cfg +++ b/tcl/interface/ftdi/swd-resistor-hack.cfg @@ -23,4 +23,4 @@ transport select swd -ftdi_layout_signal SWD_EN -data 0 +ftdi layout_signal SWD_EN -data 0 diff --git a/tcl/interface/ftdi/ti-icdi.cfg b/tcl/interface/ftdi/ti-icdi.cfg index 55085eaee..f6e16be84 100644 --- a/tcl/interface/ftdi/ti-icdi.cfg +++ b/tcl/interface/ftdi/ti-icdi.cfg @@ -7,9 +7,9 @@ # adapter driver ftdi -ftdi_vid_pid 0x0451 0xc32a +ftdi vid_pid 0x0451 0xc32a -ftdi_layout_init 0x00a8 0x00eb -ftdi_layout_signal nSRST -noe 0x0020 -ftdi_layout_signal SWD_EN -ndata 0x0080 -ftdi_layout_signal SWDIO_OE -data 0x0008 +ftdi layout_init 0x00a8 0x00eb +ftdi layout_signal nSRST -noe 0x0020 +ftdi layout_signal SWD_EN -ndata 0x0080 +ftdi layout_signal SWDIO_OE -data 0x0008 diff --git a/tcl/interface/ftdi/tumpa-lite.cfg b/tcl/interface/ftdi/tumpa-lite.cfg index 7f576e91d..625db16b1 100644 --- a/tcl/interface/ftdi/tumpa-lite.cfg +++ b/tcl/interface/ftdi/tumpa-lite.cfg @@ -5,8 +5,8 @@ # adapter driver ftdi -ftdi_vid_pid 0x0403 0x8a99 +ftdi vid_pid 0x0403 0x8a99 -ftdi_layout_init 0x0038 0x087b -ftdi_layout_signal nTRST -data 0x0020 -oe 0x0020 -ftdi_layout_signal nSRST -data 0x0010 -oe 0x0010 +ftdi layout_init 0x0038 0x087b +ftdi layout_signal nTRST -data 0x0020 -oe 0x0020 +ftdi layout_signal nSRST -data 0x0010 -oe 0x0010 diff --git a/tcl/interface/ftdi/tumpa.cfg b/tcl/interface/ftdi/tumpa.cfg index 1a4e3cdfa..4491c40b7 100644 --- a/tcl/interface/ftdi/tumpa.cfg +++ b/tcl/interface/ftdi/tumpa.cfg @@ -5,10 +5,10 @@ # adapter driver ftdi -ftdi_vid_pid 0x0403 0x8a98 0x0403 0x6010 +ftdi vid_pid 0x0403 0x8a98 0x0403 0x6010 -ftdi_layout_init 0x0038 0x087b -ftdi_layout_signal nTRST -data 0x0020 -ftdi_layout_signal nSRST -data 0x0010 +ftdi layout_init 0x0038 0x087b +ftdi layout_signal nTRST -data 0x0020 +ftdi layout_signal nSRST -data 0x0010 reset_config srst_push_pull diff --git a/tcl/interface/ftdi/turtelizer2-revB.cfg b/tcl/interface/ftdi/turtelizer2-revB.cfg index 34ae86129..593a545a8 100644 --- a/tcl/interface/ftdi/turtelizer2-revB.cfg +++ b/tcl/interface/ftdi/turtelizer2-revB.cfg @@ -10,9 +10,9 @@ echo "in ft2232.c. Please report your experience with this file to openocd-devel echo "mailing list, so it could be marked as working or fixed." adapter driver ftdi -ftdi_device_desc "Turtelizer JTAG/RS232 Adapter" -ftdi_vid_pid 0x0403 0xbdc8 +ftdi device_desc "Turtelizer JTAG/RS232 Adapter" +ftdi vid_pid 0x0403 0xbdc8 -ftdi_layout_init 0x0008 0x0c5b -ftdi_layout_signal nSRST -oe 0x0040 -ftdi_layout_signal LED -data 0x0c00 +ftdi layout_init 0x0008 0x0c5b +ftdi layout_signal nSRST -oe 0x0040 +ftdi layout_signal LED -data 0x0c00 diff --git a/tcl/interface/ftdi/turtelizer2-revC.cfg b/tcl/interface/ftdi/turtelizer2-revC.cfg index f5192fb31..6e19259b9 100644 --- a/tcl/interface/ftdi/turtelizer2-revC.cfg +++ b/tcl/interface/ftdi/turtelizer2-revC.cfg @@ -5,10 +5,10 @@ # adapter driver ftdi -ftdi_device_desc "Turtelizer JTAG/RS232 Adapter" -ftdi_vid_pid 0x0403 0xbdc8 +ftdi device_desc "Turtelizer JTAG/RS232 Adapter" +ftdi vid_pid 0x0403 0xbdc8 -ftdi_layout_init 0x0008 0x0c7b -ftdi_layout_signal nTRST -oe 0x0020 -ftdi_layout_signal nSRST -oe 0x0040 -ftdi_layout_signal LED -ndata 0x0c00 +ftdi layout_init 0x0008 0x0c7b +ftdi layout_signal nTRST -oe 0x0020 +ftdi layout_signal nSRST -oe 0x0040 +ftdi layout_signal LED -ndata 0x0c00 diff --git a/tcl/interface/ftdi/um232h.cfg b/tcl/interface/ftdi/um232h.cfg index 2dabbec4a..10f267dd0 100644 --- a/tcl/interface/ftdi/um232h.cfg +++ b/tcl/interface/ftdi/um232h.cfg @@ -8,12 +8,12 @@ # adapter driver ftdi -#ftdi_device_desc "UM232H" -ftdi_vid_pid 0x0403 0x6014 +#ftdi device_desc "UM232H" +ftdi vid_pid 0x0403 0x6014 -ftdi_layout_init 0xfff8 0xfffb -ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 -ftdi_layout_signal nSRST -data 0x0200 -oe 0x0200 +ftdi layout_init 0xfff8 0xfffb +ftdi layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi layout_signal nSRST -data 0x0200 -oe 0x0200 # UM232H FT232H JTAG # Name Pin Name Func diff --git a/tcl/interface/ftdi/vpaclink.cfg b/tcl/interface/ftdi/vpaclink.cfg index ed4895a6b..7e7f25702 100644 --- a/tcl/interface/ftdi/vpaclink.cfg +++ b/tcl/interface/ftdi/vpaclink.cfg @@ -11,9 +11,9 @@ echo "experience with this file to openocd-devel mailing list, so it could be ma echo "as working or fixed." adapter driver ftdi -ftdi_device_desc "VPACLink" -ftdi_vid_pid 0x0403 0x6010 +ftdi device_desc "VPACLink" +ftdi vid_pid 0x0403 0x6010 -ftdi_layout_init 0x0508 0x0f1b -ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 -ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 +ftdi layout_init 0x0508 0x0f1b +ftdi layout_signal nTRST -data 0x0200 -noe 0x0100 +ftdi layout_signal nSRST -data 0x0800 -noe 0x0400 diff --git a/tcl/interface/ftdi/xds100v2.cfg b/tcl/interface/ftdi/xds100v2.cfg index 860a7585d..bda87811b 100644 --- a/tcl/interface/ftdi/xds100v2.cfg +++ b/tcl/interface/ftdi/xds100v2.cfg @@ -8,9 +8,9 @@ # adapter driver ftdi -ftdi_vid_pid 0x0403 0xa6d0 0x0403 0x6010 +ftdi vid_pid 0x0403 0xa6d0 0x0403 0x6010 -ftdi_layout_init 0x0038 0x597b +ftdi layout_init 0x0038 0x597b # 8000 z - unused # 4000 0 > CPLD loopback (all target side pins high-Z) @@ -45,14 +45,14 @@ ftdi_layout_init 0x0038 0x597b # changing the USB configuration to zero.) # -ftdi_layout_signal nTRST -data 0x0010 -ftdi_layout_signal nSRST -oe 0x0100 -ftdi_layout_signal EMU_EN -data 0x0020 -ftdi_layout_signal EMU0 -oe 0x0040 -ftdi_layout_signal EMU1 -oe 0x1000 -ftdi_layout_signal PWR_RST -data 0x0800 -ftdi_layout_signal LOOPBACK -data 0x4000 +ftdi layout_signal nTRST -data 0x0010 +ftdi layout_signal nSRST -oe 0x0100 +ftdi layout_signal EMU_EN -data 0x0020 +ftdi layout_signal EMU0 -oe 0x0040 +ftdi layout_signal EMU1 -oe 0x1000 +ftdi layout_signal PWR_RST -data 0x0800 +ftdi layout_signal LOOPBACK -data 0x4000 -echo "\nInfo : to use this adapter you MUST add ``init; ftdi_set_signal PWR_RST 1; jtag arp_init'' to the end of your config file!\n" +echo "\nInfo : to use this adapter you MUST add ``init; ftdi set_signal PWR_RST 1; jtag arp_init'' to the end of your config file!\n" # note: rising edge on PWR_RST is also needed after power-cycling the # target diff --git a/tcl/interface/ftdi/xds100v3.cfg b/tcl/interface/ftdi/xds100v3.cfg index 6c705823a..43a11bd35 100644 --- a/tcl/interface/ftdi/xds100v3.cfg +++ b/tcl/interface/ftdi/xds100v3.cfg @@ -8,4 +8,4 @@ source [find interface/ftdi/xds100v2.cfg] # The USB ids are different. -ftdi_vid_pid 0x0403 0xa6d1 +ftdi vid_pid 0x0403 0xa6d1 diff --git a/tcl/interface/jtag_dpi.cfg b/tcl/interface/jtag_dpi.cfg index e43386d58..a92e131a9 100644 --- a/tcl/interface/jtag_dpi.cfg +++ b/tcl/interface/jtag_dpi.cfg @@ -34,5 +34,5 @@ if { [info exists DPI_ADDRESS] } { set _DPI_ADDRESS "127.0.0.1" } -jtag_dpi_set_port $_DPI_PORT -jtag_dpi_set_address $_DPI_ADDRESS +jtag_dpi set_port $_DPI_PORT +jtag_dpi set_address $_DPI_ADDRESS diff --git a/tcl/interface/jtag_hat_rpi2.cfg b/tcl/interface/jtag_hat_rpi2.cfg new file mode 100644 index 000000000..495ff0f04 --- /dev/null +++ b/tcl/interface/jtag_hat_rpi2.cfg @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Blinkinlabs JTAG_Hat +# +# https://github.com/blinkinlabs/jtag_hat +# + +adapter driver bcm2835gpio + +bcm2835gpio_peripheral_base 0x3F000000 + +# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET +# These depend on system clock, calibrated for stock 700MHz +# bcm2835gpio_speed SPEED_COEFF SPEED_OFFSET +bcm2835gpio_speed_coeffs 146203 36 + +# Each of the JTAG lines need a gpio number set: tck tms tdi tdo +# Header pin numbers: 23 22 19 21 +bcm2835gpio_jtag_nums 11 25 10 9 + +# Each of the SWD lines need a gpio number set: swclk swdio +# Header pin numbers: 23 22 +bcm2835gpio_swd_nums 11 25 + +# Direction pin for SWDIO level shifting buffer +bcm2835gpio_swdio_dir_num 6 + +# If you define trst or srst, use appropriate reset_config +# Header pin numbers: TRST - 26, SRST - 18 + +bcm2835gpio_trst_num 7 +#reset_config trst_only + +bcm2835gpio_srst_num 24 +#reset_config srst_only + +# or if you have both connected +#reset_config trst_and_srst diff --git a/tcl/interface/jtag_vpi.cfg b/tcl/interface/jtag_vpi.cfg index e665a6331..f2f90f745 100644 --- a/tcl/interface/jtag_vpi.cfg +++ b/tcl/interface/jtag_vpi.cfg @@ -14,5 +14,5 @@ if { [info exists VPI_ADDRESS] } { set _VPI_ADDRESS "127.0.0.1" } -jtag_vpi_set_port $_VPI_PORT -jtag_vpi_set_address $_VPI_ADDRESS +jtag_vpi set_port $_VPI_PORT +jtag_vpi set_address $_VPI_ADDRESS diff --git a/tcl/interface/openjtag.cfg b/tcl/interface/openjtag.cfg index 9a5827b14..8d015b704 100644 --- a/tcl/interface/openjtag.cfg +++ b/tcl/interface/openjtag.cfg @@ -5,4 +5,4 @@ # adapter driver openjtag -openjtag_device_desc "Open JTAG Project" +openjtag device_desc "Open JTAG Project" diff --git a/tcl/interface/parport.cfg b/tcl/interface/parport.cfg index 4c0b260b9..05195f027 100644 --- a/tcl/interface/parport.cfg +++ b/tcl/interface/parport.cfg @@ -15,5 +15,5 @@ if { [info exists PARPORTADDR] } { } adapter driver parport -parport_port $_PARPORTADDR -parport_cable wiggler +parport port $_PARPORTADDR +parport cable wiggler diff --git a/tcl/interface/parport_dlc5.cfg b/tcl/interface/parport_dlc5.cfg index e9beaaf41..19e21ffda 100644 --- a/tcl/interface/parport_dlc5.cfg +++ b/tcl/interface/parport_dlc5.cfg @@ -11,5 +11,5 @@ if { [info exists PARPORTADDR] } { } adapter driver parport -parport_port $_PARPORTADDR -parport_cable dlc5 +parport port $_PARPORTADDR +parport cable dlc5 diff --git a/tcl/interface/raspberrypi-native.cfg b/tcl/interface/raspberrypi-native.cfg index 2d0547f31..634b8c95a 100644 --- a/tcl/interface/raspberrypi-native.cfg +++ b/tcl/interface/raspberrypi-native.cfg @@ -10,28 +10,28 @@ adapter driver bcm2835gpio -bcm2835gpio_peripheral_base 0x20000000 +bcm2835gpio peripheral_base 0x20000000 # Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET # These depend on system clock, calibrated for stock 700MHz -# bcm2835gpio_speed SPEED_COEFF SPEED_OFFSET -bcm2835gpio_speed_coeffs 113714 28 +# bcm2835gpio speed SPEED_COEFF SPEED_OFFSET +bcm2835gpio speed_coeffs 113714 28 # Each of the JTAG lines need a gpio number set: tck tms tdi tdo # Header pin numbers: 23 22 19 21 -bcm2835gpio_jtag_nums 11 25 10 9 +bcm2835gpio jtag_nums 11 25 10 9 # Each of the SWD lines need a gpio number set: swclk swdio # Header pin numbers: 23 22 -bcm2835gpio_swd_nums 11 25 +bcm2835gpio swd_nums 11 25 # If you define trst or srst, use appropriate reset_config # Header pin numbers: TRST - 26, SRST - 18 -# bcm2835gpio_trst_num 7 +# bcm2835gpio trst_num 7 # reset_config trst_only -# bcm2835gpio_srst_num 24 +# bcm2835gpio srst_num 24 # reset_config srst_only srst_push_pull # or if you have both connected, diff --git a/tcl/interface/raspberrypi2-native.cfg b/tcl/interface/raspberrypi2-native.cfg index e53b0f3b0..14c5771c4 100644 --- a/tcl/interface/raspberrypi2-native.cfg +++ b/tcl/interface/raspberrypi2-native.cfg @@ -10,28 +10,28 @@ adapter driver bcm2835gpio -bcm2835gpio_peripheral_base 0x3F000000 +bcm2835gpio peripheral_base 0x3F000000 # Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET # These depend on system clock, calibrated for stock 700MHz -# bcm2835gpio_speed SPEED_COEFF SPEED_OFFSET -bcm2835gpio_speed_coeffs 146203 36 +# bcm2835gpio speed SPEED_COEFF SPEED_OFFSET +bcm2835gpio speed_coeffs 146203 36 # Each of the JTAG lines need a gpio number set: tck tms tdi tdo # Header pin numbers: 23 22 19 21 -bcm2835gpio_jtag_nums 11 25 10 9 +bcm2835gpio jtag_nums 11 25 10 9 # Each of the SWD lines need a gpio number set: swclk swdio # Header pin numbers: 23 22 -bcm2835gpio_swd_nums 11 25 +bcm2835gpio swd_nums 11 25 # If you define trst or srst, use appropriate reset_config # Header pin numbers: TRST - 26, SRST - 18 -# bcm2835gpio_trst_num 7 +# bcm2835gpio trst_num 7 # reset_config trst_only -# bcm2835gpio_srst_num 24 +# bcm2835gpio srst_num 24 # reset_config srst_only srst_push_pull # or if you have both connected, diff --git a/tcl/interface/sysfsgpio-raspberrypi.cfg b/tcl/interface/sysfsgpio-raspberrypi.cfg index ebb150219..0030560ca 100644 --- a/tcl/interface/sysfsgpio-raspberrypi.cfg +++ b/tcl/interface/sysfsgpio-raspberrypi.cfg @@ -12,19 +12,19 @@ adapter driver sysfsgpio # Each of the JTAG lines need a gpio number set: tck tms tdi tdo # Header pin numbers: 23 22 19 21 -sysfsgpio_jtag_nums 11 25 10 9 +sysfsgpio jtag_nums 11 25 10 9 # Each of the SWD lines need a gpio number set: swclk swdio # Header pin numbers: 23 22 -sysfsgpio_swd_nums 11 25 +sysfsgpio swd_nums 11 25 # If you define trst or srst, use appropriate reset_config # Header pin numbers: TRST - 26, SRST - 18 -# sysfsgpio_trst_num 7 +# sysfsgpio trst_num 7 # reset_config trst_only -# sysfsgpio_srst_num 24 +# sysfsgpio srst_num 24 # reset_config srst_only srst_push_pull # or if you have both connected, diff --git a/tcl/interface/usb-jtag.cfg b/tcl/interface/usb-jtag.cfg index 8617c78c3..bbfb076d1 100644 --- a/tcl/interface/usb-jtag.cfg +++ b/tcl/interface/usb-jtag.cfg @@ -30,8 +30,8 @@ # driver but ixo-usb-jtag requires the ftdi driver. adapter driver usb_blaster -usb_blaster_vid_pid 0x16C0 0x06AD -usb_blaster_device_desc "Van Ooijen Technische Informatica" +usb_blaster vid_pid 0x16C0 0x06AD +usb_blaster device_desc "Van Ooijen Technische Informatica" # ixo-usb-jtag is only compatible with the ublast1 protocol implemented via the # ftdi modes, using ublast2 will cause openocd to hang. -usb_blaster_lowlevel_driver ftdi +usb_blaster lowlevel_driver ftdi diff --git a/tcl/target/at91sama5d2.cfg b/tcl/target/at91sama5d2.cfg new file mode 100644 index 000000000..65e5217e1 --- /dev/null +++ b/tcl/target/at91sama5d2.cfg @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# The JTAG connection is disabled at reset, and during the ROM Code execution. +# It is re-enabled when the ROM code jumps in the boot file copied from an +# external Flash memory into the internalSRAM, or when the ROM code launches +# the SAM-BA monitor, when no boot file has been found in any external Flash +# memory. +# For more JTAG related information see, : +# https://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D2-Series-Data-sheet-ds60001476G.pdf +# +# If JTAGSEL pin: +# - if enabled, boundary Scan mode is activated. JTAG ID Code value is 0x05B3F03F. +# - if disabled, ICE mode is activated. Debug Port JTAG IDCODE value is 0x5BA00477 +# +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME at91sama5d2 +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \ + -expected-id 0x5ba00477 + +# Cortex-A5 target +set _TARGETNAME $_CHIPNAME.cpu_a5 +dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu + +target create $_TARGETNAME.0 cortex_a -dap $_CHIPNAME.dap diff --git a/tcl/target/stm32l5x.cfg b/tcl/target/stm32l5x.cfg index 92083b9e0..0616df1cb 100644 --- a/tcl/target/stm32l5x.cfg +++ b/tcl/target/stm32l5x.cfg @@ -52,9 +52,10 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap # use non-secure RAM by default $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 -# declare non-secure flash -flash bank $_CHIPNAME.flash_ns stm32l4x 0x08000000 0 0 0 $_TARGETNAME -flash bank $_CHIPNAME.otp stm32l4x 0x0BFA0000 0 0 0 $_TARGETNAME +# create sec/ns flash and otp memories (sizes will be probed) +flash bank $_CHIPNAME.flash_ns stm32l4x 0x08000000 0 0 0 $_TARGETNAME +flash bank $_CHIPNAME.flash_alias_s stm32l4x 0x0C000000 0 0 0 $_TARGETNAME +flash bank $_CHIPNAME.otp stm32l4x 0x0BFA0000 0 0 0 $_TARGETNAME # Common knowledges tells JTAG speed should be <= F_CPU/6. # F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on @@ -77,30 +78,47 @@ if {![using_hla]} { cortex_m reset_config sysresetreq } +proc is_secure {} { + # read Debug Security Control and Status Regsiter (DSCSR) and check CDS (bit 16) + set DSCSR [mrw 0xE000EE08] + return [expr {($DSCSR & (1 << 16)) != 0}] +} + proc clock_config_110_mhz {} { + set offset [expr {[is_secure] ? 0x10000000 : 0}] # MCU clock is MSI (4MHz) after reset, set MCU freq at 110 MHz with PLL # RCC_APB1ENR1 = PWREN - mww 0x40021058 0x10000000 + mww [expr {0x40021058 + $offset}] 0x10000000 # delay for register clock enable (read back reg) - mrw 0x40021058 + mrw [expr {0x40021058 + $offset}] # PWR_CR1 : VOS Range 0 - mww 0x40007000 0 + mww [expr {0x40007000 + $offset}] 0 # while (PWR_SR2 & VOSF) - while {([mrw 0x40007014] & 0x0400)} {} + while {([mrw [expr {0x40007014 + $offset}]] & 0x0400)} {} # FLASH_ACR : 5 WS for 110 MHz HCLK mww 0x40022000 0x00000005 # RCC_PLLCFGR = PLLP=PLLQ=0, PLLR=00=2, PLLREN=1, PLLN=55, PLLM=0000=1, PLLSRC=MSI 4MHz # fVCO = 4 x 55 /1 = 220 # SYSCLOCK = fVCO/PLLR = 220/2 = 110 MHz - mww 0x4002100C 0x01003711 + mww [expr {0x4002100C + $offset}] 0x01003711 # RCC_CR |= PLLON - mmw 0x40021000 0x01000000 0 + mmw [expr {0x40021000 + $offset}] 0x01000000 0 # while !(RCC_CR & PLLRDY) - while {!([mrw 0x40021000] & 0x02000000)} {} + while {!([mrw [expr {0x40021000 + $offset}]] & 0x02000000)} {} # RCC_CFGR |= SW_PLL - mmw 0x40021008 0x00000003 0 + mmw [expr {0x40021008 + $offset}] 0x00000003 0 # while ((RCC_CFGR & SWS) != PLL) - while {([mrw 0x40021008] & 0x0C) != 0x0C} {} + while {([mrw [expr {0x40021008 + $offset}]] & 0x0C) != 0x0C} {} +} + +proc ahb_ap_non_secure_access {} { + # SPROT=1=Non Secure access, Priv=1 + [[target current] cget -dap] apcsw 0x4B000000 0x4F000000 +} + +proc ahb_ap_secure_access {} { + # SPROT=0=Secure access, Priv=1 + [[target current] cget -dap] apcsw 0x0B000000 0x4F000000 } $_TARGETNAME configure -event reset-init { @@ -123,6 +141,57 @@ $_TARGETNAME configure -event examine-end { mmw 0xE0044008 0x00001800 0 } +$_TARGETNAME configure -event halted { + set secure [is_secure] + + if {$secure} { + set secure_str "Secure" + ahb_ap_secure_access + } else { + set secure_str "Non-Secure" + ahb_ap_non_secure_access + } + + # print the secure state only when it changes + set _TARGETNAME [target current] + global $_TARGETNAME.secure + + if {![info exists $_TARGETNAME.secure] || $secure != [set $_TARGETNAME.secure]} { + echo "CPU in $secure_str state" + # update saved security state + set $_TARGETNAME.secure $secure + } +} + +$_TARGETNAME configure -event gdb-flash-erase-start { + set use_secure_workarea 0 + # check if FLASH_OPTR.TZEN is enabled + set FLASH_OPTR [mrw 0x40022040] + if {[expr {$FLASH_OPTR & 0x80000000}] == 0} { + echo "TZEN option bit disabled" + ahb_ap_non_secure_access + } { + ahb_ap_secure_access + echo "TZEN option bit enabled" + + # check if FLASH_OPTR.RDP is not Level 0.5 + if {[expr {$FLASH_OPTR & 0xFF}] != 0x55} { + set use_secure_workarea 1 + } + } + + set workarea_addr [$_TARGETNAME cget -work-area-phys] + echo "workarea_addr $workarea_addr" + + if {$use_secure_workarea} { + set workarea_addr [expr {$workarea_addr | 0x10000000}] + } { + set workarea_addr [expr {$workarea_addr & ~0x10000000}] + } + + $_TARGETNAME configure -work-area-phys $workarea_addr +} + $_TARGETNAME configure -event trace-config { # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync # change this value accordingly to configure trace pins diff --git a/tcl/target/stm32u5x.cfg b/tcl/target/stm32u5x.cfg new file mode 100644 index 000000000..2c2c0e037 --- /dev/null +++ b/tcl/target/stm32u5x.cfg @@ -0,0 +1,207 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# script for stm32u5x family + +# +# stm32u5 devices support both JTAG and SWD transports. +# +source [find target/swj-dp.tcl] +source [find mem_helper.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME stm32u5x +} + +set _ENDIAN little + +# Work-area is a space in RAM used for flash programming +# By default use 64kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x10000 +} + +#jtag scan chain +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + if { [using_jtag] } { + # See STM Document RM0438 + # RM0456 Rev1, Section 65.2.8 JTAG debug port - Table 661. JTAG-DP data registers + # Corresponds to Cortex®-M33 JTAG debug port ID code + set _CPUTAPID 0x0ba04477 + } { + # SWD IDCODE (single drop, arm) + set _CPUTAPID 0x0be12477 + } +} + +swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID +dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu + +if {[using_jtag]} { + jtag newtap $_CHIPNAME bs -irlen 5 +} + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap + +# use non-secure RAM by default +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +# create sec/ns flash and otp memories (sizes will be probed) +flash bank $_CHIPNAME.flash_ns stm32l4x 0x08000000 0 0 0 $_TARGETNAME +flash bank $_CHIPNAME.flash_alias_s stm32l4x 0x0C000000 0 0 0 $_TARGETNAME +flash bank $_CHIPNAME.otp stm32l4x 0x0BFA0000 0 0 0 $_TARGETNAME + +# Common knowledges tells JTAG speed should be <= F_CPU/6. +# F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on +# the safe side. +# +# Note that there is a pretty wide band where things are +# more or less stable, see http://openocd.zylin.com/#/c/3366/ +adapter speed 500 + +adapter srst delay 100 +if {[using_jtag]} { + jtag_ntrst_delay 100 +} + +reset_config srst_nogate + +if {![using_hla]} { + # if srst is not fitted use SYSRESETREQ to + # perform a soft reset + cortex_m reset_config sysresetreq +} + +proc is_secure {} { + # read Debug Security Control and Status Regsiter (DSCSR) and check CDS (bit 16) + set DSCSR [mrw 0xE000EE08] + return [expr {($DSCSR & (1 << 16)) != 0}] +} + +proc clock_config_160_mhz {} { + set offset [expr {[is_secure] ? 0x10000000 : 0}] + # MCU clock is at MSI 4MHz after reset, set MCU freq at 160 MHz with PLL + + # Enable voltage range 1 for frequency above 100 Mhz + # RCC_AHB3ENR = PWREN + mww [expr {0x46020C94 + $offset}] 0x00000004 + # delay for register clock enable (read back reg) + mrw [expr {0x56020C94 + $offset}] + # PWR_VOSR : VOS Range 1 + mww [expr {0x4602080C + $offset}] 0x00030000 + # delay for register write (read back reg) + mrw [expr {0x4602080C + $offset}] + # FLASH_ACR : 4 WS for 160 MHz HCLK + mww [expr {0x40022000 + $offset}] 0x00000004 + # RCC_PLL1CFGR => PLL1M=0000=/1, PLL1SRC=MSI 4MHz + mww [expr {0x46020C28 + $offset}] 0x00000001 + # RCC_PLL1DIVR => PLL1P=PLL1Q=PLL1R=000001=/2, PLL1N=0x4F=80 + # fVCO = 4 x 80 /1 = 320 + # SYSCLOCK = fVCO/PLL1R = 320/2 = 160 MHz + mmw [expr {0x46020C34 + $offset}] 0x0000004F 0 + # RCC_PLL1CFGR => PLL1REN=1 + mmw [expr {0x46020C28 + $offset}] 0x00040000 0 + # RCC_CR |= PLL1ON + mmw [expr {0x46020C00 + $offset}] 0x01000000 0 + # while !(RCC_CR & PLL1RDY) + while {!([mrw [expr {0x46020C00 + $offset}]] & 0x02000000)} {} + # RCC_CFGR1 |= SW_PLL + mmw [expr {0x46020C1C + $offset}] 0x00000003 0 + # while ((RCC_CFGR1 & SWS) != PLL) + while {([mrw [expr {0x46020C1C + $offset}]] & 0x0C) != 0x0C} {} +} + +proc ahb_ap_non_secure_access {} { + # SPROT=1=Non Secure access, Priv=1 + [[target current] cget -dap] apcsw 0x4B000000 0x4F000000 +} + +proc ahb_ap_secure_access {} { + # SPROT=0=Secure access, Priv=1 + [[target current] cget -dap] apcsw 0x0B000000 0x4F000000 +} + +$_TARGETNAME configure -event reset-init { + clock_config_160_mhz + # Boost JTAG frequency + adapter speed 4000 +} + +$_TARGETNAME configure -event reset-start { + # Reset clock is MSI (4 MHz) + adapter speed 480 +} + +$_TARGETNAME configure -event examine-end { + # DBGMCU_CR |= DBG_STANDBY | DBG_STOP + mmw 0xE0044004 0x00000006 0 + + # Stop watchdog counters during halt + # DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP + mmw 0xE0044008 0x00001800 0 +} + +$_TARGETNAME configure -event halted { + set secure [is_secure] + + if {$secure} { + set secure_str "Secure" + ahb_ap_secure_access + } else { + set secure_str "Non-Secure" + ahb_ap_non_secure_access + } + + # print the secure state only when it changes + set _TARGETNAME [target current] + global $_TARGETNAME.secure + + if {![info exists $_TARGETNAME.secure] || $secure != [set $_TARGETNAME.secure]} { + echo "CPU in $secure_str state" + # update saved security state + set $_TARGETNAME.secure $secure + } +} + +$_TARGETNAME configure -event gdb-flash-erase-start { + set use_secure_workarea 0 + # check if FLASH_OPTR.TZEN is enabled + set FLASH_OPTR [mrw 0x40022040] + if {[expr {$FLASH_OPTR & 0x80000000}] == 0} { + echo "TZEN option bit disabled" + ahb_ap_non_secure_access + } else { + ahb_ap_secure_access + echo "TZEN option bit enabled" + + # check if FLASH_OPTR.RDP is not Level 0.5 + if {[expr {$FLASH_OPTR & 0xFF}] != 0x55} { + set use_secure_workarea 1 + } + } + + set _TARGETNAME [target current] + set workarea_addr [$_TARGETNAME cget -work-area-phys] + echo "workarea_addr $workarea_addr" + + if {$use_secure_workarea} { + set workarea_addr [expr {$workarea_addr | 0x10000000}] + } else { + set workarea_addr [expr {$workarea_addr & ~0x10000000}] + } + + $_TARGETNAME configure -work-area-phys $workarea_addr +} + +$_TARGETNAME configure -event trace-config { + # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync + # change this value accordingly to configure trace pins + # assignment + mmw 0xE0044004 0x00000020 0 +} diff --git a/tcl/target/stm32wlx.cfg b/tcl/target/stm32wlx.cfg index 961850ad1..edb3fb32b 100644 --- a/tcl/target/stm32wlx.cfg +++ b/tcl/target/stm32wlx.cfg @@ -12,16 +12,47 @@ if { [info exists CHIPNAME] } { set _CHIPNAME stm32wlx } -set _ENDIAN little +if { [info exists DUAL_CORE] } { + set $_CHIPNAME.DUAL_CORE $DUAL_CORE + unset DUAL_CORE +} else { + set $_CHIPNAME.DUAL_CORE 0 +} +if { [info exists WKUP_CM0P] } { + set $_CHIPNAME.WKUP_CM0P $WKUP_CM0P + unset WKUP_CM0P +} else { + set $_CHIPNAME.WKUP_CM0P 0 +} + +# Issue a warning when hla is used, and fallback to single core configuration +if { [set $_CHIPNAME.DUAL_CORE] && [using_hla] } { + echo "Warning : hla does not support multicore debugging" + set $_CHIPNAME.DUAL_CORE 0 + set $_CHIPNAME.WKUP_CM0P 0 +} + +# setup the Work-area start address and size # Work-area is a space in RAM used for flash programming -# By default use 20kB + +# Memory map for known devices: +# STM32WL x5JC x5JB x5J8 +# FLASH 256 128 64 +# SRAM1 32 16 0 +# SRAM2 32 32 20 + +# By default use 8kB if { [info exists WORKAREASIZE] } { set _WORKAREASIZE $WORKAREASIZE } else { - set _WORKAREASIZE 0x5000 + set _WORKAREASIZE 0x2000 } +# Use SRAM2 as work area (some devices do not have SRAM1): +set WORKAREASTART_CM4 0x20008000 +set WORKAREASTART_CM0P [expr {$WORKAREASTART_CM4 + $_WORKAREASIZE}] + #jtag scan chain if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID @@ -41,13 +72,104 @@ if {[using_jtag]} { jtag newtap $_CHIPNAME bs -irlen 5 } -set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap +target create $_CHIPNAME.cpu0 cortex_m -endian little -dap $_CHIPNAME.dap -$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 +$_CHIPNAME.cpu0 configure -work-area-phys $WORKAREASTART_CM4 -work-area-size $_WORKAREASIZE -work-area-backup 0 -flash bank $_CHIPNAME.flash stm32l4x 0x08000000 0 0 0 $_TARGETNAME -flash bank $_CHIPNAME.otp stm32l4x 0x1fff7000 0 0 0 $_TARGETNAME +flash bank $_CHIPNAME.flash.cpu0 stm32l4x 0x08000000 0 0 0 $_CHIPNAME.cpu0 +flash bank $_CHIPNAME.otp.cpu0 stm32l4x 0x1fff7000 0 0 0 $_CHIPNAME.cpu0 + +if {![using_hla]} { + # if srst is not fitted use SYSRESETREQ to + # perform a soft reset + $_CHIPNAME.cpu0 cortex_m reset_config sysresetreq +} + +$_CHIPNAME.cpu0 configure -event reset-init { + # CPU comes out of reset with MSI_ON | MSI_RDY | MSI Range 4 MHz. + # Configure system to use MSI 24 MHz clock, compliant with VOS default Range1. + # 2 WS compliant with VOS=Range1 and 24 MHz. + mmw 0x58004000 0x00000102 0 ;# FLASH_ACR |= PRFTEN | 2(Latency) + mmw 0x58000000 0x00000091 0 ;# RCC_CR = MSI_ON | MSI Range 24 MHz + # Boost JTAG frequency + adapter speed 4000 +} + +$_CHIPNAME.cpu0 configure -event reset-start { + # Reset clock is MSI (4 MHz) + adapter speed 500 +} + +$_CHIPNAME.cpu0 configure -event examine-end { + # Enable debug during low power modes (uses more power) + # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP + mmw 0xE0042004 0x00000007 0 + + # Stop watchdog counters during halt + # DBGMCU_APB1_FZR1 |= DBG_IWDG_STOP | DBG_WWDG_STOP + mmw 0xE004203C 0x00001800 0 + + set _CHIPNAME [stm32wlx_get_chipname] + global $_CHIPNAME.WKUP_CM0P + + if {[set $_CHIPNAME.WKUP_CM0P]} { + stm32wlx_wkup_cm0p + } +} + +$_CHIPNAME.cpu0 configure -event trace-config { + # nothing to do +} + +if {[set $_CHIPNAME.DUAL_CORE]} { + target create $_CHIPNAME.cpu1 cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 1 + + $_CHIPNAME.cpu0 configure -work-area-phys $WORKAREASTART_CM0P -work-area-size $_WORKAREASIZE -work-area-backup 0 + + flash bank $_CHIPNAME.flash.cpu1 stm32l4x 0x08000000 0 0 0 $_CHIPNAME.cpu1 + flash bank $_CHIPNAME.otp.cpu1 stm32l4x 0x1fff7000 0 0 0 $_CHIPNAME.cpu1 + + if {![using_hla]} { + # if srst is not fitted use SYSRESETREQ to + # perform a soft reset + $_CHIPNAME.cpu1 cortex_m reset_config sysresetreq + } + + proc stm32wlx_wkup_cm0p {} { + set _CHIPNAME [stm32wlx_get_chipname] + + # enable CPU2 boot after reset and after wakeup from Stop or Standby mode + # PWR_CR4 |= C2BOOT + stm32wlx_mmw $_CHIPNAME.cpu0 0x5800040C 0x00008000 0 + } +} + +# get _CHIPNAME from current target +proc stm32wlx_get_chipname {} { + set t [target current] + set sep [string last "." $t] + if {$sep == -1} { + return $t + } + return [string range $t 0 [expr $sep - 1]] +} + +# like mrw, but with target selection +proc stm32wlx_mrw {used_target reg} { + set value "" + $used_target mem2array value 32 $reg 1 + return $value(0) +} + +# like mmw, but with target selection +proc stm32wlx_mmw {used_target reg setbits clearbits} { + set old [stm32wlx_mrw $used_target $reg] + set new [expr {($old & ~$clearbits) | $setbits}] + $used_target mww $reg $new +} + +# Make sure that cpu0 is selected +targets $_CHIPNAME.cpu0 # Common knowledges tells JTAG speed should be <= F_CPU/6. # F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on @@ -63,38 +185,3 @@ if {[using_jtag]} { } reset_config srst_nogate - -if {![using_hla]} { - # if srst is not fitted use SYSRESETREQ to - # perform a soft reset - cortex_m reset_config sysresetreq -} - -$_TARGETNAME configure -event reset-init { - # CPU comes out of reset with MSI_ON | MSI_RDY | MSI Range 4 MHz. - # Configure system to use MSI 24 MHz clock, compliant with VOS default Range1. - # 2 WS compliant with VOS=Range1 and 24 MHz. - mmw 0x58004000 0x00000102 0 ;# FLASH_ACR |= PRFTEN | 2(Latency) - mmw 0x58000000 0x00000091 0 ;# RCC_CR = MSI_ON | MSI Range 24 MHz - # Boost JTAG frequency - adapter speed 4000 -} - -$_TARGETNAME configure -event reset-start { - # Reset clock is MSI (4 MHz) - adapter speed 500 -} - -$_TARGETNAME configure -event examine-end { - # Enable debug during low power modes (uses more power) - # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP - mmw 0xE0042004 0x00000007 0 - - # Stop watchdog counters during halt - # DBGMCU_APB1_FZR1 |= DBG_IWDG_STOP | DBG_WWDG_STOP - mmw 0xE004203C 0x00001800 0 -} - -$_TARGETNAME configure -event trace-config { - # nothing to do -}