Commit Graph

11318 Commits

Author SHA1 Message Date
Tim Newsome 6376bbcf5d workflow/checkpatch: Install python modules for spdxcheck.py
Change-Id: I3be881cd57fee4cbb5a80d81562515cdec831dd6
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-03-17 12:50:41 -07:00
Tim Newsome 1c07a207e3 gdb_server: Keep working if gdb requests a non-existent reg
Change-Id: Ica55a227f7df4f0606fa1ac071bca172411e9230
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-03-17 09:48:41 -07:00
Tim Newsome 2cd3436002 Fix build.
Change-Id: I89de7dc21d7958531ec9619905d3d8c4f54a3acf
2023-03-16 18:08:25 -07:00
Tim Newsome 868ebdd89c Merge commit '1293ddd65713d6551775b67169387622ada477c1' into from_upstream
This includes
https://sourceforge.net/p/openocd/mailman/message/37710818/, which
should fix #814.

Conflicts:
	.travis.yml
	contrib/loaders/flash/stm32/stm32f1x.S
	contrib/loaders/flash/stm32/stm32f2x.S
	doc/openocd.texi
	src/rtos/FreeRTOS.c
	src/server/gdb_server.c
	src/target/riscv/riscv-013.c
	src/target/riscv/riscv.c
	src/target/riscv/riscv.h
	src/target/riscv/riscv_semihosting.c
	tcl/target/esp_common.cfg
	tcl/target/gd32vf103.cfg
	tools/scripts/checkpatch.pl

Change-Id: I1986c13298ca0dafbe3aecaf1b0b35626525e4eb
2023-03-16 18:02:35 -07:00
Tim Newsome 3387015af0
Merge pull request #800 from en-sc/en-sc/try-all-trigs-in-maybe-add-trig
Try all triggers in maybe_add_trigger_t*
2023-03-16 16:58:12 -07:00
Tim Newsome 2c760b6317 Expose S?aia CSRs if they're on the target.
Untested, because I don't have a target that implements this.

Change-Id: Iff82c124e7caf8e8960a9da62d8e727afb2c6b8a
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-03-16 15:37:06 -07:00
Tim Newsome eb8cabf821 Update encoding.h.
Change-Id: I1b6d2cac86ec485310761b73370fb2667ebb3bbd
2023-03-16 11:27:06 -07:00
Tim Newsome 750f7b4bc3
Merge pull request #812 from XuHangHub/riscv
target/riscv: fix the bug of using S2 register in read_memory_progbuf
2023-03-15 09:29:03 -07:00
Evgeniy Naydanov 55a576037e Try all triggers in maybe_add_trigger_t2 and _t6
It is possible for triggers of the same type to support different match
field values, so it is needed to try all the triggers, not just the
first one.

Fixes issue #788.

Signed-off-by: Evgeniy Naydanov evgeniy.naydanov@syntacore.com
Change-Id: I4c9fbc98bae7259377456d9ad8e770232724a592
2023-03-15 13:05:33 +03:00
Tim Newsome 3e7a683980
Merge pull request #811 from riscv/address_in
target/riscv: Remove unused address_in variable.
2023-03-13 08:06:25 -07:00
Hang Xu 2370d78249 target/riscv: fix the bug of using S2 register in read_memory_progbuf
We should avoid using x16~x31 register in program buffer because there
are no such general purpose registers in RVE(Embedded) extension.
For targets that support rvE, when the parameter increment=0
and count>1 of the read_memory_progbuf function, openocd will cause
an error due to the use of the s2 register.
For example:
{Command} {riscv repeat_read} count address [size=4]

Change-Id: I8b74dcc15cd00a400f2f1354c577a82132394435
Signed-off-by: Hang Xu <xuhang@eswincomputing.com>
2023-03-12 04:01:05 +00:00
Tim Newsome dcb0b5b976 target/riscv: Remove unused address_in variable.
Change-Id: Iead46b543a3b866f36b4d61a8824b6335dab276a
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-03-10 10:58:46 -08:00
Chao Du 59e368e308
Calculate the FreeRTOS type sizes and offsets more adaptively. (#806)
* Calculate the FreeRTOS type sizes and offsets more adaptively.

The definition of TickType_t varies between different targets. And it is also related to configUSE_16_BIT_TICKS option.
Thus introduce a new command to make sure we are using a correct ticktype size.

Change-Id: I9e38b331a9f07b96eb9a2c259e32377fca0106ad
Signed-off-by: Chao Du <duchao@eswincomputing.com>

* redundant semicolon.

Change-Id: Ia21f0537e476099d8fe519ef78b3328d14123a38

* Update after review.

Change-Id: I1825185ec9b0557d7e01f34a8f366661b3734aa7

* update doc

Change-Id: I24b21c88b02ca3d76f1362f2545e86c068fc0ec6

---------

Signed-off-by: Chao Du <duchao@eswincomputing.com>
2023-03-08 16:24:06 -08:00
Tim Newsome cd481a97e9
Merge pull request #807 from riscv/from_upstream
Merge from upstream
2023-03-07 09:23:53 -08:00
Tim Newsome 52810a4c51 Merge branch 'riscv' into from_upstream
Need the OpenOCD Snapshot workflow fix.

Change-Id: I25f5f930b3f9e8d75cf8418c24039d6a0ebae9f6
2023-03-06 11:45:11 -08:00
Tim Newsome 1b31f5322b
Merge pull request #810 from riscv/snapshot
workflow: Use ubuntu-20.04 to build snapshot
2023-03-06 11:43:26 -08:00
Tim Newsome 4ad41745c3 workflow: Use ubuntu-20.04 to build snapshot
Ubuntu 18.04 is deprecated by github.

Change-Id: Id0e700a99f74b482b0c735be0a12f81fe65b7ca3
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-03-06 09:33:47 -08:00
Tim Newsome 81b37bb6b5 helper: Add missing entry to jep106.inc.
Change-Id: I08dc57f44f3e551a5ac4e3befcd8a7fe12d840e0
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-03-06 09:13:52 -08:00
Tim Newsome e2ec1894ae flash: Remove duplicate entry for micron mt25qu01.
This probably crept in when merging in upstream in the past.

Change-Id: Iccce4515b6b5d4a90773f6d432754b065fb240bb
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-03-06 09:04:39 -08:00
Tim Newsome 3dcb3454a9 Don't check the HACKING file.
Change-Id: I3685d17a0f18f8419bce582628e9c0ce6f6e9d52
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-03-01 15:13:50 -08:00
Tim Newsome 4f97898889 Merge commit 'd1b882f2c014258be5397067e45848fa5465b78b' into from_upstream
Conflicts:
	doc/openocd.texi
	src/target/riscv/riscv-013.c
	src/target/riscv/riscv.c

Change-Id: I8cd557a10c3d5beeaed05ecc05d4c325a9ee7e70
2023-02-28 10:54:48 -08:00
Tim Newsome b8f4b8887b
Merge pull request #802 from riscv/regression_test
Smoke test OpenOCD against spike.
2023-02-28 09:09:07 -08:00
Tim Newsome 8933785ab3
Merge pull request #801 from Du-Chao/freertos
Set the current_thread when no FreeRTOS task was created.
2023-02-20 08:59:40 -08:00
Tim Newsome 13b0afaf82 Smoke test OpenOCD against spike.
Choosing to grab the latest version of each component. I'd rather deal
with the rare failure that causes, than realize that we've been testing
against really old stuff.

Change-Id: I17321d70e2b54086e8f3fbb01744746633d7a119
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-02-17 12:50:05 -08:00
Chao Du 1655620c0c Set the current_thread when no FreeRTOS task was created.
The 'current thread' was not set when no FreeRTOS task created. Which could lead a wrongly invoking of freertos_get_thread_reg_list.

Change-Id: I0e0f8327080ef698d7ed4aae5ac2a630d532ddeb
Signed-off-by: Chao Du <duchao@eswincomputing.com>
2023-02-17 07:45:05 +00:00
Tim Newsome 87f9e590b9
Merge pull request #799 from riscv/icount
Add `riscv icount` command.
2023-02-16 10:16:30 -08:00
Anatoly Parshintsev da5d2748e6
target/riscv: hide_csrs configuration option (#787)
* target/riscv: hide_csrs configuration option

This option allows users to mark certain CSRs as hidden so they could be
expluded from *reg* output and target.xml

Change-Id: Iddf8456cd3901f572f8590329ebba5229974d24a

* Update doc/openocd.texi

Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Anatoly Parshintsev <114445139+aap-sc@users.noreply.github.com>

* Update src/target/riscv/riscv.c

Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Anatoly Parshintsev <114445139+aap-sc@users.noreply.github.com>

---------

Signed-off-by: Anatoly Parshintsev <114445139+aap-sc@users.noreply.github.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
2023-02-15 09:53:37 -08:00
Jan Matyas 872ebb14ca
Add command "exec_progbuf" (#795)
* Add command "exec_progbuf"

Command "exec_progbuf" allows to execute a user-specified sequence
of instructions using the program buffer.

Change-Id: If3b9614129d0b6fcbc33fade29d3d60b35e52f98
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>

* Updated the doc:

- Minor reword and reorder of the sentences.
- Added information about C-instructions in progbuf.
- Fixed a typo (per the review).
- Added examples.

Change-Id: I88c9a3ff3c6b60614be7eafd3a6f21be722a77b7
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>

* Cosmetic changes

Change-Id: I7135c9f435f640e189c7d7922a2702814dfd595f
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>

---------

Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
Co-authored-by: Jan Matyas <jan.matyas@codasip.com>
2023-02-15 09:53:03 -08:00
Tim Newsome 9cafc75678
Merge pull request #796 from Du-Chao/freertos_log
Improve a debug log in freertos_update_threads()
2023-02-15 09:52:36 -08:00
Tim Newsome 7c3a77c37a Clarify that RISC-V triggers are optional.
Change-Id: I3a1f5a30385969964351b6ccadf09a3796d34d6b
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-02-15 09:41:55 -08:00
Tim Newsome fb3376b7f0 Add `riscv icount` command.
Also refactor shared code for clearing itrigger/etrigger/icount.

Change-Id: Iac2e756332c89d2ed43435391e3c097abc825255
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-02-15 09:31:44 -08:00
Tim Newsome a57fc5e78c
Merge pull request #794 from riscv/fix-fence-instruction
Fix opcode for the "fence" instruction
2023-02-14 10:51:13 -08:00
Tim Newsome 2b4826cd32
Merge pull request #797 from riscv/Zve32
If XLEN=64 and vsew=64 fails, fall back to vsew=32.
2023-02-10 12:36:48 -08:00
Tim Newsome f4f3ce7db7 Don't reuse a single riscv_program.
Because riscv_program_exec() tries to add an instruction every time
through.

This would cause an error accessing vector registers where VL > 14(?).

Change-Id: Ie676ca8c9be786b46aa2a4b4028ac8b27f7a4b40
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-02-10 11:51:21 -08:00
Tim Newsome abb918685f If XLEN=64 and vsew=64 fails, fall back to vsew=32.
This should make vector accesses work on 64-bit harts that implement
Zve32*. There doesn't appear to be any way to easily determine what vsew
values are allowed, so try and notice the failure.

Change-Id: Ide0722d0d67da402a4fbe88163830094e46beb84
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-02-10 11:51:17 -08:00
Tim Newsome 282ac9884e
Merge pull request #798 from aap-sc/aap-sc/mcounteren_fixup
CSR_MCOUNTEREN should not exist if U-mode is not supported
2023-02-10 11:45:54 -08:00
Parshintsev Anatoly 5845f3b71c CSR_MCOUNTEREN should not exist if U-mode is not supported
Change-Id: I1a2420fb88bd3ee37f6a539992e8dc119fdd6e0e
2023-02-10 02:08:40 +03:00
Tim Newsome 344e8bd263 Print out debug value after the assignment is made.
Change-Id: I6ba1064c09f48eba97d84ea9db5ff44d82b9d004
2023-02-08 11:02:51 -08:00
Tim Newsome 91552c7999 Move yes_no_maybe_t into riscv.h.
Change-Id: I5bbdc1af3147e05e25612bf496f409111248c979
2023-02-08 11:02:20 -08:00
duchao 9cc6749370 Improve a debug log in freertos_update_threads()
To make the log more accurate and comprehensible. In case the offset is
non-zero.

Signed-off-by: Chao Du <duchao@eswincomputing.com>
2023-02-08 03:01:57 +00:00
Jan Matyas 2c96555c73 Fix opcode for the "fence" instruction
OpenOCD currently uses improper "fence" instruction:
"FENCE" opcode with empty predecessor and successor sets.

Such instruction has no effect and is reserved for future use
as a HINT instruction (RISC-V Unprivileged ISA spec V20191213,
section 2.9).

This patch fixes it by using the proper "fence rw,rw"
instruction.

Change-Id: Ia2a66059009153efef27279410850ddfd73dae38
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2023-02-01 14:59:33 +01:00
Tim Newsome 9c3a4b458c
Merge pull request #786 from aap-sc/aap-sc/vcsr_support
target/riscv: added support for missing VCSR register
2023-01-18 08:53:46 -08:00
Antonio Borneo a3ed12401b tcl/target: enable -rtos hwthread
The rtos hwthread has been merged in 2019 with commit 85ba2dc4c6
("rtos/hwthread: add hardware-thread pseudo rtos").
During review in patchset 19 the name of the rtos has been changed
from 'hawt' to 'hwthread'.

Some target config file was already merged ready for hwthread, but
keeping the relevant lines commented and still reporting the old
name.

Enable rtos hwtread to the target that were supposed to use it.
Fix the name of the rtos.

Change-Id: I877862dcdba39f26462bb542bac06d1a5f5f222d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7384
Tested-by: jenkins
2023-01-15 15:10:42 +00:00
Tomas Vanek 5292c7eae9 jtag/drivers/cmsis_dap: prevent conn/discon workaround before line reset
The line reset SWD sequence is used quite often in SWD multidrop mode.
Prevent the ugly connect/disconnect adapter firmware bug workaround
to be called before each line reset.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Id85bff075dba9077e4e501e2cdcfd64d5d9d0531
Reviewed-on: https://review.openocd.org/c/openocd/+/7381
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 15:10:16 +00:00
Tomas Vanek 630cb5ea4d jtag/drivers/cmsis_dap: speed up long transfers using DAP_TransferBlock
DAP_TransferBlock command saves n - 3 bytes in comparison to DAP_Transfer,
where n is number of transfers.

Use DAP_TransferBlock optionaly to save some USB bandwidth.

The change increases the speed of the write transfer
from 40 KiB/s to 42 KiB/s @ USB FS, adapter speed 1000.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Ifde0159cfd44481d2b81b90daa088e731c03e26d
Reviewed-on: https://review.openocd.org/c/openocd/+/7372
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 15:09:47 +00:00
Tomas Vanek 40bac8e8c4 jtag/drivers/cmsis_dap: improve USB packets filling
DAP write transaction occupies 5 bytes of a command packet.
DAP read transaction needs just one byte in a command packet
and expect 4 bytes in a response.

The fixed maximal number of transactions in a packet caused
packet filling less than optimal.

Compute both command and expected response sizes based on
read or write direction of each transaction.
Run the queue if one of sizes does not fit into a packet.

The change increases the speed of the mostly read transfer
from 36 KiB/s to almost 40 KiB/s @ USB FS, adapter speed 1000
due to reduction of adapter inserted RDBUFF reads.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Ib70812600eaae0403b8ee8673b6f897348496569
Reviewed-on: https://review.openocd.org/c/openocd/+/7364
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 15:09:07 +00:00
Tomas Vanek 3d3d35c9b8 jtag/drivers/cmsis_dap: introduce packet_usable_size
USB bulk backend needs to avoid zero sized USB packets
sent after each full sized packed for performance reasons.

HID backend uses fixed size HID reports so the full size
of the report can be utilized.

Introduce packet_usable_size to reflect it.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I34094c9edac5730624480711cbd6aa65883c47c7
Reviewed-on: https://review.openocd.org/c/openocd/+/7363
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 15:08:49 +00:00
Tomas Vanek 600d0165cc jtag/drivers/cmsis_dap: use unsigned types
Not all variables converted, JTAG part is left as is.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Ie9cc890769a2f53cb3a07fd457030e1b98910d44
Reviewed-on: https://review.openocd.org/c/openocd/+/7362
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 15:08:05 +00:00
Tomas Vanek a9b48a6f48 jtag/drivers/cmsis_dap: use dap parameter instead of cmsis_dap_handle
Replace the direct dereference of cmsis_dap_handle by dereference
of the dap function parameter wherever possible.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I32601dbe0270267642720a8524706aa76d187c3b
Reviewed-on: https://review.openocd.org/c/openocd/+/7361
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 15:07:51 +00:00
Tomas Vanek 128736d23f jtag/drivers/cmsis_dap: move pending request FIFO
Move all pending request FIFO related variables to
the struct cmsis_dap

Pure refactoring, no functional changes.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I2cea9c1e265ac102ec0f314767b8b9afdcda9ee9
Reviewed-on: https://review.openocd.org/c/openocd/+/7360
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 15:07:38 +00:00