target/riscv: fix the bug of using S2 register in read_memory_progbuf
We should avoid using x16~x31 register in program buffer because there are no such general purpose registers in RVE(Embedded) extension. For targets that support rvE, when the parameter increment=0 and count>1 of the read_memory_progbuf function, openocd will cause an error due to the use of the s2 register. For example: {Command} {riscv repeat_read} count address [size=4] Change-Id: I8b74dcc15cd00a400f2f1354c577a82132394435 Signed-off-by: Hang Xu <xuhang@eswincomputing.com>
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@ -3197,7 +3197,7 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
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return result;
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if (increment == 0 &&
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register_write_direct(target, GDB_REGNO_S2, 0) != ERROR_OK)
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register_write_direct(target, GDB_REGNO_A0, 0) != ERROR_OK)
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return ERROR_FAIL;
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uint32_t command = access_register_command(target, GDB_REGNO_S1,
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@ -3299,7 +3299,7 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
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/* See how far we got, clobbering dmi_data0. */
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if (increment == 0) {
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uint64_t counter;
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result = register_read_direct(target, &counter, GDB_REGNO_S2);
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result = register_read_direct(target, &counter, GDB_REGNO_A0);
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next_index = counter;
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} else {
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uint64_t next_read_addr;
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@ -3524,13 +3524,13 @@ static int read_memory_progbuf(struct target *target, target_addr_t address,
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/* s0 holds the next address to read from
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* s1 holds the next data value read
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* s2 is a counter in case increment is 0
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* a0 is a counter in case increment is 0
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*/
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if (riscv_save_register(target, GDB_REGNO_S0) != ERROR_OK)
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return ERROR_FAIL;
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if (riscv_save_register(target, GDB_REGNO_S1) != ERROR_OK)
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return ERROR_FAIL;
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if (increment == 0 && riscv_save_register(target, GDB_REGNO_S2) != ERROR_OK)
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if (increment == 0 && riscv_save_register(target, GDB_REGNO_A0) != ERROR_OK)
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return ERROR_FAIL;
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/* Write the program (load, increment) */
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@ -3560,7 +3560,7 @@ static int read_memory_progbuf(struct target *target, target_addr_t address,
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if (riscv_enable_virtual && has_sufficient_progbuf(target, 5) && get_field(mstatus, MSTATUS_MPRV))
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riscv_program_csrrci(&program, GDB_REGNO_ZERO, CSR_DCSR_MPRVEN, GDB_REGNO_DCSR);
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if (increment == 0)
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riscv_program_addi(&program, GDB_REGNO_S2, GDB_REGNO_S2, 1);
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riscv_program_addi(&program, GDB_REGNO_A0, GDB_REGNO_A0, 1);
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else
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riscv_program_addi(&program, GDB_REGNO_S0, GDB_REGNO_S0, increment);
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