interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Don't reuse a single riscv_program. 

Because riscv_program_exec() tries to add an instruction every time
through.

This would cause an error accessing vector registers where VL > 14(?).

Change-Id: Ie676ca8c9be786b46aa2a4b4028ac8b27f7a4b40
Signed-off-by: Tim Newsome <tim@sifive.com>
This commit is contained in:
Tim Newsome 2023-02-09 10:07:42 -08:00
parent abb918685f
commit f4f3ce7db7
1 changed files with 7 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/target/riscv/riscv-013.c
View File

@ -1992,13 +1992,15 @@ static int riscv013_get_register_buf(struct target *target,
unsigned vnum = regno - GDB_REGNO_V0;
struct riscv_program program;
riscv_program_init(&program, target);
riscv_program_insert(&program, vmv_x_s(S0, vnum));
riscv_program_insert(&program, vslide1down_vx(vnum, vnum, S0, true));
int result = ERROR_OK;
for (unsigned i = 0; i < debug_vl; i++) {
/* Can't reuse the same program because riscv_program_exec() adds
* ebreak to the end every time. */
struct riscv_program program;
riscv_program_init(&program, target);
riscv_program_insert(&program, vmv_x_s(S0, vnum));
riscv_program_insert(&program, vslide1down_vx(vnum, vnum, S0, true));
/* Executing the program might result in an exception if there is some
* issue with the vector implementation/instructions we're using. If that
* happens, attempt to restore as usual. We may have clobbered the