Add command to fix CSW_SPROT in register AP_CSW.
This solves dap apmem access in non secure access.
Change-Id: I7cfcb6434d75f5cfd4a2630a059901cdeea010ce
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/1276
Tested-by: jenkins
Reviewed-by: mike brown
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
After calling mips32_cp0_read() nothing has been queued, the call to jtag_exec_queue() is unnecessary.
Change-Id: Ie25438045a8e9b6b1b170df7b52609d45f284b5a
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1190
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In current devel code there are 3 functions (related to m4k code) that need to restore register 8 from pracc stack:
mips32_pracc_read_u32()
mips32_cp0_read()
mips32_pracc_write_mem_generic()
And mips32_pracc_read_mem() needs to restore regs 8 and 9 from pracc stack.
Values in this registers should be the same as read by mips32_pracc_read_regs() when entering debug
mode and can be modified by mips32_pracc_write_regs() when leaving debug mode.
There is no need to read their values from the processor registers every time.
The fields reg8 and reg9 are added to struct mips_ejtag to store these register values
and the call to mips32_save_context() is shifted in mips_m4k_debug_entry() in order
to store them before any other function needs to restore these registers.
For the same reason in function mips_m4k_step() the call to mips_m4k_set_breakpoint(), if needed,
should be made after calling mips_m4k_debug_entry().
For single word write the number of pracc accesses are now 9 or 8, from 13 or 12 in current code,
single word read takes now 10 instead of 12.
This patch is really the first in a set of patches for an alternate m4k pracc code
much faster that current code. At least for me with pic32mx works fine.
Change-Id: Ibd9df5e8b9f78ce05a180949ba6a561c761b61d6
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1146
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In this function after loading the handler code and the jump code there is a call
to wait_for_pracc_rw() to verify that a pracc access is pending.
Next the address is read to verify that the handler is running, the address should be at
fastdata area.
Next, another call is made to wait_for_pracc_rw(). This call is not needed, we now already
that a pracc access is pending.
Better we call this function before loading the end address to be sure it is loaded correctly.
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Change-Id: If311450ea634786fc28cf1a8e18ed24ce5257d20
Reviewed-on: http://openocd.zylin.com/1142
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
To show up the fail try to step with the core clock set to 31.25Khz
and with a ftdi/hs adapter or with a wiggler, -not with ft2232-.
The scan frequency should be set to 300Khz or higher, at lower frequency probably will not fail.
The code exits with error because the pracc address is at 0x0.
It also fails when using the "all" register, but in this case the code works without any message because the
pracc address is at 0xff202004 when it fails.
I never saw this fail with the core clock set to 500Khz or higher, but ...
The workaround simply puts a 1 ms delay after the execution of the DERET instruction.
Change-Id: I38e8c01a9c39aedd3282140543b83a0844d8ad29
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1139
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added support for ARMv7-M targets in arm_nandwrite and
arm_nandread.
Change-Id: Iab1d78d401f735e191c6a8519f3619035a300fae
Signed-off-by: Henrik Nilsson <henrik.nilsson@bytequest.se>
Reviewed-on: http://openocd.zylin.com/1188
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Fixes system hang for devices that don't ignore
transactions to bad addresses.
Change-Id: Ia98344d7efc12951ef79dbc82b8f792b70a22cee
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/1115
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Moved JTAG code out of transport-neutral file (arm_adi_v5.c) into
transport specific file (adi_v5_jtag.c).
Added ap_block_read to dap_ops interface (arm_adi_v5.h) to support
the move.
Change-Id: I796d3984f138aad052b97c77ac9c12ffd1158f74
Signed-off-by: mike brown <mike@theshedworks.org.uk>
Reviewed-on: http://openocd.zylin.com/1277
Tested-by: jenkins
Reviewed-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The command 'at91sam3 info' ignores PLLA DIV values >1. This patch fixes it.
Tested on a SAM3S4C chip.
Change-Id: I051f41bb3dcefe1ac785fbcb48477a807daa16a2
Signed-off-by: Thomas Schmid <thomas.schmid@gmail.com>
Reviewed-on: http://openocd.zylin.com/1307
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The commit "gdbserver: use common hexify/unhexify routines" [3d62c3d]
mis-replaced a call to "str_to_hex" with a call to "unhexify". "hexify"
should have been used instead.
Change-Id: I5f5904b1b422f819a6308e2c0740ea43d22c7d0b
Signed-off-by: Christian Gudrian <christian.gudrian@gmx.de>
Reviewed-on: http://openocd.zylin.com/1308
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
This regression was caused due to the recent addition of R4 support and
the removal of the bulk_write_memory handler.
Change-Id: Ide692737f235c0e9906becb6f3502ba52c5907aa
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1246
Tested-by: jenkins
The only caller was arm_nandwrite(). Replace that call with
target_write_buffer() instead, which in turn may end up calling the same
bulk_write_memory target API function.
Change-Id: If34c7474df5cf14af3b732fb4774816818f28e79
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1214
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Remove dummy implementations from all targets except arm7_9 and mips, which
are the only ones with real implementations. Replace with a single default
implementation simply calling target_write_memory().
Change-Id: I9228104240bc0b50661be20bc7909713ccda2164
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1213
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds support for usbprog-jtag and usbvlab that are mostly compatible
to opendous except for IN and OUT endpoints and usb transfer mode.
Change-Id: I44557c2449fe7473295038efa6ae4fc8d80ec7bf
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/687
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
usb_blaster_device_desc was allocated, but never freed.
Change-Id: I764bd092c71b8c260b98aab0e7a1710fd7bfa9fd
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1224
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
If command parport_cable is not executed, parport_cable points to
const char array in read-only memory as default. On exit free()
will try to free this read-only memory. This patch uses strdup to
allocate memory when defining default setting.
Change-Id: I290e707ac6a37e9dc1b45c85ca51d8bd6aac6761
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1223
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Appending bits to TAP buffer doesn't check if there's enough space left.
This patch adds this check to fix TAP overflow error.
Change-Id: If80d5ab4a24983ad24f3cab31f9676d1590ebf5d
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1216
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
With this option a different channel of the ft2232 chip can be selected using
a previously existing layout. It was made for a partner called Salvador
Tropea.
Change-Id: Ia0dedb2f50e232d089e73788735edc8f47ee23e6
Signed-off-by: Rodrigo Melo <rmelo@inti.gob.ar>
Reviewed-on: http://openocd.zylin.com/1095
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The kinetis datasheets specify the flash registers as bytes rather
than as words, as the previous implementation did. This also makes
a few code sections slightly less endian-magical.
Change-Id: If8f4adfc7f4341085ae5b6eacbf7d74bbd74cf08
Signed-off-by: Alex Austin <alex.austin@spectrumdsi.com>
Reviewed-on: http://openocd.zylin.com/1192
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds a program proc that simplifies using OpenOCD as a standalone
programmer.
Change-Id: I6ece492cd878c170b734e8bb2e09fe8c4557d5a6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1199
Tested-by: jenkins
Reviewed-by: Jörg Fischer <turboj@gmx.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This reduces the number of gdb conversion routines we have to maintain.
Change-Id: Ia43d6cac86cbe4f76fe0875b9d9c16ac340296db
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1128
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This fixes an issue if the device is manually probed after the initial probe
fails due to being unable to read flash size register. In this situation the
driver assumes the user has overridden the flash size when infact this may
not be the case.
It also seems on the older stm32f1 devices the flash register is not readable
when locked, this does not seem to apply to the newer parts - f0, f3, f4.
Change-Id: I125f872fcb2d962ca6705f97b62d957e2b31303b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1187
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The stm32f0 and stm32f3 share the same option byte location, but the format
differs.
Adding an option_offset fixes the broken options_read cmd and incorrectly
setting Hardware Watchdog when unlocking a f3x device.
Change-Id: I82d66b6198294ea9eedb44ca8b2fb368c0cb15e8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1184
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
When the ftdi driver calls finally the mpsse_flush function, it first
initiate the USB in and finally the corresponding USB out transaction.
Because data in is requested too early the USB device will always answer
the first USB in by a NAK. That can prevented by a simple reordering of
the out and then the in transfer and can improve the Jtag performance for
high JTAG clock rates.
Change-Id: I17abf1487c914c92e2e447ee6d30562ef629f327
Signed-off-by: Peter Henn <Peter.Henn@web.de>
Reviewed-on: http://openocd.zylin.com/942
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Move the global target back off timer to the target struct. This will
fix the wrong error handling with multi target devices like smp systems.
Change-Id: Ia327182ed5d13ca87323700017a8c40ecc6b25a3
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/1179
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The USB buffer will need space for both TMS and TDI buffers.
Each holds tap_buffer_size bytes maximum, so tap_buffer_size must be
smaller than half of usb buf_size.
Change-Id: Id8f39936a894cbd98deb89eec5a859aef1e2b783
Signed-off-by: Joerg Fischer <turboj@gmx.de>
Reviewed-on: http://openocd.zylin.com/1136
Tested-by: jenkins
Reviewed-by: simon qian <simonqian.openocd@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Because we were always running using target state TARGET_RUNNING target
algorithm's were a bit verbose compared to other targets.
This brings the hla target inline with the other targets.
Change-Id: I3a257fdc878b87660fac8b5eca22b421eee5b349
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1134
Tested-by: jenkins
The was missed when the armv7m was moved over to using the std arm
core_cache, probably because it is disabled by default.
Change-Id: I2f5a18ef6dd783b36e8c29f4c52379104bda4583
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1138
Tested-by: jenkins
Added support for new ST devices in the stm32lx portfolio, with device
id 0x427. These have 256k flash, but in a single bank compared to
device id 0x436 which is a dual bank flash.
Change-Id: Iafdfe990f24bd04b0d6e00385ee70690f3bf8d5f
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This update adds support for the STM32Lx 384kb dual bank flash. Previously there was a problem when writing an
image that was larger than 192Kb. That lead to openocd printing out two error messages like
"Error: access denied / write protected" and "Error: invalid program address". The reason was that the stm32lx
driver tried to write half pages which overlapped into the next flash bank.
A new configuration file stm32lx_dual_bank.cfg can be used for stm32lx chips with dual bank flash (256kb or 384kb devices).
A sanity check was added for probed flash size values to fix the issue seen on some ST samples that answered incorrectly.
Change-Id: I69e25131983d88613be8606b438f98870c5f1e52
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1125
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
It has been seen on some stm32 targets that the flash size register that
is probed by the driver may contain an invalid size.
This change enables the user to override the probed value.
Change-Id: I09359e59a96f9133d3d939670957d32a830a944e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1132
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
adapter_init (core.c) won't check speed configuration
of the selected interface if it's not needed (.speed = NULL).
When it's not needed, we can now omit adapter_khz in
init scripts and we don't have to implement dummy handlers
for speed_div and khz functions.
It also removes calls to adapter_khz in interface configuration
files when not used anymore.
Change-Id: I6eb1894385503fede542a368f297cec6565eed44
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1131
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This makes sure we are using privileged mode when executing any loaders.
Change-Id: I18bf32ec92e1c76a66ab25e3712652bc3650b332
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1108
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Make sure we restore the core mode after executing any algorithm.
We also now check that we actually need to swap the core mode, we may
already be in the correct mode.
Change-Id: Ia48af2c108e0f9868aae241bf25f60323503f092
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1107
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This removes the armv7m::core_cache and uses the generic arm::core_cache.
Change-Id: If854281b31486cea8be005008f6a71a691b4c208
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/968
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This simplifies the armv7m_core_reg structure ready for the move to using
the generic struct arm_reg.
Change-Id: I8edb9d77cc54965d49cd2e754568ebcea4cf6964
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/967
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
To simplify things change over to using the generic core_mode struct rather
than maintaining a armv7m specific one.
Change-Id: Ibf32b785d896fef4f33307fabe0d8eb266f7086f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/966
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The current implementation of hexify was not correctly handling signed chars.
This function is currently used by the ti-icdi driver and as such was causing
random write issues.
As a note perhaps a better long term fix would be to change to using uint8_t
buffers rather than char. This will require changes to the ti-icdi driver
aswell.
Change-Id: I572e69ff2b99227a7d412de056458c0393794b03
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1124
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
LOG_OUTPUT is not intended for general output so use the correct LOG_*
functions instead.
Change-Id: I48d0fe765637024dbafc68f2ea08219d3ff42754
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1104
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
ThreadX support was not working due to it being first in the list of RTOS - regression.
Auto-detect off, an RTOS was always be marked as successfully detected, even if symbols are not found.
Lines 223-227 were unnecessary as they are done in rtos_try_next()
Added lots of comments
Improved readability by separating: GDB not finding a symbol vs no more symbols being available
Regression caused by patch which was allowed only 52 minutes for review : http://openocd.zylin.com/895
Change-Id: Ib4decb01db595ddb3796837c6d8338ce6b9a91ca
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/986
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
All the other drivers will only change the state if required.
This brings all the other drivers inline with this behaviour.
The original issue relates to problems on xscale commit 7989000e09
Change-Id: Ifc90ec2eef68a70a14f37c00931a07982bfa200c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1114
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
There is no constraint about idProduct in USB spec. So, pids[i] may be 0 for USB devices.
Change-Id: I19d8974f4e7082e8b7e1f2d33c019ac4e61bc1e2
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1091
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The makes sure the DWT component is always enabled so that watchpoints
work as expected.
This does need merging into the existing cortex_m logic, however at the
moment this is non trivial.
Change-Id: Ic6cccd1badb51f70a2ca8ea9ab6923788a94c1bf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
An issue has been seen with the stm32lx flash driver that if a
power cycle/reset is applied after a erase, any ram loader will Hard Fault
on execution.
A similar issue is mentioned in the errata for the device.
Two solution's seem to workaround this issue:
1, Handle the exception, this means adding exception vectors to the loader
and changing the exception address using nvic vtor register.
2. falling back to using slower direct page writes - approx 50% slower.
Using solution 1 would mean restrictions are placed on the loader location.
Solution 2 was chosen mainly as it was simpler too implement.
Change-Id: I429f06b5a3e3b1d8de90071a88a7df11fc9b46a7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1010
Tested-by: jenkins
Waiting 20secs is a bit much excessive, we could probably reduce to 5.
Change-Id: Iffb97adb99c2541a075fe78dbc88a53ddf340214
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1009
Tested-by: jenkins
Handle any leading bytes upto the next 128 byte page, enabling us to safely
use the faster page write.
Rather than use a separate word/byte write to program any trailing bytes
we use a combined write function.
Use memcpy for byte writes and change loader to using bytes.
Change-Id: Ie0164a30388f018dd00e752cf5ff87d4f96ced97
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1008
Tested-by: jenkins
Fixed flash page size detection according to EFM32 GG/LG errata.
MEM_INFO_PAGE_SIZE register containts invalid value in devices with
revision number lower than 18 and should not be used.
Change-Id: Idb2832246efcbbec2fd98a5c458f72a36df386fb
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1116
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When current tap state and end state are the same, transitions are added which is not what should happen.
The usbprog driver was already patched like this long time ago.
Change-Id: I339e87156bdc7b5c83c10c14025b749605d3871a
Signed-off-by: Roman Reichel <romanreichel@aol.de>
Reviewed-on: http://openocd.zylin.com/1113
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Limited (no page unprotect, no block writes) implementation of EFM32
flash support. Verified with EFM32 development kit and STLink V2 adapter
using SWD.
Change-Id: I3db2054d9aa628a1fe4814430425db3c9959c71c
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1106
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is only minimal support to enable use to catch a Hard Fault in
the stm32l flash bootloader.
Change-Id: I21d6a11893e2f1d173ebff1a651d6f52bf6eec32
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1103
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
Currently we have to supply the arg's to this cmd in a set order, this
change fixes that issue.
Change-Id: I14a15732e1917a91009e1ac14fba39ca1523c739
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/992
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Make sure we do not mask out the BFB2 boot bank bit, as this is used on
the larger XL devices.
Change-Id: Iacfdf874140e409e0c4ca9b9aee8f5c2f90dc9be
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/991
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The STM32F0 and F3 devices use a different default RDP to configure a
unlocked device, make sure we use that.
Change-Id: I170779461412c4c202c2cfc8d90baedb7e388150
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/984
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The user is able to use 2bytes of the options byte data for whatever
purpose they wish. Make sure we preserve this during an option erase/write.
Change-Id: Ibf951b11c59a148e671b1eb47fdc9b4f49ccae15
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/983
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Some debuggers (stlink) can't issue 16 bit writes and have to use a
loader to write flash memory.
Currently the loader is not used for option bytes, causing
stm32x_write_options to fail silently on such hardware.
Fix this by using stm32x_write_block to write option bytes as well.
Change-Id: I49c29d53ab5e162463cb349d4c89bef96467e587
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/480
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The current stm32lx driver will fail if no working area is
provided - fallback to using slow writes if this is the case.
Change-Id: I92b1535fec4aebc855c63ce2c54b10f168f3c07e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1007
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The stlink/v2 has the ability to check the target voltage if the firmware
is recent enough (>= J13).
As a debugging aid we check the voltage at startup and issue an error if
this is too low to debug reliably.
Change-Id: I98e251f3880e31049c4307051c30bedd3451cf87
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/980
Tested-by: jenkins
Reducing the select and MsgWaitForMultipleObjects timeouts to 1ms makes
a 2-300+% increase in the step time of gdb when using pipes under windows OS.
Change-Id: Id7e52cfb2b206347a9caea61672885a3e2b186de
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1050
Tested-by: jenkins
50d5441e2a commit added a regression when
using pipes with GDB, OpenOCD would appear to hang when exiting GDB.
This fixes that behaviour so we shutdown correctly.
Change-Id: I9b337c2bdd41b1966de1c7631118257afcbfa6bd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/993
Tested-by: jenkins
Updated as per ST RM0033 rev 5
Change-Id: I627fdab69b440b75b8e4f7c474216538fa5273a4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1001
Tested-by: jenkins
This is the new proprietary interface replacing the older FTDI based adapters.
It is currently fitted to the ek-lm4f232 and Stellaris LaunchPad.
Change-Id: I794ad79e31ff61ec8e9f49530aca9308025c0b60
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/922
Tested-by: jenkins
Other adapters (TI ICDI) that use this driver can use a larger
read/write buffer size than the original stlink could.
Change-Id: I9beb7748049097cbe29a2340799c450bd74e199d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/948
Tested-by: jenkins
Watchpoints were not being enabled when the hl adapter target was resumed.
This effects both stlink and icdi interfaces.
Change-Id: Ia9f8a9415be97a467cd099b63b6bc9f7f37d0c0d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/931
Tested-by: jenkins
Update rtos detection to use the new target name.
Change-Id: I4e55311bcfbc8af55708b43daf0c73b1c8145934
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/923
Tested-by: jenkins
As part of the switch to using the hla for the stlink interface we rename
the cmds to a more generic name.
Update scripts to match new names.
Also add handlers for deprecated names.
Change-Id: I6f00743da746e3aa13ce06acfdc93c8049545e07
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/921
Tested-by: jenkins
This enables us to change the target name without breaking any
target scripts.
Change-Id: I635f961e573264d3dab2560f3a803ef1986ccfde
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/919
Tested-by: jenkins
Print stlink info always rather than just when debug log enabled.
Change-Id: I2a29ef046925200e1c94624280c0b252fab5219a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/925
Tested-by: jenkins
Even though the stlinkv1 and stlinkv2 use different usb classes they share
the same layout scheme.
Merge the two into a common layout, thus enabling us to support other
adapter layouts.
Change-Id: I7d02c44a7f94ebc7f2cb5428b02ee40294fb430d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/918
Tested-by: jenkins
Fix for bug introduced in in mips smp support code
in the resume logic that is checking for wrong return
value.
Change-Id: Ice3e0069f936b556fecc338ccc12ddba38deeaf6
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1048
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
As the other arg checks do not OR, it is assumed this is a copy/paste error
from the original code author.
Change-Id: I7dfc7396254a6f558887def951c57dfd4a0e6c2c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/997
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Currently if the target supports srst_nogate we wait until target assert_reset
until we get a chance to assert the srst.
However sometimes we will not get this far if the target has already failed
the initial scan.
This has been tested on stm32.
Change-Id: I2c4486942a011534d3e2044788563669bf457b60
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/972
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Currently if the target supports srst_nogate we wait until target assert_reset
until we get a chance to assert the srst.
However sometimes we will not get this far if the target has already failed
the jtag_examine_chain.
This has been tested on targets that support this behaviour (STM32 and STR9).
Change-Id: Ibcf7584b137b472f31ba6ddd5cd99d848c5508d1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/971
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This adds the ability to request to the adapter how we want to connect to
the target, eg. while srst is asserted or not.
This ability can very handy for connecting to unresponsive targets.
A prerequisite is that the target supports srst_nogate.
Change-Id: I0f7c9475160048e8a963e16077754f5403ac8325
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/976
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
If target is disabled at init, then is examined using 'arp_examine', it
can get to cortex_a8_poll with the target state being unknown.
Change-Id: Ifffb345bf971d275d2eb1912648b29f0a75f6ccc
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/954
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This change adds smp debug support for mips platforms. The change
leverages the exiting gdb smp support as mentioned in the OpenOCD
documentation for using gdb in smp environemnt. Added commands
smp_on, smp_off, smp_gdb to control the smp mode. The implementation
also provides a way to send Jc packet and toggle the gdb display core
context as well.
Change-Id: I0835a5aed1844b6ebf8291582912f20695346003
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/937
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a minor change to log EJTAG version 4.x and 5.x
as valid versions when debug log is enabled.
Change-Id: Ie20458d033c6d22842cb4a31b56765d4ba2ff123
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/936
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Fixes issue with big endian hosts and mis-aligned data on some hosts.
Fixes unaligned access exception on hosts that do not support unaligned
access when debugging some arm targets.
Signed-off-by: Jason Moehlman <jmoehlma@linux-software.com>
Change-Id: I6bc6fb1b3c3565b256674b9ef43ed2afd14f5178
Reviewed-on: http://openocd.zylin.com/996
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Other than a larger memory layout these new devices also have an extra
MER1 bit to perform the mass erase.
Change-Id: I7110a05bac95c1707160d1f5622181664291eb4a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/985
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
No function writes to MIPS32_PRACC_PARAM_IN addresses and probably has no much sense.
Any attempt to write to those addresses should be an error.
Change-Id: Iebea5fa9954e2cd56ad34976dd7d25009c6e6388
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/975
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Current code needs 101 pracc accesses for this function, this code needs 12 less.
There is a singularity in this code, is the only function that restore
a register from param out instead from pracc stack. Obviously the register
was previously stored at param out. This save 2 pracc accesses.
Change-Id: Ie95b6f983a3198dafc0eab2dd5acc11f871a8d83
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/958
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
All the the loads are done with lui and ori instructions, there is
no need to save any register, they will be overwritten.
Like in the previous patch, for speed optimization in write code,
same instructions can be saved if the lower half word or the upper
half word is 0.
If the lower half word is 0, it can be loaded with only a lui instruction.
If the higher half word is 0 it can be done with an ori instruction with register 0.
This code saves 10 pracc accesses at a minimum, and 40 at a maximum,
obviously if register 2 to 31 are 0 or a half word is 0
Current code needs 91 pracc accesses.
Change-Id: I892c5b440191d0c7a474c96845d41c373b7fc637
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/957
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
All the writes are done by the new function mips32_pracc_write_mem_generic().
The code is similar to the read generic code.
The reuse of register 15 as memory base address saves 3 pracc accesses.
The first write takes 13(12) pracc accesses and for additional writes 3(2).
Loading miniprograms should take 25% less time and loading fastdata transfer
handler code should be over 2x faster.
Change-Id: Ia3b24ba084af33be99da19f00a7fd4d1b291f350
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/956
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Really nothing new that not explained in previous patches.
The code is expanded as needed, there are no loops in pracc code.
For the first value pracc accesses are reduced from 39 to 16
and for aditional values from 10 to 3.
dump_image should work around 3x faster.
Change-Id: I37c9b13395c09eb52a91f10cdb6cbaedef8ab98b
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/955
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This function is highly optimized, there is not much to
improve.
Loading the base address for pracc access with the new
defined MIPS32_PRACC_BASE_ADDR saves one instruction.
The memory address is loaded in too steps. First the upper
address is loaded. The lower address is passed as an offset in
the memory load instruction.
The offset is signed, if the lower address is in the range of
0x8000 to 0xffff the offset is a negative value, and the upper
address must be incremented by 1.
Pracc accesses are now 12 instead of 14.
Change-Id: I286945b240ed5c5d5cc540780a41a8a5fa075da3
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/952
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
MIPS32_PRACC_BASE_ADDR is defined as 0xFF200000. Now is
possible to load the base address with a lui instruction and
only one pracc access.
Offsets to the pracc code addresses are defined to simplify the code
and probably make it a bit more readable or self-explained.
Change-Id: I853dd2d7fad52745931cc6e6be68c0ae156d897e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/951
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
The function mips_ejtag_read_debug() is defined in mips_ejtag.c
and is called only by mips_m4k_debug_entry() for reading the
CP0 debug register. The comment in this function is obviously wrong.
There is a generic function to read CP0 registers with similar code.
A call to mips32_cp0_read() should work in the same way.
The purpose of reading the debug register is to test if the DSS
bit is set and clear the SSt bit.
It is faster and easier if the SSt bit is cleared without any check.
Remark: DSS bit set only means that a debug single-step exception
ocurred, but it is not possible to step over a sdbbp instruction,
in this case DSS will not be set and the SSt bit not cleared by code.
Resume command at another address will step, so really the behavior
is not the same.
Change-Id: Ibd35f80e0f7669976d96f4ed813830cecf587971
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/950
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code is a bit large compared to mips_ejtag_step_enable().
With the mips32 xori instruction the code can be
reused.
The number of pracc accesses are reduced from 18 to 7.
Change-Id: If3974ebd64da4461c22b089796646990e68e1b72
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/944
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This reverts commit 452248af1d. This change
breaks all non-high speed adapters. The patch was not tested and did not get
any review.
Change-Id: Ib38fd242a202fd7c5a8711d9f857cd8f586df44e
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/973
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Commit c4ab127b40 introduces a copy&paste error which affects
the detection of the current thread.
As a result, the stack of the current thread won't be detected
correctly in most cases.
Change-Id: Ib46b8f64be8053d7e9103f427c66796963214419
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/974
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
An issue was observed when using an async algorithm with a target that had
not been previously reset beforehand. The target would enter a infinite
loop within target_run_flash_async_algorithm.
Add a timeout that will at least prevent this issue from happening. and also
suggest the user resets the target.
Change-Id: I5277e0d64e252d3d353e8d5bc9889a37fdc63060
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/949
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The order of the mrc/mcr command matches the ARM Architecture Reference
Manual. This patch corrects the help information for mrc/mcr.
Change-Id: I1f0e6a628a3644124591a6aa291b8a58cfd93b44
Signed-off-by: Karl Kurbjun <kkurbjun@gmail.com>
Reviewed-on: http://openocd.zylin.com/914
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
If we halt due to a breakpoint make sure that we do not remove it during a
step, only remove breakpoints we have created.
Change-Id: I060168e54e53637d4fbf3cbcf62072efdb353807
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/947
Tested-by: jenkins
This occurs when stepping past a breakpoint on a even address with
maskisr option set to auto
With -d3 the following log message appears in this case:
"Debug : Interrupt handlers didn't complete within time,
leaving target running"
Cause : Given a breakpoint is set on the lower half word and the PC is on
the upper half word. When another breakpoint is now set on the current PC
then resuming the core will not result in a break on the newly set
breakpoint. This has been observed on a STM32F1x, STM32F2x (CM3) but not
on a STM32F0x (CM0). It's not clear if this is a STM32F1/F2 only or a
general CM3 problem.
Change-Id: I384813f3bfdf935373b5e23cdb2d7f243c70cc00
Signed-off-by: Peter Horn <peter.horn@bluewin.ch>
Reviewed-on: http://openocd.zylin.com/864
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added in spi device table SPI Flash Winbond W25Q64CV 64Mbit
Its Device ID 0x001740ef is the same as Spansion S25FL064K (may
be a clone?)
Change-Id: I3cdbd182a0ccde75c78684cb9d54c76059bf34e0
Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it>
Reviewed-on: http://openocd.zylin.com/928
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The ChibiOS code was derived from other RTOS support code which
does not honor the target vs. host endiness.
The other RTOS code still needs to be fixed.
Change-Id: Idf42cfaa30945289bf1756ad6491fff84913eda9
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/962
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The stacking of ChibiOS/RT depends on the usage of an FPU. If the
FPU is enabled the FPU registers are also saved on context switch.
This patch adds automatic detection of FPU for armv7m targets.
Note: With this patch, openocd will only output an error message
warning that the FPU is enabled.
For further FPU support, the correct stacking information
also needs to be added.
Change-Id: I0984cbd9180f247ba2fa610e74a6413cc54239ea
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/961
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
We already have the address of the ReadyList provided by gdb.
It is wrong to resolve that address a second time and it only
works by accident.
Change-Id: I82fa2360931c416290cd7f83e1883f86f90dedc2
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/959
Reviewed-by: Joel Bodenmann <joel@unormal.org>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Seems ST have changed the ref manual (RM0313 rev1) and reverted to using
letters rather than numbers for the stm32f3x family.
Change-Id: I3a87ec9b0b2447d57dfef98603d30e28fe9ac927
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/926
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
The rtos layer was incorrectly handling a qCRC packet as a qC packet.
Make sure we check for the qCRC packet and return unhandled so the gdb
server gets a chance to handle it.
This packet is used in the gdb compare-sections cmd.
Change-Id: I21f8e5fa7225fccd13d65cf9e40186895065a7e3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/933
Tested-by: jenkins
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
All the packets received will be at start of the packet buffer, so use
more efficient strncmp.
Change-Id: Ib9c45d8f53425367006b1f880c1bde27f03a6cf9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/932
Tested-by: jenkins
Reviewed-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
The meminfo command cannot exist if the malloc.h header is not
present.
Cannot get the mac address without sys/ioctl.h and SIOCGIFHWADDR
defined
Change-Id: Ifc0fb98c3a60c53ad2e19473e08b34c460529d0b
Signed-off-by: Edgar Grimberg <edgar.grimberg@gmail.com>
Reviewed-on: http://openocd.zylin.com/912
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
rtos->current_thread is of type int64_t. All other commands already
respect this.
Change-Id: I9951946ff2a09c53cd78c6ab882c80cdd2ab7ac6
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/917
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Use ARRAY_SIZE in helper/types.h to determine the size of the
symbol list.
Change-Id: Icc9838323510f8602efa5d0162a4daed33f863b9
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/935
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
linux_get_symbol_list_to_lookup allocates to few memory. On 64 bit
systems the error did not show due to char* being twice its size,
leaving accidentally enough space.
This patch makes linux_get_symbol_list_to_lookup behave identical
to all other RTOS.
Change-Id: I290ea241fb20b65585c8be14609a92fdbd2a307d
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/934
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
This reverts commit 1e7e594452.
For some reason the above commit added a reply to the restart command - this is
not required as per the gdb docs.
Newer versions of gdb (7.0 and above) will complain about this reply.
Change-Id: Ieeae3dcf44d798a91dfc6f7348da982c2ce1be31
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/910
Tested-by: jenkins
Reviewed-by: Joel Bodenmann <joel@unormal.org>
Seems after a reset the stlink is not clearing the vector catch (VC_CORERESET)
in the Debug Control Register.
This has the side effect if the user presses an external reset the core will
halt, this patch fixes that.
Change-Id: Ic3b2c3991b79cacbbd901c02b79613c2e204e71f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/905
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Seems versions of gdb > 6.8 require an W stop reply after receiving a
kill packet.
Without this we receive the following error from gdb:
gdb/thread.c:72: internal-error: inferior_thread: Assertion `tp' failed.
Change-Id: I86765a321f0429c9b517fe13ded0ee2dbd4b2f87
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/911
Tested-by: jenkins
Reviewed-by: Joel Bodenmann <joel@unormal.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Flash algorithm for LPC17xx/LPC2xxx was trying to "reuse" previously
allocated working area on next flashing which is not possible -
working areas are freed automatically on reset. This caused all but
first flashing attempts to fail. As there is no point in storing pointer
to working area, it was converted to local variable.
Change-Id: I939946325ff9eecc4861c0f51ab0f73871a3d7b9
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/860
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Do some cleanup in lpc2000.c - concatenate short lines into single
longer lines, move variable declarations to "just before" they are
used, etc.
Change-Id: Ia7b9f0307dd4857ee8e15c8a6d4d7b5c4392fd80
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/861
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds ChibiOS/RT support. This patch requires at least
ChibiOS/RT development version starting from SVN revision 4734.
Note, that the Thread structures depend not only on the target
but also on the ChibiOS configuration at build time.
To correct this ChibiOS includes a new "memory signature" which
specifies the offsets.
Special thanks go to Peter Stuge and Spencer Oliver for their
continous input and feedback to this patch.
Change-Id: I842bf7ba6c2309a4efe93d29ea6cd0784a8b22a3
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/901
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
No change to code, just fix some formatting issues.
Change-Id: I177430a99bfecbf90a1ddf623321c29d4db516b0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/906
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Commit 43902905bb fixed a bug but also
introduced a regression. The RTOS GDB packet handler is always called,
not only when an RTOS is actually configured, so it is important to
check if an RTOS has been configured or not before actually processing
the qSymbol packet.
Change-Id: I1aed54f6c2817e1ebf99ddcda051df4554ea5a3a
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/907
Tested-by: jenkins
Since stlink is a special case it presents the same CPU core under a
different name, so copy the configuration to account for that.
Change-Id: I9febf79b388301bde6211d185b5b8161cdadb9ff
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/652
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
With the current timeout setting i = 10 in drtc_run_timeout()
I get "Error: too many retries waiting for DTC status" when
loading a program into the FLASH of an STM32F1.
By experimentation a value of i = 22 was found to be the minimum
on my system. Therefore the value has been increased to i = 50.
Change-Id: Ib67fc648ccaad305871b81c2c39e49de53c330a0
Signed-off-by: Peter Horn <peter.horn@bluewin.ch>
Reviewed-on: http://openocd.zylin.com/863
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The erase time for the option byte page is not directly specified but is
assumed to be the same as the other pages (or mass erase) which is 20 to
40 ms. The current timeout value is 10 which means 10 ms plus the time to
poll the status flag that many times.
With faster interfaces or drivers (such as when using the ftdi driver
instead of the ft2232 driver) the adapter delay is not enough in some
cases, unless the jtag freq is reduced as a workaround. The result is a
"timed out waiting for flash" error when trying to write the options.
Increase the timeout to a minimum of 100 ms, which is in line with the
other erase timeouts. Also make defines of both the erase and the program
timeouts.
Change-Id: Ia86e71505033c52b60ef30092000689fbb547a18
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/902
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The pointer must be non-null here since we returned if allocation failed.
Change-Id: I9b75099ed3b3870c815d1df5760ed1f3fe1d20d6
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/866
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>