hla: enable DWT component and fix watchpoints

The makes sure the DWT component is always enabled so that watchpoints
work as expected.

This does need merging into the existing cortex_m logic, however at the
moment this is non trivial.

Change-Id: Ic6cccd1badb51f70a2ca8ea9ab6923788a94c1bf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This commit is contained in:
Spencer Oliver 2013-01-25 15:32:42 +00:00 committed by Freddie Chopin
parent d631b2e5ac
commit 3eb7d77601
1 changed files with 4 additions and 4 deletions

View File

@ -339,7 +339,7 @@ static int adapter_debug_entry(struct target *target)
adapter_load_context(target);
/* make sure we clear the vector catch bit */
adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, 0);
adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA);
r = armv7m->core_cache->reg_list + ARMV7M_xPSR;
xPSR = buf_get_u32(r->value, 0, 32);
@ -434,9 +434,9 @@ static int adapter_assert_reset(struct target *target)
/* only set vector catch if halt is requested */
if (target->reset_halt)
adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, VC_CORERESET);
adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA|VC_CORERESET);
else
adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, 0);
adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA);
if (jtag_reset_config & RESET_HAS_SRST) {
if (!srst_asserted) {
@ -572,7 +572,7 @@ static int adapter_resume(struct target *target, int current,
resume_pc = buf_get_u32(pc->value, 0, 32);
/* write any user vector flags */
res = target_write_u32(target, DCB_DEMCR, armv7m->demcr);
res = target_write_u32(target, DCB_DEMCR, TRCENA | armv7m->demcr);
if (res != ERROR_OK)
return res;