* workflow: Run checkpatch against pull request only
Instead of arbitrarily picking 20 changes.
Change-Id: I5ec488aa4faa0b06056aa91d0432cda1674967b7
Signed-off-by: Tim Newsome <tim@sifive.com>
* Display FETCH_HEAD in the log
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
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Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
* Preserve artifact of Linux build, too.
That can be handy to e-mail to people who don't have a build setup.
Change-Id: I7b7e2d6f0033edf71f53211168f74b80ada64b97
Signed-off-by: Tim Newsome <tim@sifive.com>
* workflow: Run Linux build on Ubuntu 20.04, which is LTS.
This makes the binaries more useful.
Change-Id: I0cf6df68f03c4161222baa222c466fe0004ea769
Signed-off-by: Tim Newsome <tim@sifive.com>
* Use checkoutv3
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
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Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
If hart can't change pc (e.g. it is running), resume command should
fail.
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: I14627366d574d806ea16262b7d305d8161f8bcc2
Since the deletion of `-rtos hwthread`, there is no need to treat harts
with `-rtos` specified differently on reset.
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: I88a9129936b5172bb7479dfa1255e29ff460c054
No other attempt is made at doing anything hypervisor-specific. Are
other things necessary?
Change-Id: Ib65f114888840cf0878f9bfe028c9a42b436aa3f
Signed-off-by: Tim Newsome <tim@sifive.com>
The first part of the command should be only "riscv expose_csrs",
the $_TARGETNAME value is not necessarily "riscv", in fact it is
generally riscv.cpux.
Signed-off-by: Hang Xu <xuhang@eswincomputing.com>
Icount triggers don't have a maskmax field at all. This is a cut and
paste error.
Change-Id: I001b3d41bf683599706dba713f7be475e8dd1668
Signed-off-by: Tim Newsome <tim@sifive.com>
When permission bits R, W, and X in PTE all three are zero,
the PTE is a pointter to the next level of the page table;
otherwise, it is a leaf PTE. Here PTE_W is missed.
Change-Id: I82a4cc4e64280f0fcad75b20e51b617520aff29b
Signed-off-by: panciyan <panciyan@eswincomputing.com>
Untested, because I don't have a target that implements this.
Change-Id: Iff82c124e7caf8e8960a9da62d8e727afb2c6b8a
Signed-off-by: Tim Newsome <tim@sifive.com>
It is possible for triggers of the same type to support different match
field values, so it is needed to try all the triggers, not just the
first one.
Fixes issue #788.
Signed-off-by: Evgeniy Naydanov evgeniy.naydanov@syntacore.com
Change-Id: I4c9fbc98bae7259377456d9ad8e770232724a592
We should avoid using x16~x31 register in program buffer because there
are no such general purpose registers in RVE(Embedded) extension.
For targets that support rvE, when the parameter increment=0
and count>1 of the read_memory_progbuf function, openocd will cause
an error due to the use of the s2 register.
For example:
{Command} {riscv repeat_read} count address [size=4]
Change-Id: I8b74dcc15cd00a400f2f1354c577a82132394435
Signed-off-by: Hang Xu <xuhang@eswincomputing.com>
* Calculate the FreeRTOS type sizes and offsets more adaptively.
The definition of TickType_t varies between different targets. And it is also related to configUSE_16_BIT_TICKS option.
Thus introduce a new command to make sure we are using a correct ticktype size.
Change-Id: I9e38b331a9f07b96eb9a2c259e32377fca0106ad
Signed-off-by: Chao Du <duchao@eswincomputing.com>
* redundant semicolon.
Change-Id: Ia21f0537e476099d8fe519ef78b3328d14123a38
* Update after review.
Change-Id: I1825185ec9b0557d7e01f34a8f366661b3734aa7
* update doc
Change-Id: I24b21c88b02ca3d76f1362f2545e86c068fc0ec6
---------
Signed-off-by: Chao Du <duchao@eswincomputing.com>
This probably crept in when merging in upstream in the past.
Change-Id: Iccce4515b6b5d4a90773f6d432754b065fb240bb
Signed-off-by: Tim Newsome <tim@sifive.com>
Tim Newsome
Evgeniy Naydanov
Mark Zhuang
Hang Xu
panciyan
Chao Du