Merge pull request #825 from riscv/hypervisor

target/riscv: Set hypervisor bits.
This commit is contained in:
Tim Newsome 2023-04-05 14:57:57 -07:00 committed by GitHub
commit 21d2787d64
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 9 additions and 3 deletions

View File

@ -4547,6 +4547,8 @@ static int riscv013_on_step_or_resume(struct target *target, bool step)
dcsr = set_field(dcsr, CSR_DCSR_EBREAKM, riscv_ebreakm);
dcsr = set_field(dcsr, CSR_DCSR_EBREAKS, riscv_ebreaks);
dcsr = set_field(dcsr, CSR_DCSR_EBREAKU, riscv_ebreaku);
dcsr = set_field(dcsr, CSR_DCSR_EBREAKVS, riscv_ebreaku);
dcsr = set_field(dcsr, CSR_DCSR_EBREAKVU, riscv_ebreaku);
if (riscv_set_register(target, GDB_REGNO_DCSR, dcsr) != ERROR_OK)
return ERROR_FAIL;
if (riscv_flush_registers(target) != ERROR_OK)

View File

@ -736,7 +736,9 @@ static struct match_triggers_tdata1_fields fill_match_triggers_tdata1_fields_t2(
static struct match_triggers_tdata1_fields fill_match_triggers_tdata1_fields_t6(
struct target *target, struct trigger *trigger)
{
RISCV_INFO(r);
bool misa_s = riscv_supports_extension(target, 'S');
bool misa_u = riscv_supports_extension(target, 'U');
bool misa_h = riscv_supports_extension(target, 'H');
struct match_triggers_tdata1_fields result = {
.common =
@ -744,8 +746,10 @@ static struct match_triggers_tdata1_fields fill_match_triggers_tdata1_fields_t6(
field_value(CSR_MCONTROL6_DMODE(riscv_xlen(target)), 1) |
field_value(CSR_MCONTROL6_ACTION, CSR_MCONTROL_ACTION_DEBUG_MODE) |
field_value(CSR_MCONTROL6_M, 1) |
field_value(CSR_MCONTROL6_S, !!(r->misa & BIT('S' - 'A'))) |
field_value(CSR_MCONTROL6_U, !!(r->misa & BIT('U' - 'A'))) |
field_value(CSR_MCONTROL6_S, misa_s) |
field_value(CSR_MCONTROL6_U, misa_u) |
field_value(CSR_MCONTROL6_VS, misa_h && misa_s) |
field_value(CSR_MCONTROL6_VU, misa_h && misa_u) |
field_value(CSR_MCONTROL6_EXECUTE, trigger->is_execute) |
field_value(CSR_MCONTROL6_LOAD, trigger->is_read) |
field_value(CSR_MCONTROL6_STORE, trigger->is_write),