Commit Graph

6145 Commits

Author SHA1 Message Date
Matthias Welwarsky f28d5ee71f aarch64: fix error recovery in aarch64_dpm_prepare
Flush DTRRX with a dummy read if it's full, clear sticky errors
by writing CSE bit to EDRCR register.

Change-Id: Ia42ae9d3859ba6cbe892d48584e21acdd4e25c84
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 21a5c40430 aarch64: formalize use of CTI in halt and resume
Use configured CTI base address instead of hardcoded value, if
available.
Use symbolic constants instead of raw hex offsets.
Trim halt and resume code to what is actually necessary.

Change-Id: I4997c2bcca7cebf5ad78859a6a12abe8639594ed
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 4ba8388f26 aarch64: fix context and hybrid hardware breakpoints
Fix 64bit address setting
Fix register spacing (16 instead of 4)
Set HMC bit for all but linked context match breakpoints,
where the bit is ignored anyway

Change-Id: I48428f39154a6fe5fadc075ca918d1500a0bb241
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky b085570de9 aarch64: deconflict debug register names
CPUDBG_ -> CPUV8_DBG_ for armv8 debug registers.

Change-Id: I3d24cc209309fa9bbeb5c3e6c88a572383c9360e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky 53573f7860 aarch64: Implement MA mode for bulk memory reads and writes
- 64bit addresses are supported
- Aarch32 state is supported

Change-Id: I8c37fa166954d09195d08c6963b8017194e350f5
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky db97bb4a9d aarch64: make DCC read/write functions operate on struct armv8_common
Change the signature of aarch64_(read|write)_dcc[_64] to take a
"struct armv8_common *" as the context to operate on. No functional
change.

Change-Id: Ie501113f65ea22aff2eee173ec717f6908a63494
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky a3b9e12aec aarch64: introduce dpm extension for ARMv8
Add or move ARMv8 related dpm function to their own source module

Change-Id: Id93d50be0b8635bd40ddb2a74fe8746ff840d736
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky df32af234c target: add -ctibase config option in addition to -dbgbase
Some vendors don't fully populate the ROM table, e.g. BCM2357 (used in
Raspberry Pi 3) doesn't list CTI, however it is mandatory for halting
an ARMv8 core and therefore it's always present (and required),
regardless of the ROM table listing it or not.

Change-Id: Ia18a4f1b5b931ccd19805b188ebf737c837c6b54
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky f2a271e264 aarch64: fix reading of MPIDR
read MPIDR register through correct MSR instruction.

Change-Id: I7e2d00c2871191c4168b177a7a809443b0db4c82
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:38 +01:00
Matthias Welwarsky ced4108d26 aarch64: add symbolic definitions for armv8 opcodes
To replace hexadecimal constants with descriptive names and increase
flexibility.

Change-Id: I6f7b6f045866ed8b9360f54b640ecdb307eebc51
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 14:01:26 +01:00
David Ung 6b554b3b0e aarch64: Correct target state for hardware step
When using hardware step for doing stepping, the existing DSCR records
the event as external debug request.  This will generate a SIGINT event
to GDB and causes it to stop the stepping process.
For aarch64, read DESR to check if the event is a hardware step and set
state to DBG_REASON_SINGLESTEP.
With this patch, GDB can now do source level stepping.

Change-Id: I1d06f819578c74b3ac17376c67f882adddea1f52
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:59:15 +01:00
David Ung a12c15e21f aarch64: Enable resuming with address
Enable resuming to an address.

Change-Id: I29c7d3b56f6cbf8b3cd02c93733fc96f45000af3
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:58:05 +01:00
pierre Kuo 13d13b2e2a aarch64: Add instruction stepping support using hardware step
Use AARCH64's hardware step event to do stepping.

Change-Id: I2d029ceeadd381913d0c3355c8787b11dacff7f7
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:57:29 +01:00
David Ung 5ee67ce024 aarch64: Enable halting debug mode on breakpoint set
Ensure that we allow halting debug mode after setting breakpoint

Change-Id: I6f0d7a4a4775a93c133fb1ec31dfe3324d9f7395
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:56:39 +01:00
pierre Kuo 236c9966dd aarch64: Add hardware breakpoint support
Enable the use of hardware breakpoint on AARCH64.

Change-Id: I59caaa6d92ac60278af8938625b1790a1787372f
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:55:55 +01:00
David Ung d376f7f518 aarch64: Add ARMv8 AARCH64 support files
Add new AARCH64 target and ARMv8 support files.
This is an instantiation from the cortex_a files but modified to support
64bit ARMv8. Not all features are complete, notably breakpts and single
stepping are not yet implemented.
Currently it lets you halt of the processors, resume, dump cpu
registers,
read/write memory and getting a stack trace with gdb.

> halt
invalid mode value encountered 5
target state: halted
unrecognized psr mode: 0x5
target halted in ARM state due to debug-request, current mode:
UNRECOGNIZED
cpsr: 0x600001c5 pc: 0x00093528
MMU: disabled, D-Cache: disabled, I-Cache: disabled

> targets
    TargetName         Type       Endian TapName            State
--  ------------------ ---------- ------ ------------------ ------------
 0* cpu0               aarch64    little cpu.dap            halted

> reg
===== arm v8 registers
(0) r0 (/64): 0x00000000FFFFFFED (dirty)
(1) r1 (/64): 0x00000000F76E4000
(2) r2 (/64): 0x0000000000000000
(3) r3 (/64): 0x0000000000010000
(4) r4 (/64): 0xFFFFFFC06E2939E1
(5) r5 (/64): 0x0000000000000018
(6) r6 (/64): 0x003A699CFB3C8480
(7) r7 (/64): 0x0000000053555555
(8) r8 (/64): 0x00FFFFFFFFFFFFFF
(9) r9 (/64): 0x000000001FFEF992
(10) r10 (/64): 0x0000000000000001
(11) r11 (/64): 0x0000000000000000
(12) r12 (/64): 0x00000000000000F0
(13) r13 (/64): 0x00000000EFDFEAC8
(14) r14 (/64): 0x00000000F6DDA659
(15) r15 (/64): 0x0000000000000000
(16) r16 (/64): 0xFFFFFFC0000F9094
(17) r17 (/64): 0x0000000000000000
(18) r18 (/64): 0x0000000000000000
(19) r19 (/64): 0xFFFFFFC00087C000
(20) r20 (/64): 0x0000000000000002
(21) r21 (/64): 0xFFFFFFC000867C28
(22) r22 (/64): 0xFFFFFFC000916A52
(23) r23 (/64): 0xFFFFFFC00116D8B0
(24) r24 (/64): 0xFFFFFFC000774A0C
(25) r25 (/64): 0x000000008007B000
(26) r26 (/64): 0x000000008007D000
(27) r27 (/64): 0xFFFFFFC000080450
(28) r28 (/64): 0x0000004080000000
(29) r29 (/64): 0xFFFFFFC00087FF20
(30) r30 (/64): 0xFFFFFFC000085114
(31) sp (/64): 0xFFFFFFC00087FF20
(32) pc (/64): 0xFFFFFFC000093528
(33) xPSR (/64): 0x00000000600001C5

And from gdb

(gdb) bt
 #0  cpu_do_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/mm/proc.S:87
 #1  0xffffffc000085114 in arch_cpu_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/kernel/process.c:107
 #2  0x0000000000000000 in ?? ()

Change-Id: Iccb1d15c7d8ace7b9e811dac3c9757ced4d0f618
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:54:49 +01:00
David Ung 84a0bb4a3c arm_dpm: Add 64bit register handling.
Add various function to read/write ARMv8 registers.

Change-Id: I16f2829bdd0e87b050a51e414ff675d5c21bcbae
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:54:01 +01:00
David Ung 9cbfc9feb3 arm_dpm: Add new state ARM_STATE_AARCH64
Add new enum ARM_STATE_AARCH64 to the list of possible states.

Change-Id: I3cb2df70f8d5803a63d8374bf3eb75de988e24f8
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:52:52 +01:00
David Ung ea45db5c8a server: Allow 64 address to be send over GBD server
Accept 64 bit addresses from GDB read memory packet.
Also allow breakpoint/stepping addresses to take 64bit values.

Change-Id: I9bf7b44affe24839cf30897c55ad17fdd29edf14
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:51:00 +01:00
Dongxue Zhang 47b8cf8420 target: Add 64-bit target address support
Define a target_addr_t type to support 32-bit and 64-bit addresses at
the same time. Also define matching TARGET_PRI*ADDR format macros as
well as a convenient TARGET_ADDR_FMT.

In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000)
be least invasive by leaving the formatting unchanged apart from the
type;
for generic code adopt TARGET_ADDR_FMT as unified address format.

Don't silently change gdb formatting here, leave that to later.

Add COMMAND_PARSE_ADDRESS() macro to abstract the address type.
Implement it using its own parse_target_addr() function, in the hopes
of catching pointer type mismatches better.

Add '--disable-target64' configure option to revert to previous 32-bit
target address behavior.

Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
[AF: Default to enabling (Paul Fertser), rename macros, simplify]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:50:17 +01:00
Tim Newsome 075c0e80d1 Add debug_defines.h.
Change-Id: I94753f9bed11cbc978daa0f3ea3ecf2023b93893
2017-02-09 09:57:54 -08:00
Tim Newsome 2ad366e658 Detect and smoketest data and ibuf registers.
Change-Id: I7ee4817ec63041a1577b83392d40b676fb67c207
2017-02-08 20:40:37 -08:00
Tim Newsome 8cac7d0cee Correctly parse dmcontrol.
Change-Id: Ibae425f4ccbe9e504c41e185f264f667e091fca4
2017-02-08 19:47:34 -08:00
Tim Newsome 8af4a9a053 Update DMI bus width for 0.13.
Change-Id: Ieff13a7a0084fe822b7cc6d927727eba4f158ef0
2017-02-07 11:28:50 -08:00
Megan Wachs 7b95554ff5 Merge remote-tracking branch 'origin/riscv' into HEAD 2017-02-07 11:24:12 -08:00
Tim Newsome ecc5b6ecad Add missing header file.
Change-Id: I19df5112c2503ec6652f2d09e7324180af5024df
2017-02-05 21:32:44 -08:00
Megan Wachs 2ae0078fc7 Use the set/reg register error return code when registers don't exist. 2017-02-05 21:06:43 -08:00
Tim Newsome 6f78eb1ec1 Add the first difference for 0.13 targets.
Just to confirm the 0.13 code takes a different path.

Change-Id: I7f1c9c8f3b586aee001dbeef2213f5f2e6a94f36
2017-02-05 18:21:34 -08:00
Tim Newsome 8d195afd2d Use the csrNNN name instead of "mstatus".
Fixes flashing code.

Change-Id: Id12c926f5ada009e06f6601362deefec946afc98
2017-02-05 18:19:00 -08:00
Tim Newsome d055f86552 Most gdbserver tests pass now.
Change-Id: I14a8360d9cf2800ca5e6a44f7e58102b2baef719
2017-02-05 18:09:19 -08:00
Megan Wachs 5d82a395f1 riscv: disable interrupts for all priviledge levels 2017-01-25 21:51:02 -08:00
Megan Wachs d5892f0ee5 riscv: Use proper UINT packing and unpacking routines for disabling interrupts before running algorithms. 2017-01-25 15:23:10 -08:00
Megan Wachs 5766efe0c3 riscv: Globally disable interrupts when running algorithms. 2017-01-25 11:35:57 -08:00
Matthias Welwarsky 59820c18d0 arm_dpm: avoid duplicating the register cache
This bug was already attempted to fix in an earlier patch but
merging the "defer-examine" feature caused a regression, which this patch
tries to fix again.

Change-Id: Ie1ad1516f0d7f130d44e003d6c29dcc1a02a82ca
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3951
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-20 08:28:35 +00:00
Paul Fertser af4a2f3518 jtag: core: report TRST and SRST as asserted only when they really are
When SRST is never enabled, the global jtag_srst variable is left at its
initial state, that is, -1, and it does _not_ mean SRST is currently
asserted. Same about TRST.

Fixes "reset halt" in cases when srst_pulls_trst but srst usage is not
enabled.

Change-Id: I8d2e9120479de4cfbf5561033926c9ef945eecc9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3943
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-01-15 11:02:14 +00:00
Tomas Vanek 93bc4ec40f flash/nor: fix doc/help and range test for flash protect
Commit 77a1c01ccb introduced infrastructure
for utilizing protection blocks of different size than erase sector.
Parts of doc/help kept reading 'sector' instead of 'protection block'.
flash_driver_protect() parameter range testing did not switched
to bank->num_prot_blocks.
This change fixes it.

Change-Id: Iec301761190a1a1bcc4cb005a519b9e5e4fede51
Reported-by: Mark Odell <mark@odell.ws>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3917
Tested-by: jenkins
Reviewed-by: Mark Odell <mrfirmware@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 11:01:36 +00:00
Matthias Welwarsky 2934ac454e adi_v5_jtag: make sure SSTICKYERR is cleared after a POR
Don't terminate the transaction end-check early if debug power-loss
was detected, without clearing SSTICKYERR.

Change-Id: I83b6a4a20523eea42e48a15297f972a730aa21a8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3947
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 11:00:32 +00:00
Andreas Fritiofson 7436f7c2c0 helper,rtos,server: Restore missing warning flags
These libraries override the used CFLAGS without adding the
defaults. This didn't have any effect until change
http://openocd.zylin.com/3870 (ef4c139). Restore by adding
AM_CLAGS to the per-target CFLAGS.

Interestingly, automake seems to clear the CFLAGS for the target
even if the override variable is only mentioned within a non-active
conditional branch, such as the IS_MINGW for the affected libraries.

Change-Id: I805206865e59e3fa33a7ea3c0d3472e51219351c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3927
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 10:16:16 +00:00
Paul Fertser 7851207cf0 jtag: drivers: build usb_blaster only if enabled
Fix build failure when libusb dev files are not available and
so usb_blaster is disabled.

Change-Id: I4cda7df689cdb4b62b733cbbab813241cf561e29
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3920
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-01-15 10:14:53 +00:00
Marc Schink 33db10a158 libjaylink: Update to 0.1.0 release
Change-Id: I5a905ccda346c09187f7f8e8229ae71d3353128f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3946
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15 10:10:48 +00:00
Paul Fertser 6f34e64b09 target: armv7a: remove unused level_num field from armv7a_cachesize
This was never used and produces warnings on some systems.

Change-Id: I48d2c5b79890bb2d70c5fae95278b8eb62743398
Reported-by: Tommy Murphy <tm1234@users.sf.net>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3891
Tested-by: jenkins
2016-12-25 09:48:19 +00:00
Paul Fertser d491b88dd9 target: cortex_a: fix segfault when SPSR is not properly handled
OpenOCD doesn't (yet) know how to handle HYP mode properly so spsr
register is not getting initialised when OpenOCD connects to a target
stopped in this mode.

Reported on IRC by thinkfat and nearffxx.

Change-Id: I4bda9ba0c582c8e9cacefe708cc4a3d947151f84
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3906
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Chengyu Zheng <chengyu.zheng@polimi.it>
2016-12-25 09:23:56 +00:00
Andreas Fritiofson 6ddf26c83d Search for scripts relative to the executable on all(?) platforms
Add a helper to hide the platform-dependent method to get a
canonical, absolute, /-separated path to the executable.

Use this and the relative path from BINDIR to PKGDATADIR to
construct a search path that finds the scripts even if the
installation dir is moved, as long as the structure below $prefix
is maintained.

This method should fully support all the tricks you can to with
autotools to customize the installed layout such as overriding the
default directories at configure-time and overriding the configured
directories at build-time.

The exe path detection methods are combined from
http://openocd.zylin.com/3388 by Rick Foos and
http://openocd.zylin.com/3537 by Steven Stallion, as well as tips
found all over internet.

Change-Id: Ifc9cc9dd0bf52fbd67b1b0f2383318cda0c422c4
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Steven Stallion <sstallion@gmail.com>
Reviewed-on: http://openocd.zylin.com/3889
Tested-by: jenkins
Reviewed-by: Rick Foos <rfoos@solengtech.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-25 09:22:29 +00:00
Paul Fertser 0dc707a6d6 jtag: drivers: ulink: fix uninitialised variable warning
This prevents clean build when --enable-verbose-jtag-io is used.

Change-Id: I5c9e6968cfa425b1f6f92f59156b6ae38cb9af18
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3907
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-12-25 09:17:30 +00:00
mwachs5 ddb4caf846 Correct off by 1 in malloc, which causes this to fail on macOS (and in theory on any platform). 2016-12-23 17:53:26 -08:00
Megan Wachs 37ca3d7810 riscv: Increase the number of Algorithm Steps 2016-12-18 12:11:48 -08:00
Andreas Fritiofson 5be455a710 Convert to non-recursive make
Change-Id: I11f8bc8553957e2ff083c09e72e16881e4d3bb6f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3865
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 16:23:10 +00:00
Andreas Fritiofson 95de342a93 configure: Use same case for libjaylink as for other libs
Change-Id: I60d91a0543d9b8c580254cdc5f04b2e60209b98b
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3868
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 15:09:18 +00:00
Paul Fertser 702b150a6b target: LS1_SAP: fix "declaration of 'read' shadows a global" warning
Change-Id: I7070193819cc134f9fe1427c20a11160ec415ccb
Reported-by: Jens Bauer <jens-lists@gpio.dk>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3877
Tested-by: jenkins
2016-12-08 15:08:42 +00:00
Andreas Fritiofson 50e2253ab9 target: Replace malloc+manual zeroing with calloc
Change-Id: I3c782c34b59cb36b8ca1d36e9c804c67bae5cb45
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3667
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 14:59:40 +00:00
Marc Schink 082b88bc8a jlink: Output libjaylink version
Output the package version of libjaylink to ease debugging.

Change-Id: I3b9da6d046d140ba850056c98e67bed22c885ee0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3887
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 13:33:57 +00:00
Marc Schink a2942c95c8 libjaylink: Update to latest master branch
The changes since the last update are mainly related to the build
system, preparations and cleanups for the upcoming release.

If there are no bugs reported, this will be the last update before the
libjaylink 0.1.0 release.

Change-Id: I4cec9bb61159f6153690aaf39c1d12ba0baacf9b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3886
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 13:33:01 +00:00
Marc Schink 2e0e11b766 jlink: Add EMUCOM support
EMUCOM is a way to communicate with a J-Link device via so called
channels. A channel can either be read or written in a single
operation.

Beside the reserved channels for SEGGER, there are channels available to
implement vendor and/or device specific functionalities. For example,
EMUCOM is used on many starter and development kits from Silicon Labs to
access power measurements and various other information and settings.

Change-Id: I6094109c043b34aed4a40ceabe71f30ff896bf1d
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3794
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 13:32:11 +00:00
kevin c37a88c92f flash/nor/efm32: Support flash size smaller than 32k
The current implementation fails on devices with less than 32k of
flash (such as several devices in the Zero Gecko family) because
the 'assert' assumes (incorrectly) that the number of flash banks
will always be >= 32.

This change ensures that at least one word of lock bits is always read
in order to support devices with less than 32k of flash.


Signed-off-by: Kevlar Harness <software@klystron.com>
Change-Id: I59febe2cb690c893a5057a5f72918e146cf2afe4
Reviewed-on: http://openocd.zylin.com/3806
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 13:30:24 +00:00
Andreas Fritiofson 1039ed3ff2 xscale: Move debug handler to contrib/loaders
Avoid special rules to generate array at compile time by shipping
the generated file. Convert to Makefile build like the other
loaders.

Change-Id: I5a05edddcfaff3d395086cd3aa33120f8a7aa9dc
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3864
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 13:11:42 +00:00
Matthias Welwarsky cdba6ba0ad cortex_a: fix reset for SWD transport
Change b0698501b0 fixed
reset for i.MX6 and TI Sitara SoCs but broke reset for
cortex-a targets that use SWD. This patch is a work-
around that forces asserting SRST when SWD is used.

Change-Id: I7e39f2a469b9b4b2b74ad48ba49f2eeb58528921
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3641
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 13:03:49 +00:00
Andreas Fritiofson 3a4af87487 Remove build date from banner for releases
In support for reproducible builds, see
https://wiki.debian.org/ReproducibleBuilds

Fixes Debian bug #834316.

Change-Id: Id81ec72a87bf6dd99abfd2a0ae074658111bc9a3
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3866
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:55:19 +00:00
Matthias Welwarsky 097aa2979e cortex_m: allow setting debug ap during create
This patch adds a Cortex-M private configuration option
that allows setting the acess point during target
creation. This circumvents situations in hybrid systems
when the correct access point can not be automatically
detected.

Change-Id: If313a5250e6e66509bb9080f3498feab7781dced
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3639
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:35:58 +00:00
Vianney le Clément de Saint-Marcq 1d8b6b7434 jtag/drivers/openjtag: Add support for Cypress CY7C65215
The Cypress CY7C65215 Dual Channel USB-Serial Bridge Controller [1]
understands the OpenJTAG protocol over a proprietary USB interface.

This patch adds support for the CY7C65215 to the openjtag interface
driver.  A new configuration option, `openjtag_variant`, allows to
select the transport to use.

Libusb (1.x or 0.1) is now a hard dependency of the openjtag driver.
This should not be a big issue as libftdi also depends on it.

[1] http://www.cypress.com/?rID=82870

Change-Id: I55ffb3fd9e006eb311e405d9fb836bb119644bfd
Signed-off-by: Vianney le Clément de Saint-Marcq <vianney.leclement@essensium.com>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-on: http://openocd.zylin.com/2805
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:35:23 +00:00
Marc Schink 69ff7354d9 helper: Code cleanup for hexify()
Simplify hexify() and do not longer use 0 as special case for the
parameter 'count' to determine the string length of the binary input.
Instead, use strlen() outside of the function if needed.
Additionally, fix the return value and return the length of the
converted string. The old function always returned 2 * count.

Also, use more appropriate data types for the function parameters and
add a small documentation.

Change-Id: I133a8ab786b8f7c1296afcaf9c0a0b43881e5112
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3793
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-12-08 12:34:53 +00:00
Sean Cross 1461237073 jtag: drivers: bcm2835gpio: set 4ma drive, slow slew rate
Both the drive strength and slew rate are currently set to very high
values.  This causes the waveforms to overshoot and be less reliable
when operating at high speed.

This patch lowers the slew rate and sets the drive strength to 4ma,
improving the waveform output.

Change-Id: I761d35cd64bc54a9e94043904ef00a003b056af0
Signed-off-by: Sean Cross <sean@xobs.io>
Reviewed-on: http://openocd.zylin.com/3707
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Philipp Guehring <pg@futureware.at>
2016-12-08 12:34:09 +00:00
Steven Stallion 50dd7207ea gdb_server: support qXfer:threads:read packet
This patch adds support for the qXfer:threads:read packet. In addition
to providing a more efficient method of updating thread state, recent
versions of GDB (7.11.1 and up) can also report remote thread names.
While thread names are not enabled in this patch due to its limited
applicability at the moment, it can be enabled at a later date with
little effort.

As a part of revamping how threads are presented to GDB, extra info
strings for each of the supported RTOSes were updated to match
conventions present in the GDB source code. For more information, see
remote_threads_extra_info() in remote.c. This results in a much smoother
experience when interacting with GDB.

It is also worth mentioning that use of qXfer:threads:read works around
a number of regressions in older versions of GDB regarding remote thread
display. Trust me, it's great.

Change-Id: I97dd6a93c342ceb9b9d0023b6359db0e5604c6e6
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3559
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:34:00 +00:00
Steven Stallion c0e7ccbd87 semihosting: support fileio operation
This patch adds support for bridging semihosting to GDB's File-I/O
remote protocol extension. For the most part operations match up 1:1,
however some require a working area to complete successfully, namely
operations that devolve to read, stat, and gettimeofday.

A new command was added to enable support for fileio named `arm
semihosting_fileio`, which ensures that the default behavior remains
intact for those that prefer it.

Finally, redundant logging was removed from the target_arch_state
function; this permits ARM targets to quiesce log output when polling
for a fileio reply. This prevents filling the logs with halt/resume
messages when using semihosting fileio.

Change-Id: Ifbb864fc2373336a501cc0332675b887b552e1ee
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3566
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:32:58 +00:00
Owen Kirby dc0a009ef4 at91sam4: Add missing SAM4S family CHIPIDs and remove FWS=6.
Add missing CHIPID values for all SAM4S parts listed in revision K of
Atmel-11100-32-bit Cortex-M4-Microcontroller-SAM4S_Datasheet.pdf. I have
also removed the FWS=6 workaround, as this appears to be a copy-paste error
from the SAM3X family.

Change-Id: I1ce1d82911f39d6fcb8f04034f5c9c9bf2818466
Signed-off-by: Owen Kirby <oskirby@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3837
Tested-by: jenkins
2016-12-08 12:31:42 +00:00
Owen Kirby c591f109c3 at91sam4: Add flash description and chipid for SAM4Cxx variants.
Chip ID and flash layout taken from
Atmel-11102F-ATARM-SAM4C32-SAM4C16-SAM4C8-SAM4C4-Datasheet_27-Mar-15
and tested on a SAM4C32-EK (rev A).

Change-Id: I68aae5b60994c0b5964ea9031d40bc76ba025675
Signed-off-by: Owen Kirby <oskirby@gmail.com>
Reviewed-on: http://openocd.zylin.com/3527
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-12-08 12:31:14 +00:00
Paul Fertser aa2c38d50c jtag: drivers: cmsis-dap: fix operation with SAMD10 Xplained board
Change-Id: I9164edeb83c9a9106e74798e98b9517177e83358
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3856
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-12-08 12:30:52 +00:00
Andreas Fritiofson 063253fa89 helper: Update jep106 database to JEP106AT
Change-Id: I2dac416189d16938597c073fd35ad654bca7484c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3871
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:30:14 +00:00
Evan Hunter 3b021e013f Cortex-R: Force usage of physical memory read/write since there is no MMU
Change-Id: I69d6e6301ab66744258fe650a76c7241bebe00a8
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/3203
Tested-by: jenkins
Reviewed-by: Girts Folkmanis <opensource@girts.me>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:30:00 +00:00
Steven Stallion 1eae39b40d rtos: add support for uC/OS-III
This patch introduces RTOS support for uC/OS-III. Currently, only
FPU-less ARM Cortex-M targets are supported. Due to the configurability
of the RTOS, an OpenOCD-specific file must be linked along with the
project to determine the correct offsets within the OS_TCB structure.

In addition to the above, a crash was fixed in rtos_get_gdb_reg_list
such that RTOS support could be used between resets without restarting
OpenOCD and support for the Hg packet was cleaned up.

Change-Id: Ide004a689e6b886185df665c00fb644629eb31d1
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3556
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:29:35 +00:00
Matthias Welwarsky 29964c7984 target: Add verify_image_checksum command
This avoids the secondary binary search if the checksum is different

Change-Id: I986ba7687cea76f30e37a6bca58aabde18198263
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/2869
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:28:37 +00:00
Andreas Färber b9417ea19c xmc4xxx: Add support for XMC4300
XMC4300 can reuse the existing XMC4700/XMC4800 sectors support.
Add support for XMC4300 AA to the info command.

Change-Id: Id929a51d20c73bd869a4457ffedc48ad5fa3f2df
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3875
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:27:54 +00:00
Jiri Kastner cac446ca6b dap_dp_init: remove loop
current loop sounds to me like 'we don't know what we do, let's do it ten times, maybe we will have luck'.
should be enough to 'ping' debug port using reading CRTL_STAT.

tested on cortex-a8, snapdragon, jetson k1, cortex-r5, cortex-r4

Change-Id: Ibc62ac1eca06c141f4fccd5de7b11350ca1f35fd
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Tested-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/3193
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Liviu Dudau <liviu@dudau.co.uk>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:25:52 +00:00
Matthias Welwarsky 0a2f1b29e6 cortex_a: remove partnum magic from arp_examine and dbginit
Depending on the Debug implementation the "OS Lock" feature might be
implemented or not. It is not actually depending on the part number of the
implemented ARM core but on the DBGOSLSR.OSLM bits. This patch removes
querying the part number and implements proper parsing of OSLM. Result is
a more generic approach that will work out-of-box on more devices.

Change-Id: I79e052869c2f9af1d7fdedef42faddb7292e7332
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3213
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:25:35 +00:00
Matthias Welwarsky 53a936afc0 Add -defer-examine option to target create command
The '-defer-examine' option to target create allows declaring targets
that are present on the chain, but not fully functional.  They will
be skipped by the initial arp_examine as well as arp_examine after
reset.

Manual examine using 'arp_examine' is needed to examine them, with the
idea that some kind of actions is neeed to bring them to a state where
examine will succeed (if at all possible).

In order to allow value less options to target command, I had to relax
the goi.argc check in jim_target_configure().

Change-Id: I9bf4e8d27eb6476dd9353d15f48965a8cfd5c122
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3076
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-12-08 12:24:11 +00:00
Tomas Vanek 4732471b2e flash/nor: at91samd protection bits write fix
Flash protection set on a device with MANW=1 was lost after reset.
Since #2903 the driver honored MANW bit and issued Write Page command just
for main flash write. This change adds similar technique to
samd_modify_user_row().

Minor code improvements:
samd_check_error() returns error code corresponding to error type
instead of bool.

samd_check_error() does not clear STATUS register if no error bit is set.

Eliminated double error check in call sequence samd_issue_nvmctrl_command()
folowed by samd_check_error().

Missing error code ERROR_FLASH_PROTECTED added to src/flash/common.h.

Change-Id: Icf59ab8803305d0cb3170c8a5089b8f9828b99f8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3550
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-12-08 12:19:19 +00:00
Megan Wachs 4a0d3fb035 riscv: implement skeletons for Memory Blank Check and CRC. Otherwise you just get a segfault when attempting to perform these actions. 2016-12-07 15:09:35 -08:00
Tim Newsome c1da323144 Fix issue #6: build failure on gcc 6
Change-Id: If890a6d62fdd55befb9057f83726f60721ac8078
2016-12-01 19:15:55 -08:00
Albert Ou 9601429ac7 Use portable format specifier for size_t
This fixes a gcc warning [-Werror=format] on an i686-pc-linux-gnu host,
which defines size_t as unsigned int instead of long int.
2016-11-30 15:06:04 -08:00
Megan Wachs ce49da9947 Don't write SCKDIV when flashing
The target may have already configured its clock to run at a higher frequency and would have set SCKDIV and other dividers at that time. Don't restore the SCKDIV to its default or the flash interface may run too fast and programming will fail.

Otherwise, the default value is fine and there is no need to write SCKDIV.
2016-11-27 21:21:45 -08:00
Tim Newsome b8879d81a2 Add timeout to infinite loop.
Change-Id: I7d005b4779154b4dfe8c9a26f4f0e351f426df9b
2016-11-27 15:09:42 -08:00
Tim Newsome 364f4b5ab9 Add some timeouts that I ran into.
Change-Id: I8eeb1c934ceead0d99dcdc618a3f8aa351119cb0
2016-11-25 17:12:50 -08:00
Tim Newsome 7dd48acdc0 Cope better if the target unexpectedly resets.
Change-Id: I713f7f8a3afbbb02be0e2f19f4d32778366d37f9
2016-11-25 09:46:55 -08:00
Tim Newsome bb7dedcbaa Fix typo.
Change-Id: If04ba1103817f772fe55659cb3b5b4533c734f2a
2016-11-23 11:14:00 -08:00
Tim Newsome 452be58b63 Merge branch 'sifive/add_issi_flash' into riscv 2016-11-19 15:41:20 -08:00
Tim Newsome b585e2e324 Fix off-by-one error in assert.
Change-Id: I86447c747a212175be560170378c655ac801f5a6
2016-11-19 15:40:49 -08:00
Megan Wachs f38d70c134 Add the ISSI SPI Flash to the list 2016-11-19 11:05:36 -08:00
Tim Newsome 8ee0647365 Flash at 8KB/s, using 10,000 byte working area.
If the working area is large enough, every fespi_write() results in just
a single algorithm execution.

Change-Id: I87a12e29f50ef6ea1f46fbd1edf440f9e54a2162
2016-11-18 10:58:26 -08:00
Tim Newsome 1551916027 2KB/s, by using the algorithm more.
Change-Id: If55dcf432f9243355ed22eb8d1559ecdbca3c5c9
2016-11-17 14:33:10 -08:00
Tim Newsome 8aef60fafa Base work for using a much smarter algorithm.
Change-Id: I0bf6af12ac2e3c07ffe3f95ad490eb4a88244a97
2016-11-17 14:18:39 -08:00
Tim Newsome c406b4530e Merge branch 'Og' into enable_flash_prog 2016-11-17 13:44:35 -08:00
Tim Newsome 18eedf996c Use algorithm to speed up fespi flash programming.
It's still really slow, at 854b/s, but it seems to work and it's a lot
of new code.

Change-Id: I9dd057bbcc81a56eb558b4f33ac35f6f03c23588
2016-11-16 17:54:55 -08:00
Megan Wachs 6686e71bd6 riscv: In FESPI driver, rename 'wip' to 'tx_wait', a more descriptive name. 2016-11-14 16:14:39 -08:00
Megan Wachs 8de4ab011d riscv: Correct reading SPI Flash ID 2016-11-07 20:42:43 -08:00
Andreas Fritiofson bcaf775fc1 Remove support for the GPL incompatible FTDI D2XX library
Convert Presto, OpenJTAG and USB-Blaster (I) adapter drivers to libftdi
only.

Change-Id: Ib28887620a3dcbb754b9dbf87b9731acca3ac600
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3237
Tested-by: jenkins
Reviewed-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-11-06 09:47:12 +00:00
Andreas Fritiofson cc2d4f015f Remove since long deprecated ft2232 driver
Purge all legacy interface configurations so there's no more confusion
over which one to use.

Also remove doc/INSTALL.txt which mentions ft2232 but otherwise just
duplicates what INSTALL says.

Change-Id: Ic94f808f123d4917e600b79309f1272c78a7bb11
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3236
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-11-06 09:45:06 +00:00
Marc Schink efa90d0f78 drivers/Makefile.am: Fix libjaylink integration
Include libjaylink in DIST_SUBDIRS only if J-Link driver is enabled.

Change-Id: Ib32bb6a5d8fe9bb6e93d968802733eb4973f2c25
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3529
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-11-05 20:39:17 +00:00
Marc Schink 37ed4751e8 configure.ac: Fix libjaylink integration
Do not configure internal libjaylink if libusb-1.0 is not available or
if J-Link driver is disabled (--disable-jlink).

Change-Id: I021bca91dbbc33888a997c664f7836225306c3ef
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3528
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-11-05 20:38:51 +00:00
Paul Fertser 21832327ee Replace "daemon" with "server" in user-visible strings
Since OpenOCD doesn't fit most common definitions of the word "daemon",
using it in the documentation is confusing.

Reported by IRC user ohsix.

Change-Id: I688d722771b084b17c2a7af8e83fd64bab6141b8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3634
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-11-05 17:44:01 +00:00
Tomas Vanek 7d2ad65c64 flash at91samd, at91sam4l: fix improper use of mem_ap_ call
Since merge of #3149 OpenOCD start with an unresponsive SAMD or SAM4L
resulted in segfaults. First was in cortex_m_assert_reset
(fixed by #3552), second was in samd_handle_reset_deassert()
/sam4l_handle_reset_deassert().

The change replaces mem_ap_write_u32/8 by target_write_u32/8.
It also takes better care about examining and polling target before
debug control registers are set. It prevents lockup when 'reset halt'
is issued on unresponsive cpu.

Change-Id: I2516489f4771aebfc1118d174f527497b8a201ad
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3603
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-11-05 10:35:19 +00:00
Megan Wachs 05b12c5c20 riscv: Add first cut of Flash driver for Freedom E platforms. Completely untested. 2016-11-04 19:43:53 -07:00
Paul Fertser 607edefb53 flash: nor: mdr: do not mass erase when clearing INFO memory
The MDR parts have two kinds of memory: main (regular memory-mapped
memory for code and data) and "info" (not memory-mapped). When OpenOCD
is requested to erase the info memory block, it should do just that,
instead of erasing everything including main memory.

Change-Id: I498142ca50d4a7b669b7776180b0dbcea63a5328
Reported-by: Eldar Khayrullin <eldar.khayrullin@mail.ru>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3853
Tested-by: jenkins
Reviewed-by: Eldar Khayrullin <eldar.khayrullin@mail.ru>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-11-04 22:04:58 +00:00
Tomas Vanek 09253ffd13 flash Kinetis: Family K8x added
Change-Id: I8c090a6fe6c204ce20622006490f896c2a55292f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3614
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-11-04 21:28:26 +00:00
Tomas Vanek 61c18ee486 flash Kinetis: add cache invalidate for KLx series
Change-Id: I0177a052cbc380e01405dc139538b731b4f0ed62
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3565
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-11-04 21:27:33 +00:00
Tomas Vanek 22b4a0f40d flash Kinetis: longword programming changed to flash_async_algorithm
Change-Id: I9c40acfad37760c3dab454f2432817b2d420792d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3563
Reviewed-by: Steven Stallion <stallion@squareup.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-11-04 21:26:46 +00:00
Matthias Welwarsky 0099430104 cortex_a/r/m: fix handling of un-examined cores
On multi-core systems, with some cores in power-down state, examination
will fail for these cores. Make sure assert- and deassert_reset functions
don't crash due to uninitialized variables.

Change-Id: I472f8d19af2cd3c770c05f3e57a31b35a863b687
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3552
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-11-04 21:25:11 +00:00
Andrey Smirnov d1bdcdcc8d semihosting armv7a: Add support for ARMv7-A
Add semihosting support for ARMv7-A based processors.

Tested with custom Vybrid VF610 based board
and Pandaboard ES (Rev. B1) board (Cortex-A9).

Change-Id: I6b896a61c1c6a1c5dcf89de834486f82dd6c80a2
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Tsung-Han Lin <tsunghan.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/2908
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-11-04 21:21:50 +00:00
HarishKumar b10037a0b7 Tcl commands: Fix improper return status in flash commands and load_image.
Nand write command :
nand_fileio_cleanup() always returns ERROR_OK. Due to this,
handle_nand_write_command() retuns ERROR_OK in the case
of nand failure. ERROR_FAIL should be returned.

Flash erase_sector command :
handle_flash_erase_command() always returns ERROR_OK even if
the erase functionality of actual driver implementation fails.
retval value should be returned.

Flash write_bank command :
handle_flash_write_bank_command() returns ERROR_OK even if
fileio_open() and fileio_read fails. ERROR_FAIL should be
returned.

Load_image command :
handle_load_image_command() retuns ERROR_OK even if image_open()
fails. ERROR_FAIL should be returned.
When the buffer is null, breaking the loop without setting
retval = ERROR_FAIL would cause load_image to return ERROR_OK.

Change-Id: Ice32f6036971ab5e8e4dd65edf54b394b001c80c
Signed-off-by: HarishKumar <harishpresent@gmail.com>
Reviewed-on: http://openocd.zylin.com/2431
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-11-04 21:21:15 +00:00
Tim Newsome ca19c82d94 Make OpenOCD build using -Og.
With -Og gcc doesn't perform as many optimizations, and as a result
warns about some code that it wouldn't otherwise warn about.

These fixes all assign values to otherwise uninitialized variables.

Change-Id: I9a6ea5eadd73673891ecfec568b8b00d78b596a5
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/3779
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-11-04 21:10:30 +00:00
Jiří Pinkava f6b8a4ea65 nrf51: show proper part number
Change-Id: I3e8169eb577888ee54541a1e864a8ad5a9a7cfd1
Signed-off-by: Jiří Pinkava <j-pi@seznam.cz>
Reviewed-on: http://openocd.zylin.com/3733
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Michael Dietz <mjdietzx@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-11-04 21:10:18 +00:00
Tim Newsome e51b0360f5 Make fpu regs work even if mstatus.fs is 0.
Change-Id: I2c283f2de226518ab9a4e0476edada51825b2993
2016-11-01 12:58:37 -07:00
Tim Newsome 19df456a79 Perform small writes before sending OK.
To speed up downloads, OpenOCD sends gdb OK when a write is received,
even before the write has actually occurred. The failure is then
returned for the next write. That leads to the following confusing
behavior:
```
(gdb) p/x *((int*)0xdeadbeef)=8675309
$2 = 0x845fed
(gdb) p/x *((int*)0x80000000)=6874742
Cannot access memory at address 0x80000000
```
While it's actually the first write that failed.

This change hacks around this problem by not sending OK for small writes
(len<8) until the write has actually occurred. This does not impact
download speed, since during downloads (almost) all writes will have
much larger length.

Change-Id: I1f8b9bb19b0707487f840df6871e372e4ba228dd
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/3803
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-30 20:40:56 +00:00
Paul Fertser 4b50872ffe flash: nor: lpc2000: handle lpc11xx parts with more than 96k memory
Known big flash parts such as LPC11u68/e68 have a non-uniform memory
organisation, the first 24 sectors are 4k, the rest are 32k.

Change-Id: Icf515152dfc54ec0ca187561d2d63088b9640f14
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3802
Tested-by: jenkins
Reviewed-by: akaWolf
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-10-30 20:37:29 +00:00
Andreas Färber eaacb900dd flash/nor: Add erased_value to drivers and pass it to targets
struct flash_driver has a default_padded_value field that is similar,
but it can be changed by the user for the specific purpose of padding.

Add a new erased_value field and initialize it for all targets,
particularly stm32lx, xmc4xxx and virtual.

Use this value in core.c:default_flash_mem_blank_check(), the slow path.

Extend the target API to pass erased_value down to target code.
Adding an argument ensures that we catch all callers.

This allows us to merge xmc4xxx.c:xmc4xxx_blank_check_memory() into
armv7m:armv7m_blank_check_memory().

It further allows us to use default_flash_blank_check() in place of
xmc4xxx.c:xmc4xxx_flash_blank_check(), adding a potential slow path
fallback, as well as stm32lx:stm32lx_erase_check(), adding the potential
armv7m fast path with fallback to default_flash_mem_blank_check().

Fix a mips32 code comment while at it (zeroed -> erased).

The armv4_5 and mips32 target implementations will now error out if an
erase value other than 0xff is used, causing default_flash_blank_check()
to fall back to the default_flank_mem_blank_check() slow path.

Change-Id: I39323fbbc4b71c256cd567e439896d0245d4745f
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3497
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-30 20:30:48 +00:00
Gabrielle Trotter b9ee6dd465 atsamv: Support for ATSAMS70N19 Memory Configuration
Change-Id: I3c17fcb7ee053f92aa583149bea7b8e33b3b86f7
Signed-off-by: gtrotter@bulogics.com
Reviewed-on: http://openocd.zylin.com/3834
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-30 20:21:53 +00:00
Tim Newsome e7a745ed3b Fix bug with slow targets.
Halting didn't work right in slow targets, because some code assumed the
register cache is valid before it was guaranteed to be.

Also made dbus_busy_delay and interrupt_high_delay grow faster, so that
on slow targets it takes less time to learn the correct values.

Change-Id: I948a49d4e3cd0638f5449ab94994406319fd5f42
2016-10-27 13:00:26 -07:00
Tim Newsome e6e2070692 Add some comments.
Change-Id: Icd7d5eb370c6c893ec4717c92249f35fb100370a
2016-10-24 14:21:34 -07:00
Tim Newsome 3eb6cf0fc0 Make CLI step and resume work.
Change-Id: I027d7032800f909e8d149ed84c11b6e75b75491f
2016-10-20 14:49:23 -07:00
Tim Newsome 9b0be80d1e Use reg_cache structure, to make reg command work.
Change-Id: I9f1d1f2eab66822c3c47284aa91b52cc34998381
2016-10-20 10:42:28 -07:00
Marc Schink 674141e8a7 helper: Make unhexify() robust on invalid data
The current implementation is not suitable for user provided data
because it does not detect invalid inputs in many cases. For example,
the string "aa0xbb" is successfully converted to the 3 bytes: 0xaa,
0x00 and 0xbb. An other example is "aabi" which is successfully
converted to the 2 bytes: 0xaa and 0x0b. Both are obviously incorrect.

Make unhexify() robust on invalid data and use more appropriate data
types for its parameters. Also, add a small documentation for the
function.

Change-Id: Idb799beb86fc608b066c8a76365021ed44c7f890
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3792
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17 09:28:05 +01:00
Andreas Färber 10aeff9259 target: Clean up format strings
Clean up some type casts and misuses of format specifiers in preparation
for target address type changes.

Change-Id: Idf08286f41bca636e35a09e8ddc1d71af3d6e151
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3717
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17 09:23:13 +01:00
Andreas Färber c06ac3b5d3 target: Add missing spaces in error messages
Insert a space before parenthesis in logs that we will need to touch
for 64-bit target addresses.

While at it, do a couple more surrounding whitespace fixes.

Change-Id: I1080c0470aab51cf7bd56e67e934344d0bf4c5c1
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3716
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-10-17 09:21:59 +01:00
Andreas Färber 5fba5068b7 breakpoints: Add missing space in error message
A space after the format specifier was missing.

Change-Id: Ib67eb0fb0d6e05d765206d30d5e4a74cb41bb47b
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3715
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17 09:21:14 +01:00
Andreas Färber da74594150 target: Fix working_area_phys_spec comment
working_area_phys_spec clearly refers to the physical, not virtual address.

Change-Id: I639ea00bb5d05e845b8a56815a571375849f1225
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3714
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-10-17 09:21:06 +01:00
Paul Fertser 3ae41fcf82 jtag: drivers: mpsse: ignore error to detach kernel driver
This makes it possible to run OpenOCD as unprivileged user on FreeBSD.

Change-Id: If1182d09ad2d51f370ae7e6da02f19c7a21c66c9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3800
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17 09:20:22 +01:00
Paul Fertser 67c9a5561e jtag: drivers: cmsis-dap: add TRST handling
Even when TRST and SRST are not present in reset_config we still should
set them appropriately (to 1) as we can't tristate them anyhow.

Change-Id: Iec5bcf09340136f5e6ccfb05fa2697c53fa6609f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3798
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17 09:19:59 +01:00
Tomas Vanek 5fa3bfa074 flash Kinetis: fix mdm check_security regression in JTAG mode
Commit 6d5b4d709c causes failed assert
when JTAG transport is selected:

src/target/arm_adi_v5.h:346: dap_queue_ap_read:
  Assertion `ap->dap->ops != ((void *)0)' failed.

As check_security runs early in examine-start event, dap->ops must
be checked.

Change-Id: Ibd8312a3c668fbce834eed9790eabeed794117aa
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3712
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-17 09:17:37 +01:00
Sandeep Mistry ca6ccad439 gdb server: Add back support to disable the gdb server via the gdb_port config
As per the documentation, used "disabled" as the value to disable, as this
is the same value to disable the telnet and tcl server.

Change-Id: Idc4a8580098ec1107dcc6e1f59e817ecdebc38ac
Signed-off-by: Sandeep Mistry <s.mistry@arduino.cc>
Reviewed-on: http://openocd.zylin.com/3175
Tested-by: jenkins
Reviewed-by: Cristian Maglie
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-17 09:11:10 +01:00
Tim Newsome 4eba841bfe Print when we're ready for gdb to connect.
This should help gdbserver.py to connect reliably to really slow targets
(ie. simulators).

Change-Id: I8e9adbaf2ebde11b44e15582f036622a2d00c1f9
2016-10-14 12:40:52 -07:00
Tim Newsome 3f6c2a9f78 Be quiet when the target is just running normally.
Change-Id: I7861f16ba6b1b5c1851787ce5d78c02aff0568f6
2016-10-13 10:51:53 -07:00
Tim Newsome cb93bb9035 Use an easily changed constant for timeout.
Change-Id: I7aace463b0bd9916580e950d60b2940879b27b2a
2016-10-11 16:26:19 -07:00
Tim Newsome 4882de94cc Display pc to the user in 'monitor reset init'.
Change-Id: Ifb8df31954dfc5a3badef4f0a29eb510a97310a2
2016-10-10 08:22:51 -07:00
Marc Schink f109a93075 libjaylink: Update for API changes
Update to latest libjaylink version and incorporate API changes.

The major change in libjaylink is a rework of the device discovery.
Please test device discovery extensively, especially with multiple
devices connected. All other changes in libjaylink are of minor
importance for OpenOCD.

Change-Id: I9a50e83f59557505ce29809c7762c5df1cec10eb
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3735
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Steven Stallion <stallion@squareup.com>
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-10-07 12:54:25 +01:00
Marc Schink 8515da60a8 jlink: Adjust log verbosity of libjaylink
Currently, the log verbosity of libjaylink is not accessible from the
user interface. Therefore, changing the log verbosity of libjaylink is
only possible from within the J-Link driver source code which is not
acceptable for end users.

Output the libjaylink log messages through the logging module of
OpenOCD rather than directly to stderr.

Change-Id: I6bf7bf8f4c8a12fb9e955eeced68224545fa0b5c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3701
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-10-07 12:51:47 +01:00
Marc Schink 3c8832fe6e helper/log: Add log_vprintf_lf()
Add log_vprintf_lf() to enable the possibility to output log messages
with a variable argument list.

Change-Id: I7fd6e93db63a7d98f662df2881a42e4d923c3848
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3709
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-10-07 12:35:54 +01:00
Tim Newsome 80e8101292 Make OpenOCD build using -Og.
With -Og gcc doesn't perform as many optimizations, and as a result
warns about some code that it wouldn't otherwise warn about.

These fixes all assign values to otherwise uninitialized variables.

Change-Id: I9a6ea5eadd73673891ecfec568b8b00d78b596a5
Signed-off-by: Tim Newsome <tim@sifive.com>
2016-10-04 10:02:42 -07:00
Tomas Vanek 640894e731 cortex_m: fix autoincrement range of Cortex-M7
Cortex-M7 has autoincrement range only 1024 bytes,
surprisingly smaller than M3, M4.

Change-Id: I35ff1f0e093aac4af79f98eb3b8058d4295942d1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3737
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-04 16:17:30 +01:00
Andreas Fritiofson 9292899bf4 stm32f2x: Increase options write timeout
Large flash parts time out when unlocking. Mass erase time is specified
as 32 seconds worst case for some parts. Automatic mass erase is
probably not using x8 parallelism, though, but a too large timeout
shouldn't hurt.

Also, use the new define instead of hardcoded timeout when mass
erasing.

Change-Id: Ib5af60d52ed7d53277bfe7176c4c44f79d3a26bc
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3738
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-04 16:16:59 +01:00
Michael Dietz 400dbedaee nRF51: Fix bug in Code memory size.
The code memory size was a bug and seemed to be working by
accident since there happened to be 256 pages in the device that was
tested on which corresponded to 256kb.

Also don't fail if memory size != expected memory size based on hwid
as this hwid is unstable and should be used only for debug/diagnostics.

Change-Id: I4e98f7498a36c53fc51783eddfdaba704d30e3ca
Signed-off-by: Michael Dietz <mjdietzx@gmail.com>
Reviewed-on: http://openocd.zylin.com/3510
Tested-by: jenkins
Reviewed-by: Jiří Pinkava <j-pi@seznam.cz>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-04 11:53:39 +01:00
Andreas Fritiofson db6c6f5da4 ftdi: don't wait forever if we fail
Currently if ftdi device is removed, OpenOCD will stall forever.
Only kill -9 will help in this case.
This patch makes use of libusb timeout functions and
trying to break out of while loop if some error is detected.

[andreas.fritiofson@gmail.com]: Add missing retval check

Change-Id: I97506190e376026705f14ef9fe37dc811b99b3ac
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3419
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
2016-10-04 11:51:31 +01:00
Andreas Färber 5fd5699859 nds32: Fix typo in debug log
wathcpoint -> watchpoint

Change-Id: If84cfb5097ed17ef97491667c622ba7d870ac9c2
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3673
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-04 11:49:59 +01:00
Andreas Färber 7919694832 x86_32_common: Fix typo in function name
pyhs -> phys

Change-Id: Ie7edc74f1693b42f26e1e8475a93a7a6b9255cdd
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3672
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-10-04 11:49:52 +01:00
Kent Brinkley 727f178ab9 mips: Added #define for scan_delay legacy mode default value
Believe in using defines to make maintenance easier.

Change-Id: I8edf151352131bbf2b884dfcd67ca5764b11b13c
Signed-off-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-on: http://openocd.zylin.com/2350
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-10-04 11:41:34 +01:00
Peter Kuhar 5108fb591b STM32L433 Flash support
Added new chip id based flash size.

Change-Id: I5b5e71074af0e50352443f66f88adfc6e14280bf
Signed-off-by: Peter Kuhar <peter@pkuhar.com>
Reviewed-on: http://openocd.zylin.com/3732
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-04 10:30:49 +01:00
Spencer Oliver 56e60b0982 stm32l4x: fix incorrect device id mask
Change-Id: I37cf9cbdd07dc3764d2c719b7c6ed5852aea3943
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/3799
Tested-by: jenkins
2016-10-04 10:30:44 +01:00
Tim Newsome a08cef7633 Change invalid access from error to user message.
It's not a failure in the debugger or even a real problem if a user asks
to access memory that's not accessible.

Change-Id: I30b8424d5265d1996fe4826012ed160a83f0bc6c
2016-10-03 08:15:04 -07:00
Tim Newsome e273e23f41 Fix off-by-one error in assert.
Also only do work for debug RAM that actually exists on the target
(exposing the off-by-one error on 32-bit targets).

Change-Id: I37e0005b6a70e949286f1d6494716f3abea03c12
2016-09-29 10:40:50 -07:00
Tim Newsome 4dbc9962d3 Clear dmode triggers when we first halt the target
This helps repeated runs of the testsuite pass, and is probably a good
idea in general.

Change-Id: I89ed167968f8b8817c66f1718f374d0c502780c7
2016-09-29 10:23:46 -07:00
Tim Newsome 78fe0b56db Deal with dbus being busy in all cases.
Change-Id: Ifede6e05c3c4538f22a52cd0e9833cf3a9983d04
2016-09-29 08:28:31 -07:00
Tim Newsome b04d5e8821 Read idle, and test all debug RAM.
Read dtmcontrol's idle field to decide how many run-test/idle cycles are
required to communicate with the target.

In riscv_examine(), write and read all of Debug RAM to check the target
is at least somewhat sane.

Change-Id: Ieedb7a50418fa1f5e0d456cde53c52f7fc51662b
2016-09-27 13:06:32 -07:00
Tim Newsome c67850b63d Only write to existing dram. Clear dbus error.
Old code would write 64 bytes of DRAM if the dbus was busy in
cache_write().

New code clears the dbus error condition when the bus is busy. (This
part is untested.)

Change-Id: Ia396fe819fa1828bb75726d85513b113cc9e13f0
2016-09-27 08:45:51 -07:00
Tim Newsome 54c65a9a4b Improve low-level logging.
Now logging is consistent and more readable.
I did remove most logging during riscv_poll() since it clutters up the
log/screen and is not generally helpful.
2016-09-23 14:16:24 -07:00
Tim Newsome 08228e6f53 Make more code use the scans "class".
Helps with consistency, and this is a rare commit that net deletes
lines.
2016-09-23 14:16:24 -07:00
Tim Newsome cf1dc0b6cb Implement hardware triggers that match spec.
It's basically working, but the following corner cases are failing:
    TriggerDmode
    TriggerLoadAddressInstant
    TriggerStoreAddressInstant
2016-09-23 14:16:24 -07:00
Tim Newsome 526bbc5284 Optimize read a bit.
Remove some unnecessary scans.
2016-09-23 14:16:24 -07:00
Tim Newsome c68b13ed67 Properly mark the cache as clean after its written
This reduces the number of scans, but I doubt it noticeably improves
performance.
2016-09-23 14:16:24 -07:00
Tim Newsome 243233c8b8 Convert some more code for 64-bit. 2016-09-23 14:16:24 -07:00
Tim Newsome b04f89076a Properly write 64-bit PCs. 2016-09-23 14:16:24 -07:00
Tim Newsome e3e745abb9 WIP for 64-bit support.
GPR register writes/reads seem to work.
2016-09-23 14:16:24 -07:00
Megan Wachs 7927e90a42 Prevent the State Machine from moving during runtest 2016-09-23 14:16:24 -07:00
Tim Newsome 2f1b6b5803 Stop using conditional writes.
It doesn't help, and makes the spec more complex. Now that I've proven
OpenOCD doesn't need it, I'll remove it from the spec.
2016-09-23 14:16:24 -07:00
Tim Newsome 5dbad6b0c9 Check for business in block reads. 2016-09-23 14:16:24 -07:00
Tim Newsome f8b0f4bf29 Check for exceptions in reads and writes. 2016-09-23 14:16:23 -07:00
Tim Newsome f5ae4d864c Add support for virtual priv register.
Users can use this register to inspect and change the privilege level of
the core. It doesn't make any assumptions about the actual underlying
debug mechanism (as opposed to having the user change DCSR directly,
which may not exist in all debug implementations).
2016-09-23 14:16:23 -07:00
Tim Newsome 5de81da8f4 Remove commented out code.
Also added back the initial check that confirms debug RAM is written
correctly.
2016-09-23 14:16:23 -07:00
Tim Newsome a916d204b9 Optimize memory read.
Saves 8s on the full test suite.
2016-09-23 14:16:23 -07:00
Tim Newsome 32e7a962c3 Write fence.i before dret.
Makes things work if the ROM doesn't contain fence.i (which is slow, so
Andrew took it out).
2016-09-23 14:16:23 -07:00
Tim Newsome 4ced71b1f1 Log more. 2016-09-23 14:16:23 -07:00
Tim Newsome 20e2bfe3db Quickly read all GPRs on halt.
gdb will ask for them anyway, and one by one is slow.
StepTest went from 9.7s to 5.3s.
2016-09-23 14:16:23 -07:00
Tim Newsome 6fac5a41f8 Remove some hwbp debug code. 2016-09-23 14:16:23 -07:00
Tim Newsome 7dcc0681d4 Speed up some other operations. 2016-09-23 14:16:23 -07:00
Tim Newsome 1fdcfa7082 Speed up register read.
Don't scan an extra sequence just to read the return value.
2016-09-23 14:16:23 -07:00
Tim Newsome 27b94d36d0 Fix 32-bit build. 2016-09-23 14:16:23 -07:00
Tim Newsome 668070cc45 Faster download.
16K testcase:
Transfer rate: 53 KB/sec, 2222 bytes/write.
2016-09-23 14:16:23 -07:00
Tim Newsome 9aab0aa068 Minor cleanup. 2016-09-23 14:16:23 -07:00
Tim Newsome 06f6b5020c Use optimized cache/program write scheme for most
operations.
2016-09-23 14:16:23 -07:00
Tim Newsome a1875fbecf Working on optimized program running.
Makes a big difference on the XLEN code (29ms to 8ms). Now to use it in
more places.
2016-09-23 14:16:23 -07:00
Tim Newsome 9b9653ab7d Use hardware single step. 2016-09-23 14:16:23 -07:00
Tim Newsome eac8933b89 WIP on performance improvement.
Also implement empty arch_state to prevent occasional startup crash.
2016-09-23 14:16:23 -07:00
Tim Newsome 2d02e77bed Make this compile for 32-bit targets. 2016-09-23 14:16:23 -07:00
Tim Newsome aaa8ce10b8 Correctly figure out the number of extant hwbps. 2016-09-23 14:16:23 -07:00
Tim Newsome c471cfb63b Simple execute hardware breakpoint works. 2016-09-23 14:16:23 -07:00
Tim Newsome cb57aa55fa Deal with exceptions on register read.
Cache dpc, so we can restore it when it's clobbered by an exception.
2016-09-23 14:16:23 -07:00
Tim Newsome b81a846be5 Cache dcsr, since we're reading it anyway. 2016-09-23 14:16:23 -07:00
Tim Newsome c8430bb8f4 DebugTest.test_interrupt passes now. 2016-09-23 14:16:23 -07:00
Tim Newsome e10d407623 Speed up memory read a little. 2016-09-23 14:16:23 -07:00
Tim Newsome 4b19b7305f Save/restore T0 around block writes. 2016-09-23 14:16:23 -07:00
Tim Newsome 90f458e63f Reading/writing s1 now works. 2016-09-23 14:16:23 -07:00
Tim Newsome 0881092d9b Can successfully run to a swbp. 2016-09-23 14:16:23 -07:00
Tim Newsome c364bd0ab5 We can run to a software breakpoint, but
gdb doesn't notice we're halted once we hit it, even though riscv_poll()
is setting the target state to halted.
2016-09-23 14:16:23 -07:00
Tim Newsome 04cfc35147 Use the dram cache to save some scans. 2016-09-23 14:16:23 -07:00
Tim Newsome dce4a992a3 Single memory reads/writes work. 2016-09-23 14:16:23 -07:00
Tim Newsome 39788e5e6b Fix typo in comment. 2016-09-23 14:16:23 -07:00
Tim Newsome 1b349df638 WIP hackery.
Main thing I added is code to output "verilog" for every JTAG op we do,
so we can run the same thing in simulation.
2016-09-23 14:16:23 -07:00
Tim Newsome f40862d87c Go through run-test/idle once per dbus access. 2016-09-23 14:16:23 -07:00
Tim Newsome 9f22176618 Reading registers appears to work. 2016-09-23 14:16:23 -07:00
Tim Newsome 84944ded87 Fix up some register stuff.
Now you can attach with gdb, and it'll attempt to read a register. That
will fail because the core won't clear debug interrupt. Adding nops
doesn't help this time.
2016-09-23 14:16:23 -07:00
Tim Newsome f634702aaf Successfully determine xlen.
There's a nop in there for no reason, though.
2016-09-23 14:16:23 -07:00
Tim Newsome db06dd45a0 Improve error checking. 2016-09-23 14:16:23 -07:00
Tim Newsome 40e42c5a04 Print out really long scan values. 2016-09-23 14:16:22 -07:00
Tim Newsome 63f6999b6d Print idcode value in error message. 2016-09-23 14:16:22 -07:00
Tim Newsome 041e0ccf9e Selecting dbus is sometimes necessary. 2016-09-23 14:16:22 -07:00
Tim Newsome 25e8b66b08 WIP registers. 2016-09-23 14:16:22 -07:00
Tim Newsome ae74097f39 Add extra debug output.
This probably shouldn't be in the final change list.
2016-09-23 14:16:22 -07:00
Tim Newsome 3b60c3aa42 Fix bug when waiting for debugint to clear. 2016-09-23 14:16:22 -07:00
Tim Newsome 67009979ae Clearer debug logging. 2016-09-23 14:16:22 -07:00
Tim Newsome 3b3beb04ef WIP on registers. 2016-09-23 14:16:22 -07:00
Tim Newsome 330ff8b2c9 Try to document struct reg. 2016-09-23 14:16:22 -07:00
Tim Newsome 482497c51a Blind implementation of write_memory. 2016-09-23 14:16:22 -07:00
Tim Newsome 50ca8ac373 Blind implementation of read_memory. 2016-09-23 14:16:22 -07:00
Tim Newsome 76fe7db0db In theory assert_reset/deassert_reset work. 2016-09-23 14:16:22 -07:00
Tim Newsome ea6836c5f6 WIP, blind coding. 2016-09-23 14:16:22 -07:00
Tim Newsome 413ab49dfd Blind coding new dbus behavior. 2016-09-23 14:16:22 -07:00
Tim Newsome feff2dd9e7 Always leave the TAP in Run-Test/Idle. 2016-09-23 14:16:22 -07:00
Tim Newsome 98f2fa897f Halt should work now. 2016-09-23 14:16:22 -07:00
Tim Newsome bb0463deec Set up dram structure; implement poll(). 2016-09-23 14:16:22 -07:00
Tim Newsome 495384e15f Figure out Debug RAM size in examine().
It compiles, so that means it works, right?
2016-09-23 14:16:22 -07:00
Tim Newsome 48cf8eebf1 Scaffolding. 2016-09-23 14:16:22 -07:00
Tim Newsome 10bcfdad71 Refer to nonexistent riscv target. 2016-09-23 14:16:22 -07:00
Tomas Vanek 0e95629eb1 flash Kinetis: Implement flash protection setting
Kinetis family employs strange concept of Flash Configuration Field at
address 0x400 of program flash. Writing incorrect data to FCF may
permanently lock the device.

The change introduces 'kinetis fcf_source protection' mode. In this mode
write of flash image data to FCF is prevented. FCF data build from
protection (set by 'flash protect' command) are written instead.

FCF data are written also just after erase of relevant sector. It
protects device from locking security by reset or power cycle after erase.

prot_blocks array is used as protection blocks have bigger size than sectors.

Alignment and padding programming sections is rewritten to fix
writing with not section boundary aligned begin.

Change-Id: I9fc8bd37d6f627fb8ed7abb7f7560e78a740b195
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3562
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-08-14 11:41:09 +01:00
SASANO Takayoshi d856aa9771 pic32mx: add new device ID, 17x/27x Flash support
- add new device ID: 170F256B, 170F256D, 270F256B, 270F256D,
330F064H, 330F064L, 430F064H, 430F064L, 350F128H, 350F128L,
450F128H, 450F128L, 350F256H, 350F256L, 450F256H, 450F256L,
370F512H, 370F512L, 470F512H, 470F512L

- add support for PIC32MX17x/27x 256kB Flash

Change-Id: I65a304d2114fff80de3a24c1f6d0b5e955b22531
Signed-off-by: SASANO Takayoshi <uaa@uaa.org.uk>
Reviewed-on: http://openocd.zylin.com/3186
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-08-14 09:34:10 +01:00
Tomas Vanek a46eb1f082 flash Kinetis: refactoring ftfx commands and numerous minor changes
Add kinetis_ftfx_decode_error() to show flash error type in human
readable message.

Add kinetis_ftfx_prepare() to prepare flash module just once in
command (not each time kinetis_ftfx_command() is called).

Change target_read/write_memory() to target_read/write_u8/32().

Make ftfx_fstat parameter of kinetis_ftfx_command() optional.

Longword flash write:
Fix huge memory leak after write of unaligned block.
Check flash address alignment properly.
Do not fill whole padding buffer but its end after original data.
Remove duplicite padding.

Change-Id: Ia5e312909f68d3cc724c8cbffe1cd903b9102124
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3561
Tested-by: jenkins
Reviewed-by: Steven Stallion <stallion@squareup.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-14 09:21:35 +01:00
Tomas Vanek 77a1c01ccb flash/nor: implement protection blocks of different size than erase sector
Originally flash/nor infrastructure assumed protection blocks identical
to erase sectors. This assumption is not valid for many flash types.
Driver code fixed the problem either by increasing sector size to
size of protection block or by defining more protection block than
really existed in device. Both cases had drawbacks.

The change retains compatibility with the old driver.
Updated driver can set protection blocks table independent
of sector table.

Change-Id: I27f6d267528ad9ed9fe0a85f05436a8ec17603a4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3545
Tested-by: jenkins
Reviewed-by: Steven Stallion <stallion@squareup.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-14 09:16:54 +01:00
Tomas Vanek 77478eb0f5 flash Kinetis: dynamic status detection before starting mass_erase
The change prevents starting mass_erase in unstable state of MCU
(RESET/WDOG loop).
mass_erase of secured MCU using manual reset button is supported.
Timeouts are measured by timeval_ms() instead of iteration count.
mass_erase timeout prolonged to 16 seconds because aborting
mass_erase in progress (deasserting reset) leaves the device
in security locked state.

Change-Id: I6605532df56080a54c2a1dfe49094e3db4ce534a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3551
Tested-by: jenkins
Reviewed-by: Steven Stallion <stallion@squareup.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-14 09:13:25 +01:00
Tomas Vanek 6d5b4d709c flash Kinetis: Detect RESET/WDOG loop, fix detection of secured MCU
Kinetis driver checks MDM STAT register to detect secured state of MCU.
Original version often reported a blank device as secured one.
Change #3010 has not fixed all false reports.
After changes in arm_adi_v5 infrastructure secured devices was not detected
at all.

New algorithm uses multiple MDM STAT reads and counts MDM_STAT_SYSSEC and
MDM_STAT_FREADY bits. Both secured MCU and MCU locked-up in RESET/WDOG loop
are detected reliably.

Detection is run in both kx.cfg and klx.cfg from examine-start event,
not examine-end as before. Event is configured only for non hla adapter.

Minor fix in klx.cfg: commented out adapter_khz 24000 in reset-init.
Such frequency is not supported in VLPR CPU mode and with JTAG.

Change-Id: I2ec2b68c45bde9898159cd15fbdcbcfa538c41d9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3547
Tested-by: jenkins
Reviewed-by: Steven Stallion <stallion@squareup.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-14 09:10:06 +01:00
Steven Stallion 8285ec4cb0 kinetis: support mass erase on boards without SRST
NXP (nee Freescale) documents the mass erase procedure using the MDM-AP
block in AN4835. Existing support for this feature did not properly
handle boards without SRST. This patch updates the mass_erase command
such that it works correctly on these boards. Additionally, the core is
left in a halted state once complete to prevent reset loops due to the
watchdog as reported by some users.

Since the MDM-AP provides an additional method of halting and resetting
the core that is disconnected from the DAP, additional commands are
provided to manage this state. These commands are particularly helpful
when connecting to a target with an unknown state.

Change-Id: I40f006d5d964befb12b019c5d509988decdd3f91
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3540
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-08-14 09:06:06 +01:00
Andreas Fritiofson a7984eef03 at91sam7: do not touch flash banks which belong to other targets
at91sam7_read_part_info() walks throw all flash banks following
current one.

I don't know why it has to do it at all (possibly for multi-bank
devices like SAM7S512), but if there is more than one target in JTAG
chain, this lookup can touch flash bank of another (possibly not
halted) target, which cause probe error and current command
execution abort.

[andreas.fritiofson@gmail.com]: Change to for-loop and reduce
indentation

Change-Id: Ide50e93578786e1250f7a0fd0e3d296247924814
Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2610
Tested-by: jenkins
2016-08-14 02:09:58 +01:00
Stephen Tridgell 2cc1c6daf2 ftdi: Added a method to read the signal values
Change-Id: Ie32a372bbc57249b4802d900234a0e8e7d1d1830
Signed-off-by: Stephen Tridgell <stephen.tridgell@exablaze.com>
Reviewed-on: http://openocd.zylin.com/2556
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-08-14 02:08:13 +01:00
Matthias Welwarsky e3ccae3ed7 cmsis-dap: add JTAG pass-through mode
This change adds JTAG transport in pass-through mode
to the cmsis-dap driver. The patch is originally from
Phillip Pearson <pp@myelin.co.nz>, with additions
by Maksym Hilliaka <oter@frozen-team.com>

Change-Id: I88d918d6576e9d875c3b611f29f255581e6a5424
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3568
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-08-14 02:06:51 +01:00
Peter A. Bigot 9c5529786a gdb_server: support disabling server
Although the documentation suggested this worked, and it is implemented
for tcl_port and telnet_port, the directive was not recognized for
gdb_port.

Change-Id: I38d95ee879ec3f6d551603b7313749a21e0e498e
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Reviewed-on: http://openocd.zylin.com/3637
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-14 02:01:05 +01:00
Andreas Bolsch 4e9ee81f0c Flash handling for STM32F76x/77x and F446 added
- added ids for various parts
- rewrite of sector allocation to deal with dual-bank F76x/77x
- single- / dual-bank mode for F76x/77x
- sector protection adapted for F76x/77x in dual-bank mode
- handling of additional option bits (28-31) in FLASH_OPTCR
  in options_read and options_write for F42x/43x/469/479/7xx,
  options bits 0-1 masked out
- check for sensible value of user_options in options_write

- some #defines clarified, non-needed ones removed

- docs updated (options read, options write)

Change-Id: Ie4db80e60baa7d2663e024ab1f278640b1ce901b
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/3526
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-14 02:00:13 +01:00
Steven Stallion f4dfa3b0d0 rtos: remove display_str member
This patch removes the display_str member in the thread_detail struct.
This member was not being used and provides no additional benefit over
the thread_name_str and extra_info_str members. This change is made in
preparation of support for the qXfer:threads:read packet, which will
modernize how thread information is shared with GDB.

Change-Id: I1f8bc6325e6aa790e02ea6caee9d6f44c5fedf36
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3558
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-08-14 01:38:12 +01:00
Uwe Bonnes ae3e9aaba9 flash/nor/tcl.c: Less verbose output of flash erase_check.
Only report non-erased or unknown sectors or if bank is fully erased.

Change-Id: I94f0bc2a0d6529d1ea5f66b284cefd6a2c61fe39
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3501
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2016-08-14 00:38:29 +01:00
Uwe Bonnes 51f039bd0c stm32l4: Handle failing flash_size read like on other devices.
Change-Id: I54d7cd3a8c80d0e4663c3c09457a4ff338a6f1a0
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3503
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-08-14 00:37:56 +01:00
Sergey A. Borshch d080ea6cea jlink: fix jlink regression introduced by ae8cdc commit
1) wrong last bit was shifted out in the end of IRSHIFT/DRSHIFT in
   jlink_execute_scan()
2) TDI buffer was not cleared in jlink_tap_init(), results in wrong
data shifted out to the TDI and "Bad value '00000000' captured
during DR or IR scan" error message.
3) sizeof(tdi_buffer) was used in memset() to clean tms buffer. It
is the same as sizeof(tms_buffer), but shoud be fixed to make source
code consistent

Change-Id: I13f26d1c3e88eefc3856fe2b8542fb0ccea6acb1
Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/3394
Tested-by: jenkins
Reviewed-by: Harry Zhurov <harry.zhurov@gmail.com>
Reviewed-by: Anton Gusev
Reviewed-by: Михаил Цивинский <mtsivinsky@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-13 23:57:25 +01:00
George Ioakimedes aed0d5d730 psoc4: Corrected Silicon IDs
Corrected 2 Silicon IDs that were swapped.
I've tested with a CY8C4125AXI-483 and  confirmed
that the device is recognized correctly now.

Change-Id: I6fcbee33558d8feec9abf6052df3f15523379c48
Signed-off-by: George Ioakimedes <georgeioak@gmail.com>
Reviewed-on: http://openocd.zylin.com/3619
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-08-13 14:48:45 +01:00
Tomas Vanek ccb4a913c2 target: check late abort from target in async_algorithm
target_run_flash_async_algorithm() ignored abort from target
(rp set to 0) when raised after all data have been written in fifo.
I could result e.g. in not reported error during flash write.

The change adds rp test after target algorithm has finished.

Change-Id: Iadd93371e4a4602737be10079479285d81ae41b2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3560
Tested-by: jenkins
Reviewed-by: Steven Stallion <stallion@squareup.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-13 09:39:01 +01:00
Olaf Lüke 8160cfb7db at91samd: Add Atmel SAMD09 family support
Change-Id: I0ee3bb92aa168ed070863ac09e3c457a4b2e2220
Signed-off-by: Olaf Lüke <olaf@tinkerforge.com>
Reviewed-on: http://openocd.zylin.com/3428
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Liviu Dudau <liviu@dudau.co.uk>
2016-08-13 09:28:08 +01:00
Andy Pomfret 4b11548748 rtos: removed chSysInit from detection of ChibiOS (#121)
Using the presence of the 'chSysInit' symbol for detection of
ChibiOS is dangerous because this symbol may not be available
if link-time optimisation is used.

This patch removes this reliance, so the symbols 'ch' and 'ch_debug'
are the only things required for ChibiOS detection.

If 'ch' is present but 'ch_debug' is not, an info message suggests
that Chibios might be present without its registry being enabled.
This message has been reworded a little to make it slightly more
equivocal because the chances of a false positive message are
increased.

Addresses bug #121, "ChibiOS rtos detection fails with LTO enabled".

Change-Id: I5ef224735c06446751adee010ce75be4f30f0403
Signed-off-by: Andy Pomfret <cooperised@gmail.com>
Reviewed-on: http://openocd.zylin.com/3381
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-08-13 09:21:23 +01:00
Andreas Bolsch cd9b9a6364 Cortex-M7 handling.
- FPU detection and FPU register support added for Cortex-M7.
  There is no apparent difference between FPv4 and FPv5_SP but ...

- Autoincrement range for MEM-AP added for Cortex-M7

This patch together with #3526 replaces #3123 except for stm32f7x.cfg.

Change-Id: I5ed5392e3835674160563ff37d67622a7bf2c877
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/3531
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-10 12:02:24 +01:00
Matthias Welwarsky 03942f867a adi_v5_jtag: clear sticky overrun condition in WAIT timeout
If WAIT recovery fails (times out), an ABORT command is issued to the
DAP but under some conditions the SSTICKYORUN bit in CTRL/STAT is not
cleared as well, which renders the DP unusable. This happens when
trying to access e.g. the ROM table of powered-down cores, on many
targets.

Change-Id: Id0a7ba6180069eee562871314f520f938df9718f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3476
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-09 14:36:13 +01:00
Matthias Welwarsky 918de0be13 target: add "phys" argument to mem2array, array2mem
Allow using physical addresses with mem2array and array2mem. In order
to minimize the impact on existing scripts, "phys" is added as an
optional 5th parameter to both commands.

This patch also adds "phys" variants to the memwrite/memread commands
in memory.tcl.

Change-Id: Ia6307f9d861789e7f3ccf1f98961d666bf8d85d6
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3387
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-09 14:32:12 +01:00
Matthias Welwarsky 6f8cf930bc Fix resume when core state has been modified
Sometimes it is necessary to resume into a different state (ARM/Thumb)
than at debug state entry. According to the documentation this should
be possible with "arm core_state arm|thumb" before the resume command,
however the original code also restores the original CPSR, which
overrides whatever state the core was set to. This seems to work on some
cores (e.g. Cortex-A5) but not on others (e.g. Cortex-A9). Using the "BX"
instruction to set resume PC and core state works on Cortex-A9 and
ARM11, but is not sufficient on Cortex-A5, where an explicit write to
the PC (MOV pc, r0) is required additionally.

Change-Id: Ic03153b4b250fbb8cf6c75f8e329fb34829aa35f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3386
Tested-by: jenkins
Reviewed-by: Alexander Stein <alexanders83@web.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-09 14:28:43 +01:00
Andrey Skvortsov 5d5c9bc4ec flash: nor: mdr: fix verification problem with 1986VE1T or 1986VE3T
1986VE1T and 1986VE3T have issue with flash acceleration engine described
in their errata (issue 0007).
After programming flash acceleration engine's buffer contains old data,
and therefore first read data are wrong. Because of this verification after
programming fails always. Recommended workaround for the issue is to flush
flash accelerator's buffer. To do so it's necessary to read at least 64
bytes of flash through accelerator.

Reading bytes through JTAG using default_flash_read doesn't help.
It seems that reading should be done by uC itself.

Change-Id: I18ef464a68ad5c5b16d3933f31ca61f8e2e7cca3
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-on: http://openocd.zylin.com/3509
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-08-02 17:49:18 +01:00
Andreas Färber f19ac83152 Fix usage of timeval_ms()
First, fix the timeval_ms() implementation to not have K&R but ANSI
argument semantics by adding a missing void.

timeval_ms() returns an int64_t, not uint64_t or long long. Consistently
use int64_t for variables and PRI*64 as format string.

While at it, change a few related variables to bool for clarity.

Note that timeval_ms() may return a negative error code, but not a
single caller checks for that.

Change-Id: I27cf83e75b3e9a8913f6c43e98a281bea77aac13
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3499
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-07-19 10:45:16 +01:00
Tomas Vanek f4496b25e3 arm_adi_v5: add dap apreg command for AP register read/write
A developer tool: Direct access to AP registers can be useful
for handling vendor specific AP like Freescale Kinetis MDM or Atmel SMAP.

Change-Id: Ie2c7160fc6b2e398513eb23e1e52cbb52b88d9bd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2777
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-07-17 23:30:09 +01:00
Steven Stallion 800fe0b885 server: support binding to arbitrary interfaces
Some installations of OpenOCD are used in restricted environments that
do not permit binding to public interfaces.

This patch does not affect the default behavior to listen on all
interfaces, however it does give the option to restrict services by way
of the bindto command.

Change-Id: Id51bd64b376a8c62dd47b08b4d834872925e6af2
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3534
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-07-17 20:55:11 +01:00
Fredrik Hederstierna 12e4a2a220 swd: Add support for connect_assert_srst for SWD.
Today the reset option for connect_assert_srst is not done for SWD.
This patch adds this to SWD and make it possible to connect to targets which might disable JTAG interface when running.

Change-Id: Ib89f7cf59b628e8f0b5fca9dd9e362e383c4b99f
Signed-off-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-on: http://openocd.zylin.com/3018
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-07-04 23:44:02 +01:00
Esben Haabendal 12ff09f7f2 cfi: Add support for strangely endianness broken SoC implementations
This adds the 'data_swap' parameter to the CFI driver, which enables
swapping of data bytes when writing/programming words to the flash.
Note, that this specifically means that bytes are not swapped when
writing command words to the flash chip.  Unless you are using the SAP
in an LS102x chip to program an attached 16-bit NOR flash, you hopefully
do not need this!

Change-Id: I1e6f7169da36f373c880d1756d9c21c9957acc50
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3109
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-06-23 07:39:57 +01:00
Esben Haabendal f906c65fed Support for Freescale LS102x SAP
The SAP in LS102x SoC's from Freescale is able to read and write to all
physical memory locations, independently of CPU cores and DAP.

This implementation is 100% based on reverse-engineering of JTAG
communication with an LS1021A SAP using a JTAG debugger with SAP support.

And as such, this code is for now "works-for-me", pending verification
by other OpenOCD users, or even better, actual information from Freescale
on the SAP interface.

Change-Id: Ibb30945e017894da5c402f9f633fc513bed4e68c
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3096
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-06-23 07:37:36 +01:00
Marc Schink d4b7cbff88 Make #include guard naming consistent
Change-Id: Ie13e8af0bb74ed290f811dcad64ad06c9d8cb4fa
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2956
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-24 22:30:55 +01:00