Commit Graph

2051 Commits

Author SHA1 Message Date
Antonio Borneo 35a503b08d arm_adi_v5: add ap refcount and add get/put around ap use
While an ADIv5 DAP can only have 256 AP, ADIv6 can provide till
2**40 (1,099,511,627,776) AP per DAP.
The actual trivial code implementation for ADIv5 (that uses an
array of 256 ap in the struct adiv5_dap) cannot be extended as-is
to handle ADIv6.

The simple array of 256 AP can be reused as a dynamic storage for
ADIv6 ap:
- the ADIv5 AP number is replaced by the ADIv6 base address;
- the index of the array (equal to ADIv5 AP number) has no link to
  any ADIv6 property;
- the ADIv6 base_address has to be searched in the array of AP.

The 256 elements in the AP array should be enough for any device
available today. In future it can be easily increased, if needed.

To efficiently use the 256 elements in the AP array, the code
should associate one element of the array to an ADIv6 AP (through
the AP base address), then cancel the association when the AP is
not anymore needed. This is important to avoid saturating the AP
array while exploring the device through 'dap apreg' commands.

Add a reference counter in the struct adiv5_ap to track how many
times the struct has been associated with the same base address.
Introduce the function dap_get_ap() to associate and return the
struct, and dap_put_ap() to release the struct. For the moment the
code covers ADIv5 only, so the association is through the index.
Use the two functions above and dap_find_get_ap() throughout the
code.
Check the return value of dap_get_ap(). It is always not NULL in
the current ADIv5-only implementation, but can be NULL for ADIv6
when there are no more available AP in the array.
Instrument dap_queue_ap_read() and dap_queue_ap_write() to log an
error message if the AP has reference counter zero, meaning that
the AP has not been 'get' yet. This helps identifying AP used
without get/put, e.g. code missed by this patch, or merged later.
Instrument dap_cleanup_all() to log an error message if an AP has
reference counter not zero at openocd exit, meaning that the AP
has not been 'put' yet.

Change-Id: I98316eb42b9f3d9c9bbbb6c73b1091b53f629092
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6455
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Tested-by: jenkins
2022-06-24 21:33:23 +00:00
Tomas Vanek e78b96421c flash/nor/numicro: remove useless architecture check
target_to_armv7m() just returns a type-cast of target->arch_info,
so the test has no value.

Following target_run_algorithm() checks magic number so
we need not worry about execution on mismatched architecture.

Change-Id: Ic9892a488a42af1d8e8731eddb39240deeb26020
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6755
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-06-10 21:50:39 +00:00
Tarek BOCHKATI 4f42600541 flash/stm32l4x: fix scan-build warnings
fix "Declared variable-length array (VLA) has zero size" warnings

while at there instrument the probe function to ensure the flash bank
contains at least 1 sector

Change-Id: I3ba0e6345881557ad1aab2d1b41eee438b49fe04
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6470
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-06-04 08:25:23 +00:00
Huaqi Fang 9906763b89
flash: redirect gd32vf103 driver to stm32f1x (#704)
* flash: redirect gd32vf103 driver to stm32f1x

Signed-off-by: Huaqi Fang <578567190@qq.com>

* flash: add warning message to use stm32f1x instead of gd32vf103

Signed-off-by: Huaqi Fang <578567190@qq.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
2022-06-01 08:55:12 -07:00
Tomas Vanek cc8b491856 flash/nor/core, target: don't ask for working mem if no target algo
The command 'flash erase_check' showed the message
'Running slow fallback erase check - add working memory'
even in the case the target didn't implement blank_check_memory.

Change return code of target_blank_check_memory() in this case
and sense it in default_flash_blank_check() and show a message
without a request for working memory.

Change-Id: I7cf9bf77742964b4f377c9ce48ca689e57d0882f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6765
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
2022-05-29 15:47:21 +00:00
Erhan Kurubas 631d0bddfa flash: fix clang static analyzer build errors
Fixes "variable set but not used" errors.
Tested with Homebrew clang version 13.0.1

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ia90baf5b4857db2b5569ebe6adbbb832de772aad
Reviewed-on: https://review.openocd.org/c/openocd/+/6971
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-05-21 09:00:51 +00:00
Salvatore Giorgio PECORINO ad5ca263e9 bluenrg: add support for bluenrg-lps device and board
Added bluenrg-lps support
Added file for the board steval-idb012v1
Fixed size_info information using a mask
Changed the if condition in bluenrg-x.cfg to be valid only for bluenrg-1 and bluenrg-2

Signed-off-by: Salvatore Giorgio PECORINO <salvatore-giorgio.pecorino@st.com>
Change-Id: Ic0777ec0811ee6fac7d5e1d065c4629e47d84a1f
Reviewed-on: https://review.openocd.org/c/openocd/+/6928
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-05-07 11:03:25 +00:00
Tim Newsome 8e1064f1fe Remove gd32vf103 flash driver.
Per mainline, use stm32f1x instead. Tested that this is working.

Change-Id: Icda4b2a39e06e2adf9bbfb984bd578347f43d7d1
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-05-03 13:48:07 -07:00
Tim Newsome 9460f43dc3 Merge branch 'master' into from_upstream
Conflicts:
	tcl/target/gd32vf103.cfg

I kept our version, except I changed the flash device as happened in
mainline. Once this file settles down in mainline, we can copy it
wholesale into this fork.

Change-Id: I4c5b21fec0734b5e08eba392883e006a46386b1c
2022-05-03 13:41:55 -07:00
Tomas Vanek 9de084e006 flash/nor/stm32f1x: add can_load_options flag for GD32F1x0, F3x0 and E23x
According to GigaDevice user manuals the devices have OBRLD bit in FMC_CTL
register which is functionally compatible with OBL_LAUNCH @ FLASH_CR
of STM32 counterparts.

Change-Id: I84d231b38815fcb6452fd73b9153b269cce3b737
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6759
Tested-by: jenkins
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
2022-04-24 08:27:28 +00:00
Tomas Vanek f2b4897773 flash/stm32f1x: add support for RISC-V GigaDevice GD32VF103
The device has compatible flash macro with STM32F1 family, reuse
stm32f1x driver code.

Detect non-ARM target - for simplicy test target type name 'riscv'
and the address has 32 bits.

In case of RISC-V CPU use simple chunked write algo - async algo
cannot be used as the core implemented in this device doesn't
allow memory access while running.

Change-Id: Ie3886fbd8573652691f91a02335812a7300689f7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6704
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
2022-04-24 08:26:08 +00:00
Tomas Vanek e83eeb44aa flash/nor/stm32f1x: lock flash in case of error
The current code locks the flash controller in case of error during
flash write only. An error in other flash operations may cause the
flash is left unlocked.

Implement locking also after error in erase, mass erase, options
write and erase.

Change-Id: I26c2ed7914e7847122306f29b777b9eefd1dc580
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6710
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-04-13 16:56:18 +00:00
Tomas Vanek b801452d42 flash/nor/stm32f1x: unify flash error reporting
stm32x_wait_status_busy() has two side effects in case of flash programming error:
- reports error
- clears error bit in status register

Use stm32x_wait_status_busy() to report also flash error during target
algo flash write.

While on it use more descriptive error codes in stm32x_wait_status_busy().

Change-Id: I6e1cffc2aa5411b918a23ed62d5194910888a9d1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6709
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-04-13 16:53:14 +00:00
Tomas Vanek e3f4ea0b57 flash/nor/stm32f1x: tidy up async algo supporting code
Use target_get_working_area_avail() instead of try-fail iteration.

Call destroy_reg_param() in a for cycle.

Change-Id: I1891d1ffdea99010c6ab66b9578400b9d7922e20
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6708
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-04-13 16:52:41 +00:00
Tomas Vanek 10f933915d flash/nor/stm32f1x: remove write alignment code
Use flash infrastructure to ensure writes are halfword aligned.

Change-Id: Iddca3a256ace3486a23e1a9cb6a31c7a91ee58bf
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6707
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-04-13 16:52:12 +00:00
Tomas Vanek dd532e87c0 flash/nor/stm32f1x: allow write fallback for flash options
Mostly refactoring.

Rename original stm32x_write_block() to stm32x_write_block_async()
as it uses target async algo.

Introduce new stm32x_write_block() and move slow, host controlled
fallback flash write there.

The change allows stm32x_write_options() to use slow flash write fallback.

While on it rename variables where halfword count is stored.

Change-Id: I386ae15cf052b1490461ed8f7eea5b4403d466f7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6706
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-04-13 16:50:21 +00:00
Tim Newsome 00d7c7994a Merge branch 'master' into from_upstream
Conflicts:
	src/server/server.c
	src/target/breakpoints.c
	src/target/semihosting_common.c
	src/target/target.c

Change-Id: I48bd3608c688c69d8aac0667fc46e2de5466a9f1
2022-04-11 11:13:20 -07:00
Tarek BOCHKATI ab43721be6 flash/stm32l4x: fix auto-probe when RDP is promoted from 0 to 0.5
Considering this use case: (using STM32 L5 or U5)
 1- first probe : TZEN enabled, RDP level 0
    flash_regs_base |= STM32L5_REGS_SEC_OFFSET => 0x50022000
 2- the user promotes the RDP to level 0.5
 3- the second probe, fails to read OPTR using secure flags_regs_base:
    used OPTR address is 0x50022040

Step 3 fails because when RDP is level 0.5, we should use Non-Secure
flash registers.
To fix this, always use NS flash regs to read OPTR in probe functions.

Fixes: 80d323c6e8 (flash/stm32l4x: introduce auto-probe when OPTR is changed)
Change-Id: I296aa633972b0c410b927488c999584a07b912d3
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6864
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2022-03-19 09:13:55 +00:00
Marc Schink 1c22c5a82b flash/nor/efm32: Use Cortex-M 'core_info' field
Change-Id: I5e477036e5cb7518c35df88878d53261311deb40
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6868
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-12 09:45:56 +00:00
Marc Schink b6e4d1aa04 flash/nor/sim3x: Fix typo
Change-Id: I2143c81d44b49bed9585c4aaee2bb6e2165345f2
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6869
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-03-12 09:45:15 +00:00
Tarek BOCHKATI 6673f90e08 flash/stm32h7x: fix FLASH_WPSN_PRG mask used for protection
STM32H7Ax/7Bx devices have a different WPSN mask (0xFFFFFFFF),
(0xFF for STM32H74x/75x and STM32H72x/73x devices).

And when supporting STM32H7Ax/7Bx devices, stm32x_protect() was
not updated accordingly.

Change-Id: I081217af3e5ed815b67bfdfec7f4ebaa3152a865
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Fixes: 0b7eca1769 (flash/stm32h7x: add support of STM32H7Ax/H7Bx devices)
Reviewed-on: https://review.openocd.org/c/openocd/+/6858
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2022-03-12 09:44:31 +00:00
Tomas Vanek 57c1e49180 flash/stm32f1x,f2x: fix endianess in slow fallback flash write
Use target_write_memory() instead of target_write_u16()

Change-Id: I2389fe7a5fa18c9bc9c1aad8b8ddd64608bf2566
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6705
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-12 09:32:09 +00:00
Tim Newsome 9e097d0fc4
From upstream (#684)
* flash/nor/atsame5: add LAN9255 devices

Support Microchip LAN9255 devices with embedded SAME53J MCU.

Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Change-Id: Ia811c593bf7cf73e588d32873c68eb67c6fafad7
Reviewed-on: https://review.openocd.org/c/openocd/+/6811
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* tcl/board: Add EVB-LAN9255 config

Config for EVB-LAN9255, tested using Atmel-ICE debugger on J10
connector.

Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Change-Id: I8bcf779e9363499a98aa0b7d10819c53da6a19e7
Reviewed-on: https://review.openocd.org/c/openocd/+/6812
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* aarch64: support for aarch32 ARM_MODE_UND

Fix:
unrecognized psr mode: 0x1b
cannot read system control register in this mode: (UNRECOGNIZED : 0x1b)

Change-Id: I4dc3e72f90d57e52c0fe63cb59a7529a398757b3

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Change-Id: Ifa5d21ae97492fde9e8c79ee7d99d8a2a871b1b5
Reviewed-on: https://review.openocd.org/c/openocd/+/6808
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* Combine register lists of smp targets.

This is helpful when you want to pretend to gdb that your heterogeneous
multicore system is homogeneous, because gdb cannot handle heterogeneous
systems. This won't always works, but works fine if e.g. one of the
cores has an FPU while the other does not. (Specifically, HiFive
Unleashed has 1 core with no FPU, plus 4 cores with an FPU.)

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I05ff4c28646778fbc00327bc510be064bfe6c9f0
Reviewed-on: https://review.openocd.org/c/openocd/+/6362
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* semihosting: use open mode flags from GDB, not from sys/stat.h

Values defined in sys/stat.h are not guaranteed to match
the constants defined by the GDB remote protocol, which are defined in
https://sourceware.org/gdb/onlinedocs/gdb/Open-Flags.html#Open-Flags.
On my local system (Manjaro 21.2.1 x86_64), for example, O_TRUNC is
defined as 0x40, whereas GDB requires it to be 0x400,
causing all "w" file open modes to misbehave.

This patch has been tested with STM32F446.

Change-Id: Ifb2c740fd689e71d6f1a4bde1edaecd76fdca910
Signed-off-by: Pavel Kirienko <pavel.kirienko@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6804
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* semihosting: User defined operation, Tcl command exec on host

Enabling a portion (0x100 - 0x107) of the user defined semihosting
operation number range (0x100 - 0x1FF) to be processed with the help of
the existing target event mechanism, to implement a general-purpose Tcl
interface for the target available on the host, via semihosting
interface.

Example usage:
- The user configures a Tcl command as a callback for one of the newly
	defined events (semihosting-user-cmd-0x10X) in the configuration
	file.
- The target can make a semihosting call with <opnum>, passing optional
	parameters for the call.

If there is no callback registered to the user defined operation number,
nothing happens.

Example usage: Configure RTT automatically with the exact, linked
control block location from target.

Signed-off-by: Zoltán Dudás <zedudi@gmail.com>
Change-Id: I10e1784b1fecd4e630d78df81cb44bf1aa2fc247
Reviewed-on: https://review.openocd.org/c/openocd/+/6748
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* target/smp: use a struct list_head to hold the smp targets

Instead of reinventing a simply linked list, reuse the list helper
for the list of targets in a smp cluster.
Using the existing helper, that implements a double linked list,
makes trivial going through the list in reverse order.

Change-Id: Ib36ad2955f15cd2a601b0b9e36ca6d948b12d00f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6783
Tested-by: jenkins

* helper/list: add list_for_each_entry_direction()

Use a bool flag to specify if the list should be forward or
backward iterated.

Change-Id: Ied19d049f46cdcb7f50137d459cc7c02014526bc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6784
Tested-by: jenkins

* target/riscv: revive 'riscv resume_order'

This functionality was lost in [1], which was merged as commit
615709d140 ("Upstream a whole host of RISC-V changes.").
Now it works as expected again.

Add convenience macro foreach_smp_target_direction().

Link: [1] https://github.com/riscv/riscv-openocd/pull/567
Change-Id: I1545fa6b45b8a07e27c8ff9dcdcfa2fc4f950cd1
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6785
Tested-by: jenkins

* doxygen: fix some function prototype description

Change-Id: I49311a643ea73143839d2f6bde976cfd76f8c67f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6830
Tested-by: jenkins

* Cadence virtual debug interface (vdebug) integration

Change-Id: I1bc105b3addc3f34161c2356c482ff3011e3f2cc
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6097
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* gdb_server: Include thread name as XML attribute

Explicitly providing a thread name in the "thread" element produces
better thread visualizations in downstream tools like IDEs.

Signed-off-by: Ben McMorran <bemcmorr@microsoft.com>
Change-Id: I102c14ddb8b87757fa474de8e3a3f6a1cfe10d98
Reviewed-on: https://review.openocd.org/c/openocd/+/6828
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* Fix small memory leak.

See https://github.com/riscv/riscv-openocd/pull/672

Change-Id: Ia11ab9bcf860f770ea64ad867102c74b898f6b66
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6831
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* server: remove remaining crust from dropped eCos code

Commit 39650e2273 ("ecosboard: delete bit-rotted eCos code") has
removed eCos code but has left some empty function that was used
during non-eCos build to replace eCos mutex.

Drop the functions and the file that contain them.

Change-Id: I31bc0237ea699c11bd70921660f960ee406ffa80
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6835
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* rtos: threadx: Add hla_target support for ThreadX

Tested with an AZ3166 dev board (which uses the STM32F412ZGT6) running
the Azure RTOS ThreadX demonstration system.

Signed-off-by: Ben McMorran <bemcmorr@microsoft.com>
Change-Id: I44c8f7701d9f1aaa872274166321cd7d34fb1855
Reviewed-on: https://review.openocd.org/c/openocd/+/6829
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* .gitmodules: switch away from repo.or.cz

The host repo.or.cz is often offline, creating issues for cloning
and building OpenOCD from scratch.
Already 'jimtcl' developer has dropped repo.or.cz, triggering the
OpenOCD commit 861e75f54e ("jimtcl: switch to github").

Change also the link of the remaining submodules 'git2cl' and
'libjaylink' to their respective main repository.

Change-Id: Ib513237427635359ce36a480a8f2060e2fb12ba4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6834
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>

* flash/nor/stm32f2x: Fix erase of bank 2 sectors

This commit corrects the erase function for stm32f2x when dealing with
sectors in bank 2, for STM32F42x/43x devices with 1MB flash.

On STM32F42x/43x with 1MB flash in dual bank configuration, the sector
numbering is not consecutive. The last sector in bank 1 is number 7, and
the first sector in bank 2 is number 12.
The sector indices used by openocd, however, _are_ consecutive (0 to 15
in this case). The arguments "first" and "last" to stm32x_erase() are of
this type, and so the logic surrounding sector numbers needed to be
corrected.
Since the two banks in dual bank mode have the same number of sectors, a
sector index in bank 2 is larger than or equal to half the total number
of sectors.

Change-Id: I15260f8a86d9002769a1ae1c40ebdf62142dae18
Signed-off-by: Simon Johansson <ampleyfly@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6810
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>

* target/cortex_m: fix target_to_cm() helper

The third parameter of container_of() should point to the same member
as target->arch_info points to, struct arm.

It worked just because struct arm is the first member in
struct armv7m_common.
If you move arm member from the first place, OpenOCD fails heavily.

Change-Id: I0c0a5221490945563e17a0a34d99a603f1d6c2ff
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6749
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* target/armv7m,cortex_m: introduce checked arch_info cast routines

target_to_armv7m() and target_to_cm() do not match the magic number
so they are not suitable for use outside of target driver code.

Add checked versions of pointer getters. Match the magic number
to ensure the returned value points to struct of the correct type.

Change-Id: If90ef7e969ef04f0f2103e0da29dcbe8e1ac1c0d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6750
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* target/cortex_m: add Cortex-M part number getter

The getter checks the magic numbers in arch_info to detect eventual
type mismatch.

Change-Id: I61134b05310a97ae9831517d0516c7b4240d35a5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6751
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>

* flash/nor/stm32xx: fix segfault accessing Cortex-M part number

Some of STM32 flash drivers read Cortex-M part number from
cortex_m->core_info.
In corner cases the core_info pointer was observed uninitialised
even if target_was_examined() returned true. See also [1]

Use the new and safe helper to get Cortex-M part number.

While on it switch also target_to_cm()/target_to_armv7m() to the safe
versions. This prevents a crash when the flash bank is misconfigured
with non-Cortex-M target.

Add missing checks for target_was_examined() to flash probes.

[1] 6545: fix crash in case cortex_m->core_info is not set
    https://review.openocd.org/c/openocd/+/6545

Change-Id: If2471af74ebfe22f14442f48ae109b2e1bb5fa3b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Fixes: f5898bd93f (flash/stm32fxx.c: do not read CPUID as this info is stored in cortex_m_common)
Reviewed-on: https://review.openocd.org/c/openocd/+/6752
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>

* cpld: altera-epm240: Add additional IDCODEs

This adds some additional IDCODEs from the datasheet. It also adds
support for customizing the tap name.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I7cda10b92c229b61836c12cd9ca410de358ede2e
Reviewed-on: https://review.openocd.org/c/openocd/+/6846
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* cpld: altera-epm240: Increase adapter speed

According to the datasheet, the minimum clock period with Vccio1 = 1.5V
(the lowest voltage supported) is 143ns, or around 6MHz. Set the default
adapter speed to 5 MHz.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I21cad33fa7f1e25e81f43b5d2214d1fa4ec924de
Reviewed-on: https://review.openocd.org/c/openocd/+/6847
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* target: Add support for ls1088a

The LS1088A is an octo-core aarch64 processor from NXP in the layerscape
family. The JTAG is undocumented, but I was able to figure things out
from the output of `dap info`. This is the first in-tree example of
using the hwthread rtos (as far as I know), so hopefully it can serve as
an example to other developers. There are some ETMs, but I was unable to
try them out because I got 'invalid command name "etm"' when trying to
test things out.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I9b0791d27d8c41170a413a8d86431107a85feba2
Reviewed-on: https://review.openocd.org/c/openocd/+/6848
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* target: ls1088a: Add service processor

Normally the service processor is not necessary for debugging. However,
if you are using the hard-coded RCW or your boot source is otherwise
corrupt, then the general purpose processors will never be released from
hold-off. This will cause GDB to become confused if it tries to attach,
since they will appear to be running arm32 processors. To deal with
this, we can release the CPUs manually with the BRRL register. This
register cannot be written to from the axi target, so we need to do it
from the service processor target. This involves halting the service
processor, modifying the register, and then resuming it again. We try
and determine what state the service processor was in to avoid resuming
it if it was already halted.

The reset vector for the general purpose processors is determined by the
boot logation pointer registers in the device configuration unit.
Normally these are set using pre-boot initialization commands, but if
they are not set then they default to 0. This will cause the CPU to
almost immediately hit an illegal instruction. This is fine because we
will almost certainly want to attach to the processor and load a program
anyway.

I considered adding this as an event handler for either gdb-attach or
reset-init. However, this command shouldn't be necessary most of the
time, and so I don't think we should run it automatically.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I1b725292d8a11274d03af5313dc83678e10e944c
Reviewed-on: https://review.openocd.org/c/openocd/+/6850
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* board: Add NXP LS1088ARDB

This adds a board file for the NXP LS1088ARDB. This only covers the
"primary" JTAG header J55, and not the PCIe header (J91). The only
oddity is that the LS1088A and CPLD are muxed by adding/removing a
jumper from J48. Unfortunately, it doesn't look like OpenOCD supports
this CPLD beyond determining the irlen, so it's not very useful. Those
who are interested in experimenting can define CWTAP to access the CPLD,
but the default is to access the CPU.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: Ia07436a534f86bd907aa5fe2a78a326a27855a24
Reviewed-on: https://review.openocd.org/c/openocd/+/6849
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* gdb_server: fix double free

Commit 6541233aa7 ("Combine register lists of smp targets.")
unconditionally assigns the output pointers of the function
smp_reg_list_noread(), even if the function fails and returns
error.
This causes a double free from the caller, that has assigned NULL
to the pointers to simplify the error handling.

Use local variables in smp_reg_list_noread() and assign the output
pointers only on success.

Change-Id: Ic0fd2f26520566cf322f0190780e15637c01cfae
Fixes: 6541233aa7 ("Combine register lists of smp targets.")
Reported-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6852
Tested-by: jenkins
Reviewed-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Reviewed-by: Tim Newsome <tim@sifive.com>

* gdb_server: check target examined while combining reg list

Commit 6541233aa7 ("Combine register lists of smp targets.")
assumes that all the targets in the SMP cluster are already
examined and unconditionally call target_get_gdb_reg_list_noread()
that will in turn return error if the target is not examined yet.

Skip targets not examined yet.
Add an additional check in case the register list cannot be built,
e.g. because no target in the SMP cluster is examined. This should
never happen, but it's better to play safe.

Change-Id: I8609815c3d5144790fb05a870cb0c931540aef8a
Fixes: 6541233aa7 ("Combine register lists of smp targets.")
Reported-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6853
Tested-by: jenkins
Reviewed-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Reviewed-by: Tim Newsome <tim@sifive.com>

* flash/stm32l4x: fix maybe-uninitialized compiler error

using gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0 we get:
error: ‘retval’ may be used uninitialized in this function

fixes: 13cd75b6ec (flash/nor/stm32xx: fix segfault accessing Cortex-M part number)
Change-Id: I897c40c5d2233f50a5385d251ebfa536023e5cf7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6861
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* Fix build.

Change-Id: Ia60246246dd859d75659a43d1c59588dbb274d46
Signed-off-by: Tim Newsome <tim@sifive.com>

Co-authored-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Co-authored-by: Julien Massot <julien.massot@iot.bzh>
Co-authored-by: Pavel Kirienko <pavel.kirienko@gmail.com>
Co-authored-by: Zoltán Dudás <zedudi@gmail.com>
Co-authored-by: Antonio Borneo <borneo.antonio@gmail.com>
Co-authored-by: Jacek Wuwer <jacekmw8@gmail.com>
Co-authored-by: Ben McMorran <bemcmorr@microsoft.com>
Co-authored-by: Simon Johansson <ampleyfly@gmail.com>
Co-authored-by: Tomas Vanek <vanekt@fbl.cz>
Co-authored-by: Sean Anderson <sean.anderson@seco.com>
Co-authored-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-03-03 10:03:55 -08:00
Tarek BOCHKATI 8b740af10d flash/stm32l4x: fix maybe-uninitialized compiler error
using gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0 we get:
error: ‘retval’ may be used uninitialized in this function

fixes: 13cd75b6ec (flash/nor/stm32xx: fix segfault accessing Cortex-M part number)
Change-Id: I897c40c5d2233f50a5385d251ebfa536023e5cf7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6861
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-01 08:36:52 +00:00
Tomas Vanek 13cd75b6ec flash/nor/stm32xx: fix segfault accessing Cortex-M part number
Some of STM32 flash drivers read Cortex-M part number from
cortex_m->core_info.
In corner cases the core_info pointer was observed uninitialised
even if target_was_examined() returned true. See also [1]

Use the new and safe helper to get Cortex-M part number.

While on it switch also target_to_cm()/target_to_armv7m() to the safe
versions. This prevents a crash when the flash bank is misconfigured
with non-Cortex-M target.

Add missing checks for target_was_examined() to flash probes.

[1] 6545: fix crash in case cortex_m->core_info is not set
    https://review.openocd.org/c/openocd/+/6545

Change-Id: If2471af74ebfe22f14442f48ae109b2e1bb5fa3b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Fixes: f5898bd93f (flash/stm32fxx.c: do not read CPUID as this info is stored in cortex_m_common)
Reviewed-on: https://review.openocd.org/c/openocd/+/6752
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-02-25 20:28:02 +00:00
Simon Johansson 29912328f0 flash/nor/stm32f2x: Fix erase of bank 2 sectors
This commit corrects the erase function for stm32f2x when dealing with
sectors in bank 2, for STM32F42x/43x devices with 1MB flash.

On STM32F42x/43x with 1MB flash in dual bank configuration, the sector
numbering is not consecutive. The last sector in bank 1 is number 7, and
the first sector in bank 2 is number 12.
The sector indices used by openocd, however, _are_ consecutive (0 to 15
in this case). The arguments "first" and "last" to stm32x_erase() are of
this type, and so the logic surrounding sector numbers needed to be
corrected.
Since the two banks in dual bank mode have the same number of sectors, a
sector index in bank 2 is larger than or equal to half the total number
of sectors.

Change-Id: I15260f8a86d9002769a1ae1c40ebdf62142dae18
Signed-off-by: Simon Johansson <ampleyfly@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6810
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-02-25 10:58:41 +00:00
Hans-Erik Floryd efb0b116da flash/nor/atsame5: add LAN9255 devices
Support Microchip LAN9255 devices with embedded SAME53J MCU.

Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Change-Id: Ia811c593bf7cf73e588d32873c68eb67c6fafad7
Reviewed-on: https://review.openocd.org/c/openocd/+/6811
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-01-29 18:18:53 +00:00
Tim Newsome b6fabdd429 Merge branch 'master' into from_upstream
Change-Id: I61e24edbdeceddba265514fd7e0a489ec23e2a4c
2022-01-28 09:40:43 -08:00
Doug Brunner aad8718058 flash/nor/efr32: fixed lockbits and user data
Changed flash driver to support writing to the user data page, as well as to any portion of the lockbits page above 512 bytes (the amount used for the actual page lock words). The top part of the lockbits page is used on at least the EFR32xG1 chips for the SiLabs bootloader encryption keys.

As presented to the user, the lockbits page is the same size as the other pages, but any attempt to write to its low 512 bytes is an error. To enforce this, efr32x_write is renamed to efm32x_priv_write and a wrapper function is provided in its place. If the user erases the lockbits page, the driver rewrites the cached lock words after the erase. When the driver erases the lockbits page in order to update the lock words, it first takes a copy of anything stored in the top part of the page, and re-programs it after the erase operation.

There are now multiple instances of flash_bank for each target, and the flash_bank instances must share their cached lock words to operate as intended. Therefore, when a bank is created, the global flash bank list is used to find any other banks that share the same target. Since some banks in the global list are invalid at the time free_driver_priv is called, reference counting is used to decide when to free driver_priv.

To avoid the need to find the lockbits flash_bank from another flash_bank, efm32x_priv_write and efm32x_erase_page now take an absolute address.

There didn't seem to be any reason to prohibit unprotecting individual flash pages, so that limitation is removed from efm32x_protect().

This addresses ticket #185.

Valgrind-clean, except for 2x 4kiB not freed/still reachable blocks that were allocated by libudev.
No new Clang analyzer warnings, no new sanitizer warnings.

Signed-off-by: Doug Brunner <doug.a.brunner@gmail.com>
Change-Id: Ifb22e6149939d893f386706e99b928691ec1d41b
Reviewed-on: https://review.openocd.org/c/openocd/+/6665
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-01-05 17:57:08 +00:00
Tim Newsome cc0ecfb6d5 Merge branch 'master' into from_upstream
Conflicts:
	doc/openocd.texi
	src/flash/nor/fespi.c

Change-Id: Iaac61cb6ab8bba9df1d4b9a52671a09163eb50b2
2021-12-28 10:45:40 -08:00
Jaehoon Park fdf17dba56 flash/nor/spi: add micron MT25QU01G
1Gbit SPI flash on VCU118 Rev. 2.0

Contributed to riscv-openocd in https://github.com/riscv/riscv-openocd/pull/487

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I93447dd970d9901a671567fe8ab9e407432f8db9
Reviewed-on: https://review.openocd.org/c/openocd/+/6764
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-12-11 17:49:46 +00:00
Tomas Vanek f735faa931 target,flash: allow target_free_working_area on NULL area pointer
Standard C library free() allows NULL pointer as a parameter.

Change target_free_working_area() to conform this convention.

Remove NULL pointer tests before target_free_working_area() calls.

While on it add missing setting pointer to NULL after target_free_working_area().

Change-Id: I7c692ab04a9933398ba5bc614723ad0bdecb87b3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6712
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-03 21:59:20 +00:00
Tim Newsome 35f284fe7c flash/nor/fespi: algorithm, large address, errors
* Move more smarts into the target algorithm code, and rewrite that in C
  so it's easier to understand/maintain.
* Support >24-bit addresses.
* Check for errors.

Change-Id: I3b1a143589fe6defafb8f95820aa682acc9646e7
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6679
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-12-03 21:58:55 +00:00
Tomas Vanek 21d11f13ec flash/nor/at91samd: remove 'at91samd info' command
The command is a stub only, does nothing.

Change-Id: Ib3b8c2122a9f6f2e179bee34ac56d0adf367bfcc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6730
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-03 21:53:36 +00:00
Tomas Vanek abd94b8325 flash/nor/kinetis_ke: remove 'kinetis mdm test_securing' cmd
The command might be a leftover from development of the driver.
There is no documentation what it does.

Change-Id: Iaa5aa1ac51638bd6acce172a5dd03846a165dc27
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6728
Tested-by: jenkins
Reviewed-by: Ivan-Artekit <ivan@artekit.eu>
2021-12-03 21:53:07 +00:00
Tomas Vanek 55da5b47cb flash/nor/kinetis_ke: add .help fields for tcl commands
Add help texts from similar driver kinetis.c

While on it fix one existing help: the flash is obviously not NAND

Change-Id: Ibd295105586b008aaabf2fb4e4a75bf551266e38
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6727
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-03 21:52:49 +00:00
Tim Newsome 61a3f65a0c Merge branch 'master' into from_upstream
Merged 1ad6ed38b6

Conflicts:
	src/rtos/rtos_standard_stackings.c

Change-Id: Ica8109135de0f9aa87455353a4538b161b844b04
2021-11-30 10:38:55 -08:00
Doug Brunner 1ad6ed38b6 flash/nor/efm32: fixed BG1x identification
The EFM32 flash driver misidentifies the EFR32BG1B on my board as EFR32MG1B.
Looks like this was caused by a copy-paste error, fixed.

Signed-off-by: Doug Brunner <doug.a.brunner@gmail.com>
Change-Id: I3067f7ba132c2562487da8c2371f63a4843230c1
Reviewed-on: https://review.openocd.org/c/openocd/+/6666
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-29 09:50:17 +00:00
Antonio Borneo cbfd0b9aad flash/psoc6: initialize usage field
The missing initialization triggers a run-time error message:
	Error: BUG: command 'psoc6 reset_halt' does not have the '.usage'
		field filled out

Change-Id: I975e4ba99bd939aa924a9d62b1ab76b2ab5bf193
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6720
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-23 11:04:55 +00:00
Antonio Borneo facbb481b8 flash/rp2040: don't initialize to NULL fields in struct
When a struct is initialized, missing fields are already filled
with zero or NULL.
This change simplifies scripts to compare documentation and
registered commands.

Change-Id: I96fbdfa98bbb1f2b5e2a9532faf5a15cb5bc28dd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6719
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-23 11:04:42 +00:00
Antonio Borneo b46cb18c91 openocd: use unique name for struct command_registration
Just to avoid name clash when comparing documentation with
registered commands through scripts.

Change-Id: I8832545d8d9236ea5dabe6e73732f51e5246caff
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6717
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-11-23 11:04:02 +00:00
Antonio Borneo b5d1b719e5 openocd: use single line for register_commands*()
Do not split in multiple lines the calls to register_commands*().
No change in code behaviour, just make it easy to grep in the code
and identify the commands that can be registered.
This would help detecting undocumented commands.

Change-Id: Id654e107cdabf7ee31fc3d227c1d2a59acc5669e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6716
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-23 11:03:38 +00:00
Janco Kock aa8a79809e flash/nor/at91samd: Add SAMR35J18B support
Add support for the mcu SAMR35J18B

Signed-off-by: Janco <janco@factorylab.nl>
Change-Id: I45d801485ad1c16d1b3086516a2b6d71d13f3fc7
Reviewed-on: https://review.openocd.org/c/openocd/+/6664
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-11-18 02:17:41 +00:00
asier70 5a0b4889d0 flash/nor/stm32f1x: Add support for GD32E23x
GD32E23x from GigaDevice is cortex-M23 microcontroller and it can work with the stm32f1x driver.
Modifications are similar to this done for GD32F1x0 in #6164 (https://review.openocd.org/c/openocd/+/6164).
Configuration file is added because its cortex-M23 CPU ID is different.
I think that GigaDevice microcontrollers should be handled in an independent unit to separate them from STM32,
but nowadays quick solution is welcome.

Signed-off-by: asier70Andrzej Sierżęga <asier70@gmail.com>
Change-Id: I91f31f5f66808bc50a8f607ac2c107e6b7c5e2b8
Reviewed-on: https://review.openocd.org/c/openocd/+/6527
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-15 15:35:50 +00:00
Antonio Borneo a498a3deaa jtagspi: fix build on MacOS
Commit be57b0ab84 ("Update jtagspi driver for 1-, 2- and 4-byte
addresses") introduces two incorrect format string for uint32_t
data types.
This cause build failure on MacOS:

src/flash/nor/jtagspi.c:474:35: error: format specifies type 'unsigned char'
but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat]
        LOG_DEBUG("status=0x%02" PRIx8, *status);
        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~

src/flash/nor/jtagspi.c:513:65: error: format specifies type 'unsigned char'
but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat]
        LOG_ERROR("Cannot enable write to flash. Status=0x%02" PRIx8, status);
        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~

Fix the format string.

Change-Id: I209053317c8b26c35c6f11be0553ccccc698c551
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: be57b0ab84 ("Update jtagspi driver for 1-, 2- and 4-byte addresses")
Reviewed-on: https://review.openocd.org/c/openocd/+/6701
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-11-13 22:36:03 +00:00
Tarek BOCHKATI 9d574aa3fa flash/stm32h7x: don't read flash size using the H74/H75x CPU2
CPU2 (Cortex-M4) cannot read flash size register.
assume the maximum flash size without triggering an error message

Change-Id: I5c3328b7cc42e3aa57165075021227d7936f3d26
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6670
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-11-13 10:53:26 +00:00
Tarek BOCHKATI 50f977b058 flash/stm32h7x: avoid using magic numbers for device ids
Change-Id: I4d682ee828404974abd9a42f98b840d77835cfe0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6669
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-11-13 10:53:01 +00:00
Andreas Bolsch be57b0ab84 Update jtagspi driver for 1-, 2- and 4-byte addresses
jtagspi driver always used 3-byte addresses regardless of actual
device capcity. Now select 1- to 4-byte addresses depending on
device capacity.
Some devices need a special command to activate the 4-byte address
mode, a special command to accomplish this, and a further command
for setting device properties are added.
Additionally, restriction (start of range had to be page aligned)
removed.
Tested with XCS6SLX16 board and W25Q256FV in 3- and 4-byte address
modes.

Change-Id: I88b2877517a18dac460253ae6d97f3dded054e6c
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/4876
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
2021-11-12 20:31:46 +00:00
Jimmy 7901cf2124 flash/nor/stm32lx: fixed writes at high adapter speeds
The busy flag must be polled after each half-page write.
At low clock speeds, no issue is observed when the poll
is omitted, because the writes complete before the next
write begins. But at high clock speeds the subsequent
writes would overlap and cause the operation to fail.

The status polls are done on the target for efficiency,
since the half-pages are very small.

Change-Id: Ia1e9b4a6a71930549b3d84a902744ce6e596301b
Signed-off-by: Jimmy <nhminus@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5598
Tested-by: jenkins
Reviewed-by: Jelle De Vleeschouwer
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
2021-11-03 20:32:54 +00:00
Tim Newsome 108231c31d Merge branch 'master' into from_upstream
This primarily contains the large upstreaming of RISC-V changes, so lots
more RISC-V changes than usual.

Conflicts:
	src/target/riscv/opcodes.h
	src/target/riscv/riscv-011.c
	src/target/riscv/riscv-013.c
	src/target/riscv/riscv.c
	src/target/riscv/riscv.h

Change-Id: I1145dad538a5470ad209848572e6b0f560b671e9
Signed-off-by: Tim Newsome <tim@sifive.com>
2021-10-25 10:20:31 -07:00
Antonio Borneo 8a522d96c7 flash/nor/psoc6: fix doxygen comment
Commit 64c2e03b23 ("flash/nor: improved API of flash_driver.info
& fixed buffer overruns") changes the prototype of the function
psoc6_get_info() but didn't update the list of parameters in the
doxygen comment.

Fix the doxygen comment.

Change-Id: I1dce018b60d080973c5e351490d4d7baba422d74
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 64c2e03b23 ("flash/nor: improved API of flash_driver.info & fixed buffer overruns")
Reviewed-on: https://review.openocd.org/c/openocd/+/6620
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-10-25 16:10:40 +00:00
Tim Newsome 1775341ef8 Merge branch 'master' into from_upstream
Conflicts:
	src/jtag/drivers/remote_bitbang.c
	src/rtos/rtos_standard_stackings.c
	src/rtos/rtos_standard_stackings.h
	src/target/breakpoints.c
	src/target/riscv/riscv.c
	src/target/target.c

Change-Id: Ia6fcba3d43be8ea31728f3bcc2be6cb7e3ccc5c5
2021-10-05 17:46:02 -07:00
Yasushi SHOJI 05752557dd helper: Remove src/helper from include dirs
The header files under src/helper/ can currently be included with
either

    #include <bits.h>
    or
    #include <helper/bits.h>

This is because we specify both "src/" and "src/helper/" directories
as include directories.  Some files name under "src/helper/", such as
types.h, log.h, and util.h are too generic and could be ambiguous
depending on the search path.

This commit remove "src/helper/" from our include dir and make C files
include explicitly.

Change-Id: I38fc9b96ba01a513d4a72757d40007e21b502f25
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6507
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-10-02 13:18:15 +00:00
Antonio Borneo c4e6034e26 armv7m.h: relax dependency from 'arm_adi_v5.h'
The include file 'armv7m.h' includes 'arm_adi_v5.h' only to get
the definition of 'struct adiv5_ap', but doesn't need the struct
content.

Reducing the cross dependencies speeds-up the compile time during
code development by avoiding re-compiling file.

Relax the dependency by locally declaring 'struct adiv5_ap' in
'armv7m.h' and remove the include of 'arm_adi_v5.h'.
Fix the other files that have now lost the includes file that
'arm_adi_v5.h' depends from.

Change-Id: Ic0d40b17db6045fa43f348bda83eaf211a6b347d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6468
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-09-25 12:59:12 +00:00
Tim Newsome 3858878d38
Properly cache s0/s1 (#645)
* WIP on register caching.

So we don't have to save/restore S0 all the time.

Change-Id: I9d83a24dbd92a325213f2b25eebc9ede9dca2868

* Seems to work for RV32.

Change-Id: Ide620faa5dfef4f39c3146e094787ea28d041327

* Use caching everywhere.

Change-Id: I0de249437589e1f49811f34c12726528c045c74f

* Getting closer...

Change-Id: I532455f1e416723b79eecc7d33ec6407ccb8e33c

* All spike tests pass again.

Running all tests now takes 2m54s compared to 3m0s. That's probably not
the thing to measure, since the goal is to improve interactive
performance, while the tests do all kinds of other stuff (like sleep,
and start spike, etc.).

Change-Id: Ic7d944454a64b2baf6e6028debb4a1ba896834d8

* Save s0/s1 during examine.

Change-Id: I4795180e3b04d01433a11d4a0ccb38c35074cc44
Signed-off-by: Tim Newsome <tim@sifive.com>

* Check flush registers result.

Change-Id: I8350c4198cb41881e1143816698aed677a312111
Signed-off-by: Tim Newsome <tim@sifive.com>

* Fix upstream style regression.

Change-Id: I4cc7034151ba62fa51aea77e44b0cad9b9b97876
Signed-off-by: Tim Newsome <tim@sifive.com>
2021-09-23 15:07:38 -07:00
Oleksij Rempel a0bd3c9924 Partially Revert "flash/stm32l4x: introduce flash programming without loader"
This partially reverts commit 1247eee4e6.

There is no reasonable use cases where work-area should be enabled
and working, and it can't be used for the flash loader.

Instead of introducing driver specific property, users can disable
flash load by disabling work-area, for example by setting it to 0.

But still we keep the function stm32l4_write_block_without_loader
to be used when workarea is not available (no sufficient size or zero)

Change-Id: Ibb046c74df354c6067bac978e8ef7efb47d9fd2b
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6569
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-09-18 18:15:35 +00:00
Tarek BOCHKATI a1903f2867 flash/stm32l4x: fix dual bank support for STM32L552xC devices
For STM32L552xC devices with 256K flash:
  dual bank mode is activated if DB256 is set
  page size is 2KB if DBANK is set

For parts with 512K (aka STM32L5x2xE):
  DBANK controls both of dual/single bank mode and page size as well.

Change-Id: I8be668d5552fefe81acffaf2e3e35ef5e938162e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reported-by: Patrik Bachan <diggit@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/317/
Reviewed-on: https://review.openocd.org/c/openocd/+/6538
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-18 18:15:15 +00:00
Tarek BOCHKATI b61a280860 flash/stm32l4x: fix flash programming in 64-bit hosts
stm32l4_work_area struct is shared between the loader and stm32l4x flash driver

'*wp' and '*rp' pointers' size is 4 bytes each since stm32l4x devices have
32-bit processors.

however when used in openocd code, their size depends on the host
  if the host is 32-bit, then the size is 4 bytes each.
  if the host is 64-bit, then the size is 8 bytes each.

to avoid this size difference, change their types depending on the
usage (pointers for the loader, and 32-bit integers in openocd code).

Change-Id: I0a3df4bb4bf872b01cdb9357eb28307868d7d469
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6556
Tested-by: jenkins
Reviewed-by: Yestin Sun <sunyi0804@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-09-12 14:26:31 +00:00
Tarek BOCHKATI e63297045b flash/stm32l4x: do not use magic number for dual bank option bits
Change-Id: I27211e7d44b48f65546e31710ec6ae129acb416f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6537
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-11 12:06:42 +00:00
Tarek BOCHKATI 5070425d6a flash/stm32l4x: introduce is_max_flash_size and use it
Change-Id: Idb421b9cf737d222baf4dd890032f69dec7a366e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6536
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-11 12:05:15 +00:00
Tarek BOCHKATI cdb6ea4f9f flash/stm32l4x: fix segmentation fault with HLA adapters and STM32WLx devices
CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1.
Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers
a segfault.

Change-Id: I501f5b69e629aa8d2836b5194063d74d5bfddb12
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Fixes: https://github.com/STMicroelectronics/OpenOCD/issues/6
Reviewed-on: https://review.openocd.org/c/openocd/+/6535
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-11 12:03:02 +00:00
Tarek BOCHKATI f24a283ac7 flash/nor/tcl: 'flash list' command: add the flash bank target
add the target assigned to the flash bank at creation
this is useful in daisy chains, to filter out the target banks.

Change-Id: Ic39e44914e34bb62991783762e5a65ef8871e82f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6426
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-04 07:26:10 +00:00
Tarek BOCHKATI 9f733ba2f2 flash/nor/tcl: fix the flash name returned by 'flash list' command
The 'flash list' command returns the driver name as flash name which seems
to be incorrect, the proposal is:
 - to fix this by returning the flash name
 - and add a new item 'driver' in the returned list

example:
before the change
> flash list
  {name stm32l4x base 134217728 size 0 bus_width 0 chip_width 0}
  {name stm32l4x base 201326592 size 0 bus_width 0 chip_width 0}
  {name stm32l4x base 200933376 size 0 bus_width 0 chip_width 0}

after the change
> flash list
  {name stm32l5x.flash_ns driver stm32l4x ...}
  {name stm32l5x.flash_alias_s driver stm32l4x ...}
  {name stm32l5x.otp driver stm32l4x ...}

Change-Id: I6d307b73c457549981a93c260be344378719af82
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6425
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-09-04 07:25:56 +00:00
Tarek BOCHKATI 48f267d4ad flash/stm32l4x: avoid using magic numbers for device ids
Change-Id: I54c41f31c16b91904e8cbca823b90caa3807826d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6437
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:40 +00:00
Tarek BOCHKATI 4f371e8eed flash/stm32l4x: add support of STM32WB1x
STM32WB1x devices has a single flash bank up to 320 KB (page 2KB)

note: STM32WB5x/WB3x are single banks as well but do have 4KB as page size.
note: remove the assert that checks if max_mages is power of two, because
      STM32WB1x flash size is not a power of 2

Change-Id: Ib514cf989ecb819d25d1c4a65d641d0a1a3d9f18
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6129
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:34 +00:00
Tarek BOCHKATI af3575b931 flash/stm32l4x: add support of STM32G05/G06x
this device has single bank flash architecture up to 64KB (page 2KB)
reference: RM0444 rev 5

Change-Id: Ia213c01accb950fcbb7519e08057dae11b4443dd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6128
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:26 +00:00
Tarek BOCHKATI 4b1492bb8e flash/stm32l4x: switch to to c loader instead of assembly loader
switching to C loader instead of the assembly version will enhance readability
will reduce the maintenance effort.

besides the switch to C loader, we added a new parameters to the loader
like flash_word_size and flash_sr_bsy_mask in order to support properly
STM32U5x and STM32G0Bx/G0Cx in dual-bank mode.

Change-Id: I24cafc2ba637a065593a0506eae787b21080a0ba
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6109
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:13 +00:00
Wealian Liao 385eedfc6f flash/nor: add support for Nuvoton NPCX series flash
Added NPCX flash driver to support the Nuvoton NPCX series
microcontrollers. Add config file for NPCX series.

Change-Id: Ia10b019a3521f59ad1e10ccdc56827ba30c3eac8
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5950
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 06:42:54 +00:00
Tim Newsome a1146731a8 Merge branch 'master' into from_upstream
Conflicts:
	src/flash/nor/fespi.c
	src/jtag/drivers/ftdi.c
	src/rtos/FreeRTOS.c
	src/rtos/hwthread.c
	src/rtos/rtos.c
	src/rtos/rtos.h
	src/rtos/rtos_ecos_stackings.c
	src/rtos/rtos_embkernel_stackings.c
	src/rtos/rtos_standard_stackings.c
	src/rtos/rtos_standard_stackings.h
	src/rtos/rtos_ucos_iii_stackings.c
	src/server/gdb_server.c
	src/server/server.c
	src/target/riscv/riscv-013.c
	src/target/target.c
	src/target/target.h

Change-Id: If0924a3e799260c33fae5feb85975b1273b45a0f
2021-08-30 15:03:59 -07:00
Tarek BOCHKATI c281c64469 flash/stm32l4x: free write_algorithm work area if no space left for the buffer
If the remaining memory for the buffer is less than 256 bytes,
the memory allocated for the write algorithm in the target is not freed.

Fixes: ba131f30a0 (Flash driver for STM32G0xx and STM32G4xx)
Change-Id: Ic649f6c39799d76725b0c69ff3a009a3f510e17f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6486
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-30 07:52:26 +00:00
Tarek BOCHKATI c2ad18d68b flash/stm32l4x: add support of STM32U57x/U58x
this device flash registers are quite similar to STM32L5
with this changes :
 - flash size is up to 2MB
 - 2MB variants are always dual bank
 - 1MB and 512KB variants could be dual bank (contiguous addressing)
   depending on DUALBANK bit(21)
 - flash data width is 16 bytes (quad-word)

Change-Id: Id13c552270ce1071479ad418526e8a39ebe83cb1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6108
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-30 07:51:52 +00:00
Tarek BOCHKATI 6c1e1a212a flash/stm32l4x: add support of STM32WL5x dual core
according the RM0453, the second core  have a different Flash CR and SR
registers for flash operations (called C2CR and C2SR).
so we need to a different flash_regs than older L4 devices.
@see stm32wl_cpu2_flash_regs

the C2CR register don't contain LOCK and OPTLOCK bits, and this explain
the addition of new register index called STM32_FLASH_CR_WLK_INDEX to
look-up the CR with lock, to be used in locking/unlocking the flash.

note: DBGMCU_IDCODE cannot be read using CPU1 (Cortex-M0+) at AP1,
to solve this read the UID64 (IEEE 64-bit unique device ID register)

Change-Id: Ifb6e291bf97f814f0b9987b2c40f3037959f7af4
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6050
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-26 13:13:02 +00:00
Sebastiaan de Schaetzen 64fbd60787 flash/stm32l4x: prevent undefined behavior warnings caused by signed integer operations
When running OpenOCD with -fsanitize=undefined, a warning is emitted
for an bit-shifting operation whose result cannot be stored in a
signed integer.

This is because (1 << 31) overflows a signed integer, which is
undefined behavior. By making each of the bit masks act on an
unsigned number, the warning is avoided.

Whether this warning emitted by UBSan would ever manifest into a real
error is debatable, but fixing this does make UBSan happy.

Change-Id: I0455a26b234cb4f5e239a6ba90023d28380e9464
Signed-off-by: Sebastiaan de Schaetzen <sebastiaan.de.schaetzen@gmail.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6429
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:38:45 +00:00
Tarek BOCHKATI 43d31a8fd5 flash/stm32l4x: add support of STM32G0Bx/G0Cx devices
this device has a dual bank flash architecture up to 512 KB (page 2KB)
reference: RM0444 Rev 5

notes:
 - 128k variant is always single bank
 - 256k variant flash is contiguous (no gap) in dual bank mode
 - BKER is bit 13 vs bit 11 for other devices
   > added cr_bker_mask in stm32l4_flash_bank struct
 - BSY2 for bank 2 operations
   > added sr_bsy_mask in stm32l4_flash_bank struct
   > proposed optimization: always wait for (BSY1 | BSY2) with
     STM32G0Bx/G0Cx devices only (for L4+ devices BSY2=PEMPTY)

TODO: update flashloader to use the proper BSY bits
      temporarily don't use the loader in dual bank mode

Change-Id: I54b0c93b494e7209da818791d15edd8cd42c2732
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6036
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:38:17 +00:00
Tarek BOCHKATI e7e46ba61e flash/stm32l4x: remove stm32l4_part_info.default_flash_regs
This struct element is replaced by the usage of F_HAS_L5_FLASH_REGS flag:
since over this driver stm32l4_flash_regs is the default register layout,
and the only exception is STM32L5 family,
so it's simpler to manage it using a flag.

Note: the same flag will be used with STM32U5 devices, as they have
the same registers layout, which explains the move of stm32l5_s_flash_regs
before the switch(device_id) in order to not re-write this for STM32U5.

Change-Id: I3b67a6f558d9350f609a22524012b6fceb7de7c2
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6435
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:37:38 +00:00
Tarek BOCHKATI 1247eee4e6 flash/stm32l4x: introduce flash programming without loader
this capability permits to program the flash if we cannot reserve a workarea.

the introduction the command 'stm32l4x flashloader <bank_id> [enable|disable]'
helps to automatically skip using the flashloader if needed.

Change-Id: Id29213c85ee5c7c487cfee21554f5a7ea50db6c9
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6273
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:27:17 +00:00
Tarek BOCHKATI e609d5a5de flash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0x55
when RDP level is 0.5 the provided work-area should reside in non-secure RAM
to ensure that:
 - add a hint in the driver level
 - reduce the usage of secure RAM only when TZEN=1 and RDP is not 0.5
   (check the target configuration file)

Change-Id: Idbf2325e609b84ef8480eefdb49a176fdf7e07c7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6035
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:21:38 +00:00
Tarek BOCHKATI c9d40366ad flash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0xAA
STM32L5 flash memory is aliased to 0x0C000000, this address mapping
is used for secure applications. (0x08000000 for non-secure)

this change allows the programming of secure and non-secure flash
when trustzone is enabled and RDP level is 0

Change-Id: I89d1f1b5d493cf01a142ca4dbfef5a3731cab96e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5936
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-26 06:19:15 +00:00
Tarek BOCHKATI 80d323c6e8 flash/stm32l4x: introduce auto-probe when OPTR is changed
auto re-probing is ensured by having optr cache set in the
last probe operation.

this will help to detect if flash options have been modified by the
running application or by the user using direct register access.

Change-Id: I05cd7ab9e83a7fc26ac6cff175b3c11b0efa2eb5
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5935
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:18:52 +00:00
Tarek BOCHKATI 84291d0269 flash/stm32l4x: introduce 'stm32l4x trustzone [enable|disable]' command
this command will help to enable/disable or display the TrustZone security,
using the TZEN option bit.

Note: This command works only with devices with TrustZone, eg. STM32L5.
Note: This command will perform an OBL_Launch after modifying the TZEN.

Change-Id: I4aef15bf57d09c1658d37858143d23b1d43de1f0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5542
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-26 06:17:12 +00:00
Tarek BOCHKATI 1bce8d3d80 flash/stm32l4x: do not report bank mode before probing [FIX]
in line 1391, get_stm32l4_bank_type_str(bank) will always output the same
value "Flash single" since the variable stm32l4_info->dual_bank_mode is false
by default, stm32l4_info->dual_bank_mode will be set correctly afterward
in the switch case at line 1467

thus the need to remove the usage of get_stm32l4_bank_type_str(bank) before
stm32l4_info->dual_bank_mode initialization.

Fixes: 64c2e03b23 ("flash/nor: improved API of flash_driver.info & fixed buffer overruns")
Change-Id: Ia8dc7e144e0ded6143682eb514c247f27859ff81
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6411
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-26 06:16:32 +00:00
Tarek BOCHKATI cbc1dc5049 flash/atsame5: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: Ia7fe9c4017108616f21676f115f151ac62924205
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6423
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-22 13:19:16 +00:00
Tarek BOCHKATI 3caa18729c flash/kinetis: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: I972da1a75ba7c41c1b714c2429289c3d24594235
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6422
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-22 13:19:07 +00:00
Tarek BOCHKATI 01da8f6c2a flash/xmc4xxx: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: Ibfe95ce73f147f467de8de23e9573ef0179aed96
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6421
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-22 13:18:52 +00:00
Tarek BOCHKATI dd0ee1fa5b flash/at91samd: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: I14061cb48da6bac13f9d2896190136f5784b8c07
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6424
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-22 13:15:24 +00:00
Tarek BOCHKATI 91b5626e7f flash/stm32l4x: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: I7e113b06b74f2d8d9cc4c0ce1957994a1c49c964
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6419
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
2021-08-22 10:45:17 +00:00
Marc Schink 38f94a2677 flash/nor: Do not update 'is_erased'
Remove useless setting of the 'is_erased' flag after a flash
modification. Also, remove code that erroneously depends on
this flag.

Keep the flag for now since it is still used by the
erase_check() functionality.

See commit 07da3b3913

Change-Id: Ia046905bc9e0cb2572145f19251c3e10c4e2d553
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6279
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-14 13:32:07 +01:00
Antonio Borneo 08a0cfdeeb helper/align.h: use it
Use the new helper to make the code more readable.

Change-Id: I11b2a79dbc6f93f6cfde382bcc00dd7ff710d908
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6375
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-08-14 13:29:50 +01:00
Jan Matyas 69eabf9d61 flash/nor/atsamv: fixed "maybe uninitialized" compiler warning
This warning about "maybe uninitialized" variable
used to pop up on certain versions of GCC.

Change-Id: I1cf43b9600885d507afc1dc042322a06751fe146
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/6290
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-14 13:28:54 +01:00
Antonio Borneo c0c7d6fe8b openocd: fix Yoda conditions with checkpatch
The new checkpatch can automatically fix the code, but this
feature is still error prone and not complete.

Patch generated automatically through the new checkpatch with
flags "--types CONSTANT_COMPARISON --fix-inplace".

Some Yoda condition is detected by checkpatch but not fixed; it
will be fixed manually in a following commit.

Change-Id: Ifaaa1159e63dbd1db6aa3c017125df9874fa9703
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6355
Tested-by: jenkins
2021-07-24 10:38:31 +01:00
Antonio Borneo 54e699b260 openocd: manually remove NULL comparisons
For the remaining NULL comparisons, remove then manually.

While there, make more readable a loop, by moving the assigment
out of the loop condition.

Change-Id: I44193aaa95813156a3a79c16b80e1ad333dc1eaf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6353
Tested-by: jenkins
2021-07-24 10:38:19 +01:00
Antonio Borneo 0a1f904707 openocd: remove NULL comparisons with checkpatch [2/2]
Patch generated automatically through a modified checkpatch that
detects the patterns
	if (NULL == symbol)
	if (NULL != symbol)
and through flags "--types COMPARISON_TO_NULL --fix-inplace".

The unmodified checkpatch detects this pattern as Yoda condition,
but it's odd fixing it as Yoda condition and then again as NULL
comparison. This triggered the modification to the script.

Change-Id: I5fe984a85e9c4fc799f049211797aef891ebce18
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6352
Tested-by: jenkins
2021-07-24 10:38:11 +01:00
Antonio Borneo 3917823187 openocd: remove NULL comparisons with checkpatch [1/2]
Patch generated automatically through the new checkpatch with
flags "--types COMPARISON_TO_NULL --fix-inplace".
This only fixes the comparisons
	if (symbol == NULL)
	if (symbol != NULL)
The case of NULL on the left side of the comparison is not tested.

Some automatic fix is incorrect and has been massaged by hands:
	-	if (*psig == NULL)
	+	if (*!psig)
changed as
	+	if (!*psig)

Change-Id: If4a1e2b4e547e223532e8e3d9da89bf9cb382ce6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6351
Tested-by: jenkins
2021-07-24 10:38:00 +01:00
Antonio Borneo 08ee7bb982 openocd: fix simple cases of NULL comparison
There are more than 1000 NULL comparisons to be aligned to the
coding style.
For recurrent NULL comparison it's preferable using trivial
scripts in order to minimize the review effort.

Patch generated automatically with the command:
	sed -i PATTERN $(find src/ -type f)
where PATTERN is in the list:
	's/(\([a-z][a-z0-9_]*\) == NULL)/(!\1)/g'
	's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) == NULL)/(!\1)/g'
	's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) == NULL)/(!\1)/g'

	's/(\([a-z][a-z0-9_]*\) != NULL)/(\1)/g'
	's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) != NULL)/(\1)/g'
	's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) != NULL)/(\1)/g'

	's/(NULL == \([a-z][a-z0-9_]*\))/(!\1)/g'
	's/(NULL == \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(!\1)/g'
	's/(NULL == \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(!\1)/g'

	's/(NULL != \([a-z][a-z0-9_]*\))/(\1)/g'
	's/(NULL != \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(\1)/g'
	's/(NULL != \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(\1)/g'

Change-Id: Ida103e325d6d0600fb69c0b7a1557ee969db4417
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6350
Tested-by: jenkins
2021-07-24 10:37:49 +01:00
Antonio Borneo 20b29b7767 openocd: manually fix Yoda conditions
Fix the remaining Yoda conditions, detected by checkpatch but not
fixed automatically.

While there, apply minor style changes.

Change-Id: I6e1978b89c4d56a20aceaeb2b52968eb6384432a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6356
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-07-20 14:55:43 +01:00
Antonio Borneo 28c24a5c41 openocd: fix simple cases of Yoda condition
There are ~900 Yoda conditions to be aligned to the coding style.
For recurrent Yoda conditions it's preferable using a trivial
script in order to minimize the review effort.
E.g. comparison of uppercase macro/enum with lowercase variable:
	- ...(ERROR_OK == retval)...
	+ ...(retval == ERROR_OK)...

Patch generated automatically with the command:
	sed -i \
	's/(\([A-Z][A-Z0-9_]*\) \([=!]=\) \([a-z][a-z0-9_]*\))/(\3 \2 \1)/g' \
	$(find src/ -type f)

While there, remove the braces {} around a single statement block
to prevent warning from checkpatch.

Change-Id: If585b0a4b4578879c87b2dd74d9e0025e275ec6b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6354
Tested-by: jenkins
Reviewed-by: Xiang W <wxjstz@126.com>
2021-07-20 14:55:24 +01:00
Antonio Borneo bba48b057c flash/nor: convert enum in uppercase
Change-Id: I7b31be25a651069b63c6dea6cb5e7994184390b1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6349
Tested-by: jenkins
Reviewed-by: Xiang W <wxjstz@126.com>
2021-07-20 14:54:44 +01:00
Antonio Borneo 45d5ec2ade flash: use lowercase for C variables
Change-Id: I1c3cb5d1c8c0d73adb3c7320a1b8e3940183cd17
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6347
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-07-20 14:54:04 +01:00
Antonio Borneo 3d135a5c70 flash: rename CamelCase symbols
Each driver is almost self-contained, with no cross dependency.
Changing symbol names in one drive does not impact the other.

Change-Id: Ic09f844f922a35cf0a9dc23fcd61d035b38308b3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6299
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2021-07-02 17:09:47 +01:00
Antonio Borneo 12219255c6 flash/nor/cfi: fix CamelCase symbols in cfi_spansion_pri_ext
The struct cfi_spansion_pri_ext has few symbols in CamelCase.
Change all them accordingly to OpenOCD coding style.
Patch created automatically with the script below:

%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---
(cat << EOF
VppMin          vpp_min
VppMax          vpp_max
TopBottom       top_bottom
TmpBlkUnprotect tmp_blk_unprotected
SimultaneousOps simultaneous_ops
SiliconRevision silicon_revision
PageMode        page_mode
EraseSuspend    erase_suspend
BurstMode       burst_mode
BlkProtUnprot   blk_prot_unprot
BlkProt         blk_prot
EOF
) | while read a b; do
    sed -i "s/$a/$b/g" src/flash/nor/*cfi*
done
%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---

Change-Id: I135331539ca9aa84765fdffc51c87a07a46ee77a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6298
Tested-by: jenkins
2021-07-02 17:08:40 +01:00