This creates the TCL interface for configuring an AT91SAM9 NAND flash
controller and implements the necessary functions to correctly work with
a NAND flash device connected to the chip. This includes updates to the
driver list and the Makefile.am to support building the driver and also
houses the documentation update in openocd.texi.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In conjunction with manual register setup, this lets the ETM trigger
cause entry to debug state. It should make it easier to test and
bugfix the ETM code, by enabling non-trace usage and isolating bugs
specific to thef ETM support. (One current issue being that trace
data collection using the ETB doesn't yet behave.)
For example, many ARM9 cores with an ETM should be able to implement
four more (simple) breakpoints and two more (simple) watchpoints than
the EmbeddedICE supports. Or, they should be able to support complex
breakpoints, incorporating ETM sequencer, counters, and/or subroutine
entry/exit criteria int criteria used to trigger debug entry.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Change handling of the CYCLE_ACCURATE, BRANCH_OUTPUT, and
TRACE_* flags; also the CONTEXTID size values.
- Convert to symbols matching the actual register bits, instead of
some random *other* bits (and then correcting that abuse).
- Get rid of a now-needless enum.
- Keep those values in etm->control, and remove etm->tracemode.
These values all affect the trace data that's recorded by a trace
pod or in the ETB. I modified the file format used to dump ETB
data; since it's fairly clear nobody can use this mechanism now,
this can't cause anyone trouble.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide better comments for the ETM_CTRL bits; use the correct bit
for half/full clock mode; and define a few more of the bits available
from the earliest ETM versions.
The new bit defintions use ETM_CTRL_* names to match their register
(instead of ETM_PORT_* or ETMV1_*). For clarity, and better matching
to docs, they are defined with bitshifting not pre-computed masks.
Stop abusing typdefs for ETM_CTRL values; such values are not limited
to the enumerated set of individual bit values.
Rename etm->portmode to etm->control ... and start morphing it into a
single generic shadow of ETM_CTRL. Eventually etm->tracemode should
vanish, so we can just write etm->control to ETM_CTRL.
Restore an "if" that somehow got dropped.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This command was misplaced; it's not generic to all traceport drivers,
only the ETB supports this kind of configuration. So move it, and
update the relevant documentation.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Much to my surprise, I observed a "flash erase_address ..."
command erasing data which I said should not be erased.
The issue turns out to be generic NOR flash code which was
silently, and rather dangerously, morphing partial-sector
references into unrequested whole-sector ones.
This patch removes that low-level morphing. If desired, it
can and should be done in higher level code. (We might need
to fix some stuff in the GDB server code.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's currently allocating a big buffer but writing it out in
units of sizeof(host's pointer) ... sub-optimal.
Plus fix a couple minor coding style goofs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Word count == size/4; cope. And increase buf_min so it's large
enough to cover the overhead in my tests.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We can actually do the right thing if the MMU is off; save
the error message for the phys-but-MMU-enabled path, which
is what isn't yet supported.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Try to right-size the SRAM buffers, by not:
- using them for very small writes
- giving up when a large buffer isn't available
- allocating buffers much larger than their data
Also don't:
- bother loading the code unless we allocate the writebuffer too
- be so verbose with messaging:
* be more concise
* reduce importance (e.g. DEBUG not WARNING)
* remove duplication
The minimum buffer size is something of a guess. It's eight
times smaller than before, almost the same size as the code
being downloaded. It probably deserves some tuning.
Also, note an erratum affecting flash protection on some chips;
and narrow many over-wide lines affected by the above changes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Refactored the write page raw function into two new functions
for writing data to a NAND device and then another function to
finish up a write to a NAND device. This includes some new
updates to introduce more error checking to existing code.
[dbrownell@users.sourceforge.net: fix fault handling, whitespace]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Added a new function to encapsulate reading a page of data from
a NAND device using either the read_block_data function of a NAND
controller or to use direct reading of data from the NAND device.
This also adds some performance enhancements and uses the read_data
function if the read_block_data function fails safely (because it
can't allocate a buffer in the working area).
[dbrownell@users.sourceforge.net: fix fault handling, whitespace]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Tweak the "scan_chain" output by removing column separators. Also
remove the "current instruction" state ... which changes constantly.
Now its style resembles the "targets" output, and can even fit on
one line in standard terminals and in the PDF docs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Someday revisit various issues: Tempest parts support writing
more than one word at a time; for some target firmware it might
be necessary to save and restore flash IRQ configuration. (The
safest policy is likely to always reset after flash updates.)
Plus swap some undesirable TAB characters with SPACE.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix potential memory leak: make sure the per-bank data
structures are only allocated in probe(), and that calling
probe() multiple times is a NOP. Use it for auto_probe().
Require probe() to have done its thing: don't make access
routines cope with it not having been called. Shrink a
bunch of failure paths; and in some cases, correct them.
Don't needlessly insist on a halted target for probe().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in reading and discarding a status value when fetching
part description data. Or having that needless "#if 0" code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Previously "reading" clock info (and part info) also, as a side
effect, wrote the flash timing register. Instead, be more safe:
"reading" should only read. Write paths still refresh timing,
coping with changes the application code may have made.
Also rename the routine which sets flash timing, indicating what
it's really doing; it's got nothing to do with a "mode".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
By exhausting data on input, the performance will be more
consistent + the code more clearly distinguishes between
polling and processing. A test showed gdb packet load
performance go from ~1550kByte/s to 1650kBytes/s + being
more stable.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Teach ARM11 how to use:
- the new "reset-assert" event
- vector catch to implement "reset halt"
- use SRST more like other cores do
- ... including leaving post-SRST delays up to config scripts
This gives OMAP2420 the ability to reset, and doesn't seem to
cause new iMX31 problems.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I added the remaining devices and device IDs to stellaris.c, and
removed several devices that don't exist on the Stellaris web page.
Additionally, I found a few devices with duplicate IDs ... the DID1
Version Number for LM3Sxxx parts have DID1 Version = 0x0, and for
LM3Sxxxx have DID1 Version = 0x1. So I extended the comparison to
use the VER and FAM fields from DID1 also.
ID=0x33: LM3S812 (DID1v0) and LM3S2616 (DID1v1)
ID=0x39: LM3S808 (DID1v0) and LM3S2276 (DID1v1)
These are the parts I removed from the file for lack of documentation
(no data sheet to confirm part ID):
LM3S318,
LM3S1101, LM3S1108,
LM3S1615, LM3S1616,
LM3S2016,
LM3S2101, LM3S2108,
LM3S3759, LM3S3768,
LM3S5757, LM3S5767, LM3S5768, LM3S5769,
LM3S6815, LM3S6816,
LM3S6915, LM3S6916,
LM3S6111, LM3S6118.
Also, sort devices according to part number.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add a "-ignore-version" to "jtag newtap" which makes the IDCODE
comparison logic optionally ignore version differences.
Update the "scan_chain" command to illustrate this by showing
the "*" character instead of the (ignored) version nibble.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make these ".h" files adopt the same policy the ".c" files already
follow: don't use <subsystem/...h> syntax for private interfaces.
If we ever get reviewed/supported "public" interfaces they should
come exclusively from some include/... directory; that'll be the
time to switch to <...> syntax for any subsystem's own interfaces.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't include <helper/jim.h> from target.h ... not everything
which touches targets needs to be able to talk to Jim. Plus,
most files include this header by another path.
Also, switch the affected files to use the classic sequence
for #included files: all <framework/headers.h> first, then
the "local_headers.h". This helps prevent growth of problematic
layering, by minimizing entanglement.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For some routines that only returned ERROR_OK and where the
caller never checked ... don't bother. Remove some noise,
and bugfix some comments.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Abstract the DPM breakpoint and watchpoint data structures to
have a shared core for housekeeping.
Abstract the code updating the watchpoint registers so that it
can be used to update breakpoint registers. Then do so, when
something has set up the breakpoint state used by this code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Properly detect all of these, including the "2" variants;
and bugfix parameter display for LDC and STC.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
ITR register handling seemed to be giving me problems, so I updated
the comments to better say what the code is trying to do ... and to
note the preconditions (one of which seems to be an issue) as listed
in the ARM1136 TRM.
Also removed the unused "ARM11_TAP_DEFAULT" from the ITR scan code;
all the callers already specify an exit path, since this register
isn't usable with such vague semantics.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This fixes the issue under native win32 of the socket interface not being
enabled (via WSAStartup) before init is called from a script.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
I neglected to copy Magnus' copyright when I moved several
declarations from the ARMv7-M header.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Bugfix the read side of flash protection:
- read the right register(s)!
- handle more than 64K
- record the results in the right places
- don't display garbage.
Partially bugfix the write side:
- use 2KB lock regions instead of 1KB pages (!)
- validate input range
- don't try to _remove_ protection (it's write-once)
- #define values we'll need to commit writes.
- ... still doesn't handle pages over 64KB mark, or commit writes
And minor cleanup and fixes:
- get rid of some forward decls
- properly locate a doxygen comment
- fix some bad indentation
- remove superfluous #include
- add a new part ID (many are still missing)
- make the downloaded algorithm code be read-only
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
These were all basically "can't happen" cases ... like having
state be corrupted by an alpha particle after the previous check
for whether a value was in-range.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most of these happened to be in the target.h file.
Some of those are associated with symbols that could be
removed at some point ... e.g. NVP_ASSERT/true and its
sibling NVP_DEASSERT/false.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The exception being declarations for drivers. Those should
be split out in some clean way -- like driver add/remove calls
made by initialization code -- but that's for another day.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's as if despite integers being 32-bits, GCC refuses to
convert a "uint32_t" to one of them.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Low latency low CPU processing power systems(embedded)
will benefit greatly from being able to inline certain
jtag_add_xxx() fn's. The trick is that this has to be
done in such a way as to allow implementing an OpenOCD
API with a shared library(eventually) on a PC hosted
OpenOCD.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Some versions of GCC don't understand that if you mask with 0x3
then have cases 0-3, it's not possible for a variable assigned in
all those branches to have no value at end-of-case. Feh.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When starting up, say how many hardware breakpoints and watchpoints
are available on various targets.
This makes it easier to tell GDB how many of those resources exist.
Its remote protocol currently has no way to ask OpenOCD for that
information, so it must configured by hand (or not at all).
Update the docs to mention this; remove obsolete "don't do this" info.
Presentation of GDB setup information is still a mess, but at least
it calls out the three components that need setup.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide and use debug_reason_name() instead of expecting targets
to call Jim_Nvp_value2name_simple(). Less dependency on Jim, and
the code becomes more clear too.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Have various ARM cores delegate to arm_arch_state() to display
basic information, instead of duplicating that logic.
This shrinks the code, makes them all report when semihosting
is active, and highlights which data are specific to this core.
(Like ARM720 not having separate instruction and data caches.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move most declarations in <target/armv4_5.h> to <target/arm.h>
and update users.
What's left in the older file is stuff that I think should be
removed ... the old register cache access stuff, which makes it
awkward to support microcontroller profile (Cortex-M) cores.
The armv4_5_run_algorithm() declaration was moved too, even
though it's not yet as generic as it probably ought to be.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename some (mostly) generic ARM functions:
armv4_5_arch_state() --> arm_arch_state()
armv4_5_get_gdb_reg_list() --> arm_get_gdb_reg_list()
armv4_5_init_arch_info() --> arm_init_arch_info()
Cores using the microcontroller profile may want a different
arch_state() routine though.
(Also fix strange indentation in arm_arch_state: use tabs only!
And update a call to it, removing assignment-in-conditional.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the ARM opcode macros from <target/armv4_5.h>, and a few
Thumb2 ones from <target/armv7m.h>, to more appropriate homes
in a new <target/arm_opcodes.h> file.
Removed duplicate opcodes from that v7m/Thumb2 set. Protected
a few macro argument references by adding missing parentheses.
Tightening up some of the line lengths turned up a curious artifact:
the macros for the Thumb opcodes are all 32 bits wide, not 16 bits.
There's currently no explanation for why it's done that way...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Get rid of mrc_opcode() in favor of ARMV4_5_MRC() or, where
arm*20t should have used it, ARMV4_5_MCR() instead.
Basically, *writing* coprocessor registers shouldn't have
used the *read* opcode ... and both should stick to standard
opcode constructors, not rearranging parameter sequence any
more than already needed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The SRS and RFE instructions speed exception entry/exit by
making it easy to save and restore PC and SPSR. This handles
both ARM and Thumb2 encodings.
Fix minor PLD goofage; that "should never reach this point"
can't happen, so remove it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The low two bits are defined as should-be-zero-or-presereved.
We'll take the zero option, it's easier to enforce.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename the existing 'flash banks' implementation as 'flash list', and
replace the broken 'flash_banks' TCL wrapper with a new command handler.
Adds documentation for the new 'flash list' command in the user guide.
The 'flash banks' command produces a list that needs to be formatted
properly for GDB's 'mem info' to work properly. The flash_banks TCL
wrapper provided this formatting, but wrappers no longer work for
second-level commands as they did in the past. With this patch,
the 'flash_banks' command can be used with the new command syntax
and display the required information.
More updates from the code review by Steve Grubb <sgrubb@redhat.com>.
The Jim float-comparision bug just gets a comment not a fix, though.
Cc: Steve Grubb <sgrubb@redhat.com>.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fall back to software breakpoint when vector catch isn't available.
Possible enhancements:
- add extra optional command parameter to select high vectors
- add extra optional command parameter to select hardware breakpoint
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename nand.h as flash/nand/core.h, chase consumers. The public APIs
need to be sorted out with imp.h, but this allows other changes to
begin improving the separation between policy and mechanism.
Moves #include <target/target.h> and #include "driver.h" into the
internal headers or source files, removing it from <flash/nand/core.h>.
Moves commands into nand/tcl.c and core implementation to 'nand/core.c'
and 'nand/fileio.c'. Eliminates 'flash/nand.c'.
Adds 'nand/imp.h' to share routines between TCL commands and core.
This work parallels the NOR directory, encapsulating the NAND drivers
into a separate file. This takes an extra step by encapsulating the
type of data structure used to manage the drivers, allowing it to be
changed from an array to a dynamic list in the future.
Remove an undesirable use of the CPSR symbol ... it needs to vanish.
Flag mode-to-number stuff as obsolete; say why ... should also vanish.
Get rid of no-longer-used mode and state typedefs.
Comment a few of the implicit ties to "classic ARM".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
As with Cortex-A8, the WFAR register holds useful information
that should be recorded and, where relevant, displayed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Tweak scanchain 7 debug messaging:
- show register addresses in decimal, matching ARM docs;
- remove some pointless noise
Avoid some needless roundtrips:
- skip SCAN_N when SCREG already holds that number (speeds up
polling and other common operations)
- avoid zeroing vcr twice on resume
Show the IR opcode as a label ("RESTART") too; and in decimal,
matching ARM docs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the bulk of the flash.h file into flash/nor/core.h, leaving an
empty husk that will be removed in the next patch.
The NOR driver structure is an implementation detail, so move it into
its own private header file <flash/nor/driver.h> along with helper
declaration for finding them by name.
Splits the exec mode commands out of flash.c into the flash/nor/ files.
The routines used by these high-level commands are moved into nor/core.c,
with their internal declarations placed in nor/imp.h.
Fixes distribution of <flash/nor/core.h> header.
Clean up arm_semihosting() entry a bit, comment some issues and just
which SVC opcodes are getting intercepted. Microcontroller profile
cores will need a new entry, since they use BKPT instead (and don't
have either SVC mode or an SPSR register).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Store a flag and errno in in "struct arm".
Have "poll" output report when semihosting is active.
Shrink some of the affected lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The newly moved flash TCL routines access the internals of the module
too much. Fix the layering issues by adding new core NOR flash APIs:
<flash/nor/core.h>:
- flash_driver_find_by_name() - self-descriptive
<flash/nor/imp.h>:
- flash_bank_add() - encapsulates adding banks to bank list
- flash_bank_list() - encapsulates retreiving bank list
This allows the externs in flash/nor/imp.h to be removed, and
these mechanisms may now be re-used by other flash module code.
Moves the top-level 'flash' command handlers into flash/nor/tcl.c,
with flash/nor/imp.h providing an internal implementation header
to share non-public API components.
After previous efforts, only one Jim routine remained in jtag/core.c,
and moving it to jtag/tcl.c painlessly finishes separating these layers.
The headers need separating, but the implementation is clean.
When calling module_register_commands, the return value needs to be
checked for failures. Instead of duplicating code, use an array of
function pointers to the identical registration functions to iterate
over during startup.
Semihosting enables code running on an ARM target to use the
I/O facilities on the host computer. The target application must
be linked against a library that forwards operation requests by
using the SVC instruction that is trapped at the Supervisor Call
vector by the debugger. The "hosted" library version provided
with CodeSourcery's Sourcery G++ Lite for ARM EABI is one example.
This is currently available for ARM9 processors, but any ARM
variant should be able to support this with little additional work.
Tested using binaries compiled with Sourcery G++ Lite 2009q1-161
and ARM RVCT 3.0.
[dbrownell@users.sourceforge.net: doc tweaks, NEWS]
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Updates the ARM NAND I/O code to look at and update the op
field of arm_nand_data to reflect the last operation performed.
It uses this field to copy the correct code to the target in the
case where the struct is used for reads and writes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Modify the arm_nand_data struct to better support both read and
write operations while using the same struct. An additional
field was added, and initialized, to record the last operation
so that the correct code can be loaded to the working area.
[dbrownell@users.sourceforge.net: merge init patch, tweak GPL note]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Created a new function that handles sending a command and the address
information for pages to a NAND device.
[dbrownell@users.sourceforge.net: tweaked line lengths, name 'oob_only']
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Punt to the armv4_5_arch_state() for all the common stuff, to
shrink code and so we will get any improvements it provides.
Don't hide watchpoint status if we happen to be in "abort" mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in both ARM11 and Cortex-A8 having private copies
of the logic sorting out e.g. DBG_REASON_WATCHPOINT.
Add and use a shared routine for this ... there's actually
a bunch more debug entry logic that could be shared, this
is just a start on that. Note that this routine fixes a
bug observed in the ARM11 code, where some abort mode quirks
were displayed as being an unknown debug reason; and also
silences needless ARM11 chatter.
Likewise with private copies of DSCR ... add one to the DPM
struct. Save it as part of setting DBG_REASON_* so later
patches can switch over to using that copy.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For the bits now defined in "arm_dpm.h", switch to the
shared DSCR_* symbol and remove the ARM11_DSCR_* version.
Define DSCR_INT_DIS and use it instead of the ARM11_DSCR_*
sibling symbol. (Note: for both ARM11 and Cortex-A8, this
should arguably be enabled by default when single stepping.)
Remove some other unused declarations in "arm11.h".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the symbols for these bits from "armv7a.h" to "arm_dpm.h",
where they can be seen and used not just by Cortex-A but also
by the ARM11 (armv6) code.
Change them from bit numbers to bit masks ... this matches the
usage in ARM11 code, and also makes it easier to read.
Rename DSCR_EXT_INT_EN as DSCR_ITR_EN to match the docs; it's
enabling ITR functionality, not external interrupts, so this
changes the name to be less misleading. (There *IS* a bit
affecting interrupts, and this isn't it.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This makes Beagle work again, instead of losing horribly because
the JTAG event handlers are no longer able to e.g. "runtest". I
get the previous quirky behavior ... comes up OK but "reset halt"
somewhat mysteriously makes it all better. (Instead of nothing
being able to work at all...) However, I'm still seeing:
The 'init' command must be used before 'init'.
That seems to come from invoking "jtag init", sometime after it
gets mapped to "ocd_jtag init", according to debug message traces.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
To prevent regression in the behavior of 'init', we allow it to run in
any mode. If provided with -c init and with -c noinit, then the second
init at startup caused a spurious mode failure. Let 'init' handle it.
Use a separate variable for iterating GDB service port numbers than
the one set by the user. Restores the behavior of returning the
original port number and only incrementing the port used on success.
now compiles again after include files were moved about
to reduce -I usage and stop using quotes but rather
angle brackets for include files.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Before we can -I the top-level src/ directory alone, references to
"hello.h" must be updated. This is an internal header, so it does
not need angle brackets.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "xsvf.h"
the following form should be used.
#include <xsvf/xsvf.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "svf.h"
the following form should be used.
#include <svf/svf.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "pld.h"
the following form should be used.
#include <pld/pld.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "telnet_server.h"
the following form should be used.
#include <server/telnet_server.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "server.h"
the following form should be used.
#include <server/server.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "httpd.h"
the following form should be used.
#include <server/httpd.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "gdb_server.h"
the following form should be used.
#include <server/gdb_server.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "s3c24xx_regs.h"
the following form should be used.
#include <flash/nand/s3c24xx_regs.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "ocl.h"
the following form should be used.
#include <flash/nor/ocl.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "nand.h"
the following form should be used.
#include <flash/nand.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mflash.h"
the following form should be used.
#include <flash/mflash.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "flash.h"
the following form should be used.
#include <flash/flash.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "arm_nandio.h"
the following form should be used.
#include <flash/arm_nandio.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "trace.h"
the following form should be used.
#include <target/trace.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "target_request.h"
the following form should be used.
#include <target/target_request.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "target.h"
the following form should be used.
#include <target/target.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "register.h"
the following form should be used.
#include <target/register.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mips_ejtag.h"
the following form should be used.
#include <target/mips_ejtag.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mips32_pracc.h"
the following form should be used.
#include <target/mips32_pracc.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "mips32.h"
the following form should be used.
#include <target/mips32.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "image.h"
the following form should be used.
#include <target/image.h>
The exception is from .c files in the same directory.
David Brownell
Dean Glazeski
Øyvind Harboe
mkdorg@users.sourceforge.net
Eric Wetzel
Zachary T Welch
Spencer Oliver
Rafael Campos Las Heras
Mathias Kuester
Nicolas Pitre